diff --git a/.gitignore b/.gitignore index c6127b3..7f6b53f 100644 --- a/.gitignore +++ b/.gitignore @@ -50,3 +50,4 @@ modules.order Module.symvers Mkfile.old dkms.conf +/.metadata/ diff --git a/RemoteSystemsTempFiles/.project b/RemoteSystemsTempFiles/.project new file mode 100644 index 0000000..5447a64 --- /dev/null +++ b/RemoteSystemsTempFiles/.project @@ -0,0 +1,12 @@ + + + RemoteSystemsTempFiles + + + + + + + org.eclipse.rse.ui.remoteSystemsTempNature + + diff --git a/SerialConsoleTemplate/.cproject b/SerialConsoleTemplate/.cproject new file mode 100644 index 0000000..b4df7e5 --- /dev/null +++ b/SerialConsoleTemplate/.cproject @@ -0,0 +1,176 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/SerialConsoleTemplate/.project b/SerialConsoleTemplate/.project new file mode 100644 index 0000000..a65459d --- /dev/null +++ b/SerialConsoleTemplate/.project @@ -0,0 +1,32 @@ + + + SerialConsoleTemplate + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/SerialConsoleTemplate/.settings/language.settings.xml b/SerialConsoleTemplate/.settings/language.settings.xml new file mode 100644 index 0000000..22c26ba --- /dev/null +++ b/SerialConsoleTemplate/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/SerialConsoleTemplate/Debug/.gitignore b/SerialConsoleTemplate/Debug/.gitignore new file mode 100644 index 0000000..ffd9cbe --- /dev/null +++ b/SerialConsoleTemplate/Debug/.gitignore @@ -0,0 +1,6 @@ +/Src/ +/Startup/ +/makefile +/objects.list +/objects.mk +/sources.mk diff --git a/SerialConsoleTemplate/Debug/SerialConsoleTemplate.bin b/SerialConsoleTemplate/Debug/SerialConsoleTemplate.bin new file mode 100644 index 0000000..fffa435 Binary files /dev/null and b/SerialConsoleTemplate/Debug/SerialConsoleTemplate.bin differ diff --git a/SerialConsoleTemplate/Debug/SerialConsoleTemplate.list b/SerialConsoleTemplate/Debug/SerialConsoleTemplate.list new file mode 100644 index 0000000..6ed9412 --- /dev/null +++ b/SerialConsoleTemplate/Debug/SerialConsoleTemplate.list @@ -0,0 +1,9813 @@ + +SerialConsoleTemplate.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001c4 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00005c48 080001d0 080001d0 000101d0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 000004bc 08005e18 08005e18 00015e18 2**3 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 080062d4 080062d4 000201d4 2**0 + CONTENTS + 4 .ARM 00000000 080062d4 080062d4 000201d4 2**0 + CONTENTS + 5 .preinit_array 00000000 080062d4 080062d4 000201d4 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 080062d4 080062d4 000162d4 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 080062d8 080062d8 000162d8 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 000001d4 20000000 080062dc 00020000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000038 200001d4 080064b0 000201d4 2**2 + ALLOC + 10 ._user_heap_stack 00000604 2000020c 080064b0 0002020c 2**0 + ALLOC + 11 .ARM.attributes 0000002a 00000000 00000000 000201d4 2**0 + CONTENTS, READONLY + 12 .debug_info 00002da7 00000000 00000000 000201fe 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 0000087c 00000000 00000000 00022fa5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 00000150 00000000 00000000 00023828 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_ranges 00000108 00000000 00000000 00023978 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 000035b4 00000000 00000000 00023a80 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 00001b04 00000000 00000000 00027034 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 0000a8d5 00000000 00000000 00028b38 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000053 00000000 00000000 0003340d 2**0 + CONTENTS, READONLY + 20 .debug_frame 00001b34 00000000 00000000 00033460 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + +Disassembly of section .text: + +080001d0 <__do_global_dtors_aux>: + 80001d0: b510 push {r4, lr} + 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) + 80001d4: 7823 ldrb r3, [r4, #0] + 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> + 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) + 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> + 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) + 80001de: f3af 8000 nop.w + 80001e2: 2301 movs r3, #1 + 80001e4: 7023 strb r3, [r4, #0] + 80001e6: bd10 pop {r4, pc} + 80001e8: 200001d4 .word 0x200001d4 + 80001ec: 00000000 .word 0x00000000 + 80001f0: 08005e00 .word 0x08005e00 + +080001f4 : + 80001f4: b508 push {r3, lr} + 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) + 80001f8: b11b cbz r3, 8000202 + 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) + 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) + 80001fe: f3af 8000 nop.w + 8000202: bd08 pop {r3, pc} + 8000204: 00000000 .word 0x00000000 + 8000208: 200001d8 .word 0x200001d8 + 800020c: 08005e00 .word 0x08005e00 + +08000210 : + 8000210: 4603 mov r3, r0 + 8000212: f813 2b01 ldrb.w r2, [r3], #1 + 8000216: 2a00 cmp r2, #0 + 8000218: d1fb bne.n 8000212 + 800021a: 1a18 subs r0, r3, r0 + 800021c: 3801 subs r0, #1 + 800021e: 4770 bx lr + +08000220 : + 8000220: f001 01ff and.w r1, r1, #255 ; 0xff + 8000224: 2a10 cmp r2, #16 + 8000226: db2b blt.n 8000280 + 8000228: f010 0f07 tst.w r0, #7 + 800022c: d008 beq.n 8000240 + 800022e: f810 3b01 ldrb.w r3, [r0], #1 + 8000232: 3a01 subs r2, #1 + 8000234: 428b cmp r3, r1 + 8000236: d02d beq.n 8000294 + 8000238: f010 0f07 tst.w r0, #7 + 800023c: b342 cbz r2, 8000290 + 800023e: d1f6 bne.n 800022e + 8000240: b4f0 push {r4, r5, r6, r7} + 8000242: ea41 2101 orr.w r1, r1, r1, lsl #8 + 8000246: ea41 4101 orr.w r1, r1, r1, lsl #16 + 800024a: f022 0407 bic.w r4, r2, #7 + 800024e: f07f 0700 mvns.w r7, #0 + 8000252: 2300 movs r3, #0 + 8000254: e8f0 5602 ldrd r5, r6, [r0], #8 + 8000258: 3c08 subs r4, #8 + 800025a: ea85 0501 eor.w r5, r5, r1 + 800025e: ea86 0601 eor.w r6, r6, r1 + 8000262: fa85 f547 uadd8 r5, r5, r7 + 8000266: faa3 f587 sel r5, r3, r7 + 800026a: fa86 f647 uadd8 r6, r6, r7 + 800026e: faa5 f687 sel r6, r5, r7 + 8000272: b98e cbnz r6, 8000298 + 8000274: d1ee bne.n 8000254 + 8000276: bcf0 pop {r4, r5, r6, r7} + 8000278: f001 01ff and.w r1, r1, #255 ; 0xff + 800027c: f002 0207 and.w r2, r2, #7 + 8000280: b132 cbz r2, 8000290 + 8000282: f810 3b01 ldrb.w r3, [r0], #1 + 8000286: 3a01 subs r2, #1 + 8000288: ea83 0301 eor.w r3, r3, r1 + 800028c: b113 cbz r3, 8000294 + 800028e: d1f8 bne.n 8000282 + 8000290: 2000 movs r0, #0 + 8000292: 4770 bx lr + 8000294: 3801 subs r0, #1 + 8000296: 4770 bx lr + 8000298: 2d00 cmp r5, #0 + 800029a: bf06 itte eq + 800029c: 4635 moveq r5, r6 + 800029e: 3803 subeq r0, #3 + 80002a0: 3807 subne r0, #7 + 80002a2: f015 0f01 tst.w r5, #1 + 80002a6: d107 bne.n 80002b8 + 80002a8: 3001 adds r0, #1 + 80002aa: f415 7f80 tst.w r5, #256 ; 0x100 + 80002ae: bf02 ittt eq + 80002b0: 3001 addeq r0, #1 + 80002b2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000 + 80002b6: 3001 addeq r0, #1 + 80002b8: bcf0 pop {r4, r5, r6, r7} + 80002ba: 3801 subs r0, #1 + 80002bc: 4770 bx lr + 80002be: bf00 nop + +080002c0 <__aeabi_drsub>: + 80002c0: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 + 80002c4: e002 b.n 80002cc <__adddf3> + 80002c6: bf00 nop + +080002c8 <__aeabi_dsub>: + 80002c8: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 + +080002cc <__adddf3>: + 80002cc: b530 push {r4, r5, lr} + 80002ce: ea4f 0441 mov.w r4, r1, lsl #1 + 80002d2: ea4f 0543 mov.w r5, r3, lsl #1 + 80002d6: ea94 0f05 teq r4, r5 + 80002da: bf08 it eq + 80002dc: ea90 0f02 teqeq r0, r2 + 80002e0: bf1f itttt ne + 80002e2: ea54 0c00 orrsne.w ip, r4, r0 + 80002e6: ea55 0c02 orrsne.w ip, r5, r2 + 80002ea: ea7f 5c64 mvnsne.w ip, r4, asr #21 + 80002ee: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80002f2: f000 80e2 beq.w 80004ba <__adddf3+0x1ee> + 80002f6: ea4f 5454 mov.w r4, r4, lsr #21 + 80002fa: ebd4 5555 rsbs r5, r4, r5, lsr #21 + 80002fe: bfb8 it lt + 8000300: 426d neglt r5, r5 + 8000302: dd0c ble.n 800031e <__adddf3+0x52> + 8000304: 442c add r4, r5 + 8000306: ea80 0202 eor.w r2, r0, r2 + 800030a: ea81 0303 eor.w r3, r1, r3 + 800030e: ea82 0000 eor.w r0, r2, r0 + 8000312: ea83 0101 eor.w r1, r3, r1 + 8000316: ea80 0202 eor.w r2, r0, r2 + 800031a: ea81 0303 eor.w r3, r1, r3 + 800031e: 2d36 cmp r5, #54 ; 0x36 + 8000320: bf88 it hi + 8000322: bd30 pophi {r4, r5, pc} + 8000324: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 + 8000328: ea4f 3101 mov.w r1, r1, lsl #12 + 800032c: f44f 1c80 mov.w ip, #1048576 ; 0x100000 + 8000330: ea4c 3111 orr.w r1, ip, r1, lsr #12 + 8000334: d002 beq.n 800033c <__adddf3+0x70> + 8000336: 4240 negs r0, r0 + 8000338: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 800033c: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 + 8000340: ea4f 3303 mov.w r3, r3, lsl #12 + 8000344: ea4c 3313 orr.w r3, ip, r3, lsr #12 + 8000348: d002 beq.n 8000350 <__adddf3+0x84> + 800034a: 4252 negs r2, r2 + 800034c: eb63 0343 sbc.w r3, r3, r3, lsl #1 + 8000350: ea94 0f05 teq r4, r5 + 8000354: f000 80a7 beq.w 80004a6 <__adddf3+0x1da> + 8000358: f1a4 0401 sub.w r4, r4, #1 + 800035c: f1d5 0e20 rsbs lr, r5, #32 + 8000360: db0d blt.n 800037e <__adddf3+0xb2> + 8000362: fa02 fc0e lsl.w ip, r2, lr + 8000366: fa22 f205 lsr.w r2, r2, r5 + 800036a: 1880 adds r0, r0, r2 + 800036c: f141 0100 adc.w r1, r1, #0 + 8000370: fa03 f20e lsl.w r2, r3, lr + 8000374: 1880 adds r0, r0, r2 + 8000376: fa43 f305 asr.w r3, r3, r5 + 800037a: 4159 adcs r1, r3 + 800037c: e00e b.n 800039c <__adddf3+0xd0> + 800037e: f1a5 0520 sub.w r5, r5, #32 + 8000382: f10e 0e20 add.w lr, lr, #32 + 8000386: 2a01 cmp r2, #1 + 8000388: fa03 fc0e lsl.w ip, r3, lr + 800038c: bf28 it cs + 800038e: f04c 0c02 orrcs.w ip, ip, #2 + 8000392: fa43 f305 asr.w r3, r3, r5 + 8000396: 18c0 adds r0, r0, r3 + 8000398: eb51 71e3 adcs.w r1, r1, r3, asr #31 + 800039c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 + 80003a0: d507 bpl.n 80003b2 <__adddf3+0xe6> + 80003a2: f04f 0e00 mov.w lr, #0 + 80003a6: f1dc 0c00 rsbs ip, ip, #0 + 80003aa: eb7e 0000 sbcs.w r0, lr, r0 + 80003ae: eb6e 0101 sbc.w r1, lr, r1 + 80003b2: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 + 80003b6: d31b bcc.n 80003f0 <__adddf3+0x124> + 80003b8: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 + 80003bc: d30c bcc.n 80003d8 <__adddf3+0x10c> + 80003be: 0849 lsrs r1, r1, #1 + 80003c0: ea5f 0030 movs.w r0, r0, rrx + 80003c4: ea4f 0c3c mov.w ip, ip, rrx + 80003c8: f104 0401 add.w r4, r4, #1 + 80003cc: ea4f 5244 mov.w r2, r4, lsl #21 + 80003d0: f512 0f80 cmn.w r2, #4194304 ; 0x400000 + 80003d4: f080 809a bcs.w 800050c <__adddf3+0x240> + 80003d8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 + 80003dc: bf08 it eq + 80003de: ea5f 0c50 movseq.w ip, r0, lsr #1 + 80003e2: f150 0000 adcs.w r0, r0, #0 + 80003e6: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80003ea: ea41 0105 orr.w r1, r1, r5 + 80003ee: bd30 pop {r4, r5, pc} + 80003f0: ea5f 0c4c movs.w ip, ip, lsl #1 + 80003f4: 4140 adcs r0, r0 + 80003f6: eb41 0101 adc.w r1, r1, r1 + 80003fa: 3c01 subs r4, #1 + 80003fc: bf28 it cs + 80003fe: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000 + 8000402: d2e9 bcs.n 80003d8 <__adddf3+0x10c> + 8000404: f091 0f00 teq r1, #0 + 8000408: bf04 itt eq + 800040a: 4601 moveq r1, r0 + 800040c: 2000 moveq r0, #0 + 800040e: fab1 f381 clz r3, r1 + 8000412: bf08 it eq + 8000414: 3320 addeq r3, #32 + 8000416: f1a3 030b sub.w r3, r3, #11 + 800041a: f1b3 0220 subs.w r2, r3, #32 + 800041e: da0c bge.n 800043a <__adddf3+0x16e> + 8000420: 320c adds r2, #12 + 8000422: dd08 ble.n 8000436 <__adddf3+0x16a> + 8000424: f102 0c14 add.w ip, r2, #20 + 8000428: f1c2 020c rsb r2, r2, #12 + 800042c: fa01 f00c lsl.w r0, r1, ip + 8000430: fa21 f102 lsr.w r1, r1, r2 + 8000434: e00c b.n 8000450 <__adddf3+0x184> + 8000436: f102 0214 add.w r2, r2, #20 + 800043a: bfd8 it le + 800043c: f1c2 0c20 rsble ip, r2, #32 + 8000440: fa01 f102 lsl.w r1, r1, r2 + 8000444: fa20 fc0c lsr.w ip, r0, ip + 8000448: bfdc itt le + 800044a: ea41 010c orrle.w r1, r1, ip + 800044e: 4090 lslle r0, r2 + 8000450: 1ae4 subs r4, r4, r3 + 8000452: bfa2 ittt ge + 8000454: eb01 5104 addge.w r1, r1, r4, lsl #20 + 8000458: 4329 orrge r1, r5 + 800045a: bd30 popge {r4, r5, pc} + 800045c: ea6f 0404 mvn.w r4, r4 + 8000460: 3c1f subs r4, #31 + 8000462: da1c bge.n 800049e <__adddf3+0x1d2> + 8000464: 340c adds r4, #12 + 8000466: dc0e bgt.n 8000486 <__adddf3+0x1ba> + 8000468: f104 0414 add.w r4, r4, #20 + 800046c: f1c4 0220 rsb r2, r4, #32 + 8000470: fa20 f004 lsr.w r0, r0, r4 + 8000474: fa01 f302 lsl.w r3, r1, r2 + 8000478: ea40 0003 orr.w r0, r0, r3 + 800047c: fa21 f304 lsr.w r3, r1, r4 + 8000480: ea45 0103 orr.w r1, r5, r3 + 8000484: bd30 pop {r4, r5, pc} + 8000486: f1c4 040c rsb r4, r4, #12 + 800048a: f1c4 0220 rsb r2, r4, #32 + 800048e: fa20 f002 lsr.w r0, r0, r2 + 8000492: fa01 f304 lsl.w r3, r1, r4 + 8000496: ea40 0003 orr.w r0, r0, r3 + 800049a: 4629 mov r1, r5 + 800049c: bd30 pop {r4, r5, pc} + 800049e: fa21 f004 lsr.w r0, r1, r4 + 80004a2: 4629 mov r1, r5 + 80004a4: bd30 pop {r4, r5, pc} + 80004a6: f094 0f00 teq r4, #0 + 80004aa: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 + 80004ae: bf06 itte eq + 80004b0: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 + 80004b4: 3401 addeq r4, #1 + 80004b6: 3d01 subne r5, #1 + 80004b8: e74e b.n 8000358 <__adddf3+0x8c> + 80004ba: ea7f 5c64 mvns.w ip, r4, asr #21 + 80004be: bf18 it ne + 80004c0: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80004c4: d029 beq.n 800051a <__adddf3+0x24e> + 80004c6: ea94 0f05 teq r4, r5 + 80004ca: bf08 it eq + 80004cc: ea90 0f02 teqeq r0, r2 + 80004d0: d005 beq.n 80004de <__adddf3+0x212> + 80004d2: ea54 0c00 orrs.w ip, r4, r0 + 80004d6: bf04 itt eq + 80004d8: 4619 moveq r1, r3 + 80004da: 4610 moveq r0, r2 + 80004dc: bd30 pop {r4, r5, pc} + 80004de: ea91 0f03 teq r1, r3 + 80004e2: bf1e ittt ne + 80004e4: 2100 movne r1, #0 + 80004e6: 2000 movne r0, #0 + 80004e8: bd30 popne {r4, r5, pc} + 80004ea: ea5f 5c54 movs.w ip, r4, lsr #21 + 80004ee: d105 bne.n 80004fc <__adddf3+0x230> + 80004f0: 0040 lsls r0, r0, #1 + 80004f2: 4149 adcs r1, r1 + 80004f4: bf28 it cs + 80004f6: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 + 80004fa: bd30 pop {r4, r5, pc} + 80004fc: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 + 8000500: bf3c itt cc + 8000502: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 + 8000506: bd30 popcc {r4, r5, pc} + 8000508: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 + 800050c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 + 8000510: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 + 8000514: f04f 0000 mov.w r0, #0 + 8000518: bd30 pop {r4, r5, pc} + 800051a: ea7f 5c64 mvns.w ip, r4, asr #21 + 800051e: bf1a itte ne + 8000520: 4619 movne r1, r3 + 8000522: 4610 movne r0, r2 + 8000524: ea7f 5c65 mvnseq.w ip, r5, asr #21 + 8000528: bf1c itt ne + 800052a: 460b movne r3, r1 + 800052c: 4602 movne r2, r0 + 800052e: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 8000532: bf06 itte eq + 8000534: ea52 3503 orrseq.w r5, r2, r3, lsl #12 + 8000538: ea91 0f03 teqeq r1, r3 + 800053c: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 + 8000540: bd30 pop {r4, r5, pc} + 8000542: bf00 nop + +08000544 <__aeabi_ui2d>: + 8000544: f090 0f00 teq r0, #0 + 8000548: bf04 itt eq + 800054a: 2100 moveq r1, #0 + 800054c: 4770 bxeq lr + 800054e: b530 push {r4, r5, lr} + 8000550: f44f 6480 mov.w r4, #1024 ; 0x400 + 8000554: f104 0432 add.w r4, r4, #50 ; 0x32 + 8000558: f04f 0500 mov.w r5, #0 + 800055c: f04f 0100 mov.w r1, #0 + 8000560: e750 b.n 8000404 <__adddf3+0x138> + 8000562: bf00 nop + +08000564 <__aeabi_i2d>: + 8000564: f090 0f00 teq r0, #0 + 8000568: bf04 itt eq + 800056a: 2100 moveq r1, #0 + 800056c: 4770 bxeq lr + 800056e: b530 push {r4, r5, lr} + 8000570: f44f 6480 mov.w r4, #1024 ; 0x400 + 8000574: f104 0432 add.w r4, r4, #50 ; 0x32 + 8000578: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 + 800057c: bf48 it mi + 800057e: 4240 negmi r0, r0 + 8000580: f04f 0100 mov.w r1, #0 + 8000584: e73e b.n 8000404 <__adddf3+0x138> + 8000586: bf00 nop + +08000588 <__aeabi_f2d>: + 8000588: 0042 lsls r2, r0, #1 + 800058a: ea4f 01e2 mov.w r1, r2, asr #3 + 800058e: ea4f 0131 mov.w r1, r1, rrx + 8000592: ea4f 7002 mov.w r0, r2, lsl #28 + 8000596: bf1f itttt ne + 8000598: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 + 800059c: f093 4f7f teqne r3, #4278190080 ; 0xff000000 + 80005a0: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 + 80005a4: 4770 bxne lr + 80005a6: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 + 80005aa: bf08 it eq + 80005ac: 4770 bxeq lr + 80005ae: f093 4f7f teq r3, #4278190080 ; 0xff000000 + 80005b2: bf04 itt eq + 80005b4: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 + 80005b8: 4770 bxeq lr + 80005ba: b530 push {r4, r5, lr} + 80005bc: f44f 7460 mov.w r4, #896 ; 0x380 + 80005c0: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 + 80005c4: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 80005c8: e71c b.n 8000404 <__adddf3+0x138> + 80005ca: bf00 nop + +080005cc <__aeabi_ul2d>: + 80005cc: ea50 0201 orrs.w r2, r0, r1 + 80005d0: bf08 it eq + 80005d2: 4770 bxeq lr + 80005d4: b530 push {r4, r5, lr} + 80005d6: f04f 0500 mov.w r5, #0 + 80005da: e00a b.n 80005f2 <__aeabi_l2d+0x16> + +080005dc <__aeabi_l2d>: + 80005dc: ea50 0201 orrs.w r2, r0, r1 + 80005e0: bf08 it eq + 80005e2: 4770 bxeq lr + 80005e4: b530 push {r4, r5, lr} + 80005e6: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 + 80005ea: d502 bpl.n 80005f2 <__aeabi_l2d+0x16> + 80005ec: 4240 negs r0, r0 + 80005ee: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 80005f2: f44f 6480 mov.w r4, #1024 ; 0x400 + 80005f6: f104 0432 add.w r4, r4, #50 ; 0x32 + 80005fa: ea5f 5c91 movs.w ip, r1, lsr #22 + 80005fe: f43f aed8 beq.w 80003b2 <__adddf3+0xe6> + 8000602: f04f 0203 mov.w r2, #3 + 8000606: ea5f 0cdc movs.w ip, ip, lsr #3 + 800060a: bf18 it ne + 800060c: 3203 addne r2, #3 + 800060e: ea5f 0cdc movs.w ip, ip, lsr #3 + 8000612: bf18 it ne + 8000614: 3203 addne r2, #3 + 8000616: eb02 02dc add.w r2, r2, ip, lsr #3 + 800061a: f1c2 0320 rsb r3, r2, #32 + 800061e: fa00 fc03 lsl.w ip, r0, r3 + 8000622: fa20 f002 lsr.w r0, r0, r2 + 8000626: fa01 fe03 lsl.w lr, r1, r3 + 800062a: ea40 000e orr.w r0, r0, lr + 800062e: fa21 f102 lsr.w r1, r1, r2 + 8000632: 4414 add r4, r2 + 8000634: e6bd b.n 80003b2 <__adddf3+0xe6> + 8000636: bf00 nop + +08000638 <__aeabi_dmul>: + 8000638: b570 push {r4, r5, r6, lr} + 800063a: f04f 0cff mov.w ip, #255 ; 0xff + 800063e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 + 8000642: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 8000646: bf1d ittte ne + 8000648: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 800064c: ea94 0f0c teqne r4, ip + 8000650: ea95 0f0c teqne r5, ip + 8000654: f000 f8de bleq 8000814 <__aeabi_dmul+0x1dc> + 8000658: 442c add r4, r5 + 800065a: ea81 0603 eor.w r6, r1, r3 + 800065e: ea21 514c bic.w r1, r1, ip, lsl #21 + 8000662: ea23 534c bic.w r3, r3, ip, lsl #21 + 8000666: ea50 3501 orrs.w r5, r0, r1, lsl #12 + 800066a: bf18 it ne + 800066c: ea52 3503 orrsne.w r5, r2, r3, lsl #12 + 8000670: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 8000674: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8000678: d038 beq.n 80006ec <__aeabi_dmul+0xb4> + 800067a: fba0 ce02 umull ip, lr, r0, r2 + 800067e: f04f 0500 mov.w r5, #0 + 8000682: fbe1 e502 umlal lr, r5, r1, r2 + 8000686: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 + 800068a: fbe0 e503 umlal lr, r5, r0, r3 + 800068e: f04f 0600 mov.w r6, #0 + 8000692: fbe1 5603 umlal r5, r6, r1, r3 + 8000696: f09c 0f00 teq ip, #0 + 800069a: bf18 it ne + 800069c: f04e 0e01 orrne.w lr, lr, #1 + 80006a0: f1a4 04ff sub.w r4, r4, #255 ; 0xff + 80006a4: f5b6 7f00 cmp.w r6, #512 ; 0x200 + 80006a8: f564 7440 sbc.w r4, r4, #768 ; 0x300 + 80006ac: d204 bcs.n 80006b8 <__aeabi_dmul+0x80> + 80006ae: ea5f 0e4e movs.w lr, lr, lsl #1 + 80006b2: 416d adcs r5, r5 + 80006b4: eb46 0606 adc.w r6, r6, r6 + 80006b8: ea42 21c6 orr.w r1, r2, r6, lsl #11 + 80006bc: ea41 5155 orr.w r1, r1, r5, lsr #21 + 80006c0: ea4f 20c5 mov.w r0, r5, lsl #11 + 80006c4: ea40 505e orr.w r0, r0, lr, lsr #21 + 80006c8: ea4f 2ece mov.w lr, lr, lsl #11 + 80006cc: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd + 80006d0: bf88 it hi + 80006d2: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 + 80006d6: d81e bhi.n 8000716 <__aeabi_dmul+0xde> + 80006d8: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 + 80006dc: bf08 it eq + 80006de: ea5f 0e50 movseq.w lr, r0, lsr #1 + 80006e2: f150 0000 adcs.w r0, r0, #0 + 80006e6: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80006ea: bd70 pop {r4, r5, r6, pc} + 80006ec: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 + 80006f0: ea46 0101 orr.w r1, r6, r1 + 80006f4: ea40 0002 orr.w r0, r0, r2 + 80006f8: ea81 0103 eor.w r1, r1, r3 + 80006fc: ebb4 045c subs.w r4, r4, ip, lsr #1 + 8000700: bfc2 ittt gt + 8000702: ebd4 050c rsbsgt r5, r4, ip + 8000706: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 800070a: bd70 popgt {r4, r5, r6, pc} + 800070c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 8000710: f04f 0e00 mov.w lr, #0 + 8000714: 3c01 subs r4, #1 + 8000716: f300 80ab bgt.w 8000870 <__aeabi_dmul+0x238> + 800071a: f114 0f36 cmn.w r4, #54 ; 0x36 + 800071e: bfde ittt le + 8000720: 2000 movle r0, #0 + 8000722: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 + 8000726: bd70 pople {r4, r5, r6, pc} + 8000728: f1c4 0400 rsb r4, r4, #0 + 800072c: 3c20 subs r4, #32 + 800072e: da35 bge.n 800079c <__aeabi_dmul+0x164> + 8000730: 340c adds r4, #12 + 8000732: dc1b bgt.n 800076c <__aeabi_dmul+0x134> + 8000734: f104 0414 add.w r4, r4, #20 + 8000738: f1c4 0520 rsb r5, r4, #32 + 800073c: fa00 f305 lsl.w r3, r0, r5 + 8000740: fa20 f004 lsr.w r0, r0, r4 + 8000744: fa01 f205 lsl.w r2, r1, r5 + 8000748: ea40 0002 orr.w r0, r0, r2 + 800074c: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 + 8000750: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 8000754: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 8000758: fa21 f604 lsr.w r6, r1, r4 + 800075c: eb42 0106 adc.w r1, r2, r6 + 8000760: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000764: bf08 it eq + 8000766: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800076a: bd70 pop {r4, r5, r6, pc} + 800076c: f1c4 040c rsb r4, r4, #12 + 8000770: f1c4 0520 rsb r5, r4, #32 + 8000774: fa00 f304 lsl.w r3, r0, r4 + 8000778: fa20 f005 lsr.w r0, r0, r5 + 800077c: fa01 f204 lsl.w r2, r1, r4 + 8000780: ea40 0002 orr.w r0, r0, r2 + 8000784: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000788: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 800078c: f141 0100 adc.w r1, r1, #0 + 8000790: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000794: bf08 it eq + 8000796: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800079a: bd70 pop {r4, r5, r6, pc} + 800079c: f1c4 0520 rsb r5, r4, #32 + 80007a0: fa00 f205 lsl.w r2, r0, r5 + 80007a4: ea4e 0e02 orr.w lr, lr, r2 + 80007a8: fa20 f304 lsr.w r3, r0, r4 + 80007ac: fa01 f205 lsl.w r2, r1, r5 + 80007b0: ea43 0302 orr.w r3, r3, r2 + 80007b4: fa21 f004 lsr.w r0, r1, r4 + 80007b8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 80007bc: fa21 f204 lsr.w r2, r1, r4 + 80007c0: ea20 0002 bic.w r0, r0, r2 + 80007c4: eb00 70d3 add.w r0, r0, r3, lsr #31 + 80007c8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 80007cc: bf08 it eq + 80007ce: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80007d2: bd70 pop {r4, r5, r6, pc} + 80007d4: f094 0f00 teq r4, #0 + 80007d8: d10f bne.n 80007fa <__aeabi_dmul+0x1c2> + 80007da: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 + 80007de: 0040 lsls r0, r0, #1 + 80007e0: eb41 0101 adc.w r1, r1, r1 + 80007e4: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 80007e8: bf08 it eq + 80007ea: 3c01 subeq r4, #1 + 80007ec: d0f7 beq.n 80007de <__aeabi_dmul+0x1a6> + 80007ee: ea41 0106 orr.w r1, r1, r6 + 80007f2: f095 0f00 teq r5, #0 + 80007f6: bf18 it ne + 80007f8: 4770 bxne lr + 80007fa: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 + 80007fe: 0052 lsls r2, r2, #1 + 8000800: eb43 0303 adc.w r3, r3, r3 + 8000804: f413 1f80 tst.w r3, #1048576 ; 0x100000 + 8000808: bf08 it eq + 800080a: 3d01 subeq r5, #1 + 800080c: d0f7 beq.n 80007fe <__aeabi_dmul+0x1c6> + 800080e: ea43 0306 orr.w r3, r3, r6 + 8000812: 4770 bx lr + 8000814: ea94 0f0c teq r4, ip + 8000818: ea0c 5513 and.w r5, ip, r3, lsr #20 + 800081c: bf18 it ne + 800081e: ea95 0f0c teqne r5, ip + 8000822: d00c beq.n 800083e <__aeabi_dmul+0x206> + 8000824: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000828: bf18 it ne + 800082a: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 800082e: d1d1 bne.n 80007d4 <__aeabi_dmul+0x19c> + 8000830: ea81 0103 eor.w r1, r1, r3 + 8000834: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000838: f04f 0000 mov.w r0, #0 + 800083c: bd70 pop {r4, r5, r6, pc} + 800083e: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000842: bf06 itte eq + 8000844: 4610 moveq r0, r2 + 8000846: 4619 moveq r1, r3 + 8000848: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 800084c: d019 beq.n 8000882 <__aeabi_dmul+0x24a> + 800084e: ea94 0f0c teq r4, ip + 8000852: d102 bne.n 800085a <__aeabi_dmul+0x222> + 8000854: ea50 3601 orrs.w r6, r0, r1, lsl #12 + 8000858: d113 bne.n 8000882 <__aeabi_dmul+0x24a> + 800085a: ea95 0f0c teq r5, ip + 800085e: d105 bne.n 800086c <__aeabi_dmul+0x234> + 8000860: ea52 3603 orrs.w r6, r2, r3, lsl #12 + 8000864: bf1c itt ne + 8000866: 4610 movne r0, r2 + 8000868: 4619 movne r1, r3 + 800086a: d10a bne.n 8000882 <__aeabi_dmul+0x24a> + 800086c: ea81 0103 eor.w r1, r1, r3 + 8000870: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000874: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 + 8000878: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 + 800087c: f04f 0000 mov.w r0, #0 + 8000880: bd70 pop {r4, r5, r6, pc} + 8000882: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 + 8000886: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 + 800088a: bd70 pop {r4, r5, r6, pc} + +0800088c <__aeabi_ddiv>: + 800088c: b570 push {r4, r5, r6, lr} + 800088e: f04f 0cff mov.w ip, #255 ; 0xff + 8000892: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 + 8000896: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 800089a: bf1d ittte ne + 800089c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 80008a0: ea94 0f0c teqne r4, ip + 80008a4: ea95 0f0c teqne r5, ip + 80008a8: f000 f8a7 bleq 80009fa <__aeabi_ddiv+0x16e> + 80008ac: eba4 0405 sub.w r4, r4, r5 + 80008b0: ea81 0e03 eor.w lr, r1, r3 + 80008b4: ea52 3503 orrs.w r5, r2, r3, lsl #12 + 80008b8: ea4f 3101 mov.w r1, r1, lsl #12 + 80008bc: f000 8088 beq.w 80009d0 <__aeabi_ddiv+0x144> + 80008c0: ea4f 3303 mov.w r3, r3, lsl #12 + 80008c4: f04f 5580 mov.w r5, #268435456 ; 0x10000000 + 80008c8: ea45 1313 orr.w r3, r5, r3, lsr #4 + 80008cc: ea43 6312 orr.w r3, r3, r2, lsr #24 + 80008d0: ea4f 2202 mov.w r2, r2, lsl #8 + 80008d4: ea45 1511 orr.w r5, r5, r1, lsr #4 + 80008d8: ea45 6510 orr.w r5, r5, r0, lsr #24 + 80008dc: ea4f 2600 mov.w r6, r0, lsl #8 + 80008e0: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 + 80008e4: 429d cmp r5, r3 + 80008e6: bf08 it eq + 80008e8: 4296 cmpeq r6, r2 + 80008ea: f144 04fd adc.w r4, r4, #253 ; 0xfd + 80008ee: f504 7440 add.w r4, r4, #768 ; 0x300 + 80008f2: d202 bcs.n 80008fa <__aeabi_ddiv+0x6e> + 80008f4: 085b lsrs r3, r3, #1 + 80008f6: ea4f 0232 mov.w r2, r2, rrx + 80008fa: 1ab6 subs r6, r6, r2 + 80008fc: eb65 0503 sbc.w r5, r5, r3 + 8000900: 085b lsrs r3, r3, #1 + 8000902: ea4f 0232 mov.w r2, r2, rrx + 8000906: f44f 1080 mov.w r0, #1048576 ; 0x100000 + 800090a: f44f 2c00 mov.w ip, #524288 ; 0x80000 + 800090e: ebb6 0e02 subs.w lr, r6, r2 + 8000912: eb75 0e03 sbcs.w lr, r5, r3 + 8000916: bf22 ittt cs + 8000918: 1ab6 subcs r6, r6, r2 + 800091a: 4675 movcs r5, lr + 800091c: ea40 000c orrcs.w r0, r0, ip + 8000920: 085b lsrs r3, r3, #1 + 8000922: ea4f 0232 mov.w r2, r2, rrx + 8000926: ebb6 0e02 subs.w lr, r6, r2 + 800092a: eb75 0e03 sbcs.w lr, r5, r3 + 800092e: bf22 ittt cs + 8000930: 1ab6 subcs r6, r6, r2 + 8000932: 4675 movcs r5, lr + 8000934: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 8000938: 085b lsrs r3, r3, #1 + 800093a: ea4f 0232 mov.w r2, r2, rrx + 800093e: ebb6 0e02 subs.w lr, r6, r2 + 8000942: eb75 0e03 sbcs.w lr, r5, r3 + 8000946: bf22 ittt cs + 8000948: 1ab6 subcs r6, r6, r2 + 800094a: 4675 movcs r5, lr + 800094c: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 8000950: 085b lsrs r3, r3, #1 + 8000952: ea4f 0232 mov.w r2, r2, rrx + 8000956: ebb6 0e02 subs.w lr, r6, r2 + 800095a: eb75 0e03 sbcs.w lr, r5, r3 + 800095e: bf22 ittt cs + 8000960: 1ab6 subcs r6, r6, r2 + 8000962: 4675 movcs r5, lr + 8000964: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000968: ea55 0e06 orrs.w lr, r5, r6 + 800096c: d018 beq.n 80009a0 <__aeabi_ddiv+0x114> + 800096e: ea4f 1505 mov.w r5, r5, lsl #4 + 8000972: ea45 7516 orr.w r5, r5, r6, lsr #28 + 8000976: ea4f 1606 mov.w r6, r6, lsl #4 + 800097a: ea4f 03c3 mov.w r3, r3, lsl #3 + 800097e: ea43 7352 orr.w r3, r3, r2, lsr #29 + 8000982: ea4f 02c2 mov.w r2, r2, lsl #3 + 8000986: ea5f 1c1c movs.w ip, ip, lsr #4 + 800098a: d1c0 bne.n 800090e <__aeabi_ddiv+0x82> + 800098c: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 8000990: d10b bne.n 80009aa <__aeabi_ddiv+0x11e> + 8000992: ea41 0100 orr.w r1, r1, r0 + 8000996: f04f 0000 mov.w r0, #0 + 800099a: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 + 800099e: e7b6 b.n 800090e <__aeabi_ddiv+0x82> + 80009a0: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 80009a4: bf04 itt eq + 80009a6: 4301 orreq r1, r0 + 80009a8: 2000 moveq r0, #0 + 80009aa: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd + 80009ae: bf88 it hi + 80009b0: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 + 80009b4: f63f aeaf bhi.w 8000716 <__aeabi_dmul+0xde> + 80009b8: ebb5 0c03 subs.w ip, r5, r3 + 80009bc: bf04 itt eq + 80009be: ebb6 0c02 subseq.w ip, r6, r2 + 80009c2: ea5f 0c50 movseq.w ip, r0, lsr #1 + 80009c6: f150 0000 adcs.w r0, r0, #0 + 80009ca: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80009ce: bd70 pop {r4, r5, r6, pc} + 80009d0: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 + 80009d4: ea4e 3111 orr.w r1, lr, r1, lsr #12 + 80009d8: eb14 045c adds.w r4, r4, ip, lsr #1 + 80009dc: bfc2 ittt gt + 80009de: ebd4 050c rsbsgt r5, r4, ip + 80009e2: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 80009e6: bd70 popgt {r4, r5, r6, pc} + 80009e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 80009ec: f04f 0e00 mov.w lr, #0 + 80009f0: 3c01 subs r4, #1 + 80009f2: e690 b.n 8000716 <__aeabi_dmul+0xde> + 80009f4: ea45 0e06 orr.w lr, r5, r6 + 80009f8: e68d b.n 8000716 <__aeabi_dmul+0xde> + 80009fa: ea0c 5513 and.w r5, ip, r3, lsr #20 + 80009fe: ea94 0f0c teq r4, ip + 8000a02: bf08 it eq + 8000a04: ea95 0f0c teqeq r5, ip + 8000a08: f43f af3b beq.w 8000882 <__aeabi_dmul+0x24a> + 8000a0c: ea94 0f0c teq r4, ip + 8000a10: d10a bne.n 8000a28 <__aeabi_ddiv+0x19c> + 8000a12: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 8000a16: f47f af34 bne.w 8000882 <__aeabi_dmul+0x24a> + 8000a1a: ea95 0f0c teq r5, ip + 8000a1e: f47f af25 bne.w 800086c <__aeabi_dmul+0x234> + 8000a22: 4610 mov r0, r2 + 8000a24: 4619 mov r1, r3 + 8000a26: e72c b.n 8000882 <__aeabi_dmul+0x24a> + 8000a28: ea95 0f0c teq r5, ip + 8000a2c: d106 bne.n 8000a3c <__aeabi_ddiv+0x1b0> + 8000a2e: ea52 3503 orrs.w r5, r2, r3, lsl #12 + 8000a32: f43f aefd beq.w 8000830 <__aeabi_dmul+0x1f8> + 8000a36: 4610 mov r0, r2 + 8000a38: 4619 mov r1, r3 + 8000a3a: e722 b.n 8000882 <__aeabi_dmul+0x24a> + 8000a3c: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000a40: bf18 it ne + 8000a42: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000a46: f47f aec5 bne.w 80007d4 <__aeabi_dmul+0x19c> + 8000a4a: ea50 0441 orrs.w r4, r0, r1, lsl #1 + 8000a4e: f47f af0d bne.w 800086c <__aeabi_dmul+0x234> + 8000a52: ea52 0543 orrs.w r5, r2, r3, lsl #1 + 8000a56: f47f aeeb bne.w 8000830 <__aeabi_dmul+0x1f8> + 8000a5a: e712 b.n 8000882 <__aeabi_dmul+0x24a> + +08000a5c <__gedf2>: + 8000a5c: f04f 3cff mov.w ip, #4294967295 + 8000a60: e006 b.n 8000a70 <__cmpdf2+0x4> + 8000a62: bf00 nop + +08000a64 <__ledf2>: + 8000a64: f04f 0c01 mov.w ip, #1 + 8000a68: e002 b.n 8000a70 <__cmpdf2+0x4> + 8000a6a: bf00 nop + +08000a6c <__cmpdf2>: + 8000a6c: f04f 0c01 mov.w ip, #1 + 8000a70: f84d cd04 str.w ip, [sp, #-4]! + 8000a74: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000a78: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000a7c: ea4f 0c43 mov.w ip, r3, lsl #1 + 8000a80: bf18 it ne + 8000a82: ea7f 5c6c mvnsne.w ip, ip, asr #21 + 8000a86: d01b beq.n 8000ac0 <__cmpdf2+0x54> + 8000a88: b001 add sp, #4 + 8000a8a: ea50 0c41 orrs.w ip, r0, r1, lsl #1 + 8000a8e: bf0c ite eq + 8000a90: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 + 8000a94: ea91 0f03 teqne r1, r3 + 8000a98: bf02 ittt eq + 8000a9a: ea90 0f02 teqeq r0, r2 + 8000a9e: 2000 moveq r0, #0 + 8000aa0: 4770 bxeq lr + 8000aa2: f110 0f00 cmn.w r0, #0 + 8000aa6: ea91 0f03 teq r1, r3 + 8000aaa: bf58 it pl + 8000aac: 4299 cmppl r1, r3 + 8000aae: bf08 it eq + 8000ab0: 4290 cmpeq r0, r2 + 8000ab2: bf2c ite cs + 8000ab4: 17d8 asrcs r0, r3, #31 + 8000ab6: ea6f 70e3 mvncc.w r0, r3, asr #31 + 8000aba: f040 0001 orr.w r0, r0, #1 + 8000abe: 4770 bx lr + 8000ac0: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000ac4: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000ac8: d102 bne.n 8000ad0 <__cmpdf2+0x64> + 8000aca: ea50 3c01 orrs.w ip, r0, r1, lsl #12 + 8000ace: d107 bne.n 8000ae0 <__cmpdf2+0x74> + 8000ad0: ea4f 0c43 mov.w ip, r3, lsl #1 + 8000ad4: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000ad8: d1d6 bne.n 8000a88 <__cmpdf2+0x1c> + 8000ada: ea52 3c03 orrs.w ip, r2, r3, lsl #12 + 8000ade: d0d3 beq.n 8000a88 <__cmpdf2+0x1c> + 8000ae0: f85d 0b04 ldr.w r0, [sp], #4 + 8000ae4: 4770 bx lr + 8000ae6: bf00 nop + +08000ae8 <__aeabi_cdrcmple>: + 8000ae8: 4684 mov ip, r0 + 8000aea: 4610 mov r0, r2 + 8000aec: 4662 mov r2, ip + 8000aee: 468c mov ip, r1 + 8000af0: 4619 mov r1, r3 + 8000af2: 4663 mov r3, ip + 8000af4: e000 b.n 8000af8 <__aeabi_cdcmpeq> + 8000af6: bf00 nop + +08000af8 <__aeabi_cdcmpeq>: + 8000af8: b501 push {r0, lr} + 8000afa: f7ff ffb7 bl 8000a6c <__cmpdf2> + 8000afe: 2800 cmp r0, #0 + 8000b00: bf48 it mi + 8000b02: f110 0f00 cmnmi.w r0, #0 + 8000b06: bd01 pop {r0, pc} + +08000b08 <__aeabi_dcmpeq>: + 8000b08: f84d ed08 str.w lr, [sp, #-8]! + 8000b0c: f7ff fff4 bl 8000af8 <__aeabi_cdcmpeq> + 8000b10: bf0c ite eq + 8000b12: 2001 moveq r0, #1 + 8000b14: 2000 movne r0, #0 + 8000b16: f85d fb08 ldr.w pc, [sp], #8 + 8000b1a: bf00 nop + +08000b1c <__aeabi_dcmplt>: + 8000b1c: f84d ed08 str.w lr, [sp, #-8]! + 8000b20: f7ff ffea bl 8000af8 <__aeabi_cdcmpeq> + 8000b24: bf34 ite cc + 8000b26: 2001 movcc r0, #1 + 8000b28: 2000 movcs r0, #0 + 8000b2a: f85d fb08 ldr.w pc, [sp], #8 + 8000b2e: bf00 nop + +08000b30 <__aeabi_dcmple>: + 8000b30: f84d ed08 str.w lr, [sp, #-8]! + 8000b34: f7ff ffe0 bl 8000af8 <__aeabi_cdcmpeq> + 8000b38: bf94 ite ls + 8000b3a: 2001 movls r0, #1 + 8000b3c: 2000 movhi r0, #0 + 8000b3e: f85d fb08 ldr.w pc, [sp], #8 + 8000b42: bf00 nop + +08000b44 <__aeabi_dcmpge>: + 8000b44: f84d ed08 str.w lr, [sp, #-8]! + 8000b48: f7ff ffce bl 8000ae8 <__aeabi_cdrcmple> + 8000b4c: bf94 ite ls + 8000b4e: 2001 movls r0, #1 + 8000b50: 2000 movhi r0, #0 + 8000b52: f85d fb08 ldr.w pc, [sp], #8 + 8000b56: bf00 nop + +08000b58 <__aeabi_dcmpgt>: + 8000b58: f84d ed08 str.w lr, [sp, #-8]! + 8000b5c: f7ff ffc4 bl 8000ae8 <__aeabi_cdrcmple> + 8000b60: bf34 ite cc + 8000b62: 2001 movcc r0, #1 + 8000b64: 2000 movcs r0, #0 + 8000b66: f85d fb08 ldr.w pc, [sp], #8 + 8000b6a: bf00 nop + +08000b6c <__aeabi_dcmpun>: + 8000b6c: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000b70: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000b74: d102 bne.n 8000b7c <__aeabi_dcmpun+0x10> + 8000b76: ea50 3c01 orrs.w ip, r0, r1, lsl #12 + 8000b7a: d10a bne.n 8000b92 <__aeabi_dcmpun+0x26> + 8000b7c: ea4f 0c43 mov.w ip, r3, lsl #1 + 8000b80: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000b84: d102 bne.n 8000b8c <__aeabi_dcmpun+0x20> + 8000b86: ea52 3c03 orrs.w ip, r2, r3, lsl #12 + 8000b8a: d102 bne.n 8000b92 <__aeabi_dcmpun+0x26> + 8000b8c: f04f 0000 mov.w r0, #0 + 8000b90: 4770 bx lr + 8000b92: f04f 0001 mov.w r0, #1 + 8000b96: 4770 bx lr + +08000b98 <__aeabi_d2iz>: + 8000b98: ea4f 0241 mov.w r2, r1, lsl #1 + 8000b9c: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 + 8000ba0: d215 bcs.n 8000bce <__aeabi_d2iz+0x36> + 8000ba2: d511 bpl.n 8000bc8 <__aeabi_d2iz+0x30> + 8000ba4: f46f 7378 mvn.w r3, #992 ; 0x3e0 + 8000ba8: ebb3 5262 subs.w r2, r3, r2, asr #21 + 8000bac: d912 bls.n 8000bd4 <__aeabi_d2iz+0x3c> + 8000bae: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000bb2: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 + 8000bb6: ea43 5350 orr.w r3, r3, r0, lsr #21 + 8000bba: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 + 8000bbe: fa23 f002 lsr.w r0, r3, r2 + 8000bc2: bf18 it ne + 8000bc4: 4240 negne r0, r0 + 8000bc6: 4770 bx lr + 8000bc8: f04f 0000 mov.w r0, #0 + 8000bcc: 4770 bx lr + 8000bce: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 8000bd2: d105 bne.n 8000be0 <__aeabi_d2iz+0x48> + 8000bd4: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 + 8000bd8: bf08 it eq + 8000bda: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 + 8000bde: 4770 bx lr + 8000be0: f04f 0000 mov.w r0, #0 + 8000be4: 4770 bx lr + 8000be6: bf00 nop + +08000be8 <__aeabi_d2uiz>: + 8000be8: 004a lsls r2, r1, #1 + 8000bea: d211 bcs.n 8000c10 <__aeabi_d2uiz+0x28> + 8000bec: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 + 8000bf0: d211 bcs.n 8000c16 <__aeabi_d2uiz+0x2e> + 8000bf2: d50d bpl.n 8000c10 <__aeabi_d2uiz+0x28> + 8000bf4: f46f 7378 mvn.w r3, #992 ; 0x3e0 + 8000bf8: ebb3 5262 subs.w r2, r3, r2, asr #21 + 8000bfc: d40e bmi.n 8000c1c <__aeabi_d2uiz+0x34> + 8000bfe: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000c02: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 + 8000c06: ea43 5350 orr.w r3, r3, r0, lsr #21 + 8000c0a: fa23 f002 lsr.w r0, r3, r2 + 8000c0e: 4770 bx lr + 8000c10: f04f 0000 mov.w r0, #0 + 8000c14: 4770 bx lr + 8000c16: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 8000c1a: d102 bne.n 8000c22 <__aeabi_d2uiz+0x3a> + 8000c1c: f04f 30ff mov.w r0, #4294967295 + 8000c20: 4770 bx lr + 8000c22: f04f 0000 mov.w r0, #0 + 8000c26: 4770 bx lr + +08000c28 <__aeabi_d2f>: + 8000c28: ea4f 0241 mov.w r2, r1, lsl #1 + 8000c2c: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 + 8000c30: bf24 itt cs + 8000c32: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 + 8000c36: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 + 8000c3a: d90d bls.n 8000c58 <__aeabi_d2f+0x30> + 8000c3c: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 + 8000c40: ea4f 02c0 mov.w r2, r0, lsl #3 + 8000c44: ea4c 7050 orr.w r0, ip, r0, lsr #29 + 8000c48: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 + 8000c4c: eb40 0083 adc.w r0, r0, r3, lsl #2 + 8000c50: bf08 it eq + 8000c52: f020 0001 biceq.w r0, r0, #1 + 8000c56: 4770 bx lr + 8000c58: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 + 8000c5c: d121 bne.n 8000ca2 <__aeabi_d2f+0x7a> + 8000c5e: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 + 8000c62: bfbc itt lt + 8000c64: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 + 8000c68: 4770 bxlt lr + 8000c6a: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 8000c6e: ea4f 5252 mov.w r2, r2, lsr #21 + 8000c72: f1c2 0218 rsb r2, r2, #24 + 8000c76: f1c2 0c20 rsb ip, r2, #32 + 8000c7a: fa10 f30c lsls.w r3, r0, ip + 8000c7e: fa20 f002 lsr.w r0, r0, r2 + 8000c82: bf18 it ne + 8000c84: f040 0001 orrne.w r0, r0, #1 + 8000c88: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000c8c: ea4f 23d3 mov.w r3, r3, lsr #11 + 8000c90: fa03 fc0c lsl.w ip, r3, ip + 8000c94: ea40 000c orr.w r0, r0, ip + 8000c98: fa23 f302 lsr.w r3, r3, r2 + 8000c9c: ea4f 0343 mov.w r3, r3, lsl #1 + 8000ca0: e7cc b.n 8000c3c <__aeabi_d2f+0x14> + 8000ca2: ea7f 5362 mvns.w r3, r2, asr #21 + 8000ca6: d107 bne.n 8000cb8 <__aeabi_d2f+0x90> + 8000ca8: ea50 3301 orrs.w r3, r0, r1, lsl #12 + 8000cac: bf1e ittt ne + 8000cae: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 + 8000cb2: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 + 8000cb6: 4770 bxne lr + 8000cb8: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 + 8000cbc: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 + 8000cc0: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 + 8000cc4: 4770 bx lr + 8000cc6: bf00 nop + +08000cc8 <__aeabi_d2lz>: + 8000cc8: b538 push {r3, r4, r5, lr} + 8000cca: 4605 mov r5, r0 + 8000ccc: 460c mov r4, r1 + 8000cce: 4628 mov r0, r5 + 8000cd0: 4621 mov r1, r4 + 8000cd2: 2200 movs r2, #0 + 8000cd4: 2300 movs r3, #0 + 8000cd6: f7ff ff21 bl 8000b1c <__aeabi_dcmplt> + 8000cda: b928 cbnz r0, 8000ce8 <__aeabi_d2lz+0x20> + 8000cdc: 4628 mov r0, r5 + 8000cde: 4621 mov r1, r4 + 8000ce0: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8000ce4: f000 b80a b.w 8000cfc <__aeabi_d2ulz> + 8000ce8: 4628 mov r0, r5 + 8000cea: f104 4100 add.w r1, r4, #2147483648 ; 0x80000000 + 8000cee: f000 f805 bl 8000cfc <__aeabi_d2ulz> + 8000cf2: 4240 negs r0, r0 + 8000cf4: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 8000cf8: bd38 pop {r3, r4, r5, pc} + 8000cfa: bf00 nop + +08000cfc <__aeabi_d2ulz>: + 8000cfc: b5d0 push {r4, r6, r7, lr} + 8000cfe: 4b0c ldr r3, [pc, #48] ; (8000d30 <__aeabi_d2ulz+0x34>) + 8000d00: 2200 movs r2, #0 + 8000d02: 4606 mov r6, r0 + 8000d04: 460f mov r7, r1 + 8000d06: f7ff fc97 bl 8000638 <__aeabi_dmul> + 8000d0a: f7ff ff6d bl 8000be8 <__aeabi_d2uiz> + 8000d0e: 4604 mov r4, r0 + 8000d10: f7ff fc18 bl 8000544 <__aeabi_ui2d> + 8000d14: 4b07 ldr r3, [pc, #28] ; (8000d34 <__aeabi_d2ulz+0x38>) + 8000d16: 2200 movs r2, #0 + 8000d18: f7ff fc8e bl 8000638 <__aeabi_dmul> + 8000d1c: 4602 mov r2, r0 + 8000d1e: 460b mov r3, r1 + 8000d20: 4630 mov r0, r6 + 8000d22: 4639 mov r1, r7 + 8000d24: f7ff fad0 bl 80002c8 <__aeabi_dsub> + 8000d28: f7ff ff5e bl 8000be8 <__aeabi_d2uiz> + 8000d2c: 4621 mov r1, r4 + 8000d2e: bdd0 pop {r4, r6, r7, pc} + 8000d30: 3df00000 .word 0x3df00000 + 8000d34: 41f00000 .word 0x41f00000 + +08000d38
: + +#define F_CPU 16000000UL + +#define ARSIZE 10 + +main(){ + 8000d38: b580 push {r7, lr} + 8000d3a: b090 sub sp, #64 ; 0x40 + 8000d3c: af00 add r7, sp, #0 + init_usart2(57600,F_CPU); + 8000d3e: 4944 ldr r1, [pc, #272] ; (8000e50 ) + 8000d40: f44f 4061 mov.w r0, #57600 ; 0xe100 + 8000d44: f000 f986 bl 8001054 + int ch_arr[ARSIZE],count1; + int count2, stop, lastchar; + + lastchar = 0; + 8000d48: 2300 movs r3, #0 + 8000d4a: 633b str r3, [r7, #48] ; 0x30 + stop = 0; + 8000d4c: 2300 movs r3, #0 + 8000d4e: 637b str r3, [r7, #52] ; 0x34 + /* + * Read characters into array. + * Stop if end of line, or array full. + */ + while(stop != 1){ + 8000d50: e01d b.n 8000d8e + ch_arr[lastchar] = getchar(); + 8000d52: f000 fa1b bl 800118c + 8000d56: 4602 mov r2, r0 + 8000d58: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000d5a: 009b lsls r3, r3, #2 + 8000d5c: f107 0140 add.w r1, r7, #64 ; 0x40 + 8000d60: 440b add r3, r1 + 8000d62: f843 2c3c str.w r2, [r3, #-60] + if(ch_arr[lastchar] == '\n') + 8000d66: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000d68: 009b lsls r3, r3, #2 + 8000d6a: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000d6e: 4413 add r3, r2 + 8000d70: f853 3c3c ldr.w r3, [r3, #-60] + 8000d74: 2b0a cmp r3, #10 + 8000d76: d102 bne.n 8000d7e + stop = 1; + 8000d78: 2301 movs r3, #1 + 8000d7a: 637b str r3, [r7, #52] ; 0x34 + 8000d7c: e002 b.n 8000d84 + else + lastchar = lastchar + 1; + 8000d7e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000d80: 3301 adds r3, #1 + 8000d82: 633b str r3, [r7, #48] ; 0x30 + if(lastchar == ARSIZE) + 8000d84: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000d86: 2b0a cmp r3, #10 + 8000d88: d101 bne.n 8000d8e + stop = 1; + 8000d8a: 2301 movs r3, #1 + 8000d8c: 637b str r3, [r7, #52] ; 0x34 + while(stop != 1){ + 8000d8e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8000d90: 2b01 cmp r3, #1 + 8000d92: d1de bne.n 8000d52 + }lastchar = lastchar-1; + 8000d94: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000d96: 3b01 subs r3, #1 + 8000d98: 633b str r3, [r7, #48] ; 0x30 + /* + * Now the traditional bubble sort. + */ + count1 = 0; + 8000d9a: 2300 movs r3, #0 + 8000d9c: 63fb str r3, [r7, #60] ; 0x3c + while(count1 < lastchar){ + 8000d9e: e03b b.n 8000e18 + count2 = count1 + 1; + 8000da0: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000da2: 3301 adds r3, #1 + 8000da4: 63bb str r3, [r7, #56] ; 0x38 + while(count2 <= lastchar){ + 8000da6: e030 b.n 8000e0a + if(ch_arr[count1] > ch_arr[count2]){ + 8000da8: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000daa: 009b lsls r3, r3, #2 + 8000dac: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000db0: 4413 add r3, r2 + 8000db2: f853 2c3c ldr.w r2, [r3, #-60] + 8000db6: 6bbb ldr r3, [r7, #56] ; 0x38 + 8000db8: 009b lsls r3, r3, #2 + 8000dba: f107 0140 add.w r1, r7, #64 ; 0x40 + 8000dbe: 440b add r3, r1 + 8000dc0: f853 3c3c ldr.w r3, [r3, #-60] + 8000dc4: 429a cmp r2, r3 + 8000dc6: dd1d ble.n 8000e04 + /* swap */ + int temp; + temp = ch_arr[count1]; + 8000dc8: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000dca: 009b lsls r3, r3, #2 + 8000dcc: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000dd0: 4413 add r3, r2 + 8000dd2: f853 3c3c ldr.w r3, [r3, #-60] + 8000dd6: 62fb str r3, [r7, #44] ; 0x2c + ch_arr[count1] = ch_arr[count2]; + 8000dd8: 6bbb ldr r3, [r7, #56] ; 0x38 + 8000dda: 009b lsls r3, r3, #2 + 8000ddc: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000de0: 4413 add r3, r2 + 8000de2: f853 2c3c ldr.w r2, [r3, #-60] + 8000de6: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000de8: 009b lsls r3, r3, #2 + 8000dea: f107 0140 add.w r1, r7, #64 ; 0x40 + 8000dee: 440b add r3, r1 + 8000df0: f843 2c3c str.w r2, [r3, #-60] + ch_arr[count2] = temp; + 8000df4: 6bbb ldr r3, [r7, #56] ; 0x38 + 8000df6: 009b lsls r3, r3, #2 + 8000df8: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000dfc: 4413 add r3, r2 + 8000dfe: 6afa ldr r2, [r7, #44] ; 0x2c + 8000e00: f843 2c3c str.w r2, [r3, #-60] + } + count2 = count2 + 1; + 8000e04: 6bbb ldr r3, [r7, #56] ; 0x38 + 8000e06: 3301 adds r3, #1 + 8000e08: 63bb str r3, [r7, #56] ; 0x38 + while(count2 <= lastchar){ + 8000e0a: 6bba ldr r2, [r7, #56] ; 0x38 + 8000e0c: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000e0e: 429a cmp r2, r3 + 8000e10: ddca ble.n 8000da8 + } + count1 = count1 + 1; + 8000e12: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000e14: 3301 adds r3, #1 + 8000e16: 63fb str r3, [r7, #60] ; 0x3c + while(count1 < lastchar){ + 8000e18: 6bfa ldr r2, [r7, #60] ; 0x3c + 8000e1a: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000e1c: 429a cmp r2, r3 + 8000e1e: dbbf blt.n 8000da0 + } + + count1 = 0; + 8000e20: 2300 movs r3, #0 + 8000e22: 63fb str r3, [r7, #60] ; 0x3c + while(count1 <= lastchar){ + 8000e24: e00d b.n 8000e42 + printf("%c\n", ch_arr[count1]); + 8000e26: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000e28: 009b lsls r3, r3, #2 + 8000e2a: f107 0240 add.w r2, r7, #64 ; 0x40 + 8000e2e: 4413 add r3, r2 + 8000e30: f853 3c3c ldr.w r3, [r3, #-60] + 8000e34: 4619 mov r1, r3 + 8000e36: 4807 ldr r0, [pc, #28] ; (8000e54 ) + 8000e38: f001 f852 bl 8001ee0 + count1 = count1 + 1; + 8000e3c: 6bfb ldr r3, [r7, #60] ; 0x3c + 8000e3e: 3301 adds r3, #1 + 8000e40: 63fb str r3, [r7, #60] ; 0x3c + while(count1 <= lastchar){ + 8000e42: 6bfa ldr r2, [r7, #60] ; 0x3c + 8000e44: 6b3b ldr r3, [r7, #48] ; 0x30 + 8000e46: 429a cmp r2, r3 + 8000e48: dded ble.n 8000e26 + } + exit(EXIT_SUCCESS); + 8000e4a: 2000 movs r0, #0 + 8000e4c: f000 f98a bl 8001164 + 8000e50: 00f42400 .word 0x00f42400 + 8000e54: 08005e18 .word 0x08005e18 + +08000e58 <_getpid>: +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + 8000e58: b480 push {r7} + 8000e5a: af00 add r7, sp, #0 + return 1; + 8000e5c: 2301 movs r3, #1 +} + 8000e5e: 4618 mov r0, r3 + 8000e60: 46bd mov sp, r7 + 8000e62: bc80 pop {r7} + 8000e64: 4770 bx lr + +08000e66 <_kill>: + +int _kill(int pid, int sig) +{ + 8000e66: b580 push {r7, lr} + 8000e68: b082 sub sp, #8 + 8000e6a: af00 add r7, sp, #0 + 8000e6c: 6078 str r0, [r7, #4] + 8000e6e: 6039 str r1, [r7, #0] + errno = EINVAL; + 8000e70: f000 f972 bl 8001158 <__errno> + 8000e74: 4603 mov r3, r0 + 8000e76: 2216 movs r2, #22 + 8000e78: 601a str r2, [r3, #0] + return -1; + 8000e7a: f04f 33ff mov.w r3, #4294967295 +} + 8000e7e: 4618 mov r0, r3 + 8000e80: 3708 adds r7, #8 + 8000e82: 46bd mov sp, r7 + 8000e84: bd80 pop {r7, pc} + +08000e86 <_exit>: + +void _exit (int status) +{ + 8000e86: b580 push {r7, lr} + 8000e88: b082 sub sp, #8 + 8000e8a: af00 add r7, sp, #0 + 8000e8c: 6078 str r0, [r7, #4] + _kill(status, -1); + 8000e8e: f04f 31ff mov.w r1, #4294967295 + 8000e92: 6878 ldr r0, [r7, #4] + 8000e94: f7ff ffe7 bl 8000e66 <_kill> + while (1) {} /* Make sure we hang here */ + 8000e98: e7fe b.n 8000e98 <_exit+0x12> + +08000e9a <_close>: + } + return len; +} + +int _close(int file) +{ + 8000e9a: b480 push {r7} + 8000e9c: b083 sub sp, #12 + 8000e9e: af00 add r7, sp, #0 + 8000ea0: 6078 str r0, [r7, #4] + return -1; + 8000ea2: f04f 33ff mov.w r3, #4294967295 +} + 8000ea6: 4618 mov r0, r3 + 8000ea8: 370c adds r7, #12 + 8000eaa: 46bd mov sp, r7 + 8000eac: bc80 pop {r7} + 8000eae: 4770 bx lr + +08000eb0 <_fstat>: + + +int _fstat(int file, struct stat *st) +{ + 8000eb0: b480 push {r7} + 8000eb2: b083 sub sp, #12 + 8000eb4: af00 add r7, sp, #0 + 8000eb6: 6078 str r0, [r7, #4] + 8000eb8: 6039 str r1, [r7, #0] + st->st_mode = S_IFCHR; + 8000eba: 683b ldr r3, [r7, #0] + 8000ebc: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8000ec0: 605a str r2, [r3, #4] + return 0; + 8000ec2: 2300 movs r3, #0 +} + 8000ec4: 4618 mov r0, r3 + 8000ec6: 370c adds r7, #12 + 8000ec8: 46bd mov sp, r7 + 8000eca: bc80 pop {r7} + 8000ecc: 4770 bx lr + +08000ece <_isatty>: + +int _isatty(int file) +{ + 8000ece: b480 push {r7} + 8000ed0: b083 sub sp, #12 + 8000ed2: af00 add r7, sp, #0 + 8000ed4: 6078 str r0, [r7, #4] + return 1; + 8000ed6: 2301 movs r3, #1 +} + 8000ed8: 4618 mov r0, r3 + 8000eda: 370c adds r7, #12 + 8000edc: 46bd mov sp, r7 + 8000ede: bc80 pop {r7} + 8000ee0: 4770 bx lr + +08000ee2 <_lseek>: + +int _lseek(int file, int ptr, int dir) +{ + 8000ee2: b480 push {r7} + 8000ee4: b085 sub sp, #20 + 8000ee6: af00 add r7, sp, #0 + 8000ee8: 60f8 str r0, [r7, #12] + 8000eea: 60b9 str r1, [r7, #8] + 8000eec: 607a str r2, [r7, #4] + return 0; + 8000eee: 2300 movs r3, #0 +} + 8000ef0: 4618 mov r0, r3 + 8000ef2: 3714 adds r7, #20 + 8000ef4: 46bd mov sp, r7 + 8000ef6: bc80 pop {r7} + 8000ef8: 4770 bx lr + ... + +08000efc <_sbrk>: +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + 8000efc: b580 push {r7, lr} + 8000efe: b084 sub sp, #16 + 8000f00: af00 add r7, sp, #0 + 8000f02: 6078 str r0, [r7, #4] + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + 8000f04: 4b11 ldr r3, [pc, #68] ; (8000f4c <_sbrk+0x50>) + 8000f06: 681b ldr r3, [r3, #0] + 8000f08: 2b00 cmp r3, #0 + 8000f0a: d102 bne.n 8000f12 <_sbrk+0x16> + heap_end = &end; + 8000f0c: 4b0f ldr r3, [pc, #60] ; (8000f4c <_sbrk+0x50>) + 8000f0e: 4a10 ldr r2, [pc, #64] ; (8000f50 <_sbrk+0x54>) + 8000f10: 601a str r2, [r3, #0] + + prev_heap_end = heap_end; + 8000f12: 4b0e ldr r3, [pc, #56] ; (8000f4c <_sbrk+0x50>) + 8000f14: 681b ldr r3, [r3, #0] + 8000f16: 60fb str r3, [r7, #12] + if (heap_end + incr > stack_ptr) + 8000f18: 4b0c ldr r3, [pc, #48] ; (8000f4c <_sbrk+0x50>) + 8000f1a: 681a ldr r2, [r3, #0] + 8000f1c: 687b ldr r3, [r7, #4] + 8000f1e: 4413 add r3, r2 + 8000f20: 466a mov r2, sp + 8000f22: 4293 cmp r3, r2 + 8000f24: d907 bls.n 8000f36 <_sbrk+0x3a> + { + errno = ENOMEM; + 8000f26: f000 f917 bl 8001158 <__errno> + 8000f2a: 4603 mov r3, r0 + 8000f2c: 220c movs r2, #12 + 8000f2e: 601a str r2, [r3, #0] + return (caddr_t) -1; + 8000f30: f04f 33ff mov.w r3, #4294967295 + 8000f34: e006 b.n 8000f44 <_sbrk+0x48> + } + + heap_end += incr; + 8000f36: 4b05 ldr r3, [pc, #20] ; (8000f4c <_sbrk+0x50>) + 8000f38: 681a ldr r2, [r3, #0] + 8000f3a: 687b ldr r3, [r7, #4] + 8000f3c: 4413 add r3, r2 + 8000f3e: 4a03 ldr r2, [pc, #12] ; (8000f4c <_sbrk+0x50>) + 8000f40: 6013 str r3, [r2, #0] + + return (caddr_t) prev_heap_end; + 8000f42: 68fb ldr r3, [r7, #12] +} + 8000f44: 4618 mov r0, r3 + 8000f46: 3710 adds r7, #16 + 8000f48: 46bd mov sp, r7 + 8000f4a: bd80 pop {r7, pc} + 8000f4c: 200001f0 .word 0x200001f0 + 8000f50: 20000210 .word 0x20000210 + +08000f54 <_read>: + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + 8000f54: b580 push {r7, lr} + 8000f56: b086 sub sp, #24 + 8000f58: af00 add r7, sp, #0 + 8000f5a: 60f8 str r0, [r7, #12] + 8000f5c: 60b9 str r1, [r7, #8] + 8000f5e: 607a str r2, [r7, #4] + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + 8000f60: 2300 movs r3, #0 + 8000f62: 613b str r3, [r7, #16] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000f64: 2300 movs r3, #0 + 8000f66: 617b str r3, [r7, #20] + 8000f68: e012 b.n 8000f90 <_read+0x3c> + { + //*ptr++ = __io_getchar(); + byteCnt++; + 8000f6a: 693b ldr r3, [r7, #16] + 8000f6c: 3301 adds r3, #1 + 8000f6e: 613b str r3, [r7, #16] + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + 8000f70: f000 f836 bl 8000fe0 + 8000f74: 4603 mov r3, r0 + 8000f76: 461a mov r2, r3 + 8000f78: 68bb ldr r3, [r7, #8] + 8000f7a: 701a strb r2, [r3, #0] + if(*ptr == '\n') break; + 8000f7c: 68bb ldr r3, [r7, #8] + 8000f7e: 781b ldrb r3, [r3, #0] + 8000f80: 2b0a cmp r3, #10 + 8000f82: d00a beq.n 8000f9a <_read+0x46> + ptr++; + 8000f84: 68bb ldr r3, [r7, #8] + 8000f86: 3301 adds r3, #1 + 8000f88: 60bb str r3, [r7, #8] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000f8a: 697b ldr r3, [r7, #20] + 8000f8c: 3301 adds r3, #1 + 8000f8e: 617b str r3, [r7, #20] + 8000f90: 697a ldr r2, [r7, #20] + 8000f92: 687b ldr r3, [r7, #4] + 8000f94: 429a cmp r2, r3 + 8000f96: dbe8 blt.n 8000f6a <_read+0x16> + 8000f98: e000 b.n 8000f9c <_read+0x48> + if(*ptr == '\n') break; + 8000f9a: bf00 nop + } + + //return len; + return byteCnt; // Return byte count + 8000f9c: 693b ldr r3, [r7, #16] +} + 8000f9e: 4618 mov r0, r3 + 8000fa0: 3718 adds r7, #24 + 8000fa2: 46bd mov sp, r7 + 8000fa4: bd80 pop {r7, pc} + +08000fa6 <_write>: + +int _write(int file, char *ptr, int len) +{ + 8000fa6: b580 push {r7, lr} + 8000fa8: b086 sub sp, #24 + 8000faa: af00 add r7, sp, #0 + 8000fac: 60f8 str r0, [r7, #12] + 8000fae: 60b9 str r1, [r7, #8] + 8000fb0: 607a str r2, [r7, #4] + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000fb2: 2300 movs r3, #0 + 8000fb4: 617b str r3, [r7, #20] + 8000fb6: e009 b.n 8000fcc <_write+0x26> + { + usart2_putch(*ptr++); + 8000fb8: 68bb ldr r3, [r7, #8] + 8000fba: 1c5a adds r2, r3, #1 + 8000fbc: 60ba str r2, [r7, #8] + 8000fbe: 781b ldrb r3, [r3, #0] + 8000fc0: 4618 mov r0, r3 + 8000fc2: f000 f82f bl 8001024 + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000fc6: 697b ldr r3, [r7, #20] + 8000fc8: 3301 adds r3, #1 + 8000fca: 617b str r3, [r7, #20] + 8000fcc: 697a ldr r2, [r7, #20] + 8000fce: 687b ldr r3, [r7, #4] + 8000fd0: 429a cmp r2, r3 + 8000fd2: dbf1 blt.n 8000fb8 <_write+0x12> + } + return len; + 8000fd4: 687b ldr r3, [r7, #4] +} + 8000fd6: 4618 mov r0, r3 + 8000fd8: 3718 adds r7, #24 + 8000fda: 46bd mov sp, r7 + 8000fdc: bd80 pop {r7, pc} + ... + +08000fe0 : + + + +char usart2_getch(){ + 8000fe0: b580 push {r7, lr} + 8000fe2: b082 sub sp, #8 + 8000fe4: af00 add r7, sp, #0 + char c; + while((*(USART_SR)&(1<) + 8000fea: 681b ldr r3, [r3, #0] + 8000fec: f003 0320 and.w r3, r3, #32 + 8000ff0: 2b20 cmp r3, #32 + 8000ff2: d1f9 bne.n 8000fe8 + c = ((char) *USART_DR); // Read character from usart + 8000ff4: 4b0a ldr r3, [pc, #40] ; (8001020 ) + 8000ff6: 681b ldr r3, [r3, #0] + 8000ff8: 71fb strb r3, [r7, #7] + usart2_putch(c); // Echo back + 8000ffa: 79fb ldrb r3, [r7, #7] + 8000ffc: 4618 mov r0, r3 + 8000ffe: f000 f811 bl 8001024 + + if (c == '\r'){ // If character is CR + 8001002: 79fb ldrb r3, [r7, #7] + 8001004: 2b0d cmp r3, #13 + 8001006: d104 bne.n 8001012 + usart2_putch('\n'); // send it + 8001008: 200a movs r0, #10 + 800100a: f000 f80b bl 8001024 + c = '\n'; // Return LF. fgets is terminated by LF + 800100e: 230a movs r3, #10 + 8001010: 71fb strb r3, [r7, #7] + } + + return c; + 8001012: 79fb ldrb r3, [r7, #7] +} + 8001014: 4618 mov r0, r3 + 8001016: 3708 adds r7, #8 + 8001018: 46bd mov sp, r7 + 800101a: bd80 pop {r7, pc} + 800101c: 40004400 .word 0x40004400 + 8001020: 40004404 .word 0x40004404 + +08001024 : + +void usart2_putch(char c){ + 8001024: b480 push {r7} + 8001026: b083 sub sp, #12 + 8001028: af00 add r7, sp, #0 + 800102a: 4603 mov r3, r0 + 800102c: 71fb strb r3, [r7, #7] + while((*(USART_SR)&(1<) + 8001032: 681b ldr r3, [r3, #0] + 8001034: f003 0380 and.w r3, r3, #128 ; 0x80 + 8001038: 2b80 cmp r3, #128 ; 0x80 + 800103a: d1f9 bne.n 8001030 + *(USART_DR) = c; + 800103c: 4a04 ldr r2, [pc, #16] ; (8001050 ) + 800103e: 79fb ldrb r3, [r7, #7] + 8001040: 6013 str r3, [r2, #0] +} + 8001042: bf00 nop + 8001044: 370c adds r7, #12 + 8001046: 46bd mov sp, r7 + 8001048: bc80 pop {r7} + 800104a: 4770 bx lr + 800104c: 40004400 .word 0x40004400 + 8001050: 40004404 .word 0x40004404 + +08001054 : + +void init_usart2(uint32_t baud, uint32_t sysclk){ + 8001054: b580 push {r7, lr} + 8001056: b082 sub sp, #8 + 8001058: af00 add r7, sp, #0 + 800105a: 6078 str r0, [r7, #4] + 800105c: 6039 str r1, [r7, #0] + // Enable clocks for GPIOA and USART2 + *(RCC_AHB1ENR) |= (1<) + 8001060: 681b ldr r3, [r3, #0] + 8001062: 4a1f ldr r2, [pc, #124] ; (80010e0 ) + 8001064: f043 0301 orr.w r3, r3, #1 + 8001068: 6013 str r3, [r2, #0] + *(RCC_APB1ENR) |= (1<) + 800106c: 681b ldr r3, [r3, #0] + 800106e: 4a1d ldr r2, [pc, #116] ; (80010e4 ) + 8001070: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8001074: 6013 str r3, [r2, #0] + + // Function 7 of PORTA pins is USART + *(GPIOA_AFRL) &= (0xFFFF00FF); // Clear the bits associated with PA3 and PA2 + 8001076: 4b1c ldr r3, [pc, #112] ; (80010e8 ) + 8001078: 681b ldr r3, [r3, #0] + 800107a: 4a1b ldr r2, [pc, #108] ; (80010e8 ) + 800107c: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 8001080: 6013 str r3, [r2, #0] + *(GPIOA_AFRL) |= (0b01110111<<8); // Choose function 7 for both PA3 and PA2 + 8001082: 4b19 ldr r3, [pc, #100] ; (80010e8 ) + 8001084: 681b ldr r3, [r3, #0] + 8001086: 4a18 ldr r2, [pc, #96] ; (80010e8 ) + 8001088: f443 43ee orr.w r3, r3, #30464 ; 0x7700 + 800108c: 6013 str r3, [r2, #0] + *(GPIOA_MODER) &= (0xFFFFFF0F); // Clear mode bits for PA3 and PA2 + 800108e: 4b17 ldr r3, [pc, #92] ; (80010ec ) + 8001090: 681b ldr r3, [r3, #0] + 8001092: 4a16 ldr r2, [pc, #88] ; (80010ec ) + 8001094: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 8001098: 6013 str r3, [r2, #0] + *(GPIOA_MODER) |= (0b1010<<4); // Both PA3 and PA2 in alt function mode + 800109a: 4b14 ldr r3, [pc, #80] ; (80010ec ) + 800109c: 681b ldr r3, [r3, #0] + 800109e: 4a13 ldr r2, [pc, #76] ; (80010ec ) + 80010a0: f043 03a0 orr.w r3, r3, #160 ; 0xa0 + 80010a4: 6013 str r3, [r2, #0] + //USART2_init(); //8n1 no flow control + // over8 = 0..oversample by 16 + // M = 0..1 start bit, data size is 8, 1 stop bit + // PCE= 0..Parity check not enabled + // no interrupts... using polling + *(USART_CR1) = (1<) + 80010a8: f242 020c movw r2, #8204 ; 0x200c + 80010ac: 601a str r2, [r3, #0] + *(USART_CR2) = 0; // This is the default, but do it anyway + 80010ae: 4b11 ldr r3, [pc, #68] ; (80010f4 ) + 80010b0: 2200 movs r2, #0 + 80010b2: 601a str r2, [r3, #0] + *(USART_CR3) = 0; // This is the default, but do it anyway + 80010b4: 4b10 ldr r3, [pc, #64] ; (80010f8 ) + 80010b6: 2200 movs r2, #0 + 80010b8: 601a str r2, [r3, #0] + *(USART_BRR) = sysclk/baud; + 80010ba: 4910 ldr r1, [pc, #64] ; (80010fc ) + 80010bc: 683a ldr r2, [r7, #0] + 80010be: 687b ldr r3, [r7, #4] + 80010c0: fbb2 f3f3 udiv r3, r2, r3 + 80010c4: 600b str r3, [r1, #0] + + /* I'm not sure if this is needed for standard IO*/ + //setvbuf(stderr, NULL, _IONBF, 0); + //setvbuf(stdin, NULL, _IONBF, 0); + setvbuf(stdout, NULL, _IONBF, 0); + 80010c6: 4b0e ldr r3, [pc, #56] ; (8001100 ) + 80010c8: 681b ldr r3, [r3, #0] + 80010ca: 6898 ldr r0, [r3, #8] + 80010cc: 2300 movs r3, #0 + 80010ce: 2202 movs r2, #2 + 80010d0: 2100 movs r1, #0 + 80010d2: f000 ff1d bl 8001f10 +} + 80010d6: bf00 nop + 80010d8: 3708 adds r7, #8 + 80010da: 46bd mov sp, r7 + 80010dc: bd80 pop {r7, pc} + 80010de: bf00 nop + 80010e0: 40023830 .word 0x40023830 + 80010e4: 40023840 .word 0x40023840 + 80010e8: 40020020 .word 0x40020020 + 80010ec: 40020000 .word 0x40020000 + 80010f0: 4000440c .word 0x4000440c + 80010f4: 40004410 .word 0x40004410 + 80010f8: 40004414 .word 0x40004414 + 80010fc: 40004408 .word 0x40004408 + 8001100: 20000000 .word 0x20000000 + +08001104 : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 8001104: 480d ldr r0, [pc, #52] ; (800113c ) + mov sp, r0 /* set stack pointer */ + 8001106: 4685 mov sp, r0 + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8001108: 480d ldr r0, [pc, #52] ; (8001140 ) + ldr r1, =_edata + 800110a: 490e ldr r1, [pc, #56] ; (8001144 ) + ldr r2, =_sidata + 800110c: 4a0e ldr r2, [pc, #56] ; (8001148 ) + movs r3, #0 + 800110e: 2300 movs r3, #0 + b LoopCopyDataInit + 8001110: e002 b.n 8001118 + +08001112 : + +CopyDataInit: + ldr r4, [r2, r3] + 8001112: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8001114: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8001116: 3304 adds r3, #4 + +08001118 : + +LoopCopyDataInit: + adds r4, r0, r3 + 8001118: 18c4 adds r4, r0, r3 + cmp r4, r1 + 800111a: 428c cmp r4, r1 + bcc CopyDataInit + 800111c: d3f9 bcc.n 8001112 + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 800111e: 4a0b ldr r2, [pc, #44] ; (800114c ) + ldr r4, =_ebss + 8001120: 4c0b ldr r4, [pc, #44] ; (8001150 ) + movs r3, #0 + 8001122: 2300 movs r3, #0 + b LoopFillZerobss + 8001124: e001 b.n 800112a + +08001126 : + +FillZerobss: + str r3, [r2] + 8001126: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8001128: 3204 adds r2, #4 + +0800112a : + +LoopFillZerobss: + cmp r2, r4 + 800112a: 42a2 cmp r2, r4 + bcc FillZerobss + 800112c: d3fb bcc.n 8001126 + +/* Call the clock system intitialization function.*/ + bl SystemInit + 800112e: f3af 8000 nop.w +/* Call static constructors */ + bl __libc_init_array + 8001132: f000 f83d bl 80011b0 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8001136: f7ff fdff bl 8000d38
+ +0800113a : + +LoopForever: + b LoopForever + 800113a: e7fe b.n 800113a + ldr r0, =_estack + 800113c: 20020000 .word 0x20020000 + ldr r0, =_sdata + 8001140: 20000000 .word 0x20000000 + ldr r1, =_edata + 8001144: 200001d4 .word 0x200001d4 + ldr r2, =_sidata + 8001148: 080062dc .word 0x080062dc + ldr r2, =_sbss + 800114c: 200001d4 .word 0x200001d4 + ldr r4, =_ebss + 8001150: 2000020c .word 0x2000020c + +08001154 : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8001154: e7fe b.n 8001154 + ... + +08001158 <__errno>: + 8001158: 4b01 ldr r3, [pc, #4] ; (8001160 <__errno+0x8>) + 800115a: 6818 ldr r0, [r3, #0] + 800115c: 4770 bx lr + 800115e: bf00 nop + 8001160: 20000000 .word 0x20000000 + +08001164 : + 8001164: b508 push {r3, lr} + 8001166: 4b07 ldr r3, [pc, #28] ; (8001184 ) + 8001168: 4604 mov r4, r0 + 800116a: b113 cbz r3, 8001172 + 800116c: 2100 movs r1, #0 + 800116e: f3af 8000 nop.w + 8001172: 4b05 ldr r3, [pc, #20] ; (8001188 ) + 8001174: 6818 ldr r0, [r3, #0] + 8001176: 6a83 ldr r3, [r0, #40] ; 0x28 + 8001178: b103 cbz r3, 800117c + 800117a: 4798 blx r3 + 800117c: 4620 mov r0, r4 + 800117e: f7ff fe82 bl 8000e86 <_exit> + 8001182: bf00 nop + 8001184: 00000000 .word 0x00000000 + 8001188: 08005e1c .word 0x08005e1c + +0800118c : + 800118c: 4b07 ldr r3, [pc, #28] ; (80011ac ) + 800118e: b510 push {r4, lr} + 8001190: 681c ldr r4, [r3, #0] + 8001192: b124 cbz r4, 800119e + 8001194: 69a3 ldr r3, [r4, #24] + 8001196: b913 cbnz r3, 800119e + 8001198: 4620 mov r0, r4 + 800119a: f002 fdef bl 8003d7c <__sinit> + 800119e: 6861 ldr r1, [r4, #4] + 80011a0: 4620 mov r0, r4 + 80011a2: e8bd 4010 ldmia.w sp!, {r4, lr} + 80011a6: f003 ba07 b.w 80045b8 <_getc_r> + 80011aa: bf00 nop + 80011ac: 20000000 .word 0x20000000 + +080011b0 <__libc_init_array>: + 80011b0: b570 push {r4, r5, r6, lr} + 80011b2: 4d0d ldr r5, [pc, #52] ; (80011e8 <__libc_init_array+0x38>) + 80011b4: 4c0d ldr r4, [pc, #52] ; (80011ec <__libc_init_array+0x3c>) + 80011b6: 1b64 subs r4, r4, r5 + 80011b8: 10a4 asrs r4, r4, #2 + 80011ba: 2600 movs r6, #0 + 80011bc: 42a6 cmp r6, r4 + 80011be: d109 bne.n 80011d4 <__libc_init_array+0x24> + 80011c0: 4d0b ldr r5, [pc, #44] ; (80011f0 <__libc_init_array+0x40>) + 80011c2: 4c0c ldr r4, [pc, #48] ; (80011f4 <__libc_init_array+0x44>) + 80011c4: f004 fe1c bl 8005e00 <_init> + 80011c8: 1b64 subs r4, r4, r5 + 80011ca: 10a4 asrs r4, r4, #2 + 80011cc: 2600 movs r6, #0 + 80011ce: 42a6 cmp r6, r4 + 80011d0: d105 bne.n 80011de <__libc_init_array+0x2e> + 80011d2: bd70 pop {r4, r5, r6, pc} + 80011d4: f855 3b04 ldr.w r3, [r5], #4 + 80011d8: 4798 blx r3 + 80011da: 3601 adds r6, #1 + 80011dc: e7ee b.n 80011bc <__libc_init_array+0xc> + 80011de: f855 3b04 ldr.w r3, [r5], #4 + 80011e2: 4798 blx r3 + 80011e4: 3601 adds r6, #1 + 80011e6: e7f2 b.n 80011ce <__libc_init_array+0x1e> + 80011e8: 080062d4 .word 0x080062d4 + 80011ec: 080062d4 .word 0x080062d4 + 80011f0: 080062d4 .word 0x080062d4 + 80011f4: 080062d8 .word 0x080062d8 + +080011f8 : + 80011f8: 4402 add r2, r0 + 80011fa: 4603 mov r3, r0 + 80011fc: 4293 cmp r3, r2 + 80011fe: d100 bne.n 8001202 + 8001200: 4770 bx lr + 8001202: f803 1b01 strb.w r1, [r3], #1 + 8001206: e7f9 b.n 80011fc + +08001208 <__cvt>: + 8001208: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 800120c: b088 sub sp, #32 + 800120e: 2b00 cmp r3, #0 + 8001210: 461f mov r7, r3 + 8001212: 4614 mov r4, r2 + 8001214: bfb8 it lt + 8001216: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 + 800121a: 9a12 ldr r2, [sp, #72] ; 0x48 + 800121c: 9d10 ldr r5, [sp, #64] ; 0x40 + 800121e: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c + 8001222: bfb6 itet lt + 8001224: 461f movlt r7, r3 + 8001226: 2300 movge r3, #0 + 8001228: 232d movlt r3, #45 ; 0x2d + 800122a: 7013 strb r3, [r2, #0] + 800122c: 9b14 ldr r3, [sp, #80] ; 0x50 + 800122e: f023 0820 bic.w r8, r3, #32 + 8001232: f1b8 0f46 cmp.w r8, #70 ; 0x46 + 8001236: d005 beq.n 8001244 <__cvt+0x3c> + 8001238: f1b8 0f45 cmp.w r8, #69 ; 0x45 + 800123c: d100 bne.n 8001240 <__cvt+0x38> + 800123e: 3501 adds r5, #1 + 8001240: 2302 movs r3, #2 + 8001242: e000 b.n 8001246 <__cvt+0x3e> + 8001244: 2303 movs r3, #3 + 8001246: aa07 add r2, sp, #28 + 8001248: 9204 str r2, [sp, #16] + 800124a: aa06 add r2, sp, #24 + 800124c: e9cd a202 strd sl, r2, [sp, #8] + 8001250: e9cd 3500 strd r3, r5, [sp] + 8001254: 4622 mov r2, r4 + 8001256: 463b mov r3, r7 + 8001258: f001 fe76 bl 8002f48 <_dtoa_r> + 800125c: f1b8 0f47 cmp.w r8, #71 ; 0x47 + 8001260: 4606 mov r6, r0 + 8001262: d102 bne.n 800126a <__cvt+0x62> + 8001264: 9b11 ldr r3, [sp, #68] ; 0x44 + 8001266: 07db lsls r3, r3, #31 + 8001268: d522 bpl.n 80012b0 <__cvt+0xa8> + 800126a: f1b8 0f46 cmp.w r8, #70 ; 0x46 + 800126e: eb06 0905 add.w r9, r6, r5 + 8001272: d110 bne.n 8001296 <__cvt+0x8e> + 8001274: 7833 ldrb r3, [r6, #0] + 8001276: 2b30 cmp r3, #48 ; 0x30 + 8001278: d10a bne.n 8001290 <__cvt+0x88> + 800127a: 2200 movs r2, #0 + 800127c: 2300 movs r3, #0 + 800127e: 4620 mov r0, r4 + 8001280: 4639 mov r1, r7 + 8001282: f7ff fc41 bl 8000b08 <__aeabi_dcmpeq> + 8001286: b918 cbnz r0, 8001290 <__cvt+0x88> + 8001288: f1c5 0501 rsb r5, r5, #1 + 800128c: f8ca 5000 str.w r5, [sl] + 8001290: f8da 3000 ldr.w r3, [sl] + 8001294: 4499 add r9, r3 + 8001296: 2200 movs r2, #0 + 8001298: 2300 movs r3, #0 + 800129a: 4620 mov r0, r4 + 800129c: 4639 mov r1, r7 + 800129e: f7ff fc33 bl 8000b08 <__aeabi_dcmpeq> + 80012a2: b108 cbz r0, 80012a8 <__cvt+0xa0> + 80012a4: f8cd 901c str.w r9, [sp, #28] + 80012a8: 2230 movs r2, #48 ; 0x30 + 80012aa: 9b07 ldr r3, [sp, #28] + 80012ac: 454b cmp r3, r9 + 80012ae: d307 bcc.n 80012c0 <__cvt+0xb8> + 80012b0: 9b07 ldr r3, [sp, #28] + 80012b2: 9a15 ldr r2, [sp, #84] ; 0x54 + 80012b4: 1b9b subs r3, r3, r6 + 80012b6: 4630 mov r0, r6 + 80012b8: 6013 str r3, [r2, #0] + 80012ba: b008 add sp, #32 + 80012bc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80012c0: 1c59 adds r1, r3, #1 + 80012c2: 9107 str r1, [sp, #28] + 80012c4: 701a strb r2, [r3, #0] + 80012c6: e7f0 b.n 80012aa <__cvt+0xa2> + +080012c8 <__exponent>: + 80012c8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 80012ca: 4603 mov r3, r0 + 80012cc: 2900 cmp r1, #0 + 80012ce: bfb8 it lt + 80012d0: 4249 neglt r1, r1 + 80012d2: f803 2b02 strb.w r2, [r3], #2 + 80012d6: bfb4 ite lt + 80012d8: 222d movlt r2, #45 ; 0x2d + 80012da: 222b movge r2, #43 ; 0x2b + 80012dc: 2909 cmp r1, #9 + 80012de: 7042 strb r2, [r0, #1] + 80012e0: dd2a ble.n 8001338 <__exponent+0x70> + 80012e2: f10d 0407 add.w r4, sp, #7 + 80012e6: 46a4 mov ip, r4 + 80012e8: 270a movs r7, #10 + 80012ea: 46a6 mov lr, r4 + 80012ec: 460a mov r2, r1 + 80012ee: fb91 f6f7 sdiv r6, r1, r7 + 80012f2: fb07 1516 mls r5, r7, r6, r1 + 80012f6: 3530 adds r5, #48 ; 0x30 + 80012f8: 2a63 cmp r2, #99 ; 0x63 + 80012fa: f104 34ff add.w r4, r4, #4294967295 + 80012fe: f80e 5c01 strb.w r5, [lr, #-1] + 8001302: 4631 mov r1, r6 + 8001304: dcf1 bgt.n 80012ea <__exponent+0x22> + 8001306: 3130 adds r1, #48 ; 0x30 + 8001308: f1ae 0502 sub.w r5, lr, #2 + 800130c: f804 1c01 strb.w r1, [r4, #-1] + 8001310: 1c44 adds r4, r0, #1 + 8001312: 4629 mov r1, r5 + 8001314: 4561 cmp r1, ip + 8001316: d30a bcc.n 800132e <__exponent+0x66> + 8001318: f10d 0209 add.w r2, sp, #9 + 800131c: eba2 020e sub.w r2, r2, lr + 8001320: 4565 cmp r5, ip + 8001322: bf88 it hi + 8001324: 2200 movhi r2, #0 + 8001326: 4413 add r3, r2 + 8001328: 1a18 subs r0, r3, r0 + 800132a: b003 add sp, #12 + 800132c: bdf0 pop {r4, r5, r6, r7, pc} + 800132e: f811 2b01 ldrb.w r2, [r1], #1 + 8001332: f804 2f01 strb.w r2, [r4, #1]! + 8001336: e7ed b.n 8001314 <__exponent+0x4c> + 8001338: 2330 movs r3, #48 ; 0x30 + 800133a: 3130 adds r1, #48 ; 0x30 + 800133c: 7083 strb r3, [r0, #2] + 800133e: 70c1 strb r1, [r0, #3] + 8001340: 1d03 adds r3, r0, #4 + 8001342: e7f1 b.n 8001328 <__exponent+0x60> + +08001344 <_printf_float>: + 8001344: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8001348: b091 sub sp, #68 ; 0x44 + 800134a: 460c mov r4, r1 + 800134c: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68 + 8001350: 4616 mov r6, r2 + 8001352: 461f mov r7, r3 + 8001354: 4605 mov r5, r0 + 8001356: f003 f96f bl 8004638 <_localeconv_r> + 800135a: 6803 ldr r3, [r0, #0] + 800135c: 9309 str r3, [sp, #36] ; 0x24 + 800135e: 4618 mov r0, r3 + 8001360: f7fe ff56 bl 8000210 + 8001364: 2300 movs r3, #0 + 8001366: 930e str r3, [sp, #56] ; 0x38 + 8001368: f8d8 3000 ldr.w r3, [r8] + 800136c: 900a str r0, [sp, #40] ; 0x28 + 800136e: 3307 adds r3, #7 + 8001370: f023 0307 bic.w r3, r3, #7 + 8001374: f103 0208 add.w r2, r3, #8 + 8001378: f894 9018 ldrb.w r9, [r4, #24] + 800137c: f8d4 b000 ldr.w fp, [r4] + 8001380: f8c8 2000 str.w r2, [r8] + 8001384: e9d3 2300 ldrd r2, r3, [r3] + 8001388: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 + 800138c: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48 + 8001390: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000 + 8001394: 930b str r3, [sp, #44] ; 0x2c + 8001396: 990b ldr r1, [sp, #44] ; 0x2c + 8001398: 4b9c ldr r3, [pc, #624] ; (800160c <_printf_float+0x2c8>) + 800139a: f04f 32ff mov.w r2, #4294967295 + 800139e: 4640 mov r0, r8 + 80013a0: f7ff fbe4 bl 8000b6c <__aeabi_dcmpun> + 80013a4: bb70 cbnz r0, 8001404 <_printf_float+0xc0> + 80013a6: 4b99 ldr r3, [pc, #612] ; (800160c <_printf_float+0x2c8>) + 80013a8: 990b ldr r1, [sp, #44] ; 0x2c + 80013aa: f04f 32ff mov.w r2, #4294967295 + 80013ae: 4640 mov r0, r8 + 80013b0: f7ff fbbe bl 8000b30 <__aeabi_dcmple> + 80013b4: bb30 cbnz r0, 8001404 <_printf_float+0xc0> + 80013b6: 2200 movs r2, #0 + 80013b8: 2300 movs r3, #0 + 80013ba: 4640 mov r0, r8 + 80013bc: 4651 mov r1, sl + 80013be: f7ff fbad bl 8000b1c <__aeabi_dcmplt> + 80013c2: b110 cbz r0, 80013ca <_printf_float+0x86> + 80013c4: 232d movs r3, #45 ; 0x2d + 80013c6: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 80013ca: 4b91 ldr r3, [pc, #580] ; (8001610 <_printf_float+0x2cc>) + 80013cc: 4891 ldr r0, [pc, #580] ; (8001614 <_printf_float+0x2d0>) + 80013ce: f1b9 0f47 cmp.w r9, #71 ; 0x47 + 80013d2: bf94 ite ls + 80013d4: 4698 movls r8, r3 + 80013d6: 4680 movhi r8, r0 + 80013d8: 2303 movs r3, #3 + 80013da: 6123 str r3, [r4, #16] + 80013dc: f02b 0304 bic.w r3, fp, #4 + 80013e0: 6023 str r3, [r4, #0] + 80013e2: f04f 0a00 mov.w sl, #0 + 80013e6: 9700 str r7, [sp, #0] + 80013e8: 4633 mov r3, r6 + 80013ea: aa0f add r2, sp, #60 ; 0x3c + 80013ec: 4621 mov r1, r4 + 80013ee: 4628 mov r0, r5 + 80013f0: f000 f9d2 bl 8001798 <_printf_common> + 80013f4: 3001 adds r0, #1 + 80013f6: f040 808f bne.w 8001518 <_printf_float+0x1d4> + 80013fa: f04f 30ff mov.w r0, #4294967295 + 80013fe: b011 add sp, #68 ; 0x44 + 8001400: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8001404: 4642 mov r2, r8 + 8001406: 4653 mov r3, sl + 8001408: 4640 mov r0, r8 + 800140a: 4651 mov r1, sl + 800140c: f7ff fbae bl 8000b6c <__aeabi_dcmpun> + 8001410: b140 cbz r0, 8001424 <_printf_float+0xe0> + 8001412: f1ba 0f00 cmp.w sl, #0 + 8001416: bfbc itt lt + 8001418: 232d movlt r3, #45 ; 0x2d + 800141a: f884 3043 strblt.w r3, [r4, #67] ; 0x43 + 800141e: 487e ldr r0, [pc, #504] ; (8001618 <_printf_float+0x2d4>) + 8001420: 4b7e ldr r3, [pc, #504] ; (800161c <_printf_float+0x2d8>) + 8001422: e7d4 b.n 80013ce <_printf_float+0x8a> + 8001424: 6863 ldr r3, [r4, #4] + 8001426: 1c5a adds r2, r3, #1 + 8001428: f009 01df and.w r1, r9, #223 ; 0xdf + 800142c: d142 bne.n 80014b4 <_printf_float+0x170> + 800142e: 2306 movs r3, #6 + 8001430: 6063 str r3, [r4, #4] + 8001432: 2200 movs r2, #0 + 8001434: 9206 str r2, [sp, #24] + 8001436: aa0e add r2, sp, #56 ; 0x38 + 8001438: e9cd 9204 strd r9, r2, [sp, #16] + 800143c: aa0d add r2, sp, #52 ; 0x34 + 800143e: f44b 6380 orr.w r3, fp, #1024 ; 0x400 + 8001442: 9203 str r2, [sp, #12] + 8001444: f10d 0233 add.w r2, sp, #51 ; 0x33 + 8001448: e9cd 3201 strd r3, r2, [sp, #4] + 800144c: 6023 str r3, [r4, #0] + 800144e: 6863 ldr r3, [r4, #4] + 8001450: 9300 str r3, [sp, #0] + 8001452: 4642 mov r2, r8 + 8001454: 4653 mov r3, sl + 8001456: 4628 mov r0, r5 + 8001458: 910b str r1, [sp, #44] ; 0x2c + 800145a: f7ff fed5 bl 8001208 <__cvt> + 800145e: 990b ldr r1, [sp, #44] ; 0x2c + 8001460: 2947 cmp r1, #71 ; 0x47 + 8001462: 4680 mov r8, r0 + 8001464: 990d ldr r1, [sp, #52] ; 0x34 + 8001466: d108 bne.n 800147a <_printf_float+0x136> + 8001468: 1cc8 adds r0, r1, #3 + 800146a: db02 blt.n 8001472 <_printf_float+0x12e> + 800146c: 6863 ldr r3, [r4, #4] + 800146e: 4299 cmp r1, r3 + 8001470: dd40 ble.n 80014f4 <_printf_float+0x1b0> + 8001472: f1a9 0902 sub.w r9, r9, #2 + 8001476: fa5f f989 uxtb.w r9, r9 + 800147a: f1b9 0f65 cmp.w r9, #101 ; 0x65 + 800147e: d81f bhi.n 80014c0 <_printf_float+0x17c> + 8001480: 3901 subs r1, #1 + 8001482: 464a mov r2, r9 + 8001484: f104 0050 add.w r0, r4, #80 ; 0x50 + 8001488: 910d str r1, [sp, #52] ; 0x34 + 800148a: f7ff ff1d bl 80012c8 <__exponent> + 800148e: 9a0e ldr r2, [sp, #56] ; 0x38 + 8001490: 1813 adds r3, r2, r0 + 8001492: 2a01 cmp r2, #1 + 8001494: 4682 mov sl, r0 + 8001496: 6123 str r3, [r4, #16] + 8001498: dc02 bgt.n 80014a0 <_printf_float+0x15c> + 800149a: 6822 ldr r2, [r4, #0] + 800149c: 07d2 lsls r2, r2, #31 + 800149e: d501 bpl.n 80014a4 <_printf_float+0x160> + 80014a0: 3301 adds r3, #1 + 80014a2: 6123 str r3, [r4, #16] + 80014a4: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 + 80014a8: 2b00 cmp r3, #0 + 80014aa: d09c beq.n 80013e6 <_printf_float+0xa2> + 80014ac: 232d movs r3, #45 ; 0x2d + 80014ae: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 80014b2: e798 b.n 80013e6 <_printf_float+0xa2> + 80014b4: 2947 cmp r1, #71 ; 0x47 + 80014b6: d1bc bne.n 8001432 <_printf_float+0xee> + 80014b8: 2b00 cmp r3, #0 + 80014ba: d1ba bne.n 8001432 <_printf_float+0xee> + 80014bc: 2301 movs r3, #1 + 80014be: e7b7 b.n 8001430 <_printf_float+0xec> + 80014c0: f1b9 0f66 cmp.w r9, #102 ; 0x66 + 80014c4: d118 bne.n 80014f8 <_printf_float+0x1b4> + 80014c6: 2900 cmp r1, #0 + 80014c8: 6863 ldr r3, [r4, #4] + 80014ca: dd0b ble.n 80014e4 <_printf_float+0x1a0> + 80014cc: 6121 str r1, [r4, #16] + 80014ce: b913 cbnz r3, 80014d6 <_printf_float+0x192> + 80014d0: 6822 ldr r2, [r4, #0] + 80014d2: 07d0 lsls r0, r2, #31 + 80014d4: d502 bpl.n 80014dc <_printf_float+0x198> + 80014d6: 3301 adds r3, #1 + 80014d8: 440b add r3, r1 + 80014da: 6123 str r3, [r4, #16] + 80014dc: 65a1 str r1, [r4, #88] ; 0x58 + 80014de: f04f 0a00 mov.w sl, #0 + 80014e2: e7df b.n 80014a4 <_printf_float+0x160> + 80014e4: b913 cbnz r3, 80014ec <_printf_float+0x1a8> + 80014e6: 6822 ldr r2, [r4, #0] + 80014e8: 07d2 lsls r2, r2, #31 + 80014ea: d501 bpl.n 80014f0 <_printf_float+0x1ac> + 80014ec: 3302 adds r3, #2 + 80014ee: e7f4 b.n 80014da <_printf_float+0x196> + 80014f0: 2301 movs r3, #1 + 80014f2: e7f2 b.n 80014da <_printf_float+0x196> + 80014f4: f04f 0967 mov.w r9, #103 ; 0x67 + 80014f8: 9b0e ldr r3, [sp, #56] ; 0x38 + 80014fa: 4299 cmp r1, r3 + 80014fc: db05 blt.n 800150a <_printf_float+0x1c6> + 80014fe: 6823 ldr r3, [r4, #0] + 8001500: 6121 str r1, [r4, #16] + 8001502: 07d8 lsls r0, r3, #31 + 8001504: d5ea bpl.n 80014dc <_printf_float+0x198> + 8001506: 1c4b adds r3, r1, #1 + 8001508: e7e7 b.n 80014da <_printf_float+0x196> + 800150a: 2900 cmp r1, #0 + 800150c: bfd4 ite le + 800150e: f1c1 0202 rsble r2, r1, #2 + 8001512: 2201 movgt r2, #1 + 8001514: 4413 add r3, r2 + 8001516: e7e0 b.n 80014da <_printf_float+0x196> + 8001518: 6823 ldr r3, [r4, #0] + 800151a: 055a lsls r2, r3, #21 + 800151c: d407 bmi.n 800152e <_printf_float+0x1ea> + 800151e: 6923 ldr r3, [r4, #16] + 8001520: 4642 mov r2, r8 + 8001522: 4631 mov r1, r6 + 8001524: 4628 mov r0, r5 + 8001526: 47b8 blx r7 + 8001528: 3001 adds r0, #1 + 800152a: d12b bne.n 8001584 <_printf_float+0x240> + 800152c: e765 b.n 80013fa <_printf_float+0xb6> + 800152e: f1b9 0f65 cmp.w r9, #101 ; 0x65 + 8001532: f240 80dc bls.w 80016ee <_printf_float+0x3aa> + 8001536: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 + 800153a: 2200 movs r2, #0 + 800153c: 2300 movs r3, #0 + 800153e: f7ff fae3 bl 8000b08 <__aeabi_dcmpeq> + 8001542: 2800 cmp r0, #0 + 8001544: d033 beq.n 80015ae <_printf_float+0x26a> + 8001546: 4a36 ldr r2, [pc, #216] ; (8001620 <_printf_float+0x2dc>) + 8001548: 2301 movs r3, #1 + 800154a: 4631 mov r1, r6 + 800154c: 4628 mov r0, r5 + 800154e: 47b8 blx r7 + 8001550: 3001 adds r0, #1 + 8001552: f43f af52 beq.w 80013fa <_printf_float+0xb6> + 8001556: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 + 800155a: 429a cmp r2, r3 + 800155c: db02 blt.n 8001564 <_printf_float+0x220> + 800155e: 6823 ldr r3, [r4, #0] + 8001560: 07d8 lsls r0, r3, #31 + 8001562: d50f bpl.n 8001584 <_printf_float+0x240> + 8001564: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 + 8001568: 4631 mov r1, r6 + 800156a: 4628 mov r0, r5 + 800156c: 47b8 blx r7 + 800156e: 3001 adds r0, #1 + 8001570: f43f af43 beq.w 80013fa <_printf_float+0xb6> + 8001574: f04f 0800 mov.w r8, #0 + 8001578: f104 091a add.w r9, r4, #26 + 800157c: 9b0e ldr r3, [sp, #56] ; 0x38 + 800157e: 3b01 subs r3, #1 + 8001580: 4543 cmp r3, r8 + 8001582: dc09 bgt.n 8001598 <_printf_float+0x254> + 8001584: 6823 ldr r3, [r4, #0] + 8001586: 079b lsls r3, r3, #30 + 8001588: f100 8101 bmi.w 800178e <_printf_float+0x44a> + 800158c: 68e0 ldr r0, [r4, #12] + 800158e: 9b0f ldr r3, [sp, #60] ; 0x3c + 8001590: 4298 cmp r0, r3 + 8001592: bfb8 it lt + 8001594: 4618 movlt r0, r3 + 8001596: e732 b.n 80013fe <_printf_float+0xba> + 8001598: 2301 movs r3, #1 + 800159a: 464a mov r2, r9 + 800159c: 4631 mov r1, r6 + 800159e: 4628 mov r0, r5 + 80015a0: 47b8 blx r7 + 80015a2: 3001 adds r0, #1 + 80015a4: f43f af29 beq.w 80013fa <_printf_float+0xb6> + 80015a8: f108 0801 add.w r8, r8, #1 + 80015ac: e7e6 b.n 800157c <_printf_float+0x238> + 80015ae: 9b0d ldr r3, [sp, #52] ; 0x34 + 80015b0: 2b00 cmp r3, #0 + 80015b2: dc37 bgt.n 8001624 <_printf_float+0x2e0> + 80015b4: 4a1a ldr r2, [pc, #104] ; (8001620 <_printf_float+0x2dc>) + 80015b6: 2301 movs r3, #1 + 80015b8: 4631 mov r1, r6 + 80015ba: 4628 mov r0, r5 + 80015bc: 47b8 blx r7 + 80015be: 3001 adds r0, #1 + 80015c0: f43f af1b beq.w 80013fa <_printf_float+0xb6> + 80015c4: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 + 80015c8: 4313 orrs r3, r2 + 80015ca: d102 bne.n 80015d2 <_printf_float+0x28e> + 80015cc: 6823 ldr r3, [r4, #0] + 80015ce: 07d9 lsls r1, r3, #31 + 80015d0: d5d8 bpl.n 8001584 <_printf_float+0x240> + 80015d2: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 + 80015d6: 4631 mov r1, r6 + 80015d8: 4628 mov r0, r5 + 80015da: 47b8 blx r7 + 80015dc: 3001 adds r0, #1 + 80015de: f43f af0c beq.w 80013fa <_printf_float+0xb6> + 80015e2: f04f 0900 mov.w r9, #0 + 80015e6: f104 0a1a add.w sl, r4, #26 + 80015ea: 9b0d ldr r3, [sp, #52] ; 0x34 + 80015ec: 425b negs r3, r3 + 80015ee: 454b cmp r3, r9 + 80015f0: dc01 bgt.n 80015f6 <_printf_float+0x2b2> + 80015f2: 9b0e ldr r3, [sp, #56] ; 0x38 + 80015f4: e794 b.n 8001520 <_printf_float+0x1dc> + 80015f6: 2301 movs r3, #1 + 80015f8: 4652 mov r2, sl + 80015fa: 4631 mov r1, r6 + 80015fc: 4628 mov r0, r5 + 80015fe: 47b8 blx r7 + 8001600: 3001 adds r0, #1 + 8001602: f43f aefa beq.w 80013fa <_printf_float+0xb6> + 8001606: f109 0901 add.w r9, r9, #1 + 800160a: e7ee b.n 80015ea <_printf_float+0x2a6> + 800160c: 7fefffff .word 0x7fefffff + 8001610: 08005e20 .word 0x08005e20 + 8001614: 08005e24 .word 0x08005e24 + 8001618: 08005e2c .word 0x08005e2c + 800161c: 08005e28 .word 0x08005e28 + 8001620: 08005e30 .word 0x08005e30 + 8001624: 9a0e ldr r2, [sp, #56] ; 0x38 + 8001626: 6da3 ldr r3, [r4, #88] ; 0x58 + 8001628: 429a cmp r2, r3 + 800162a: bfa8 it ge + 800162c: 461a movge r2, r3 + 800162e: 2a00 cmp r2, #0 + 8001630: 4691 mov r9, r2 + 8001632: dc37 bgt.n 80016a4 <_printf_float+0x360> + 8001634: f04f 0b00 mov.w fp, #0 + 8001638: ea29 79e9 bic.w r9, r9, r9, asr #31 + 800163c: f104 021a add.w r2, r4, #26 + 8001640: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58 + 8001644: ebaa 0309 sub.w r3, sl, r9 + 8001648: 455b cmp r3, fp + 800164a: dc33 bgt.n 80016b4 <_printf_float+0x370> + 800164c: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 + 8001650: 429a cmp r2, r3 + 8001652: db3b blt.n 80016cc <_printf_float+0x388> + 8001654: 6823 ldr r3, [r4, #0] + 8001656: 07da lsls r2, r3, #31 + 8001658: d438 bmi.n 80016cc <_printf_float+0x388> + 800165a: 9a0e ldr r2, [sp, #56] ; 0x38 + 800165c: 990d ldr r1, [sp, #52] ; 0x34 + 800165e: eba2 030a sub.w r3, r2, sl + 8001662: eba2 0901 sub.w r9, r2, r1 + 8001666: 4599 cmp r9, r3 + 8001668: bfa8 it ge + 800166a: 4699 movge r9, r3 + 800166c: f1b9 0f00 cmp.w r9, #0 + 8001670: dc34 bgt.n 80016dc <_printf_float+0x398> + 8001672: f04f 0800 mov.w r8, #0 + 8001676: ea29 79e9 bic.w r9, r9, r9, asr #31 + 800167a: f104 0a1a add.w sl, r4, #26 + 800167e: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 + 8001682: 1a9b subs r3, r3, r2 + 8001684: eba3 0309 sub.w r3, r3, r9 + 8001688: 4543 cmp r3, r8 + 800168a: f77f af7b ble.w 8001584 <_printf_float+0x240> + 800168e: 2301 movs r3, #1 + 8001690: 4652 mov r2, sl + 8001692: 4631 mov r1, r6 + 8001694: 4628 mov r0, r5 + 8001696: 47b8 blx r7 + 8001698: 3001 adds r0, #1 + 800169a: f43f aeae beq.w 80013fa <_printf_float+0xb6> + 800169e: f108 0801 add.w r8, r8, #1 + 80016a2: e7ec b.n 800167e <_printf_float+0x33a> + 80016a4: 4613 mov r3, r2 + 80016a6: 4631 mov r1, r6 + 80016a8: 4642 mov r2, r8 + 80016aa: 4628 mov r0, r5 + 80016ac: 47b8 blx r7 + 80016ae: 3001 adds r0, #1 + 80016b0: d1c0 bne.n 8001634 <_printf_float+0x2f0> + 80016b2: e6a2 b.n 80013fa <_printf_float+0xb6> + 80016b4: 2301 movs r3, #1 + 80016b6: 4631 mov r1, r6 + 80016b8: 4628 mov r0, r5 + 80016ba: 920b str r2, [sp, #44] ; 0x2c + 80016bc: 47b8 blx r7 + 80016be: 3001 adds r0, #1 + 80016c0: f43f ae9b beq.w 80013fa <_printf_float+0xb6> + 80016c4: 9a0b ldr r2, [sp, #44] ; 0x2c + 80016c6: f10b 0b01 add.w fp, fp, #1 + 80016ca: e7b9 b.n 8001640 <_printf_float+0x2fc> + 80016cc: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 + 80016d0: 4631 mov r1, r6 + 80016d2: 4628 mov r0, r5 + 80016d4: 47b8 blx r7 + 80016d6: 3001 adds r0, #1 + 80016d8: d1bf bne.n 800165a <_printf_float+0x316> + 80016da: e68e b.n 80013fa <_printf_float+0xb6> + 80016dc: 464b mov r3, r9 + 80016de: eb08 020a add.w r2, r8, sl + 80016e2: 4631 mov r1, r6 + 80016e4: 4628 mov r0, r5 + 80016e6: 47b8 blx r7 + 80016e8: 3001 adds r0, #1 + 80016ea: d1c2 bne.n 8001672 <_printf_float+0x32e> + 80016ec: e685 b.n 80013fa <_printf_float+0xb6> + 80016ee: 9a0e ldr r2, [sp, #56] ; 0x38 + 80016f0: 2a01 cmp r2, #1 + 80016f2: dc01 bgt.n 80016f8 <_printf_float+0x3b4> + 80016f4: 07db lsls r3, r3, #31 + 80016f6: d537 bpl.n 8001768 <_printf_float+0x424> + 80016f8: 2301 movs r3, #1 + 80016fa: 4642 mov r2, r8 + 80016fc: 4631 mov r1, r6 + 80016fe: 4628 mov r0, r5 + 8001700: 47b8 blx r7 + 8001702: 3001 adds r0, #1 + 8001704: f43f ae79 beq.w 80013fa <_printf_float+0xb6> + 8001708: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 + 800170c: 4631 mov r1, r6 + 800170e: 4628 mov r0, r5 + 8001710: 47b8 blx r7 + 8001712: 3001 adds r0, #1 + 8001714: f43f ae71 beq.w 80013fa <_printf_float+0xb6> + 8001718: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 + 800171c: 2200 movs r2, #0 + 800171e: 2300 movs r3, #0 + 8001720: f7ff f9f2 bl 8000b08 <__aeabi_dcmpeq> + 8001724: b9d8 cbnz r0, 800175e <_printf_float+0x41a> + 8001726: 9b0e ldr r3, [sp, #56] ; 0x38 + 8001728: f108 0201 add.w r2, r8, #1 + 800172c: 3b01 subs r3, #1 + 800172e: 4631 mov r1, r6 + 8001730: 4628 mov r0, r5 + 8001732: 47b8 blx r7 + 8001734: 3001 adds r0, #1 + 8001736: d10e bne.n 8001756 <_printf_float+0x412> + 8001738: e65f b.n 80013fa <_printf_float+0xb6> + 800173a: 2301 movs r3, #1 + 800173c: 464a mov r2, r9 + 800173e: 4631 mov r1, r6 + 8001740: 4628 mov r0, r5 + 8001742: 47b8 blx r7 + 8001744: 3001 adds r0, #1 + 8001746: f43f ae58 beq.w 80013fa <_printf_float+0xb6> + 800174a: f108 0801 add.w r8, r8, #1 + 800174e: 9b0e ldr r3, [sp, #56] ; 0x38 + 8001750: 3b01 subs r3, #1 + 8001752: 4543 cmp r3, r8 + 8001754: dcf1 bgt.n 800173a <_printf_float+0x3f6> + 8001756: 4653 mov r3, sl + 8001758: f104 0250 add.w r2, r4, #80 ; 0x50 + 800175c: e6e1 b.n 8001522 <_printf_float+0x1de> + 800175e: f04f 0800 mov.w r8, #0 + 8001762: f104 091a add.w r9, r4, #26 + 8001766: e7f2 b.n 800174e <_printf_float+0x40a> + 8001768: 2301 movs r3, #1 + 800176a: 4642 mov r2, r8 + 800176c: e7df b.n 800172e <_printf_float+0x3ea> + 800176e: 2301 movs r3, #1 + 8001770: 464a mov r2, r9 + 8001772: 4631 mov r1, r6 + 8001774: 4628 mov r0, r5 + 8001776: 47b8 blx r7 + 8001778: 3001 adds r0, #1 + 800177a: f43f ae3e beq.w 80013fa <_printf_float+0xb6> + 800177e: f108 0801 add.w r8, r8, #1 + 8001782: 68e3 ldr r3, [r4, #12] + 8001784: 990f ldr r1, [sp, #60] ; 0x3c + 8001786: 1a5b subs r3, r3, r1 + 8001788: 4543 cmp r3, r8 + 800178a: dcf0 bgt.n 800176e <_printf_float+0x42a> + 800178c: e6fe b.n 800158c <_printf_float+0x248> + 800178e: f04f 0800 mov.w r8, #0 + 8001792: f104 0919 add.w r9, r4, #25 + 8001796: e7f4 b.n 8001782 <_printf_float+0x43e> + +08001798 <_printf_common>: + 8001798: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 800179c: 4616 mov r6, r2 + 800179e: 4699 mov r9, r3 + 80017a0: 688a ldr r2, [r1, #8] + 80017a2: 690b ldr r3, [r1, #16] + 80017a4: f8dd 8020 ldr.w r8, [sp, #32] + 80017a8: 4293 cmp r3, r2 + 80017aa: bfb8 it lt + 80017ac: 4613 movlt r3, r2 + 80017ae: 6033 str r3, [r6, #0] + 80017b0: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 80017b4: 4607 mov r7, r0 + 80017b6: 460c mov r4, r1 + 80017b8: b10a cbz r2, 80017be <_printf_common+0x26> + 80017ba: 3301 adds r3, #1 + 80017bc: 6033 str r3, [r6, #0] + 80017be: 6823 ldr r3, [r4, #0] + 80017c0: 0699 lsls r1, r3, #26 + 80017c2: bf42 ittt mi + 80017c4: 6833 ldrmi r3, [r6, #0] + 80017c6: 3302 addmi r3, #2 + 80017c8: 6033 strmi r3, [r6, #0] + 80017ca: 6825 ldr r5, [r4, #0] + 80017cc: f015 0506 ands.w r5, r5, #6 + 80017d0: d106 bne.n 80017e0 <_printf_common+0x48> + 80017d2: f104 0a19 add.w sl, r4, #25 + 80017d6: 68e3 ldr r3, [r4, #12] + 80017d8: 6832 ldr r2, [r6, #0] + 80017da: 1a9b subs r3, r3, r2 + 80017dc: 42ab cmp r3, r5 + 80017de: dc26 bgt.n 800182e <_printf_common+0x96> + 80017e0: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 80017e4: 1e13 subs r3, r2, #0 + 80017e6: 6822 ldr r2, [r4, #0] + 80017e8: bf18 it ne + 80017ea: 2301 movne r3, #1 + 80017ec: 0692 lsls r2, r2, #26 + 80017ee: d42b bmi.n 8001848 <_printf_common+0xb0> + 80017f0: f104 0243 add.w r2, r4, #67 ; 0x43 + 80017f4: 4649 mov r1, r9 + 80017f6: 4638 mov r0, r7 + 80017f8: 47c0 blx r8 + 80017fa: 3001 adds r0, #1 + 80017fc: d01e beq.n 800183c <_printf_common+0xa4> + 80017fe: 6823 ldr r3, [r4, #0] + 8001800: 68e5 ldr r5, [r4, #12] + 8001802: 6832 ldr r2, [r6, #0] + 8001804: f003 0306 and.w r3, r3, #6 + 8001808: 2b04 cmp r3, #4 + 800180a: bf08 it eq + 800180c: 1aad subeq r5, r5, r2 + 800180e: 68a3 ldr r3, [r4, #8] + 8001810: 6922 ldr r2, [r4, #16] + 8001812: bf0c ite eq + 8001814: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 8001818: 2500 movne r5, #0 + 800181a: 4293 cmp r3, r2 + 800181c: bfc4 itt gt + 800181e: 1a9b subgt r3, r3, r2 + 8001820: 18ed addgt r5, r5, r3 + 8001822: 2600 movs r6, #0 + 8001824: 341a adds r4, #26 + 8001826: 42b5 cmp r5, r6 + 8001828: d11a bne.n 8001860 <_printf_common+0xc8> + 800182a: 2000 movs r0, #0 + 800182c: e008 b.n 8001840 <_printf_common+0xa8> + 800182e: 2301 movs r3, #1 + 8001830: 4652 mov r2, sl + 8001832: 4649 mov r1, r9 + 8001834: 4638 mov r0, r7 + 8001836: 47c0 blx r8 + 8001838: 3001 adds r0, #1 + 800183a: d103 bne.n 8001844 <_printf_common+0xac> + 800183c: f04f 30ff mov.w r0, #4294967295 + 8001840: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001844: 3501 adds r5, #1 + 8001846: e7c6 b.n 80017d6 <_printf_common+0x3e> + 8001848: 18e1 adds r1, r4, r3 + 800184a: 1c5a adds r2, r3, #1 + 800184c: 2030 movs r0, #48 ; 0x30 + 800184e: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 8001852: 4422 add r2, r4 + 8001854: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 8001858: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 800185c: 3302 adds r3, #2 + 800185e: e7c7 b.n 80017f0 <_printf_common+0x58> + 8001860: 2301 movs r3, #1 + 8001862: 4622 mov r2, r4 + 8001864: 4649 mov r1, r9 + 8001866: 4638 mov r0, r7 + 8001868: 47c0 blx r8 + 800186a: 3001 adds r0, #1 + 800186c: d0e6 beq.n 800183c <_printf_common+0xa4> + 800186e: 3601 adds r6, #1 + 8001870: e7d9 b.n 8001826 <_printf_common+0x8e> + ... + +08001874 <_printf_i>: + 8001874: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 8001878: 460c mov r4, r1 + 800187a: 4691 mov r9, r2 + 800187c: 7e27 ldrb r7, [r4, #24] + 800187e: 990c ldr r1, [sp, #48] ; 0x30 + 8001880: 2f78 cmp r7, #120 ; 0x78 + 8001882: 4680 mov r8, r0 + 8001884: 469a mov sl, r3 + 8001886: f104 0243 add.w r2, r4, #67 ; 0x43 + 800188a: d807 bhi.n 800189c <_printf_i+0x28> + 800188c: 2f62 cmp r7, #98 ; 0x62 + 800188e: d80a bhi.n 80018a6 <_printf_i+0x32> + 8001890: 2f00 cmp r7, #0 + 8001892: f000 80d8 beq.w 8001a46 <_printf_i+0x1d2> + 8001896: 2f58 cmp r7, #88 ; 0x58 + 8001898: f000 80a3 beq.w 80019e2 <_printf_i+0x16e> + 800189c: f104 0642 add.w r6, r4, #66 ; 0x42 + 80018a0: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 80018a4: e03a b.n 800191c <_printf_i+0xa8> + 80018a6: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 80018aa: 2b15 cmp r3, #21 + 80018ac: d8f6 bhi.n 800189c <_printf_i+0x28> + 80018ae: a001 add r0, pc, #4 ; (adr r0, 80018b4 <_printf_i+0x40>) + 80018b0: f850 f023 ldr.w pc, [r0, r3, lsl #2] + 80018b4: 0800190d .word 0x0800190d + 80018b8: 08001921 .word 0x08001921 + 80018bc: 0800189d .word 0x0800189d + 80018c0: 0800189d .word 0x0800189d + 80018c4: 0800189d .word 0x0800189d + 80018c8: 0800189d .word 0x0800189d + 80018cc: 08001921 .word 0x08001921 + 80018d0: 0800189d .word 0x0800189d + 80018d4: 0800189d .word 0x0800189d + 80018d8: 0800189d .word 0x0800189d + 80018dc: 0800189d .word 0x0800189d + 80018e0: 08001a2d .word 0x08001a2d + 80018e4: 08001951 .word 0x08001951 + 80018e8: 08001a0f .word 0x08001a0f + 80018ec: 0800189d .word 0x0800189d + 80018f0: 0800189d .word 0x0800189d + 80018f4: 08001a4f .word 0x08001a4f + 80018f8: 0800189d .word 0x0800189d + 80018fc: 08001951 .word 0x08001951 + 8001900: 0800189d .word 0x0800189d + 8001904: 0800189d .word 0x0800189d + 8001908: 08001a17 .word 0x08001a17 + 800190c: 680b ldr r3, [r1, #0] + 800190e: 1d1a adds r2, r3, #4 + 8001910: 681b ldr r3, [r3, #0] + 8001912: 600a str r2, [r1, #0] + 8001914: f104 0642 add.w r6, r4, #66 ; 0x42 + 8001918: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 800191c: 2301 movs r3, #1 + 800191e: e0a3 b.n 8001a68 <_printf_i+0x1f4> + 8001920: 6825 ldr r5, [r4, #0] + 8001922: 6808 ldr r0, [r1, #0] + 8001924: 062e lsls r6, r5, #24 + 8001926: f100 0304 add.w r3, r0, #4 + 800192a: d50a bpl.n 8001942 <_printf_i+0xce> + 800192c: 6805 ldr r5, [r0, #0] + 800192e: 600b str r3, [r1, #0] + 8001930: 2d00 cmp r5, #0 + 8001932: da03 bge.n 800193c <_printf_i+0xc8> + 8001934: 232d movs r3, #45 ; 0x2d + 8001936: 426d negs r5, r5 + 8001938: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 800193c: 485e ldr r0, [pc, #376] ; (8001ab8 <_printf_i+0x244>) + 800193e: 230a movs r3, #10 + 8001940: e019 b.n 8001976 <_printf_i+0x102> + 8001942: f015 0f40 tst.w r5, #64 ; 0x40 + 8001946: 6805 ldr r5, [r0, #0] + 8001948: 600b str r3, [r1, #0] + 800194a: bf18 it ne + 800194c: b22d sxthne r5, r5 + 800194e: e7ef b.n 8001930 <_printf_i+0xbc> + 8001950: 680b ldr r3, [r1, #0] + 8001952: 6825 ldr r5, [r4, #0] + 8001954: 1d18 adds r0, r3, #4 + 8001956: 6008 str r0, [r1, #0] + 8001958: 0628 lsls r0, r5, #24 + 800195a: d501 bpl.n 8001960 <_printf_i+0xec> + 800195c: 681d ldr r5, [r3, #0] + 800195e: e002 b.n 8001966 <_printf_i+0xf2> + 8001960: 0669 lsls r1, r5, #25 + 8001962: d5fb bpl.n 800195c <_printf_i+0xe8> + 8001964: 881d ldrh r5, [r3, #0] + 8001966: 4854 ldr r0, [pc, #336] ; (8001ab8 <_printf_i+0x244>) + 8001968: 2f6f cmp r7, #111 ; 0x6f + 800196a: bf0c ite eq + 800196c: 2308 moveq r3, #8 + 800196e: 230a movne r3, #10 + 8001970: 2100 movs r1, #0 + 8001972: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 8001976: 6866 ldr r6, [r4, #4] + 8001978: 60a6 str r6, [r4, #8] + 800197a: 2e00 cmp r6, #0 + 800197c: bfa2 ittt ge + 800197e: 6821 ldrge r1, [r4, #0] + 8001980: f021 0104 bicge.w r1, r1, #4 + 8001984: 6021 strge r1, [r4, #0] + 8001986: b90d cbnz r5, 800198c <_printf_i+0x118> + 8001988: 2e00 cmp r6, #0 + 800198a: d04d beq.n 8001a28 <_printf_i+0x1b4> + 800198c: 4616 mov r6, r2 + 800198e: fbb5 f1f3 udiv r1, r5, r3 + 8001992: fb03 5711 mls r7, r3, r1, r5 + 8001996: 5dc7 ldrb r7, [r0, r7] + 8001998: f806 7d01 strb.w r7, [r6, #-1]! + 800199c: 462f mov r7, r5 + 800199e: 42bb cmp r3, r7 + 80019a0: 460d mov r5, r1 + 80019a2: d9f4 bls.n 800198e <_printf_i+0x11a> + 80019a4: 2b08 cmp r3, #8 + 80019a6: d10b bne.n 80019c0 <_printf_i+0x14c> + 80019a8: 6823 ldr r3, [r4, #0] + 80019aa: 07df lsls r7, r3, #31 + 80019ac: d508 bpl.n 80019c0 <_printf_i+0x14c> + 80019ae: 6923 ldr r3, [r4, #16] + 80019b0: 6861 ldr r1, [r4, #4] + 80019b2: 4299 cmp r1, r3 + 80019b4: bfde ittt le + 80019b6: 2330 movle r3, #48 ; 0x30 + 80019b8: f806 3c01 strble.w r3, [r6, #-1] + 80019bc: f106 36ff addle.w r6, r6, #4294967295 + 80019c0: 1b92 subs r2, r2, r6 + 80019c2: 6122 str r2, [r4, #16] + 80019c4: f8cd a000 str.w sl, [sp] + 80019c8: 464b mov r3, r9 + 80019ca: aa03 add r2, sp, #12 + 80019cc: 4621 mov r1, r4 + 80019ce: 4640 mov r0, r8 + 80019d0: f7ff fee2 bl 8001798 <_printf_common> + 80019d4: 3001 adds r0, #1 + 80019d6: d14c bne.n 8001a72 <_printf_i+0x1fe> + 80019d8: f04f 30ff mov.w r0, #4294967295 + 80019dc: b004 add sp, #16 + 80019de: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80019e2: 4835 ldr r0, [pc, #212] ; (8001ab8 <_printf_i+0x244>) + 80019e4: f884 7045 strb.w r7, [r4, #69] ; 0x45 + 80019e8: 6823 ldr r3, [r4, #0] + 80019ea: 680e ldr r6, [r1, #0] + 80019ec: 061f lsls r7, r3, #24 + 80019ee: f856 5b04 ldr.w r5, [r6], #4 + 80019f2: 600e str r6, [r1, #0] + 80019f4: d514 bpl.n 8001a20 <_printf_i+0x1ac> + 80019f6: 07d9 lsls r1, r3, #31 + 80019f8: bf44 itt mi + 80019fa: f043 0320 orrmi.w r3, r3, #32 + 80019fe: 6023 strmi r3, [r4, #0] + 8001a00: b91d cbnz r5, 8001a0a <_printf_i+0x196> + 8001a02: 6823 ldr r3, [r4, #0] + 8001a04: f023 0320 bic.w r3, r3, #32 + 8001a08: 6023 str r3, [r4, #0] + 8001a0a: 2310 movs r3, #16 + 8001a0c: e7b0 b.n 8001970 <_printf_i+0xfc> + 8001a0e: 6823 ldr r3, [r4, #0] + 8001a10: f043 0320 orr.w r3, r3, #32 + 8001a14: 6023 str r3, [r4, #0] + 8001a16: 2378 movs r3, #120 ; 0x78 + 8001a18: 4828 ldr r0, [pc, #160] ; (8001abc <_printf_i+0x248>) + 8001a1a: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 8001a1e: e7e3 b.n 80019e8 <_printf_i+0x174> + 8001a20: 065e lsls r6, r3, #25 + 8001a22: bf48 it mi + 8001a24: b2ad uxthmi r5, r5 + 8001a26: e7e6 b.n 80019f6 <_printf_i+0x182> + 8001a28: 4616 mov r6, r2 + 8001a2a: e7bb b.n 80019a4 <_printf_i+0x130> + 8001a2c: 680b ldr r3, [r1, #0] + 8001a2e: 6826 ldr r6, [r4, #0] + 8001a30: 6960 ldr r0, [r4, #20] + 8001a32: 1d1d adds r5, r3, #4 + 8001a34: 600d str r5, [r1, #0] + 8001a36: 0635 lsls r5, r6, #24 + 8001a38: 681b ldr r3, [r3, #0] + 8001a3a: d501 bpl.n 8001a40 <_printf_i+0x1cc> + 8001a3c: 6018 str r0, [r3, #0] + 8001a3e: e002 b.n 8001a46 <_printf_i+0x1d2> + 8001a40: 0671 lsls r1, r6, #25 + 8001a42: d5fb bpl.n 8001a3c <_printf_i+0x1c8> + 8001a44: 8018 strh r0, [r3, #0] + 8001a46: 2300 movs r3, #0 + 8001a48: 6123 str r3, [r4, #16] + 8001a4a: 4616 mov r6, r2 + 8001a4c: e7ba b.n 80019c4 <_printf_i+0x150> + 8001a4e: 680b ldr r3, [r1, #0] + 8001a50: 1d1a adds r2, r3, #4 + 8001a52: 600a str r2, [r1, #0] + 8001a54: 681e ldr r6, [r3, #0] + 8001a56: 6862 ldr r2, [r4, #4] + 8001a58: 2100 movs r1, #0 + 8001a5a: 4630 mov r0, r6 + 8001a5c: f7fe fbe0 bl 8000220 + 8001a60: b108 cbz r0, 8001a66 <_printf_i+0x1f2> + 8001a62: 1b80 subs r0, r0, r6 + 8001a64: 6060 str r0, [r4, #4] + 8001a66: 6863 ldr r3, [r4, #4] + 8001a68: 6123 str r3, [r4, #16] + 8001a6a: 2300 movs r3, #0 + 8001a6c: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001a70: e7a8 b.n 80019c4 <_printf_i+0x150> + 8001a72: 6923 ldr r3, [r4, #16] + 8001a74: 4632 mov r2, r6 + 8001a76: 4649 mov r1, r9 + 8001a78: 4640 mov r0, r8 + 8001a7a: 47d0 blx sl + 8001a7c: 3001 adds r0, #1 + 8001a7e: d0ab beq.n 80019d8 <_printf_i+0x164> + 8001a80: 6823 ldr r3, [r4, #0] + 8001a82: 079b lsls r3, r3, #30 + 8001a84: d413 bmi.n 8001aae <_printf_i+0x23a> + 8001a86: 68e0 ldr r0, [r4, #12] + 8001a88: 9b03 ldr r3, [sp, #12] + 8001a8a: 4298 cmp r0, r3 + 8001a8c: bfb8 it lt + 8001a8e: 4618 movlt r0, r3 + 8001a90: e7a4 b.n 80019dc <_printf_i+0x168> + 8001a92: 2301 movs r3, #1 + 8001a94: 4632 mov r2, r6 + 8001a96: 4649 mov r1, r9 + 8001a98: 4640 mov r0, r8 + 8001a9a: 47d0 blx sl + 8001a9c: 3001 adds r0, #1 + 8001a9e: d09b beq.n 80019d8 <_printf_i+0x164> + 8001aa0: 3501 adds r5, #1 + 8001aa2: 68e3 ldr r3, [r4, #12] + 8001aa4: 9903 ldr r1, [sp, #12] + 8001aa6: 1a5b subs r3, r3, r1 + 8001aa8: 42ab cmp r3, r5 + 8001aaa: dcf2 bgt.n 8001a92 <_printf_i+0x21e> + 8001aac: e7eb b.n 8001a86 <_printf_i+0x212> + 8001aae: 2500 movs r5, #0 + 8001ab0: f104 0619 add.w r6, r4, #25 + 8001ab4: e7f5 b.n 8001aa2 <_printf_i+0x22e> + 8001ab6: bf00 nop + 8001ab8: 08005e32 .word 0x08005e32 + 8001abc: 08005e43 .word 0x08005e43 + +08001ac0 <_scanf_float>: + 8001ac0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8001ac4: b087 sub sp, #28 + 8001ac6: 4617 mov r7, r2 + 8001ac8: 9303 str r3, [sp, #12] + 8001aca: 688b ldr r3, [r1, #8] + 8001acc: 1e5a subs r2, r3, #1 + 8001ace: f5b2 7fae cmp.w r2, #348 ; 0x15c + 8001ad2: bf83 ittte hi + 8001ad4: f46f 75ae mvnhi.w r5, #348 ; 0x15c + 8001ad8: 195b addhi r3, r3, r5 + 8001ada: 9302 strhi r3, [sp, #8] + 8001adc: 2300 movls r3, #0 + 8001ade: bf86 itte hi + 8001ae0: f240 135d movwhi r3, #349 ; 0x15d + 8001ae4: 608b strhi r3, [r1, #8] + 8001ae6: 9302 strls r3, [sp, #8] + 8001ae8: 680b ldr r3, [r1, #0] + 8001aea: 468b mov fp, r1 + 8001aec: 2500 movs r5, #0 + 8001aee: f443 63f0 orr.w r3, r3, #1920 ; 0x780 + 8001af2: f84b 3b1c str.w r3, [fp], #28 + 8001af6: e9cd 5504 strd r5, r5, [sp, #16] + 8001afa: 4680 mov r8, r0 + 8001afc: 460c mov r4, r1 + 8001afe: 465e mov r6, fp + 8001b00: 46aa mov sl, r5 + 8001b02: 46a9 mov r9, r5 + 8001b04: 9501 str r5, [sp, #4] + 8001b06: 68a2 ldr r2, [r4, #8] + 8001b08: b152 cbz r2, 8001b20 <_scanf_float+0x60> + 8001b0a: 683b ldr r3, [r7, #0] + 8001b0c: 781b ldrb r3, [r3, #0] + 8001b0e: 2b4e cmp r3, #78 ; 0x4e + 8001b10: d864 bhi.n 8001bdc <_scanf_float+0x11c> + 8001b12: 2b40 cmp r3, #64 ; 0x40 + 8001b14: d83c bhi.n 8001b90 <_scanf_float+0xd0> + 8001b16: f1a3 012b sub.w r1, r3, #43 ; 0x2b + 8001b1a: b2c8 uxtb r0, r1 + 8001b1c: 280e cmp r0, #14 + 8001b1e: d93a bls.n 8001b96 <_scanf_float+0xd6> + 8001b20: f1b9 0f00 cmp.w r9, #0 + 8001b24: d003 beq.n 8001b2e <_scanf_float+0x6e> + 8001b26: 6823 ldr r3, [r4, #0] + 8001b28: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8001b2c: 6023 str r3, [r4, #0] + 8001b2e: f10a 3aff add.w sl, sl, #4294967295 + 8001b32: f1ba 0f01 cmp.w sl, #1 + 8001b36: f200 8113 bhi.w 8001d60 <_scanf_float+0x2a0> + 8001b3a: 455e cmp r6, fp + 8001b3c: f200 8105 bhi.w 8001d4a <_scanf_float+0x28a> + 8001b40: 2501 movs r5, #1 + 8001b42: 4628 mov r0, r5 + 8001b44: b007 add sp, #28 + 8001b46: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8001b4a: f1a3 0261 sub.w r2, r3, #97 ; 0x61 + 8001b4e: 2a0d cmp r2, #13 + 8001b50: d8e6 bhi.n 8001b20 <_scanf_float+0x60> + 8001b52: a101 add r1, pc, #4 ; (adr r1, 8001b58 <_scanf_float+0x98>) + 8001b54: f851 f022 ldr.w pc, [r1, r2, lsl #2] + 8001b58: 08001c97 .word 0x08001c97 + 8001b5c: 08001b21 .word 0x08001b21 + 8001b60: 08001b21 .word 0x08001b21 + 8001b64: 08001b21 .word 0x08001b21 + 8001b68: 08001cf7 .word 0x08001cf7 + 8001b6c: 08001ccf .word 0x08001ccf + 8001b70: 08001b21 .word 0x08001b21 + 8001b74: 08001b21 .word 0x08001b21 + 8001b78: 08001ca5 .word 0x08001ca5 + 8001b7c: 08001b21 .word 0x08001b21 + 8001b80: 08001b21 .word 0x08001b21 + 8001b84: 08001b21 .word 0x08001b21 + 8001b88: 08001b21 .word 0x08001b21 + 8001b8c: 08001c5d .word 0x08001c5d + 8001b90: f1a3 0241 sub.w r2, r3, #65 ; 0x41 + 8001b94: e7db b.n 8001b4e <_scanf_float+0x8e> + 8001b96: 290e cmp r1, #14 + 8001b98: d8c2 bhi.n 8001b20 <_scanf_float+0x60> + 8001b9a: a001 add r0, pc, #4 ; (adr r0, 8001ba0 <_scanf_float+0xe0>) + 8001b9c: f850 f021 ldr.w pc, [r0, r1, lsl #2] + 8001ba0: 08001c4f .word 0x08001c4f + 8001ba4: 08001b21 .word 0x08001b21 + 8001ba8: 08001c4f .word 0x08001c4f + 8001bac: 08001ce3 .word 0x08001ce3 + 8001bb0: 08001b21 .word 0x08001b21 + 8001bb4: 08001bfd .word 0x08001bfd + 8001bb8: 08001c39 .word 0x08001c39 + 8001bbc: 08001c39 .word 0x08001c39 + 8001bc0: 08001c39 .word 0x08001c39 + 8001bc4: 08001c39 .word 0x08001c39 + 8001bc8: 08001c39 .word 0x08001c39 + 8001bcc: 08001c39 .word 0x08001c39 + 8001bd0: 08001c39 .word 0x08001c39 + 8001bd4: 08001c39 .word 0x08001c39 + 8001bd8: 08001c39 .word 0x08001c39 + 8001bdc: 2b6e cmp r3, #110 ; 0x6e + 8001bde: d809 bhi.n 8001bf4 <_scanf_float+0x134> + 8001be0: 2b60 cmp r3, #96 ; 0x60 + 8001be2: d8b2 bhi.n 8001b4a <_scanf_float+0x8a> + 8001be4: 2b54 cmp r3, #84 ; 0x54 + 8001be6: d077 beq.n 8001cd8 <_scanf_float+0x218> + 8001be8: 2b59 cmp r3, #89 ; 0x59 + 8001bea: d199 bne.n 8001b20 <_scanf_float+0x60> + 8001bec: 2d07 cmp r5, #7 + 8001bee: d197 bne.n 8001b20 <_scanf_float+0x60> + 8001bf0: 2508 movs r5, #8 + 8001bf2: e029 b.n 8001c48 <_scanf_float+0x188> + 8001bf4: 2b74 cmp r3, #116 ; 0x74 + 8001bf6: d06f beq.n 8001cd8 <_scanf_float+0x218> + 8001bf8: 2b79 cmp r3, #121 ; 0x79 + 8001bfa: e7f6 b.n 8001bea <_scanf_float+0x12a> + 8001bfc: 6821 ldr r1, [r4, #0] + 8001bfe: 05c8 lsls r0, r1, #23 + 8001c00: d51a bpl.n 8001c38 <_scanf_float+0x178> + 8001c02: 9b02 ldr r3, [sp, #8] + 8001c04: f021 0180 bic.w r1, r1, #128 ; 0x80 + 8001c08: 6021 str r1, [r4, #0] + 8001c0a: f109 0901 add.w r9, r9, #1 + 8001c0e: b11b cbz r3, 8001c18 <_scanf_float+0x158> + 8001c10: 3b01 subs r3, #1 + 8001c12: 3201 adds r2, #1 + 8001c14: 9302 str r3, [sp, #8] + 8001c16: 60a2 str r2, [r4, #8] + 8001c18: 68a3 ldr r3, [r4, #8] + 8001c1a: 3b01 subs r3, #1 + 8001c1c: 60a3 str r3, [r4, #8] + 8001c1e: 6923 ldr r3, [r4, #16] + 8001c20: 3301 adds r3, #1 + 8001c22: 6123 str r3, [r4, #16] + 8001c24: 687b ldr r3, [r7, #4] + 8001c26: 3b01 subs r3, #1 + 8001c28: 2b00 cmp r3, #0 + 8001c2a: 607b str r3, [r7, #4] + 8001c2c: f340 8084 ble.w 8001d38 <_scanf_float+0x278> + 8001c30: 683b ldr r3, [r7, #0] + 8001c32: 3301 adds r3, #1 + 8001c34: 603b str r3, [r7, #0] + 8001c36: e766 b.n 8001b06 <_scanf_float+0x46> + 8001c38: eb1a 0f05 cmn.w sl, r5 + 8001c3c: f47f af70 bne.w 8001b20 <_scanf_float+0x60> + 8001c40: 6822 ldr r2, [r4, #0] + 8001c42: f422 72c0 bic.w r2, r2, #384 ; 0x180 + 8001c46: 6022 str r2, [r4, #0] + 8001c48: f806 3b01 strb.w r3, [r6], #1 + 8001c4c: e7e4 b.n 8001c18 <_scanf_float+0x158> + 8001c4e: 6822 ldr r2, [r4, #0] + 8001c50: 0610 lsls r0, r2, #24 + 8001c52: f57f af65 bpl.w 8001b20 <_scanf_float+0x60> + 8001c56: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8001c5a: e7f4 b.n 8001c46 <_scanf_float+0x186> + 8001c5c: f1ba 0f00 cmp.w sl, #0 + 8001c60: d10e bne.n 8001c80 <_scanf_float+0x1c0> + 8001c62: f1b9 0f00 cmp.w r9, #0 + 8001c66: d10e bne.n 8001c86 <_scanf_float+0x1c6> + 8001c68: 6822 ldr r2, [r4, #0] + 8001c6a: f402 61e0 and.w r1, r2, #1792 ; 0x700 + 8001c6e: f5b1 6fe0 cmp.w r1, #1792 ; 0x700 + 8001c72: d108 bne.n 8001c86 <_scanf_float+0x1c6> + 8001c74: f422 62f0 bic.w r2, r2, #1920 ; 0x780 + 8001c78: 6022 str r2, [r4, #0] + 8001c7a: f04f 0a01 mov.w sl, #1 + 8001c7e: e7e3 b.n 8001c48 <_scanf_float+0x188> + 8001c80: f1ba 0f02 cmp.w sl, #2 + 8001c84: d055 beq.n 8001d32 <_scanf_float+0x272> + 8001c86: 2d01 cmp r5, #1 + 8001c88: d002 beq.n 8001c90 <_scanf_float+0x1d0> + 8001c8a: 2d04 cmp r5, #4 + 8001c8c: f47f af48 bne.w 8001b20 <_scanf_float+0x60> + 8001c90: 3501 adds r5, #1 + 8001c92: b2ed uxtb r5, r5 + 8001c94: e7d8 b.n 8001c48 <_scanf_float+0x188> + 8001c96: f1ba 0f01 cmp.w sl, #1 + 8001c9a: f47f af41 bne.w 8001b20 <_scanf_float+0x60> + 8001c9e: f04f 0a02 mov.w sl, #2 + 8001ca2: e7d1 b.n 8001c48 <_scanf_float+0x188> + 8001ca4: b97d cbnz r5, 8001cc6 <_scanf_float+0x206> + 8001ca6: f1b9 0f00 cmp.w r9, #0 + 8001caa: f47f af3c bne.w 8001b26 <_scanf_float+0x66> + 8001cae: 6822 ldr r2, [r4, #0] + 8001cb0: f402 61e0 and.w r1, r2, #1792 ; 0x700 + 8001cb4: f5b1 6fe0 cmp.w r1, #1792 ; 0x700 + 8001cb8: f47f af39 bne.w 8001b2e <_scanf_float+0x6e> + 8001cbc: f422 62f0 bic.w r2, r2, #1920 ; 0x780 + 8001cc0: 6022 str r2, [r4, #0] + 8001cc2: 2501 movs r5, #1 + 8001cc4: e7c0 b.n 8001c48 <_scanf_float+0x188> + 8001cc6: 2d03 cmp r5, #3 + 8001cc8: d0e2 beq.n 8001c90 <_scanf_float+0x1d0> + 8001cca: 2d05 cmp r5, #5 + 8001ccc: e7de b.n 8001c8c <_scanf_float+0x1cc> + 8001cce: 2d02 cmp r5, #2 + 8001cd0: f47f af26 bne.w 8001b20 <_scanf_float+0x60> + 8001cd4: 2503 movs r5, #3 + 8001cd6: e7b7 b.n 8001c48 <_scanf_float+0x188> + 8001cd8: 2d06 cmp r5, #6 + 8001cda: f47f af21 bne.w 8001b20 <_scanf_float+0x60> + 8001cde: 2507 movs r5, #7 + 8001ce0: e7b2 b.n 8001c48 <_scanf_float+0x188> + 8001ce2: 6822 ldr r2, [r4, #0] + 8001ce4: 0591 lsls r1, r2, #22 + 8001ce6: f57f af1b bpl.w 8001b20 <_scanf_float+0x60> + 8001cea: f422 7220 bic.w r2, r2, #640 ; 0x280 + 8001cee: 6022 str r2, [r4, #0] + 8001cf0: f8cd 9004 str.w r9, [sp, #4] + 8001cf4: e7a8 b.n 8001c48 <_scanf_float+0x188> + 8001cf6: 6822 ldr r2, [r4, #0] + 8001cf8: f402 61a0 and.w r1, r2, #1280 ; 0x500 + 8001cfc: f5b1 6f80 cmp.w r1, #1024 ; 0x400 + 8001d00: d006 beq.n 8001d10 <_scanf_float+0x250> + 8001d02: 0550 lsls r0, r2, #21 + 8001d04: f57f af0c bpl.w 8001b20 <_scanf_float+0x60> + 8001d08: f1b9 0f00 cmp.w r9, #0 + 8001d0c: f43f af0f beq.w 8001b2e <_scanf_float+0x6e> + 8001d10: 0591 lsls r1, r2, #22 + 8001d12: bf58 it pl + 8001d14: 9901 ldrpl r1, [sp, #4] + 8001d16: f422 62f0 bic.w r2, r2, #1920 ; 0x780 + 8001d1a: bf58 it pl + 8001d1c: eba9 0101 subpl.w r1, r9, r1 + 8001d20: f442 72c0 orr.w r2, r2, #384 ; 0x180 + 8001d24: bf58 it pl + 8001d26: e9cd 1604 strdpl r1, r6, [sp, #16] + 8001d2a: 6022 str r2, [r4, #0] + 8001d2c: f04f 0900 mov.w r9, #0 + 8001d30: e78a b.n 8001c48 <_scanf_float+0x188> + 8001d32: f04f 0a03 mov.w sl, #3 + 8001d36: e787 b.n 8001c48 <_scanf_float+0x188> + 8001d38: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180 + 8001d3c: 4639 mov r1, r7 + 8001d3e: 4640 mov r0, r8 + 8001d40: 4798 blx r3 + 8001d42: 2800 cmp r0, #0 + 8001d44: f43f aedf beq.w 8001b06 <_scanf_float+0x46> + 8001d48: e6ea b.n 8001b20 <_scanf_float+0x60> + 8001d4a: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001d4e: f816 1d01 ldrb.w r1, [r6, #-1]! + 8001d52: 463a mov r2, r7 + 8001d54: 4640 mov r0, r8 + 8001d56: 4798 blx r3 + 8001d58: 6923 ldr r3, [r4, #16] + 8001d5a: 3b01 subs r3, #1 + 8001d5c: 6123 str r3, [r4, #16] + 8001d5e: e6ec b.n 8001b3a <_scanf_float+0x7a> + 8001d60: 1e6b subs r3, r5, #1 + 8001d62: 2b06 cmp r3, #6 + 8001d64: d825 bhi.n 8001db2 <_scanf_float+0x2f2> + 8001d66: 2d02 cmp r5, #2 + 8001d68: d836 bhi.n 8001dd8 <_scanf_float+0x318> + 8001d6a: 455e cmp r6, fp + 8001d6c: f67f aee8 bls.w 8001b40 <_scanf_float+0x80> + 8001d70: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001d74: f816 1d01 ldrb.w r1, [r6, #-1]! + 8001d78: 463a mov r2, r7 + 8001d7a: 4640 mov r0, r8 + 8001d7c: 4798 blx r3 + 8001d7e: 6923 ldr r3, [r4, #16] + 8001d80: 3b01 subs r3, #1 + 8001d82: 6123 str r3, [r4, #16] + 8001d84: e7f1 b.n 8001d6a <_scanf_float+0x2aa> + 8001d86: 9802 ldr r0, [sp, #8] + 8001d88: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001d8c: f810 1d01 ldrb.w r1, [r0, #-1]! + 8001d90: 9002 str r0, [sp, #8] + 8001d92: 463a mov r2, r7 + 8001d94: 4640 mov r0, r8 + 8001d96: 4798 blx r3 + 8001d98: 6923 ldr r3, [r4, #16] + 8001d9a: 3b01 subs r3, #1 + 8001d9c: 6123 str r3, [r4, #16] + 8001d9e: f10a 3aff add.w sl, sl, #4294967295 + 8001da2: fa5f fa8a uxtb.w sl, sl + 8001da6: f1ba 0f02 cmp.w sl, #2 + 8001daa: d1ec bne.n 8001d86 <_scanf_float+0x2c6> + 8001dac: 3d03 subs r5, #3 + 8001dae: b2ed uxtb r5, r5 + 8001db0: 1b76 subs r6, r6, r5 + 8001db2: 6823 ldr r3, [r4, #0] + 8001db4: 05da lsls r2, r3, #23 + 8001db6: d52f bpl.n 8001e18 <_scanf_float+0x358> + 8001db8: 055b lsls r3, r3, #21 + 8001dba: d510 bpl.n 8001dde <_scanf_float+0x31e> + 8001dbc: 455e cmp r6, fp + 8001dbe: f67f aebf bls.w 8001b40 <_scanf_float+0x80> + 8001dc2: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001dc6: f816 1d01 ldrb.w r1, [r6, #-1]! + 8001dca: 463a mov r2, r7 + 8001dcc: 4640 mov r0, r8 + 8001dce: 4798 blx r3 + 8001dd0: 6923 ldr r3, [r4, #16] + 8001dd2: 3b01 subs r3, #1 + 8001dd4: 6123 str r3, [r4, #16] + 8001dd6: e7f1 b.n 8001dbc <_scanf_float+0x2fc> + 8001dd8: 46aa mov sl, r5 + 8001dda: 9602 str r6, [sp, #8] + 8001ddc: e7df b.n 8001d9e <_scanf_float+0x2de> + 8001dde: f816 1c01 ldrb.w r1, [r6, #-1] + 8001de2: 6923 ldr r3, [r4, #16] + 8001de4: 2965 cmp r1, #101 ; 0x65 + 8001de6: f103 33ff add.w r3, r3, #4294967295 + 8001dea: f106 35ff add.w r5, r6, #4294967295 + 8001dee: 6123 str r3, [r4, #16] + 8001df0: d00c beq.n 8001e0c <_scanf_float+0x34c> + 8001df2: 2945 cmp r1, #69 ; 0x45 + 8001df4: d00a beq.n 8001e0c <_scanf_float+0x34c> + 8001df6: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001dfa: 463a mov r2, r7 + 8001dfc: 4640 mov r0, r8 + 8001dfe: 4798 blx r3 + 8001e00: 6923 ldr r3, [r4, #16] + 8001e02: f816 1c02 ldrb.w r1, [r6, #-2] + 8001e06: 3b01 subs r3, #1 + 8001e08: 1eb5 subs r5, r6, #2 + 8001e0a: 6123 str r3, [r4, #16] + 8001e0c: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001e10: 463a mov r2, r7 + 8001e12: 4640 mov r0, r8 + 8001e14: 4798 blx r3 + 8001e16: 462e mov r6, r5 + 8001e18: 6825 ldr r5, [r4, #0] + 8001e1a: f015 0510 ands.w r5, r5, #16 + 8001e1e: d159 bne.n 8001ed4 <_scanf_float+0x414> + 8001e20: 7035 strb r5, [r6, #0] + 8001e22: 6823 ldr r3, [r4, #0] + 8001e24: f403 63c0 and.w r3, r3, #1536 ; 0x600 + 8001e28: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8001e2c: d11c bne.n 8001e68 <_scanf_float+0x3a8> + 8001e2e: 9b01 ldr r3, [sp, #4] + 8001e30: 454b cmp r3, r9 + 8001e32: eba3 0209 sub.w r2, r3, r9 + 8001e36: d124 bne.n 8001e82 <_scanf_float+0x3c2> + 8001e38: 2200 movs r2, #0 + 8001e3a: 4659 mov r1, fp + 8001e3c: 4640 mov r0, r8 + 8001e3e: f000 ff67 bl 8002d10 <_strtod_r> + 8001e42: f8d4 c000 ldr.w ip, [r4] + 8001e46: 9b03 ldr r3, [sp, #12] + 8001e48: f01c 0f02 tst.w ip, #2 + 8001e4c: 681b ldr r3, [r3, #0] + 8001e4e: 4606 mov r6, r0 + 8001e50: 460f mov r7, r1 + 8001e52: d021 beq.n 8001e98 <_scanf_float+0x3d8> + 8001e54: 9903 ldr r1, [sp, #12] + 8001e56: 1d1a adds r2, r3, #4 + 8001e58: 600a str r2, [r1, #0] + 8001e5a: 681b ldr r3, [r3, #0] + 8001e5c: e9c3 6700 strd r6, r7, [r3] + 8001e60: 68e3 ldr r3, [r4, #12] + 8001e62: 3301 adds r3, #1 + 8001e64: 60e3 str r3, [r4, #12] + 8001e66: e66c b.n 8001b42 <_scanf_float+0x82> + 8001e68: 9b04 ldr r3, [sp, #16] + 8001e6a: 2b00 cmp r3, #0 + 8001e6c: d0e4 beq.n 8001e38 <_scanf_float+0x378> + 8001e6e: 9905 ldr r1, [sp, #20] + 8001e70: 230a movs r3, #10 + 8001e72: 462a mov r2, r5 + 8001e74: 3101 adds r1, #1 + 8001e76: 4640 mov r0, r8 + 8001e78: f000 ffd6 bl 8002e28 <_strtol_r> + 8001e7c: 9b04 ldr r3, [sp, #16] + 8001e7e: 9e05 ldr r6, [sp, #20] + 8001e80: 1ac2 subs r2, r0, r3 + 8001e82: f204 136f addw r3, r4, #367 ; 0x16f + 8001e86: 429e cmp r6, r3 + 8001e88: bf28 it cs + 8001e8a: f504 76b7 addcs.w r6, r4, #366 ; 0x16e + 8001e8e: 4912 ldr r1, [pc, #72] ; (8001ed8 <_scanf_float+0x418>) + 8001e90: 4630 mov r0, r6 + 8001e92: f000 f907 bl 80020a4 + 8001e96: e7cf b.n 8001e38 <_scanf_float+0x378> + 8001e98: f01c 0f04 tst.w ip, #4 + 8001e9c: f103 0e04 add.w lr, r3, #4 + 8001ea0: d003 beq.n 8001eaa <_scanf_float+0x3ea> + 8001ea2: 9903 ldr r1, [sp, #12] + 8001ea4: f8c1 e000 str.w lr, [r1] + 8001ea8: e7d7 b.n 8001e5a <_scanf_float+0x39a> + 8001eaa: 9a03 ldr r2, [sp, #12] + 8001eac: f8c2 e000 str.w lr, [r2] + 8001eb0: f8d3 8000 ldr.w r8, [r3] + 8001eb4: 4602 mov r2, r0 + 8001eb6: 460b mov r3, r1 + 8001eb8: f7fe fe58 bl 8000b6c <__aeabi_dcmpun> + 8001ebc: b128 cbz r0, 8001eca <_scanf_float+0x40a> + 8001ebe: 4807 ldr r0, [pc, #28] ; (8001edc <_scanf_float+0x41c>) + 8001ec0: f000 f8ec bl 800209c + 8001ec4: f8c8 0000 str.w r0, [r8] + 8001ec8: e7ca b.n 8001e60 <_scanf_float+0x3a0> + 8001eca: 4630 mov r0, r6 + 8001ecc: 4639 mov r1, r7 + 8001ece: f7fe feab bl 8000c28 <__aeabi_d2f> + 8001ed2: e7f7 b.n 8001ec4 <_scanf_float+0x404> + 8001ed4: 2500 movs r5, #0 + 8001ed6: e634 b.n 8001b42 <_scanf_float+0x82> + 8001ed8: 08005e54 .word 0x08005e54 + 8001edc: 080062d0 .word 0x080062d0 + +08001ee0 : + 8001ee0: b40f push {r0, r1, r2, r3} + 8001ee2: 4b0a ldr r3, [pc, #40] ; (8001f0c ) + 8001ee4: b513 push {r0, r1, r4, lr} + 8001ee6: 681c ldr r4, [r3, #0] + 8001ee8: b124 cbz r4, 8001ef4 + 8001eea: 69a3 ldr r3, [r4, #24] + 8001eec: b913 cbnz r3, 8001ef4 + 8001eee: 4620 mov r0, r4 + 8001ef0: f001 ff44 bl 8003d7c <__sinit> + 8001ef4: ab05 add r3, sp, #20 + 8001ef6: 9a04 ldr r2, [sp, #16] + 8001ef8: 68a1 ldr r1, [r4, #8] + 8001efa: 9301 str r3, [sp, #4] + 8001efc: 4620 mov r0, r4 + 8001efe: f003 fb1d bl 800553c <_vfiprintf_r> + 8001f02: b002 add sp, #8 + 8001f04: e8bd 4010 ldmia.w sp!, {r4, lr} + 8001f08: b004 add sp, #16 + 8001f0a: 4770 bx lr + 8001f0c: 20000000 .word 0x20000000 + +08001f10 : + 8001f10: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + 8001f14: 461d mov r5, r3 + 8001f16: 4b5d ldr r3, [pc, #372] ; (800208c ) + 8001f18: 681f ldr r7, [r3, #0] + 8001f1a: 4604 mov r4, r0 + 8001f1c: 460e mov r6, r1 + 8001f1e: 4690 mov r8, r2 + 8001f20: b127 cbz r7, 8001f2c + 8001f22: 69bb ldr r3, [r7, #24] + 8001f24: b913 cbnz r3, 8001f2c + 8001f26: 4638 mov r0, r7 + 8001f28: f001 ff28 bl 8003d7c <__sinit> + 8001f2c: 4b58 ldr r3, [pc, #352] ; (8002090 ) + 8001f2e: 429c cmp r4, r3 + 8001f30: d167 bne.n 8002002 + 8001f32: 687c ldr r4, [r7, #4] + 8001f34: f1b8 0f02 cmp.w r8, #2 + 8001f38: d006 beq.n 8001f48 + 8001f3a: f1b8 0f01 cmp.w r8, #1 + 8001f3e: f200 809f bhi.w 8002080 + 8001f42: 2d00 cmp r5, #0 + 8001f44: f2c0 809c blt.w 8002080 + 8001f48: 6e63 ldr r3, [r4, #100] ; 0x64 + 8001f4a: 07db lsls r3, r3, #31 + 8001f4c: d405 bmi.n 8001f5a + 8001f4e: 89a3 ldrh r3, [r4, #12] + 8001f50: 0598 lsls r0, r3, #22 + 8001f52: d402 bmi.n 8001f5a + 8001f54: 6da0 ldr r0, [r4, #88] ; 0x58 + 8001f56: f002 fb74 bl 8004642 <__retarget_lock_acquire_recursive> + 8001f5a: 4621 mov r1, r4 + 8001f5c: 4638 mov r0, r7 + 8001f5e: f001 fe67 bl 8003c30 <_fflush_r> + 8001f62: 6b61 ldr r1, [r4, #52] ; 0x34 + 8001f64: b141 cbz r1, 8001f78 + 8001f66: f104 0344 add.w r3, r4, #68 ; 0x44 + 8001f6a: 4299 cmp r1, r3 + 8001f6c: d002 beq.n 8001f74 + 8001f6e: 4638 mov r0, r7 + 8001f70: f003 f8b8 bl 80050e4 <_free_r> + 8001f74: 2300 movs r3, #0 + 8001f76: 6363 str r3, [r4, #52] ; 0x34 + 8001f78: 2300 movs r3, #0 + 8001f7a: 61a3 str r3, [r4, #24] + 8001f7c: 6063 str r3, [r4, #4] + 8001f7e: 89a3 ldrh r3, [r4, #12] + 8001f80: 0619 lsls r1, r3, #24 + 8001f82: d503 bpl.n 8001f8c + 8001f84: 6921 ldr r1, [r4, #16] + 8001f86: 4638 mov r0, r7 + 8001f88: f003 f8ac bl 80050e4 <_free_r> + 8001f8c: 89a3 ldrh r3, [r4, #12] + 8001f8e: f423 634a bic.w r3, r3, #3232 ; 0xca0 + 8001f92: f023 0303 bic.w r3, r3, #3 + 8001f96: f1b8 0f02 cmp.w r8, #2 + 8001f9a: 81a3 strh r3, [r4, #12] + 8001f9c: d06c beq.n 8002078 + 8001f9e: ab01 add r3, sp, #4 + 8001fa0: 466a mov r2, sp + 8001fa2: 4621 mov r1, r4 + 8001fa4: 4638 mov r0, r7 + 8001fa6: f002 fb4e bl 8004646 <__swhatbuf_r> + 8001faa: 89a3 ldrh r3, [r4, #12] + 8001fac: 4318 orrs r0, r3 + 8001fae: 81a0 strh r0, [r4, #12] + 8001fb0: 2d00 cmp r5, #0 + 8001fb2: d130 bne.n 8002016 + 8001fb4: 9d00 ldr r5, [sp, #0] + 8001fb6: 4628 mov r0, r5 + 8001fb8: f002 fbaa bl 8004710 + 8001fbc: 4606 mov r6, r0 + 8001fbe: 2800 cmp r0, #0 + 8001fc0: d155 bne.n 800206e + 8001fc2: f8dd 9000 ldr.w r9, [sp] + 8001fc6: 45a9 cmp r9, r5 + 8001fc8: d14a bne.n 8002060 + 8001fca: f04f 35ff mov.w r5, #4294967295 + 8001fce: 2200 movs r2, #0 + 8001fd0: 60a2 str r2, [r4, #8] + 8001fd2: f104 0247 add.w r2, r4, #71 ; 0x47 + 8001fd6: 6022 str r2, [r4, #0] + 8001fd8: 6122 str r2, [r4, #16] + 8001fda: 2201 movs r2, #1 + 8001fdc: f9b4 300c ldrsh.w r3, [r4, #12] + 8001fe0: 6162 str r2, [r4, #20] + 8001fe2: 6e62 ldr r2, [r4, #100] ; 0x64 + 8001fe4: f043 0302 orr.w r3, r3, #2 + 8001fe8: 07d2 lsls r2, r2, #31 + 8001fea: 81a3 strh r3, [r4, #12] + 8001fec: d405 bmi.n 8001ffa + 8001fee: f413 7f00 tst.w r3, #512 ; 0x200 + 8001ff2: d102 bne.n 8001ffa + 8001ff4: 6da0 ldr r0, [r4, #88] ; 0x58 + 8001ff6: f002 fb25 bl 8004644 <__retarget_lock_release_recursive> + 8001ffa: 4628 mov r0, r5 + 8001ffc: b003 add sp, #12 + 8001ffe: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8002002: 4b24 ldr r3, [pc, #144] ; (8002094 ) + 8002004: 429c cmp r4, r3 + 8002006: d101 bne.n 800200c + 8002008: 68bc ldr r4, [r7, #8] + 800200a: e793 b.n 8001f34 + 800200c: 4b22 ldr r3, [pc, #136] ; (8002098 ) + 800200e: 429c cmp r4, r3 + 8002010: bf08 it eq + 8002012: 68fc ldreq r4, [r7, #12] + 8002014: e78e b.n 8001f34 + 8002016: 2e00 cmp r6, #0 + 8002018: d0cd beq.n 8001fb6 + 800201a: 69bb ldr r3, [r7, #24] + 800201c: b913 cbnz r3, 8002024 + 800201e: 4638 mov r0, r7 + 8002020: f001 feac bl 8003d7c <__sinit> + 8002024: f1b8 0f01 cmp.w r8, #1 + 8002028: bf08 it eq + 800202a: 89a3 ldrheq r3, [r4, #12] + 800202c: 6026 str r6, [r4, #0] + 800202e: bf04 itt eq + 8002030: f043 0301 orreq.w r3, r3, #1 + 8002034: 81a3 strheq r3, [r4, #12] + 8002036: 89a2 ldrh r2, [r4, #12] + 8002038: f012 0308 ands.w r3, r2, #8 + 800203c: e9c4 6504 strd r6, r5, [r4, #16] + 8002040: d01c beq.n 800207c + 8002042: 07d3 lsls r3, r2, #31 + 8002044: bf41 itttt mi + 8002046: 2300 movmi r3, #0 + 8002048: 426d negmi r5, r5 + 800204a: 60a3 strmi r3, [r4, #8] + 800204c: 61a5 strmi r5, [r4, #24] + 800204e: bf58 it pl + 8002050: 60a5 strpl r5, [r4, #8] + 8002052: 6e65 ldr r5, [r4, #100] ; 0x64 + 8002054: f015 0501 ands.w r5, r5, #1 + 8002058: d115 bne.n 8002086 + 800205a: f412 7f00 tst.w r2, #512 ; 0x200 + 800205e: e7c8 b.n 8001ff2 + 8002060: 4648 mov r0, r9 + 8002062: f002 fb55 bl 8004710 + 8002066: 4606 mov r6, r0 + 8002068: 2800 cmp r0, #0 + 800206a: d0ae beq.n 8001fca + 800206c: 464d mov r5, r9 + 800206e: 89a3 ldrh r3, [r4, #12] + 8002070: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8002074: 81a3 strh r3, [r4, #12] + 8002076: e7d0 b.n 800201a + 8002078: 2500 movs r5, #0 + 800207a: e7a8 b.n 8001fce + 800207c: 60a3 str r3, [r4, #8] + 800207e: e7e8 b.n 8002052 + 8002080: f04f 35ff mov.w r5, #4294967295 + 8002084: e7b9 b.n 8001ffa + 8002086: 2500 movs r5, #0 + 8002088: e7b7 b.n 8001ffa + 800208a: bf00 nop + 800208c: 20000000 .word 0x20000000 + 8002090: 08006068 .word 0x08006068 + 8002094: 08006088 .word 0x08006088 + 8002098: 08006048 .word 0x08006048 + +0800209c : + 800209c: 4800 ldr r0, [pc, #0] ; (80020a0 ) + 800209e: 4770 bx lr + 80020a0: 7fc00000 .word 0x7fc00000 + +080020a4 : + 80020a4: b40e push {r1, r2, r3} + 80020a6: b500 push {lr} + 80020a8: b09c sub sp, #112 ; 0x70 + 80020aa: ab1d add r3, sp, #116 ; 0x74 + 80020ac: 9002 str r0, [sp, #8] + 80020ae: 9006 str r0, [sp, #24] + 80020b0: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 80020b4: 4809 ldr r0, [pc, #36] ; (80020dc ) + 80020b6: 9107 str r1, [sp, #28] + 80020b8: 9104 str r1, [sp, #16] + 80020ba: 4909 ldr r1, [pc, #36] ; (80020e0 ) + 80020bc: f853 2b04 ldr.w r2, [r3], #4 + 80020c0: 9105 str r1, [sp, #20] + 80020c2: 6800 ldr r0, [r0, #0] + 80020c4: 9301 str r3, [sp, #4] + 80020c6: a902 add r1, sp, #8 + 80020c8: f003 f910 bl 80052ec <_svfiprintf_r> + 80020cc: 9b02 ldr r3, [sp, #8] + 80020ce: 2200 movs r2, #0 + 80020d0: 701a strb r2, [r3, #0] + 80020d2: b01c add sp, #112 ; 0x70 + 80020d4: f85d eb04 ldr.w lr, [sp], #4 + 80020d8: b003 add sp, #12 + 80020da: 4770 bx lr + 80020dc: 20000000 .word 0x20000000 + 80020e0: ffff0208 .word 0xffff0208 + +080020e4 : + 80020e4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80020e8: 460f mov r7, r1 + 80020ea: 4690 mov r8, r2 + 80020ec: f002 fea4 bl 8004e38 <__ulp> + 80020f0: 4604 mov r4, r0 + 80020f2: 460d mov r5, r1 + 80020f4: f1b8 0f00 cmp.w r8, #0 + 80020f8: d011 beq.n 800211e + 80020fa: f3c7 530a ubfx r3, r7, #20, #11 + 80020fe: f1c3 036b rsb r3, r3, #107 ; 0x6b + 8002102: 2b00 cmp r3, #0 + 8002104: dd0b ble.n 800211e + 8002106: 051b lsls r3, r3, #20 + 8002108: f103 557f add.w r5, r3, #1069547520 ; 0x3fc00000 + 800210c: 2400 movs r4, #0 + 800210e: f505 1540 add.w r5, r5, #3145728 ; 0x300000 + 8002112: 4622 mov r2, r4 + 8002114: 462b mov r3, r5 + 8002116: f7fe fa8f bl 8000638 <__aeabi_dmul> + 800211a: 4604 mov r4, r0 + 800211c: 460d mov r5, r1 + 800211e: 4620 mov r0, r4 + 8002120: 4629 mov r1, r5 + 8002122: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + ... + +08002128 <_strtod_l>: + 8002128: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 800212c: b0a1 sub sp, #132 ; 0x84 + 800212e: 469b mov fp, r3 + 8002130: 2300 movs r3, #0 + 8002132: 931c str r3, [sp, #112] ; 0x70 + 8002134: 4ba1 ldr r3, [pc, #644] ; (80023bc <_strtod_l+0x294>) + 8002136: 9217 str r2, [sp, #92] ; 0x5c + 8002138: 681f ldr r7, [r3, #0] + 800213a: 4682 mov sl, r0 + 800213c: 4638 mov r0, r7 + 800213e: 460e mov r6, r1 + 8002140: f7fe f866 bl 8000210 + 8002144: f04f 0800 mov.w r8, #0 + 8002148: 4604 mov r4, r0 + 800214a: f04f 0900 mov.w r9, #0 + 800214e: 961b str r6, [sp, #108] ; 0x6c + 8002150: 9b1b ldr r3, [sp, #108] ; 0x6c + 8002152: 781a ldrb r2, [r3, #0] + 8002154: 2a2b cmp r2, #43 ; 0x2b + 8002156: d04c beq.n 80021f2 <_strtod_l+0xca> + 8002158: d83a bhi.n 80021d0 <_strtod_l+0xa8> + 800215a: 2a0d cmp r2, #13 + 800215c: d833 bhi.n 80021c6 <_strtod_l+0x9e> + 800215e: 2a08 cmp r2, #8 + 8002160: d833 bhi.n 80021ca <_strtod_l+0xa2> + 8002162: 2a00 cmp r2, #0 + 8002164: d03d beq.n 80021e2 <_strtod_l+0xba> + 8002166: 2300 movs r3, #0 + 8002168: 930c str r3, [sp, #48] ; 0x30 + 800216a: 9d1b ldr r5, [sp, #108] ; 0x6c + 800216c: 782b ldrb r3, [r5, #0] + 800216e: 2b30 cmp r3, #48 ; 0x30 + 8002170: f040 80af bne.w 80022d2 <_strtod_l+0x1aa> + 8002174: 786b ldrb r3, [r5, #1] + 8002176: f003 03df and.w r3, r3, #223 ; 0xdf + 800217a: 2b58 cmp r3, #88 ; 0x58 + 800217c: d16c bne.n 8002258 <_strtod_l+0x130> + 800217e: 9b0c ldr r3, [sp, #48] ; 0x30 + 8002180: 9301 str r3, [sp, #4] + 8002182: ab1c add r3, sp, #112 ; 0x70 + 8002184: 9300 str r3, [sp, #0] + 8002186: 4a8e ldr r2, [pc, #568] ; (80023c0 <_strtod_l+0x298>) + 8002188: f8cd b008 str.w fp, [sp, #8] + 800218c: ab1d add r3, sp, #116 ; 0x74 + 800218e: a91b add r1, sp, #108 ; 0x6c + 8002190: 4650 mov r0, sl + 8002192: f001 ff15 bl 8003fc0 <__gethex> + 8002196: f010 0607 ands.w r6, r0, #7 + 800219a: 4604 mov r4, r0 + 800219c: d005 beq.n 80021aa <_strtod_l+0x82> + 800219e: 2e06 cmp r6, #6 + 80021a0: d129 bne.n 80021f6 <_strtod_l+0xce> + 80021a2: 3501 adds r5, #1 + 80021a4: 2300 movs r3, #0 + 80021a6: 951b str r5, [sp, #108] ; 0x6c + 80021a8: 930c str r3, [sp, #48] ; 0x30 + 80021aa: 9b17 ldr r3, [sp, #92] ; 0x5c + 80021ac: 2b00 cmp r3, #0 + 80021ae: f040 8596 bne.w 8002cde <_strtod_l+0xbb6> + 80021b2: 9b0c ldr r3, [sp, #48] ; 0x30 + 80021b4: b1d3 cbz r3, 80021ec <_strtod_l+0xc4> + 80021b6: 4642 mov r2, r8 + 80021b8: f109 4300 add.w r3, r9, #2147483648 ; 0x80000000 + 80021bc: 4610 mov r0, r2 + 80021be: 4619 mov r1, r3 + 80021c0: b021 add sp, #132 ; 0x84 + 80021c2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80021c6: 2a20 cmp r2, #32 + 80021c8: d1cd bne.n 8002166 <_strtod_l+0x3e> + 80021ca: 3301 adds r3, #1 + 80021cc: 931b str r3, [sp, #108] ; 0x6c + 80021ce: e7bf b.n 8002150 <_strtod_l+0x28> + 80021d0: 2a2d cmp r2, #45 ; 0x2d + 80021d2: d1c8 bne.n 8002166 <_strtod_l+0x3e> + 80021d4: 2201 movs r2, #1 + 80021d6: 920c str r2, [sp, #48] ; 0x30 + 80021d8: 1c5a adds r2, r3, #1 + 80021da: 921b str r2, [sp, #108] ; 0x6c + 80021dc: 785b ldrb r3, [r3, #1] + 80021de: 2b00 cmp r3, #0 + 80021e0: d1c3 bne.n 800216a <_strtod_l+0x42> + 80021e2: 9b17 ldr r3, [sp, #92] ; 0x5c + 80021e4: 961b str r6, [sp, #108] ; 0x6c + 80021e6: 2b00 cmp r3, #0 + 80021e8: f040 8577 bne.w 8002cda <_strtod_l+0xbb2> + 80021ec: 4642 mov r2, r8 + 80021ee: 464b mov r3, r9 + 80021f0: e7e4 b.n 80021bc <_strtod_l+0x94> + 80021f2: 2200 movs r2, #0 + 80021f4: e7ef b.n 80021d6 <_strtod_l+0xae> + 80021f6: 9a1c ldr r2, [sp, #112] ; 0x70 + 80021f8: b13a cbz r2, 800220a <_strtod_l+0xe2> + 80021fa: 2135 movs r1, #53 ; 0x35 + 80021fc: a81e add r0, sp, #120 ; 0x78 + 80021fe: f002 ff1f bl 8005040 <__copybits> + 8002202: 991c ldr r1, [sp, #112] ; 0x70 + 8002204: 4650 mov r0, sl + 8002206: f002 faeb bl 80047e0 <_Bfree> + 800220a: 3e01 subs r6, #1 + 800220c: 2e05 cmp r6, #5 + 800220e: d807 bhi.n 8002220 <_strtod_l+0xf8> + 8002210: e8df f006 tbb [pc, r6] + 8002214: 1d180b0e .word 0x1d180b0e + 8002218: 030e .short 0x030e + 800221a: f04f 0900 mov.w r9, #0 + 800221e: 46c8 mov r8, r9 + 8002220: 0721 lsls r1, r4, #28 + 8002222: d5c2 bpl.n 80021aa <_strtod_l+0x82> + 8002224: f049 4900 orr.w r9, r9, #2147483648 ; 0x80000000 + 8002228: e7bf b.n 80021aa <_strtod_l+0x82> + 800222a: e9dd 891e ldrd r8, r9, [sp, #120] ; 0x78 + 800222e: e7f7 b.n 8002220 <_strtod_l+0xf8> + 8002230: e9dd 831e ldrd r8, r3, [sp, #120] ; 0x78 + 8002234: 9a1d ldr r2, [sp, #116] ; 0x74 + 8002236: f423 1380 bic.w r3, r3, #1048576 ; 0x100000 + 800223a: f202 4233 addw r2, r2, #1075 ; 0x433 + 800223e: ea43 5902 orr.w r9, r3, r2, lsl #20 + 8002242: e7ed b.n 8002220 <_strtod_l+0xf8> + 8002244: f8df 917c ldr.w r9, [pc, #380] ; 80023c4 <_strtod_l+0x29c> + 8002248: f04f 0800 mov.w r8, #0 + 800224c: e7e8 b.n 8002220 <_strtod_l+0xf8> + 800224e: f06f 4900 mvn.w r9, #2147483648 ; 0x80000000 + 8002252: f04f 38ff mov.w r8, #4294967295 + 8002256: e7e3 b.n 8002220 <_strtod_l+0xf8> + 8002258: 9b1b ldr r3, [sp, #108] ; 0x6c + 800225a: 1c5a adds r2, r3, #1 + 800225c: 921b str r2, [sp, #108] ; 0x6c + 800225e: 785b ldrb r3, [r3, #1] + 8002260: 2b30 cmp r3, #48 ; 0x30 + 8002262: d0f9 beq.n 8002258 <_strtod_l+0x130> + 8002264: 2b00 cmp r3, #0 + 8002266: d0a0 beq.n 80021aa <_strtod_l+0x82> + 8002268: 2301 movs r3, #1 + 800226a: 9307 str r3, [sp, #28] + 800226c: 9b1b ldr r3, [sp, #108] ; 0x6c + 800226e: 9308 str r3, [sp, #32] + 8002270: 2300 movs r3, #0 + 8002272: e9cd 3305 strd r3, r3, [sp, #20] + 8002276: 469b mov fp, r3 + 8002278: 220a movs r2, #10 + 800227a: 981b ldr r0, [sp, #108] ; 0x6c + 800227c: 7805 ldrb r5, [r0, #0] + 800227e: f1a5 0330 sub.w r3, r5, #48 ; 0x30 + 8002282: b2d9 uxtb r1, r3 + 8002284: 2909 cmp r1, #9 + 8002286: d926 bls.n 80022d6 <_strtod_l+0x1ae> + 8002288: 4622 mov r2, r4 + 800228a: 4639 mov r1, r7 + 800228c: f003 fb0b bl 80058a6 + 8002290: 2800 cmp r0, #0 + 8002292: d032 beq.n 80022fa <_strtod_l+0x1d2> + 8002294: 2000 movs r0, #0 + 8002296: 462b mov r3, r5 + 8002298: 465c mov r4, fp + 800229a: 9004 str r0, [sp, #16] + 800229c: 4602 mov r2, r0 + 800229e: 2b65 cmp r3, #101 ; 0x65 + 80022a0: d001 beq.n 80022a6 <_strtod_l+0x17e> + 80022a2: 2b45 cmp r3, #69 ; 0x45 + 80022a4: d113 bne.n 80022ce <_strtod_l+0x1a6> + 80022a6: b91c cbnz r4, 80022b0 <_strtod_l+0x188> + 80022a8: 9b07 ldr r3, [sp, #28] + 80022aa: 4303 orrs r3, r0 + 80022ac: d099 beq.n 80021e2 <_strtod_l+0xba> + 80022ae: 2400 movs r4, #0 + 80022b0: 9e1b ldr r6, [sp, #108] ; 0x6c + 80022b2: 1c73 adds r3, r6, #1 + 80022b4: 931b str r3, [sp, #108] ; 0x6c + 80022b6: 7873 ldrb r3, [r6, #1] + 80022b8: 2b2b cmp r3, #43 ; 0x2b + 80022ba: d078 beq.n 80023ae <_strtod_l+0x286> + 80022bc: 2b2d cmp r3, #45 ; 0x2d + 80022be: d07b beq.n 80023b8 <_strtod_l+0x290> + 80022c0: 2700 movs r7, #0 + 80022c2: f1a3 0130 sub.w r1, r3, #48 ; 0x30 + 80022c6: 2909 cmp r1, #9 + 80022c8: f240 8082 bls.w 80023d0 <_strtod_l+0x2a8> + 80022cc: 961b str r6, [sp, #108] ; 0x6c + 80022ce: 2500 movs r5, #0 + 80022d0: e09e b.n 8002410 <_strtod_l+0x2e8> + 80022d2: 2300 movs r3, #0 + 80022d4: e7c9 b.n 800226a <_strtod_l+0x142> + 80022d6: f1bb 0f08 cmp.w fp, #8 + 80022da: bfd5 itete le + 80022dc: 9906 ldrle r1, [sp, #24] + 80022de: 9905 ldrgt r1, [sp, #20] + 80022e0: fb02 3301 mlale r3, r2, r1, r3 + 80022e4: fb02 3301 mlagt r3, r2, r1, r3 + 80022e8: f100 0001 add.w r0, r0, #1 + 80022ec: bfd4 ite le + 80022ee: 9306 strle r3, [sp, #24] + 80022f0: 9305 strgt r3, [sp, #20] + 80022f2: f10b 0b01 add.w fp, fp, #1 + 80022f6: 901b str r0, [sp, #108] ; 0x6c + 80022f8: e7bf b.n 800227a <_strtod_l+0x152> + 80022fa: 9b1b ldr r3, [sp, #108] ; 0x6c + 80022fc: 191a adds r2, r3, r4 + 80022fe: 921b str r2, [sp, #108] ; 0x6c + 8002300: 5d1b ldrb r3, [r3, r4] + 8002302: f1bb 0f00 cmp.w fp, #0 + 8002306: d036 beq.n 8002376 <_strtod_l+0x24e> + 8002308: 9004 str r0, [sp, #16] + 800230a: 465c mov r4, fp + 800230c: f1a3 0230 sub.w r2, r3, #48 ; 0x30 + 8002310: 2a09 cmp r2, #9 + 8002312: d912 bls.n 800233a <_strtod_l+0x212> + 8002314: 2201 movs r2, #1 + 8002316: e7c2 b.n 800229e <_strtod_l+0x176> + 8002318: 9b1b ldr r3, [sp, #108] ; 0x6c + 800231a: 1c5a adds r2, r3, #1 + 800231c: 921b str r2, [sp, #108] ; 0x6c + 800231e: 785b ldrb r3, [r3, #1] + 8002320: 3001 adds r0, #1 + 8002322: 2b30 cmp r3, #48 ; 0x30 + 8002324: d0f8 beq.n 8002318 <_strtod_l+0x1f0> + 8002326: f1a3 0231 sub.w r2, r3, #49 ; 0x31 + 800232a: 2a08 cmp r2, #8 + 800232c: f200 84dc bhi.w 8002ce8 <_strtod_l+0xbc0> + 8002330: 9a1b ldr r2, [sp, #108] ; 0x6c + 8002332: 9004 str r0, [sp, #16] + 8002334: 2000 movs r0, #0 + 8002336: 9208 str r2, [sp, #32] + 8002338: 4604 mov r4, r0 + 800233a: 3b30 subs r3, #48 ; 0x30 + 800233c: f100 0201 add.w r2, r0, #1 + 8002340: d013 beq.n 800236a <_strtod_l+0x242> + 8002342: 9904 ldr r1, [sp, #16] + 8002344: 4411 add r1, r2 + 8002346: 9104 str r1, [sp, #16] + 8002348: 4622 mov r2, r4 + 800234a: 1905 adds r5, r0, r4 + 800234c: 210a movs r1, #10 + 800234e: 42aa cmp r2, r5 + 8002350: d113 bne.n 800237a <_strtod_l+0x252> + 8002352: 1822 adds r2, r4, r0 + 8002354: 2a08 cmp r2, #8 + 8002356: f104 0401 add.w r4, r4, #1 + 800235a: 4404 add r4, r0 + 800235c: dc1b bgt.n 8002396 <_strtod_l+0x26e> + 800235e: 9906 ldr r1, [sp, #24] + 8002360: 220a movs r2, #10 + 8002362: fb02 3301 mla r3, r2, r1, r3 + 8002366: 9306 str r3, [sp, #24] + 8002368: 2200 movs r2, #0 + 800236a: 9b1b ldr r3, [sp, #108] ; 0x6c + 800236c: 1c59 adds r1, r3, #1 + 800236e: 911b str r1, [sp, #108] ; 0x6c + 8002370: 785b ldrb r3, [r3, #1] + 8002372: 4610 mov r0, r2 + 8002374: e7ca b.n 800230c <_strtod_l+0x1e4> + 8002376: 4658 mov r0, fp + 8002378: e7d3 b.n 8002322 <_strtod_l+0x1fa> + 800237a: 2a08 cmp r2, #8 + 800237c: dc04 bgt.n 8002388 <_strtod_l+0x260> + 800237e: 9f06 ldr r7, [sp, #24] + 8002380: 434f muls r7, r1 + 8002382: 9706 str r7, [sp, #24] + 8002384: 3201 adds r2, #1 + 8002386: e7e2 b.n 800234e <_strtod_l+0x226> + 8002388: 1c57 adds r7, r2, #1 + 800238a: 2f10 cmp r7, #16 + 800238c: bfde ittt le + 800238e: 9f05 ldrle r7, [sp, #20] + 8002390: 434f mulle r7, r1 + 8002392: 9705 strle r7, [sp, #20] + 8002394: e7f6 b.n 8002384 <_strtod_l+0x25c> + 8002396: 2c10 cmp r4, #16 + 8002398: bfdf itttt le + 800239a: 9905 ldrle r1, [sp, #20] + 800239c: 220a movle r2, #10 + 800239e: fb02 3301 mlale r3, r2, r1, r3 + 80023a2: 9305 strle r3, [sp, #20] + 80023a4: e7e0 b.n 8002368 <_strtod_l+0x240> + 80023a6: 2300 movs r3, #0 + 80023a8: 9304 str r3, [sp, #16] + 80023aa: 2201 movs r2, #1 + 80023ac: e77c b.n 80022a8 <_strtod_l+0x180> + 80023ae: 2700 movs r7, #0 + 80023b0: 1cb3 adds r3, r6, #2 + 80023b2: 931b str r3, [sp, #108] ; 0x6c + 80023b4: 78b3 ldrb r3, [r6, #2] + 80023b6: e784 b.n 80022c2 <_strtod_l+0x19a> + 80023b8: 2701 movs r7, #1 + 80023ba: e7f9 b.n 80023b0 <_strtod_l+0x288> + 80023bc: 08006114 .word 0x08006114 + 80023c0: 08005e5c .word 0x08005e5c + 80023c4: 7ff00000 .word 0x7ff00000 + 80023c8: 9b1b ldr r3, [sp, #108] ; 0x6c + 80023ca: 1c59 adds r1, r3, #1 + 80023cc: 911b str r1, [sp, #108] ; 0x6c + 80023ce: 785b ldrb r3, [r3, #1] + 80023d0: 2b30 cmp r3, #48 ; 0x30 + 80023d2: d0f9 beq.n 80023c8 <_strtod_l+0x2a0> + 80023d4: f1a3 0131 sub.w r1, r3, #49 ; 0x31 + 80023d8: 2908 cmp r1, #8 + 80023da: f63f af78 bhi.w 80022ce <_strtod_l+0x1a6> + 80023de: f1a3 0c30 sub.w ip, r3, #48 ; 0x30 + 80023e2: 9b1b ldr r3, [sp, #108] ; 0x6c + 80023e4: 9309 str r3, [sp, #36] ; 0x24 + 80023e6: f04f 0e0a mov.w lr, #10 + 80023ea: 9b1b ldr r3, [sp, #108] ; 0x6c + 80023ec: 1c59 adds r1, r3, #1 + 80023ee: 911b str r1, [sp, #108] ; 0x6c + 80023f0: 785b ldrb r3, [r3, #1] + 80023f2: f1a3 0530 sub.w r5, r3, #48 ; 0x30 + 80023f6: 2d09 cmp r5, #9 + 80023f8: d935 bls.n 8002466 <_strtod_l+0x33e> + 80023fa: 9d09 ldr r5, [sp, #36] ; 0x24 + 80023fc: 1b49 subs r1, r1, r5 + 80023fe: 2908 cmp r1, #8 + 8002400: f644 651f movw r5, #19999 ; 0x4e1f + 8002404: dc02 bgt.n 800240c <_strtod_l+0x2e4> + 8002406: 4565 cmp r5, ip + 8002408: bfa8 it ge + 800240a: 4665 movge r5, ip + 800240c: b107 cbz r7, 8002410 <_strtod_l+0x2e8> + 800240e: 426d negs r5, r5 + 8002410: 2c00 cmp r4, #0 + 8002412: d14c bne.n 80024ae <_strtod_l+0x386> + 8002414: 9907 ldr r1, [sp, #28] + 8002416: 4301 orrs r1, r0 + 8002418: f47f aec7 bne.w 80021aa <_strtod_l+0x82> + 800241c: 2a00 cmp r2, #0 + 800241e: f47f aee0 bne.w 80021e2 <_strtod_l+0xba> + 8002422: 2b69 cmp r3, #105 ; 0x69 + 8002424: d026 beq.n 8002474 <_strtod_l+0x34c> + 8002426: dc23 bgt.n 8002470 <_strtod_l+0x348> + 8002428: 2b49 cmp r3, #73 ; 0x49 + 800242a: d023 beq.n 8002474 <_strtod_l+0x34c> + 800242c: 2b4e cmp r3, #78 ; 0x4e + 800242e: f47f aed8 bne.w 80021e2 <_strtod_l+0xba> + 8002432: 499c ldr r1, [pc, #624] ; (80026a4 <_strtod_l+0x57c>) + 8002434: a81b add r0, sp, #108 ; 0x6c + 8002436: f002 f80f bl 8004458 <__match> + 800243a: 2800 cmp r0, #0 + 800243c: f43f aed1 beq.w 80021e2 <_strtod_l+0xba> + 8002440: 9b1b ldr r3, [sp, #108] ; 0x6c + 8002442: 781b ldrb r3, [r3, #0] + 8002444: 2b28 cmp r3, #40 ; 0x28 + 8002446: d12c bne.n 80024a2 <_strtod_l+0x37a> + 8002448: 4997 ldr r1, [pc, #604] ; (80026a8 <_strtod_l+0x580>) + 800244a: aa1e add r2, sp, #120 ; 0x78 + 800244c: a81b add r0, sp, #108 ; 0x6c + 800244e: f002 f817 bl 8004480 <__hexnan> + 8002452: 2805 cmp r0, #5 + 8002454: d125 bne.n 80024a2 <_strtod_l+0x37a> + 8002456: 9b1f ldr r3, [sp, #124] ; 0x7c + 8002458: f8dd 8078 ldr.w r8, [sp, #120] ; 0x78 + 800245c: f043 49ff orr.w r9, r3, #2139095040 ; 0x7f800000 + 8002460: f449 09e0 orr.w r9, r9, #7340032 ; 0x700000 + 8002464: e6a1 b.n 80021aa <_strtod_l+0x82> + 8002466: fb0e 3c0c mla ip, lr, ip, r3 + 800246a: f1ac 0c30 sub.w ip, ip, #48 ; 0x30 + 800246e: e7bc b.n 80023ea <_strtod_l+0x2c2> + 8002470: 2b6e cmp r3, #110 ; 0x6e + 8002472: e7dc b.n 800242e <_strtod_l+0x306> + 8002474: 498d ldr r1, [pc, #564] ; (80026ac <_strtod_l+0x584>) + 8002476: a81b add r0, sp, #108 ; 0x6c + 8002478: f001 ffee bl 8004458 <__match> + 800247c: 2800 cmp r0, #0 + 800247e: f43f aeb0 beq.w 80021e2 <_strtod_l+0xba> + 8002482: 9b1b ldr r3, [sp, #108] ; 0x6c + 8002484: 498a ldr r1, [pc, #552] ; (80026b0 <_strtod_l+0x588>) + 8002486: 3b01 subs r3, #1 + 8002488: a81b add r0, sp, #108 ; 0x6c + 800248a: 931b str r3, [sp, #108] ; 0x6c + 800248c: f001 ffe4 bl 8004458 <__match> + 8002490: b910 cbnz r0, 8002498 <_strtod_l+0x370> + 8002492: 9b1b ldr r3, [sp, #108] ; 0x6c + 8002494: 3301 adds r3, #1 + 8002496: 931b str r3, [sp, #108] ; 0x6c + 8002498: f8df 9224 ldr.w r9, [pc, #548] ; 80026c0 <_strtod_l+0x598> + 800249c: f04f 0800 mov.w r8, #0 + 80024a0: e683 b.n 80021aa <_strtod_l+0x82> + 80024a2: 4884 ldr r0, [pc, #528] ; (80026b4 <_strtod_l+0x58c>) + 80024a4: f003 f9a6 bl 80057f4 + 80024a8: 4680 mov r8, r0 + 80024aa: 4689 mov r9, r1 + 80024ac: e67d b.n 80021aa <_strtod_l+0x82> + 80024ae: 9b04 ldr r3, [sp, #16] + 80024b0: 9806 ldr r0, [sp, #24] + 80024b2: 1aeb subs r3, r5, r3 + 80024b4: f1bb 0f00 cmp.w fp, #0 + 80024b8: bf08 it eq + 80024ba: 46a3 moveq fp, r4 + 80024bc: 2c10 cmp r4, #16 + 80024be: 9307 str r3, [sp, #28] + 80024c0: 4626 mov r6, r4 + 80024c2: bfa8 it ge + 80024c4: 2610 movge r6, #16 + 80024c6: f7fe f83d bl 8000544 <__aeabi_ui2d> + 80024ca: 2c09 cmp r4, #9 + 80024cc: 4680 mov r8, r0 + 80024ce: 4689 mov r9, r1 + 80024d0: dd13 ble.n 80024fa <_strtod_l+0x3d2> + 80024d2: 4b79 ldr r3, [pc, #484] ; (80026b8 <_strtod_l+0x590>) + 80024d4: eb03 03c6 add.w r3, r3, r6, lsl #3 + 80024d8: e953 2312 ldrd r2, r3, [r3, #-72] ; 0x48 + 80024dc: f7fe f8ac bl 8000638 <__aeabi_dmul> + 80024e0: 4680 mov r8, r0 + 80024e2: 9805 ldr r0, [sp, #20] + 80024e4: 4689 mov r9, r1 + 80024e6: f7fe f82d bl 8000544 <__aeabi_ui2d> + 80024ea: 4602 mov r2, r0 + 80024ec: 460b mov r3, r1 + 80024ee: 4640 mov r0, r8 + 80024f0: 4649 mov r1, r9 + 80024f2: f7fd feeb bl 80002cc <__adddf3> + 80024f6: 4680 mov r8, r0 + 80024f8: 4689 mov r9, r1 + 80024fa: 2c0f cmp r4, #15 + 80024fc: dc36 bgt.n 800256c <_strtod_l+0x444> + 80024fe: 9b07 ldr r3, [sp, #28] + 8002500: 2b00 cmp r3, #0 + 8002502: f43f ae52 beq.w 80021aa <_strtod_l+0x82> + 8002506: dd22 ble.n 800254e <_strtod_l+0x426> + 8002508: 2b16 cmp r3, #22 + 800250a: dc09 bgt.n 8002520 <_strtod_l+0x3f8> + 800250c: 4c6a ldr r4, [pc, #424] ; (80026b8 <_strtod_l+0x590>) + 800250e: eb04 04c3 add.w r4, r4, r3, lsl #3 + 8002512: e9d4 0100 ldrd r0, r1, [r4] + 8002516: 4642 mov r2, r8 + 8002518: 464b mov r3, r9 + 800251a: f7fe f88d bl 8000638 <__aeabi_dmul> + 800251e: e7c3 b.n 80024a8 <_strtod_l+0x380> + 8002520: 9a07 ldr r2, [sp, #28] + 8002522: f1c4 0325 rsb r3, r4, #37 ; 0x25 + 8002526: 4293 cmp r3, r2 + 8002528: db20 blt.n 800256c <_strtod_l+0x444> + 800252a: 4d63 ldr r5, [pc, #396] ; (80026b8 <_strtod_l+0x590>) + 800252c: f1c4 040f rsb r4, r4, #15 + 8002530: eb05 01c4 add.w r1, r5, r4, lsl #3 + 8002534: 4642 mov r2, r8 + 8002536: 464b mov r3, r9 + 8002538: e9d1 0100 ldrd r0, r1, [r1] + 800253c: f7fe f87c bl 8000638 <__aeabi_dmul> + 8002540: 9b07 ldr r3, [sp, #28] + 8002542: 1b1c subs r4, r3, r4 + 8002544: eb05 05c4 add.w r5, r5, r4, lsl #3 + 8002548: e9d5 2300 ldrd r2, r3, [r5] + 800254c: e7e5 b.n 800251a <_strtod_l+0x3f2> + 800254e: 9b07 ldr r3, [sp, #28] + 8002550: 3316 adds r3, #22 + 8002552: db0b blt.n 800256c <_strtod_l+0x444> + 8002554: 9b04 ldr r3, [sp, #16] + 8002556: 4a58 ldr r2, [pc, #352] ; (80026b8 <_strtod_l+0x590>) + 8002558: 1b5d subs r5, r3, r5 + 800255a: eb02 05c5 add.w r5, r2, r5, lsl #3 + 800255e: e9d5 2300 ldrd r2, r3, [r5] + 8002562: 4640 mov r0, r8 + 8002564: 4649 mov r1, r9 + 8002566: f7fe f991 bl 800088c <__aeabi_ddiv> + 800256a: e79d b.n 80024a8 <_strtod_l+0x380> + 800256c: 9b07 ldr r3, [sp, #28] + 800256e: 1ba6 subs r6, r4, r6 + 8002570: 441e add r6, r3 + 8002572: 2e00 cmp r6, #0 + 8002574: dd71 ble.n 800265a <_strtod_l+0x532> + 8002576: f016 030f ands.w r3, r6, #15 + 800257a: d00a beq.n 8002592 <_strtod_l+0x46a> + 800257c: 494e ldr r1, [pc, #312] ; (80026b8 <_strtod_l+0x590>) + 800257e: eb01 01c3 add.w r1, r1, r3, lsl #3 + 8002582: 4642 mov r2, r8 + 8002584: 464b mov r3, r9 + 8002586: e9d1 0100 ldrd r0, r1, [r1] + 800258a: f7fe f855 bl 8000638 <__aeabi_dmul> + 800258e: 4680 mov r8, r0 + 8002590: 4689 mov r9, r1 + 8002592: f036 060f bics.w r6, r6, #15 + 8002596: d050 beq.n 800263a <_strtod_l+0x512> + 8002598: f5b6 7f9a cmp.w r6, #308 ; 0x134 + 800259c: dd27 ble.n 80025ee <_strtod_l+0x4c6> + 800259e: f04f 0b00 mov.w fp, #0 + 80025a2: f8cd b010 str.w fp, [sp, #16] + 80025a6: f8cd b020 str.w fp, [sp, #32] + 80025aa: f8cd b018 str.w fp, [sp, #24] + 80025ae: 2322 movs r3, #34 ; 0x22 + 80025b0: f8df 910c ldr.w r9, [pc, #268] ; 80026c0 <_strtod_l+0x598> + 80025b4: f8ca 3000 str.w r3, [sl] + 80025b8: f04f 0800 mov.w r8, #0 + 80025bc: 9b08 ldr r3, [sp, #32] + 80025be: 2b00 cmp r3, #0 + 80025c0: f43f adf3 beq.w 80021aa <_strtod_l+0x82> + 80025c4: 991c ldr r1, [sp, #112] ; 0x70 + 80025c6: 4650 mov r0, sl + 80025c8: f002 f90a bl 80047e0 <_Bfree> + 80025cc: 9906 ldr r1, [sp, #24] + 80025ce: 4650 mov r0, sl + 80025d0: f002 f906 bl 80047e0 <_Bfree> + 80025d4: 9904 ldr r1, [sp, #16] + 80025d6: 4650 mov r0, sl + 80025d8: f002 f902 bl 80047e0 <_Bfree> + 80025dc: 9908 ldr r1, [sp, #32] + 80025de: 4650 mov r0, sl + 80025e0: f002 f8fe bl 80047e0 <_Bfree> + 80025e4: 4659 mov r1, fp + 80025e6: 4650 mov r0, sl + 80025e8: f002 f8fa bl 80047e0 <_Bfree> + 80025ec: e5dd b.n 80021aa <_strtod_l+0x82> + 80025ee: 2300 movs r3, #0 + 80025f0: 1136 asrs r6, r6, #4 + 80025f2: 4640 mov r0, r8 + 80025f4: 4649 mov r1, r9 + 80025f6: 461f mov r7, r3 + 80025f8: 2e01 cmp r6, #1 + 80025fa: dc21 bgt.n 8002640 <_strtod_l+0x518> + 80025fc: b10b cbz r3, 8002602 <_strtod_l+0x4da> + 80025fe: 4680 mov r8, r0 + 8002600: 4689 mov r9, r1 + 8002602: 4b2e ldr r3, [pc, #184] ; (80026bc <_strtod_l+0x594>) + 8002604: f1a9 7954 sub.w r9, r9, #55574528 ; 0x3500000 + 8002608: eb03 07c7 add.w r7, r3, r7, lsl #3 + 800260c: 4642 mov r2, r8 + 800260e: 464b mov r3, r9 + 8002610: e9d7 0100 ldrd r0, r1, [r7] + 8002614: f7fe f810 bl 8000638 <__aeabi_dmul> + 8002618: 4b29 ldr r3, [pc, #164] ; (80026c0 <_strtod_l+0x598>) + 800261a: 460a mov r2, r1 + 800261c: 400b ands r3, r1 + 800261e: 4929 ldr r1, [pc, #164] ; (80026c4 <_strtod_l+0x59c>) + 8002620: 428b cmp r3, r1 + 8002622: 4680 mov r8, r0 + 8002624: d8bb bhi.n 800259e <_strtod_l+0x476> + 8002626: f5a1 1180 sub.w r1, r1, #1048576 ; 0x100000 + 800262a: 428b cmp r3, r1 + 800262c: bf86 itte hi + 800262e: f8df 9098 ldrhi.w r9, [pc, #152] ; 80026c8 <_strtod_l+0x5a0> + 8002632: f04f 38ff movhi.w r8, #4294967295 + 8002636: f102 7954 addls.w r9, r2, #55574528 ; 0x3500000 + 800263a: 2300 movs r3, #0 + 800263c: 9305 str r3, [sp, #20] + 800263e: e07e b.n 800273e <_strtod_l+0x616> + 8002640: 07f2 lsls r2, r6, #31 + 8002642: d507 bpl.n 8002654 <_strtod_l+0x52c> + 8002644: 4b1d ldr r3, [pc, #116] ; (80026bc <_strtod_l+0x594>) + 8002646: eb03 03c7 add.w r3, r3, r7, lsl #3 + 800264a: e9d3 2300 ldrd r2, r3, [r3] + 800264e: f7fd fff3 bl 8000638 <__aeabi_dmul> + 8002652: 2301 movs r3, #1 + 8002654: 3701 adds r7, #1 + 8002656: 1076 asrs r6, r6, #1 + 8002658: e7ce b.n 80025f8 <_strtod_l+0x4d0> + 800265a: d0ee beq.n 800263a <_strtod_l+0x512> + 800265c: 4276 negs r6, r6 + 800265e: f016 020f ands.w r2, r6, #15 + 8002662: d00a beq.n 800267a <_strtod_l+0x552> + 8002664: 4b14 ldr r3, [pc, #80] ; (80026b8 <_strtod_l+0x590>) + 8002666: eb03 03c2 add.w r3, r3, r2, lsl #3 + 800266a: 4640 mov r0, r8 + 800266c: 4649 mov r1, r9 + 800266e: e9d3 2300 ldrd r2, r3, [r3] + 8002672: f7fe f90b bl 800088c <__aeabi_ddiv> + 8002676: 4680 mov r8, r0 + 8002678: 4689 mov r9, r1 + 800267a: 1136 asrs r6, r6, #4 + 800267c: d0dd beq.n 800263a <_strtod_l+0x512> + 800267e: 2e1f cmp r6, #31 + 8002680: dd24 ble.n 80026cc <_strtod_l+0x5a4> + 8002682: f04f 0b00 mov.w fp, #0 + 8002686: f8cd b010 str.w fp, [sp, #16] + 800268a: f8cd b020 str.w fp, [sp, #32] + 800268e: f8cd b018 str.w fp, [sp, #24] + 8002692: 2322 movs r3, #34 ; 0x22 + 8002694: f04f 0800 mov.w r8, #0 + 8002698: f04f 0900 mov.w r9, #0 + 800269c: f8ca 3000 str.w r3, [sl] + 80026a0: e78c b.n 80025bc <_strtod_l+0x494> + 80026a2: bf00 nop + 80026a4: 08005e2d .word 0x08005e2d + 80026a8: 08005e70 .word 0x08005e70 + 80026ac: 08005e25 .word 0x08005e25 + 80026b0: 08005fb4 .word 0x08005fb4 + 80026b4: 080062d0 .word 0x080062d0 + 80026b8: 080061b0 .word 0x080061b0 + 80026bc: 08006188 .word 0x08006188 + 80026c0: 7ff00000 .word 0x7ff00000 + 80026c4: 7ca00000 .word 0x7ca00000 + 80026c8: 7fefffff .word 0x7fefffff + 80026cc: f016 0310 ands.w r3, r6, #16 + 80026d0: bf18 it ne + 80026d2: 236a movne r3, #106 ; 0x6a + 80026d4: 4fb3 ldr r7, [pc, #716] ; (80029a4 <_strtod_l+0x87c>) + 80026d6: 9305 str r3, [sp, #20] + 80026d8: 4640 mov r0, r8 + 80026da: 4649 mov r1, r9 + 80026dc: 2300 movs r3, #0 + 80026de: 07f2 lsls r2, r6, #31 + 80026e0: d504 bpl.n 80026ec <_strtod_l+0x5c4> + 80026e2: e9d7 2300 ldrd r2, r3, [r7] + 80026e6: f7fd ffa7 bl 8000638 <__aeabi_dmul> + 80026ea: 2301 movs r3, #1 + 80026ec: 1076 asrs r6, r6, #1 + 80026ee: f107 0708 add.w r7, r7, #8 + 80026f2: d1f4 bne.n 80026de <_strtod_l+0x5b6> + 80026f4: b10b cbz r3, 80026fa <_strtod_l+0x5d2> + 80026f6: 4680 mov r8, r0 + 80026f8: 4689 mov r9, r1 + 80026fa: 9b05 ldr r3, [sp, #20] + 80026fc: b1bb cbz r3, 800272e <_strtod_l+0x606> + 80026fe: f3c9 530a ubfx r3, r9, #20, #11 + 8002702: f1c3 036b rsb r3, r3, #107 ; 0x6b + 8002706: 2b00 cmp r3, #0 + 8002708: 4649 mov r1, r9 + 800270a: dd10 ble.n 800272e <_strtod_l+0x606> + 800270c: 2b1f cmp r3, #31 + 800270e: f340 8128 ble.w 8002962 <_strtod_l+0x83a> + 8002712: 2b34 cmp r3, #52 ; 0x34 + 8002714: bfde ittt le + 8002716: 3b20 suble r3, #32 + 8002718: f04f 32ff movle.w r2, #4294967295 + 800271c: fa02 f303 lslle.w r3, r2, r3 + 8002720: f04f 0800 mov.w r8, #0 + 8002724: bfcc ite gt + 8002726: f04f 795c movgt.w r9, #57671680 ; 0x3700000 + 800272a: ea03 0901 andle.w r9, r3, r1 + 800272e: 2200 movs r2, #0 + 8002730: 2300 movs r3, #0 + 8002732: 4640 mov r0, r8 + 8002734: 4649 mov r1, r9 + 8002736: f7fe f9e7 bl 8000b08 <__aeabi_dcmpeq> + 800273a: 2800 cmp r0, #0 + 800273c: d1a1 bne.n 8002682 <_strtod_l+0x55a> + 800273e: 9b06 ldr r3, [sp, #24] + 8002740: 9300 str r3, [sp, #0] + 8002742: 9908 ldr r1, [sp, #32] + 8002744: 4623 mov r3, r4 + 8002746: 465a mov r2, fp + 8002748: 4650 mov r0, sl + 800274a: f002 f8b5 bl 80048b8 <__s2b> + 800274e: 9008 str r0, [sp, #32] + 8002750: 2800 cmp r0, #0 + 8002752: f43f af24 beq.w 800259e <_strtod_l+0x476> + 8002756: 9b04 ldr r3, [sp, #16] + 8002758: 1b5d subs r5, r3, r5 + 800275a: 9b07 ldr r3, [sp, #28] + 800275c: 2b00 cmp r3, #0 + 800275e: bfb4 ite lt + 8002760: 462b movlt r3, r5 + 8002762: 2300 movge r3, #0 + 8002764: 930e str r3, [sp, #56] ; 0x38 + 8002766: 9b07 ldr r3, [sp, #28] + 8002768: f04f 0b00 mov.w fp, #0 + 800276c: ea23 73e3 bic.w r3, r3, r3, asr #31 + 8002770: 9316 str r3, [sp, #88] ; 0x58 + 8002772: f8cd b010 str.w fp, [sp, #16] + 8002776: 9b08 ldr r3, [sp, #32] + 8002778: 4650 mov r0, sl + 800277a: 6859 ldr r1, [r3, #4] + 800277c: f001 fff0 bl 8004760 <_Balloc> + 8002780: 9006 str r0, [sp, #24] + 8002782: 2800 cmp r0, #0 + 8002784: f43f af13 beq.w 80025ae <_strtod_l+0x486> + 8002788: 9b08 ldr r3, [sp, #32] + 800278a: 691a ldr r2, [r3, #16] + 800278c: 3202 adds r2, #2 + 800278e: f103 010c add.w r1, r3, #12 + 8002792: 0092 lsls r2, r2, #2 + 8002794: 300c adds r0, #12 + 8002796: f001 ffd5 bl 8004744 + 800279a: ab1e add r3, sp, #120 ; 0x78 + 800279c: 9301 str r3, [sp, #4] + 800279e: ab1d add r3, sp, #116 ; 0x74 + 80027a0: 9300 str r3, [sp, #0] + 80027a2: 4642 mov r2, r8 + 80027a4: 464b mov r3, r9 + 80027a6: 4650 mov r0, sl + 80027a8: e9cd 890a strd r8, r9, [sp, #40] ; 0x28 + 80027ac: f002 fbbe bl 8004f2c <__d2b> + 80027b0: 901c str r0, [sp, #112] ; 0x70 + 80027b2: 2800 cmp r0, #0 + 80027b4: f43f aefb beq.w 80025ae <_strtod_l+0x486> + 80027b8: 2101 movs r1, #1 + 80027ba: 4650 mov r0, sl + 80027bc: f002 f914 bl 80049e8 <__i2b> + 80027c0: 9004 str r0, [sp, #16] + 80027c2: 4603 mov r3, r0 + 80027c4: 2800 cmp r0, #0 + 80027c6: f43f aef2 beq.w 80025ae <_strtod_l+0x486> + 80027ca: 9d1d ldr r5, [sp, #116] ; 0x74 + 80027cc: 9a1e ldr r2, [sp, #120] ; 0x78 + 80027ce: 2d00 cmp r5, #0 + 80027d0: bfab itete ge + 80027d2: 9b0e ldrge r3, [sp, #56] ; 0x38 + 80027d4: 9b16 ldrlt r3, [sp, #88] ; 0x58 + 80027d6: 9c16 ldrge r4, [sp, #88] ; 0x58 + 80027d8: 9e0e ldrlt r6, [sp, #56] ; 0x38 + 80027da: bfac ite ge + 80027dc: 18ee addge r6, r5, r3 + 80027de: 1b5c sublt r4, r3, r5 + 80027e0: 9b05 ldr r3, [sp, #20] + 80027e2: 1aed subs r5, r5, r3 + 80027e4: 4415 add r5, r2 + 80027e6: 4b70 ldr r3, [pc, #448] ; (80029a8 <_strtod_l+0x880>) + 80027e8: 3d01 subs r5, #1 + 80027ea: 429d cmp r5, r3 + 80027ec: f1c2 0236 rsb r2, r2, #54 ; 0x36 + 80027f0: f280 80c9 bge.w 8002986 <_strtod_l+0x85e> + 80027f4: 1b5b subs r3, r3, r5 + 80027f6: 2b1f cmp r3, #31 + 80027f8: eba2 0203 sub.w r2, r2, r3 + 80027fc: f04f 0701 mov.w r7, #1 + 8002800: f300 80b6 bgt.w 8002970 <_strtod_l+0x848> + 8002804: fa07 f303 lsl.w r3, r7, r3 + 8002808: 930f str r3, [sp, #60] ; 0x3c + 800280a: 2500 movs r5, #0 + 800280c: 18b7 adds r7, r6, r2 + 800280e: 9b05 ldr r3, [sp, #20] + 8002810: 42be cmp r6, r7 + 8002812: 4414 add r4, r2 + 8002814: 441c add r4, r3 + 8002816: 4633 mov r3, r6 + 8002818: bfa8 it ge + 800281a: 463b movge r3, r7 + 800281c: 42a3 cmp r3, r4 + 800281e: bfa8 it ge + 8002820: 4623 movge r3, r4 + 8002822: 2b00 cmp r3, #0 + 8002824: bfc2 ittt gt + 8002826: 1aff subgt r7, r7, r3 + 8002828: 1ae4 subgt r4, r4, r3 + 800282a: 1af6 subgt r6, r6, r3 + 800282c: 9b0e ldr r3, [sp, #56] ; 0x38 + 800282e: 2b00 cmp r3, #0 + 8002830: dd17 ble.n 8002862 <_strtod_l+0x73a> + 8002832: 9904 ldr r1, [sp, #16] + 8002834: 461a mov r2, r3 + 8002836: 4650 mov r0, sl + 8002838: f002 f992 bl 8004b60 <__pow5mult> + 800283c: 9004 str r0, [sp, #16] + 800283e: 2800 cmp r0, #0 + 8002840: f43f aeb5 beq.w 80025ae <_strtod_l+0x486> + 8002844: 4601 mov r1, r0 + 8002846: 9a1c ldr r2, [sp, #112] ; 0x70 + 8002848: 4650 mov r0, sl + 800284a: f002 f8e3 bl 8004a14 <__multiply> + 800284e: 9009 str r0, [sp, #36] ; 0x24 + 8002850: 2800 cmp r0, #0 + 8002852: f43f aeac beq.w 80025ae <_strtod_l+0x486> + 8002856: 991c ldr r1, [sp, #112] ; 0x70 + 8002858: 4650 mov r0, sl + 800285a: f001 ffc1 bl 80047e0 <_Bfree> + 800285e: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002860: 931c str r3, [sp, #112] ; 0x70 + 8002862: 2f00 cmp r7, #0 + 8002864: f300 8093 bgt.w 800298e <_strtod_l+0x866> + 8002868: 9b07 ldr r3, [sp, #28] + 800286a: 2b00 cmp r3, #0 + 800286c: dd08 ble.n 8002880 <_strtod_l+0x758> + 800286e: 9a16 ldr r2, [sp, #88] ; 0x58 + 8002870: 9906 ldr r1, [sp, #24] + 8002872: 4650 mov r0, sl + 8002874: f002 f974 bl 8004b60 <__pow5mult> + 8002878: 9006 str r0, [sp, #24] + 800287a: 2800 cmp r0, #0 + 800287c: f43f ae97 beq.w 80025ae <_strtod_l+0x486> + 8002880: 2c00 cmp r4, #0 + 8002882: dd08 ble.n 8002896 <_strtod_l+0x76e> + 8002884: 9906 ldr r1, [sp, #24] + 8002886: 4622 mov r2, r4 + 8002888: 4650 mov r0, sl + 800288a: f002 f9c3 bl 8004c14 <__lshift> + 800288e: 9006 str r0, [sp, #24] + 8002890: 2800 cmp r0, #0 + 8002892: f43f ae8c beq.w 80025ae <_strtod_l+0x486> + 8002896: 2e00 cmp r6, #0 + 8002898: dd08 ble.n 80028ac <_strtod_l+0x784> + 800289a: 9904 ldr r1, [sp, #16] + 800289c: 4632 mov r2, r6 + 800289e: 4650 mov r0, sl + 80028a0: f002 f9b8 bl 8004c14 <__lshift> + 80028a4: 9004 str r0, [sp, #16] + 80028a6: 2800 cmp r0, #0 + 80028a8: f43f ae81 beq.w 80025ae <_strtod_l+0x486> + 80028ac: 9a06 ldr r2, [sp, #24] + 80028ae: 991c ldr r1, [sp, #112] ; 0x70 + 80028b0: 4650 mov r0, sl + 80028b2: f002 fa37 bl 8004d24 <__mdiff> + 80028b6: 4683 mov fp, r0 + 80028b8: 2800 cmp r0, #0 + 80028ba: f43f ae78 beq.w 80025ae <_strtod_l+0x486> + 80028be: 2400 movs r4, #0 + 80028c0: 68c3 ldr r3, [r0, #12] + 80028c2: 9904 ldr r1, [sp, #16] + 80028c4: 60c4 str r4, [r0, #12] + 80028c6: 930d str r3, [sp, #52] ; 0x34 + 80028c8: f002 fa10 bl 8004cec <__mcmp> + 80028cc: 42a0 cmp r0, r4 + 80028ce: da71 bge.n 80029b4 <_strtod_l+0x88c> + 80028d0: 9b0d ldr r3, [sp, #52] ; 0x34 + 80028d2: ea53 0308 orrs.w r3, r3, r8 + 80028d6: f040 8097 bne.w 8002a08 <_strtod_l+0x8e0> + 80028da: f3c9 0313 ubfx r3, r9, #0, #20 + 80028de: 2b00 cmp r3, #0 + 80028e0: f040 8092 bne.w 8002a08 <_strtod_l+0x8e0> + 80028e4: f029 4300 bic.w r3, r9, #2147483648 ; 0x80000000 + 80028e8: 0d1b lsrs r3, r3, #20 + 80028ea: 051b lsls r3, r3, #20 + 80028ec: f1b3 6fd6 cmp.w r3, #112197632 ; 0x6b00000 + 80028f0: f240 808a bls.w 8002a08 <_strtod_l+0x8e0> + 80028f4: f8db 3014 ldr.w r3, [fp, #20] + 80028f8: b923 cbnz r3, 8002904 <_strtod_l+0x7dc> + 80028fa: f8db 3010 ldr.w r3, [fp, #16] + 80028fe: 2b01 cmp r3, #1 + 8002900: f340 8082 ble.w 8002a08 <_strtod_l+0x8e0> + 8002904: 4659 mov r1, fp + 8002906: 2201 movs r2, #1 + 8002908: 4650 mov r0, sl + 800290a: f002 f983 bl 8004c14 <__lshift> + 800290e: 9904 ldr r1, [sp, #16] + 8002910: 4683 mov fp, r0 + 8002912: f002 f9eb bl 8004cec <__mcmp> + 8002916: 2800 cmp r0, #0 + 8002918: dd76 ble.n 8002a08 <_strtod_l+0x8e0> + 800291a: 9905 ldr r1, [sp, #20] + 800291c: 4a23 ldr r2, [pc, #140] ; (80029ac <_strtod_l+0x884>) + 800291e: 464b mov r3, r9 + 8002920: 2900 cmp r1, #0 + 8002922: f000 8092 beq.w 8002a4a <_strtod_l+0x922> + 8002926: ea02 0109 and.w r1, r2, r9 + 800292a: f1b1 6fd6 cmp.w r1, #112197632 ; 0x6b00000 + 800292e: f300 808c bgt.w 8002a4a <_strtod_l+0x922> + 8002932: f1b1 7f5c cmp.w r1, #57671680 ; 0x3700000 + 8002936: f77f aeac ble.w 8002692 <_strtod_l+0x56a> + 800293a: 4a1d ldr r2, [pc, #116] ; (80029b0 <_strtod_l+0x888>) + 800293c: 2300 movs r3, #0 + 800293e: e9cd 3214 strd r3, r2, [sp, #80] ; 0x50 + 8002942: 4640 mov r0, r8 + 8002944: e9dd 2314 ldrd r2, r3, [sp, #80] ; 0x50 + 8002948: 4649 mov r1, r9 + 800294a: f7fd fe75 bl 8000638 <__aeabi_dmul> + 800294e: 460b mov r3, r1 + 8002950: 4303 orrs r3, r0 + 8002952: bf08 it eq + 8002954: 2322 moveq r3, #34 ; 0x22 + 8002956: 4680 mov r8, r0 + 8002958: 4689 mov r9, r1 + 800295a: bf08 it eq + 800295c: f8ca 3000 streq.w r3, [sl] + 8002960: e630 b.n 80025c4 <_strtod_l+0x49c> + 8002962: f04f 32ff mov.w r2, #4294967295 + 8002966: fa02 f303 lsl.w r3, r2, r3 + 800296a: ea03 0808 and.w r8, r3, r8 + 800296e: e6de b.n 800272e <_strtod_l+0x606> + 8002970: f1c5 457f rsb r5, r5, #4278190080 ; 0xff000000 + 8002974: f505 057f add.w r5, r5, #16711680 ; 0xff0000 + 8002978: f505 457b add.w r5, r5, #64256 ; 0xfb00 + 800297c: 35e2 adds r5, #226 ; 0xe2 + 800297e: fa07 f505 lsl.w r5, r7, r5 + 8002982: 970f str r7, [sp, #60] ; 0x3c + 8002984: e742 b.n 800280c <_strtod_l+0x6e4> + 8002986: 2301 movs r3, #1 + 8002988: 2500 movs r5, #0 + 800298a: 930f str r3, [sp, #60] ; 0x3c + 800298c: e73e b.n 800280c <_strtod_l+0x6e4> + 800298e: 991c ldr r1, [sp, #112] ; 0x70 + 8002990: 463a mov r2, r7 + 8002992: 4650 mov r0, sl + 8002994: f002 f93e bl 8004c14 <__lshift> + 8002998: 901c str r0, [sp, #112] ; 0x70 + 800299a: 2800 cmp r0, #0 + 800299c: f47f af64 bne.w 8002868 <_strtod_l+0x740> + 80029a0: e605 b.n 80025ae <_strtod_l+0x486> + 80029a2: bf00 nop + 80029a4: 08005e88 .word 0x08005e88 + 80029a8: fffffc02 .word 0xfffffc02 + 80029ac: 7ff00000 .word 0x7ff00000 + 80029b0: 39500000 .word 0x39500000 + 80029b4: f8cd 9024 str.w r9, [sp, #36] ; 0x24 + 80029b8: d166 bne.n 8002a88 <_strtod_l+0x960> + 80029ba: 9a0d ldr r2, [sp, #52] ; 0x34 + 80029bc: f3c9 0313 ubfx r3, r9, #0, #20 + 80029c0: b35a cbz r2, 8002a1a <_strtod_l+0x8f2> + 80029c2: 4a9d ldr r2, [pc, #628] ; (8002c38 <_strtod_l+0xb10>) + 80029c4: 4293 cmp r3, r2 + 80029c6: d12c bne.n 8002a22 <_strtod_l+0x8fa> + 80029c8: 9b05 ldr r3, [sp, #20] + 80029ca: 4640 mov r0, r8 + 80029cc: b303 cbz r3, 8002a10 <_strtod_l+0x8e8> + 80029ce: 4a9b ldr r2, [pc, #620] ; (8002c3c <_strtod_l+0xb14>) + 80029d0: 464b mov r3, r9 + 80029d2: 401a ands r2, r3 + 80029d4: f1b2 6fd4 cmp.w r2, #111149056 ; 0x6a00000 + 80029d8: f04f 31ff mov.w r1, #4294967295 + 80029dc: d81b bhi.n 8002a16 <_strtod_l+0x8ee> + 80029de: 0d12 lsrs r2, r2, #20 + 80029e0: f1c2 036b rsb r3, r2, #107 ; 0x6b + 80029e4: fa01 f303 lsl.w r3, r1, r3 + 80029e8: 4298 cmp r0, r3 + 80029ea: d11a bne.n 8002a22 <_strtod_l+0x8fa> + 80029ec: 4b94 ldr r3, [pc, #592] ; (8002c40 <_strtod_l+0xb18>) + 80029ee: 9a09 ldr r2, [sp, #36] ; 0x24 + 80029f0: 429a cmp r2, r3 + 80029f2: d102 bne.n 80029fa <_strtod_l+0x8d2> + 80029f4: 3001 adds r0, #1 + 80029f6: f43f adda beq.w 80025ae <_strtod_l+0x486> + 80029fa: 4b90 ldr r3, [pc, #576] ; (8002c3c <_strtod_l+0xb14>) + 80029fc: 9a09 ldr r2, [sp, #36] ; 0x24 + 80029fe: 401a ands r2, r3 + 8002a00: f502 1980 add.w r9, r2, #1048576 ; 0x100000 + 8002a04: f04f 0800 mov.w r8, #0 + 8002a08: 9b05 ldr r3, [sp, #20] + 8002a0a: 2b00 cmp r3, #0 + 8002a0c: d195 bne.n 800293a <_strtod_l+0x812> + 8002a0e: e5d9 b.n 80025c4 <_strtod_l+0x49c> + 8002a10: f04f 33ff mov.w r3, #4294967295 + 8002a14: e7e8 b.n 80029e8 <_strtod_l+0x8c0> + 8002a16: 460b mov r3, r1 + 8002a18: e7e6 b.n 80029e8 <_strtod_l+0x8c0> + 8002a1a: ea53 0308 orrs.w r3, r3, r8 + 8002a1e: f43f af7c beq.w 800291a <_strtod_l+0x7f2> + 8002a22: b1e5 cbz r5, 8002a5e <_strtod_l+0x936> + 8002a24: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002a26: 421d tst r5, r3 + 8002a28: d0ee beq.n 8002a08 <_strtod_l+0x8e0> + 8002a2a: 9b0d ldr r3, [sp, #52] ; 0x34 + 8002a2c: 9a05 ldr r2, [sp, #20] + 8002a2e: 4640 mov r0, r8 + 8002a30: 4649 mov r1, r9 + 8002a32: b1c3 cbz r3, 8002a66 <_strtod_l+0x93e> + 8002a34: f7ff fb56 bl 80020e4 + 8002a38: 4602 mov r2, r0 + 8002a3a: 460b mov r3, r1 + 8002a3c: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 + 8002a40: f7fd fc44 bl 80002cc <__adddf3> + 8002a44: 4680 mov r8, r0 + 8002a46: 4689 mov r9, r1 + 8002a48: e7de b.n 8002a08 <_strtod_l+0x8e0> + 8002a4a: 4013 ands r3, r2 + 8002a4c: f5a3 1380 sub.w r3, r3, #1048576 ; 0x100000 + 8002a50: ea6f 5913 mvn.w r9, r3, lsr #20 + 8002a54: ea6f 5909 mvn.w r9, r9, lsl #20 + 8002a58: f04f 38ff mov.w r8, #4294967295 + 8002a5c: e7d4 b.n 8002a08 <_strtod_l+0x8e0> + 8002a5e: 9b0f ldr r3, [sp, #60] ; 0x3c + 8002a60: ea13 0f08 tst.w r3, r8 + 8002a64: e7e0 b.n 8002a28 <_strtod_l+0x900> + 8002a66: f7ff fb3d bl 80020e4 + 8002a6a: 4602 mov r2, r0 + 8002a6c: 460b mov r3, r1 + 8002a6e: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 + 8002a72: f7fd fc29 bl 80002c8 <__aeabi_dsub> + 8002a76: 2200 movs r2, #0 + 8002a78: 2300 movs r3, #0 + 8002a7a: 4680 mov r8, r0 + 8002a7c: 4689 mov r9, r1 + 8002a7e: f7fe f843 bl 8000b08 <__aeabi_dcmpeq> + 8002a82: 2800 cmp r0, #0 + 8002a84: d0c0 beq.n 8002a08 <_strtod_l+0x8e0> + 8002a86: e604 b.n 8002692 <_strtod_l+0x56a> + 8002a88: 9904 ldr r1, [sp, #16] + 8002a8a: 4658 mov r0, fp + 8002a8c: f002 faaa bl 8004fe4 <__ratio> + 8002a90: 2200 movs r2, #0 + 8002a92: f04f 4380 mov.w r3, #1073741824 ; 0x40000000 + 8002a96: 4606 mov r6, r0 + 8002a98: 460f mov r7, r1 + 8002a9a: f7fe f849 bl 8000b30 <__aeabi_dcmple> + 8002a9e: 2800 cmp r0, #0 + 8002aa0: d075 beq.n 8002b8e <_strtod_l+0xa66> + 8002aa2: 9b0d ldr r3, [sp, #52] ; 0x34 + 8002aa4: 2b00 cmp r3, #0 + 8002aa6: d047 beq.n 8002b38 <_strtod_l+0xa10> + 8002aa8: 4f66 ldr r7, [pc, #408] ; (8002c44 <_strtod_l+0xb1c>) + 8002aaa: 2600 movs r6, #0 + 8002aac: 4d65 ldr r5, [pc, #404] ; (8002c44 <_strtod_l+0xb1c>) + 8002aae: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002ab0: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8002ab4: 0d1b lsrs r3, r3, #20 + 8002ab6: 051b lsls r3, r3, #20 + 8002ab8: 930f str r3, [sp, #60] ; 0x3c + 8002aba: 9a0f ldr r2, [sp, #60] ; 0x3c + 8002abc: 4b62 ldr r3, [pc, #392] ; (8002c48 <_strtod_l+0xb20>) + 8002abe: 429a cmp r2, r3 + 8002ac0: f040 80ca bne.w 8002c58 <_strtod_l+0xb30> + 8002ac4: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 + 8002ac8: e9cd 2314 strd r2, r3, [sp, #80] ; 0x50 + 8002acc: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002ace: f1a3 7954 sub.w r9, r3, #55574528 ; 0x3500000 + 8002ad2: 4640 mov r0, r8 + 8002ad4: 4649 mov r1, r9 + 8002ad6: f002 f9af bl 8004e38 <__ulp> + 8002ada: 4602 mov r2, r0 + 8002adc: 460b mov r3, r1 + 8002ade: 4630 mov r0, r6 + 8002ae0: 4639 mov r1, r7 + 8002ae2: f7fd fda9 bl 8000638 <__aeabi_dmul> + 8002ae6: 4642 mov r2, r8 + 8002ae8: 464b mov r3, r9 + 8002aea: f7fd fbef bl 80002cc <__adddf3> + 8002aee: 460b mov r3, r1 + 8002af0: 4952 ldr r1, [pc, #328] ; (8002c3c <_strtod_l+0xb14>) + 8002af2: 4a56 ldr r2, [pc, #344] ; (8002c4c <_strtod_l+0xb24>) + 8002af4: 4019 ands r1, r3 + 8002af6: 4291 cmp r1, r2 + 8002af8: 4680 mov r8, r0 + 8002afa: d95e bls.n 8002bba <_strtod_l+0xa92> + 8002afc: 9b0b ldr r3, [sp, #44] ; 0x2c + 8002afe: f102 7254 add.w r2, r2, #55574528 ; 0x3500000 + 8002b02: 4293 cmp r3, r2 + 8002b04: d103 bne.n 8002b0e <_strtod_l+0x9e6> + 8002b06: 9b0a ldr r3, [sp, #40] ; 0x28 + 8002b08: 3301 adds r3, #1 + 8002b0a: f43f ad50 beq.w 80025ae <_strtod_l+0x486> + 8002b0e: f8df 9130 ldr.w r9, [pc, #304] ; 8002c40 <_strtod_l+0xb18> + 8002b12: f04f 38ff mov.w r8, #4294967295 + 8002b16: 991c ldr r1, [sp, #112] ; 0x70 + 8002b18: 4650 mov r0, sl + 8002b1a: f001 fe61 bl 80047e0 <_Bfree> + 8002b1e: 9906 ldr r1, [sp, #24] + 8002b20: 4650 mov r0, sl + 8002b22: f001 fe5d bl 80047e0 <_Bfree> + 8002b26: 9904 ldr r1, [sp, #16] + 8002b28: 4650 mov r0, sl + 8002b2a: f001 fe59 bl 80047e0 <_Bfree> + 8002b2e: 4659 mov r1, fp + 8002b30: 4650 mov r0, sl + 8002b32: f001 fe55 bl 80047e0 <_Bfree> + 8002b36: e61e b.n 8002776 <_strtod_l+0x64e> + 8002b38: f1b8 0f00 cmp.w r8, #0 + 8002b3c: d119 bne.n 8002b72 <_strtod_l+0xa4a> + 8002b3e: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002b40: f3c3 0313 ubfx r3, r3, #0, #20 + 8002b44: b9e3 cbnz r3, 8002b80 <_strtod_l+0xa58> + 8002b46: 4b3f ldr r3, [pc, #252] ; (8002c44 <_strtod_l+0xb1c>) + 8002b48: 2200 movs r2, #0 + 8002b4a: 4630 mov r0, r6 + 8002b4c: 4639 mov r1, r7 + 8002b4e: f7fd ffe5 bl 8000b1c <__aeabi_dcmplt> + 8002b52: b9c8 cbnz r0, 8002b88 <_strtod_l+0xa60> + 8002b54: 4b3e ldr r3, [pc, #248] ; (8002c50 <_strtod_l+0xb28>) + 8002b56: 2200 movs r2, #0 + 8002b58: 4630 mov r0, r6 + 8002b5a: 4639 mov r1, r7 + 8002b5c: f7fd fd6c bl 8000638 <__aeabi_dmul> + 8002b60: 4604 mov r4, r0 + 8002b62: 460d mov r5, r1 + 8002b64: f105 4300 add.w r3, r5, #2147483648 ; 0x80000000 + 8002b68: 9418 str r4, [sp, #96] ; 0x60 + 8002b6a: 9319 str r3, [sp, #100] ; 0x64 + 8002b6c: e9dd 6718 ldrd r6, r7, [sp, #96] ; 0x60 + 8002b70: e79d b.n 8002aae <_strtod_l+0x986> + 8002b72: f1b8 0f01 cmp.w r8, #1 + 8002b76: d103 bne.n 8002b80 <_strtod_l+0xa58> + 8002b78: 9b09 ldr r3, [sp, #36] ; 0x24 + 8002b7a: 2b00 cmp r3, #0 + 8002b7c: f43f ad89 beq.w 8002692 <_strtod_l+0x56a> + 8002b80: 4f34 ldr r7, [pc, #208] ; (8002c54 <_strtod_l+0xb2c>) + 8002b82: 2600 movs r6, #0 + 8002b84: 2400 movs r4, #0 + 8002b86: e791 b.n 8002aac <_strtod_l+0x984> + 8002b88: 9c0d ldr r4, [sp, #52] ; 0x34 + 8002b8a: 4d31 ldr r5, [pc, #196] ; (8002c50 <_strtod_l+0xb28>) + 8002b8c: e7ea b.n 8002b64 <_strtod_l+0xa3c> + 8002b8e: 4b30 ldr r3, [pc, #192] ; (8002c50 <_strtod_l+0xb28>) + 8002b90: 2200 movs r2, #0 + 8002b92: 4630 mov r0, r6 + 8002b94: 4639 mov r1, r7 + 8002b96: f7fd fd4f bl 8000638 <__aeabi_dmul> + 8002b9a: 9b0d ldr r3, [sp, #52] ; 0x34 + 8002b9c: 4604 mov r4, r0 + 8002b9e: 460d mov r5, r1 + 8002ba0: b933 cbnz r3, 8002bb0 <_strtod_l+0xa88> + 8002ba2: f101 4300 add.w r3, r1, #2147483648 ; 0x80000000 + 8002ba6: 9010 str r0, [sp, #64] ; 0x40 + 8002ba8: 9311 str r3, [sp, #68] ; 0x44 + 8002baa: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 + 8002bae: e77e b.n 8002aae <_strtod_l+0x986> + 8002bb0: 4602 mov r2, r0 + 8002bb2: 460b mov r3, r1 + 8002bb4: e9cd 2310 strd r2, r3, [sp, #64] ; 0x40 + 8002bb8: e7f7 b.n 8002baa <_strtod_l+0xa82> + 8002bba: f103 7954 add.w r9, r3, #55574528 ; 0x3500000 + 8002bbe: 9b05 ldr r3, [sp, #20] + 8002bc0: 2b00 cmp r3, #0 + 8002bc2: d1a8 bne.n 8002b16 <_strtod_l+0x9ee> + 8002bc4: f029 4300 bic.w r3, r9, #2147483648 ; 0x80000000 + 8002bc8: 9a0f ldr r2, [sp, #60] ; 0x3c + 8002bca: 0d1b lsrs r3, r3, #20 + 8002bcc: 051b lsls r3, r3, #20 + 8002bce: 429a cmp r2, r3 + 8002bd0: d1a1 bne.n 8002b16 <_strtod_l+0x9ee> + 8002bd2: 4620 mov r0, r4 + 8002bd4: 4629 mov r1, r5 + 8002bd6: f7fe f877 bl 8000cc8 <__aeabi_d2lz> + 8002bda: f7fd fcff bl 80005dc <__aeabi_l2d> + 8002bde: 4602 mov r2, r0 + 8002be0: 460b mov r3, r1 + 8002be2: 4620 mov r0, r4 + 8002be4: 4629 mov r1, r5 + 8002be6: f7fd fb6f bl 80002c8 <__aeabi_dsub> + 8002bea: 9a0d ldr r2, [sp, #52] ; 0x34 + 8002bec: f3c9 0313 ubfx r3, r9, #0, #20 + 8002bf0: ea43 0308 orr.w r3, r3, r8 + 8002bf4: 4313 orrs r3, r2 + 8002bf6: 4604 mov r4, r0 + 8002bf8: 460d mov r5, r1 + 8002bfa: d068 beq.n 8002cce <_strtod_l+0xba6> + 8002bfc: a30a add r3, pc, #40 ; (adr r3, 8002c28 <_strtod_l+0xb00>) + 8002bfe: e9d3 2300 ldrd r2, r3, [r3] + 8002c02: f7fd ff8b bl 8000b1c <__aeabi_dcmplt> + 8002c06: 2800 cmp r0, #0 + 8002c08: f47f acdc bne.w 80025c4 <_strtod_l+0x49c> + 8002c0c: a308 add r3, pc, #32 ; (adr r3, 8002c30 <_strtod_l+0xb08>) + 8002c0e: e9d3 2300 ldrd r2, r3, [r3] + 8002c12: 4620 mov r0, r4 + 8002c14: 4629 mov r1, r5 + 8002c16: f7fd ff9f bl 8000b58 <__aeabi_dcmpgt> + 8002c1a: 2800 cmp r0, #0 + 8002c1c: f43f af7b beq.w 8002b16 <_strtod_l+0x9ee> + 8002c20: e4d0 b.n 80025c4 <_strtod_l+0x49c> + 8002c22: bf00 nop + 8002c24: f3af 8000 nop.w + 8002c28: 94a03595 .word 0x94a03595 + 8002c2c: 3fdfffff .word 0x3fdfffff + 8002c30: 35afe535 .word 0x35afe535 + 8002c34: 3fe00000 .word 0x3fe00000 + 8002c38: 000fffff .word 0x000fffff + 8002c3c: 7ff00000 .word 0x7ff00000 + 8002c40: 7fefffff .word 0x7fefffff + 8002c44: 3ff00000 .word 0x3ff00000 + 8002c48: 7fe00000 .word 0x7fe00000 + 8002c4c: 7c9fffff .word 0x7c9fffff + 8002c50: 3fe00000 .word 0x3fe00000 + 8002c54: bff00000 .word 0xbff00000 + 8002c58: 9b05 ldr r3, [sp, #20] + 8002c5a: b313 cbz r3, 8002ca2 <_strtod_l+0xb7a> + 8002c5c: 9b0f ldr r3, [sp, #60] ; 0x3c + 8002c5e: f1b3 6fd4 cmp.w r3, #111149056 ; 0x6a00000 + 8002c62: d81e bhi.n 8002ca2 <_strtod_l+0xb7a> + 8002c64: a326 add r3, pc, #152 ; (adr r3, 8002d00 <_strtod_l+0xbd8>) + 8002c66: e9d3 2300 ldrd r2, r3, [r3] + 8002c6a: 4620 mov r0, r4 + 8002c6c: 4629 mov r1, r5 + 8002c6e: f7fd ff5f bl 8000b30 <__aeabi_dcmple> + 8002c72: b190 cbz r0, 8002c9a <_strtod_l+0xb72> + 8002c74: 4629 mov r1, r5 + 8002c76: 4620 mov r0, r4 + 8002c78: f7fd ffb6 bl 8000be8 <__aeabi_d2uiz> + 8002c7c: 2801 cmp r0, #1 + 8002c7e: bf38 it cc + 8002c80: 2001 movcc r0, #1 + 8002c82: f7fd fc5f bl 8000544 <__aeabi_ui2d> + 8002c86: 9b0d ldr r3, [sp, #52] ; 0x34 + 8002c88: 4604 mov r4, r0 + 8002c8a: 460d mov r5, r1 + 8002c8c: b9d3 cbnz r3, 8002cc4 <_strtod_l+0xb9c> + 8002c8e: f101 4300 add.w r3, r1, #2147483648 ; 0x80000000 + 8002c92: 9012 str r0, [sp, #72] ; 0x48 + 8002c94: 9313 str r3, [sp, #76] ; 0x4c + 8002c96: e9dd 6712 ldrd r6, r7, [sp, #72] ; 0x48 + 8002c9a: 9a0f ldr r2, [sp, #60] ; 0x3c + 8002c9c: f107 63d6 add.w r3, r7, #112197632 ; 0x6b00000 + 8002ca0: 1a9f subs r7, r3, r2 + 8002ca2: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 + 8002ca6: f002 f8c7 bl 8004e38 <__ulp> + 8002caa: 4602 mov r2, r0 + 8002cac: 460b mov r3, r1 + 8002cae: 4630 mov r0, r6 + 8002cb0: 4639 mov r1, r7 + 8002cb2: f7fd fcc1 bl 8000638 <__aeabi_dmul> + 8002cb6: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 + 8002cba: f7fd fb07 bl 80002cc <__adddf3> + 8002cbe: 4680 mov r8, r0 + 8002cc0: 4689 mov r9, r1 + 8002cc2: e77c b.n 8002bbe <_strtod_l+0xa96> + 8002cc4: 4602 mov r2, r0 + 8002cc6: 460b mov r3, r1 + 8002cc8: e9cd 2312 strd r2, r3, [sp, #72] ; 0x48 + 8002ccc: e7e3 b.n 8002c96 <_strtod_l+0xb6e> + 8002cce: a30e add r3, pc, #56 ; (adr r3, 8002d08 <_strtod_l+0xbe0>) + 8002cd0: e9d3 2300 ldrd r2, r3, [r3] + 8002cd4: f7fd ff22 bl 8000b1c <__aeabi_dcmplt> + 8002cd8: e79f b.n 8002c1a <_strtod_l+0xaf2> + 8002cda: 2300 movs r3, #0 + 8002cdc: 930c str r3, [sp, #48] ; 0x30 + 8002cde: 9a17 ldr r2, [sp, #92] ; 0x5c + 8002ce0: 9b1b ldr r3, [sp, #108] ; 0x6c + 8002ce2: 6013 str r3, [r2, #0] + 8002ce4: f7ff ba65 b.w 80021b2 <_strtod_l+0x8a> + 8002ce8: 2b65 cmp r3, #101 ; 0x65 + 8002cea: f43f ab5c beq.w 80023a6 <_strtod_l+0x27e> + 8002cee: 2b45 cmp r3, #69 ; 0x45 + 8002cf0: f43f ab59 beq.w 80023a6 <_strtod_l+0x27e> + 8002cf4: 2201 movs r2, #1 + 8002cf6: f7ff bb8d b.w 8002414 <_strtod_l+0x2ec> + 8002cfa: bf00 nop + 8002cfc: f3af 8000 nop.w + 8002d00: ffc00000 .word 0xffc00000 + 8002d04: 41dfffff .word 0x41dfffff + 8002d08: 94a03595 .word 0x94a03595 + 8002d0c: 3fcfffff .word 0x3fcfffff + +08002d10 <_strtod_r>: + 8002d10: 4b01 ldr r3, [pc, #4] ; (8002d18 <_strtod_r+0x8>) + 8002d12: f7ff ba09 b.w 8002128 <_strtod_l> + 8002d16: bf00 nop + 8002d18: 20000068 .word 0x20000068 + +08002d1c <_strtol_l.isra.0>: + 8002d1c: 2b01 cmp r3, #1 + 8002d1e: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8002d22: 4686 mov lr, r0 + 8002d24: d001 beq.n 8002d2a <_strtol_l.isra.0+0xe> + 8002d26: 2b24 cmp r3, #36 ; 0x24 + 8002d28: d906 bls.n 8002d38 <_strtol_l.isra.0+0x1c> + 8002d2a: f7fe fa15 bl 8001158 <__errno> + 8002d2e: 2316 movs r3, #22 + 8002d30: 6003 str r3, [r0, #0] + 8002d32: 2000 movs r0, #0 + 8002d34: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8002d38: 4e3a ldr r6, [pc, #232] ; (8002e24 <_strtol_l.isra.0+0x108>) + 8002d3a: 468c mov ip, r1 + 8002d3c: 4660 mov r0, ip + 8002d3e: f81c 4b01 ldrb.w r4, [ip], #1 + 8002d42: 5da5 ldrb r5, [r4, r6] + 8002d44: f015 0508 ands.w r5, r5, #8 + 8002d48: d1f8 bne.n 8002d3c <_strtol_l.isra.0+0x20> + 8002d4a: 2c2d cmp r4, #45 ; 0x2d + 8002d4c: d133 bne.n 8002db6 <_strtol_l.isra.0+0x9a> + 8002d4e: f89c 4000 ldrb.w r4, [ip] + 8002d52: f04f 0801 mov.w r8, #1 + 8002d56: f100 0c02 add.w ip, r0, #2 + 8002d5a: 2b00 cmp r3, #0 + 8002d5c: d05d beq.n 8002e1a <_strtol_l.isra.0+0xfe> + 8002d5e: 2b10 cmp r3, #16 + 8002d60: d10c bne.n 8002d7c <_strtol_l.isra.0+0x60> + 8002d62: 2c30 cmp r4, #48 ; 0x30 + 8002d64: d10a bne.n 8002d7c <_strtol_l.isra.0+0x60> + 8002d66: f89c 0000 ldrb.w r0, [ip] + 8002d6a: f000 00df and.w r0, r0, #223 ; 0xdf + 8002d6e: 2858 cmp r0, #88 ; 0x58 + 8002d70: d14e bne.n 8002e10 <_strtol_l.isra.0+0xf4> + 8002d72: f89c 4001 ldrb.w r4, [ip, #1] + 8002d76: 2310 movs r3, #16 + 8002d78: f10c 0c02 add.w ip, ip, #2 + 8002d7c: f108 4700 add.w r7, r8, #2147483648 ; 0x80000000 + 8002d80: 3f01 subs r7, #1 + 8002d82: 2500 movs r5, #0 + 8002d84: fbb7 f9f3 udiv r9, r7, r3 + 8002d88: 4628 mov r0, r5 + 8002d8a: fb03 7a19 mls sl, r3, r9, r7 + 8002d8e: f1a4 0630 sub.w r6, r4, #48 ; 0x30 + 8002d92: 2e09 cmp r6, #9 + 8002d94: d818 bhi.n 8002dc8 <_strtol_l.isra.0+0xac> + 8002d96: 4634 mov r4, r6 + 8002d98: 42a3 cmp r3, r4 + 8002d9a: dd24 ble.n 8002de6 <_strtol_l.isra.0+0xca> + 8002d9c: 2d00 cmp r5, #0 + 8002d9e: db1f blt.n 8002de0 <_strtol_l.isra.0+0xc4> + 8002da0: 4581 cmp r9, r0 + 8002da2: d31d bcc.n 8002de0 <_strtol_l.isra.0+0xc4> + 8002da4: d101 bne.n 8002daa <_strtol_l.isra.0+0x8e> + 8002da6: 45a2 cmp sl, r4 + 8002da8: db1a blt.n 8002de0 <_strtol_l.isra.0+0xc4> + 8002daa: fb00 4003 mla r0, r0, r3, r4 + 8002dae: 2501 movs r5, #1 + 8002db0: f81c 4b01 ldrb.w r4, [ip], #1 + 8002db4: e7eb b.n 8002d8e <_strtol_l.isra.0+0x72> + 8002db6: 2c2b cmp r4, #43 ; 0x2b + 8002db8: bf08 it eq + 8002dba: f89c 4000 ldrbeq.w r4, [ip] + 8002dbe: 46a8 mov r8, r5 + 8002dc0: bf08 it eq + 8002dc2: f100 0c02 addeq.w ip, r0, #2 + 8002dc6: e7c8 b.n 8002d5a <_strtol_l.isra.0+0x3e> + 8002dc8: f1a4 0641 sub.w r6, r4, #65 ; 0x41 + 8002dcc: 2e19 cmp r6, #25 + 8002dce: d801 bhi.n 8002dd4 <_strtol_l.isra.0+0xb8> + 8002dd0: 3c37 subs r4, #55 ; 0x37 + 8002dd2: e7e1 b.n 8002d98 <_strtol_l.isra.0+0x7c> + 8002dd4: f1a4 0661 sub.w r6, r4, #97 ; 0x61 + 8002dd8: 2e19 cmp r6, #25 + 8002dda: d804 bhi.n 8002de6 <_strtol_l.isra.0+0xca> + 8002ddc: 3c57 subs r4, #87 ; 0x57 + 8002dde: e7db b.n 8002d98 <_strtol_l.isra.0+0x7c> + 8002de0: f04f 35ff mov.w r5, #4294967295 + 8002de4: e7e4 b.n 8002db0 <_strtol_l.isra.0+0x94> + 8002de6: 2d00 cmp r5, #0 + 8002de8: da08 bge.n 8002dfc <_strtol_l.isra.0+0xe0> + 8002dea: 2322 movs r3, #34 ; 0x22 + 8002dec: f8ce 3000 str.w r3, [lr] + 8002df0: 4638 mov r0, r7 + 8002df2: 2a00 cmp r2, #0 + 8002df4: d09e beq.n 8002d34 <_strtol_l.isra.0+0x18> + 8002df6: f10c 31ff add.w r1, ip, #4294967295 + 8002dfa: e007 b.n 8002e0c <_strtol_l.isra.0+0xf0> + 8002dfc: f1b8 0f00 cmp.w r8, #0 + 8002e00: d000 beq.n 8002e04 <_strtol_l.isra.0+0xe8> + 8002e02: 4240 negs r0, r0 + 8002e04: 2a00 cmp r2, #0 + 8002e06: d095 beq.n 8002d34 <_strtol_l.isra.0+0x18> + 8002e08: 2d00 cmp r5, #0 + 8002e0a: d1f4 bne.n 8002df6 <_strtol_l.isra.0+0xda> + 8002e0c: 6011 str r1, [r2, #0] + 8002e0e: e791 b.n 8002d34 <_strtol_l.isra.0+0x18> + 8002e10: 2430 movs r4, #48 ; 0x30 + 8002e12: 2b00 cmp r3, #0 + 8002e14: d1b2 bne.n 8002d7c <_strtol_l.isra.0+0x60> + 8002e16: 2308 movs r3, #8 + 8002e18: e7b0 b.n 8002d7c <_strtol_l.isra.0+0x60> + 8002e1a: 2c30 cmp r4, #48 ; 0x30 + 8002e1c: d0a3 beq.n 8002d66 <_strtol_l.isra.0+0x4a> + 8002e1e: 230a movs r3, #10 + 8002e20: e7ac b.n 8002d7c <_strtol_l.isra.0+0x60> + 8002e22: bf00 nop + 8002e24: 08005eb1 .word 0x08005eb1 + +08002e28 <_strtol_r>: + 8002e28: f7ff bf78 b.w 8002d1c <_strtol_l.isra.0> + +08002e2c : + 8002e2c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8002e30: 6903 ldr r3, [r0, #16] + 8002e32: 690c ldr r4, [r1, #16] + 8002e34: 42a3 cmp r3, r4 + 8002e36: 4607 mov r7, r0 + 8002e38: f2c0 8081 blt.w 8002f3e + 8002e3c: 3c01 subs r4, #1 + 8002e3e: f101 0814 add.w r8, r1, #20 + 8002e42: f100 0514 add.w r5, r0, #20 + 8002e46: eb05 0384 add.w r3, r5, r4, lsl #2 + 8002e4a: 9301 str r3, [sp, #4] + 8002e4c: f858 3024 ldr.w r3, [r8, r4, lsl #2] + 8002e50: f855 2024 ldr.w r2, [r5, r4, lsl #2] + 8002e54: 3301 adds r3, #1 + 8002e56: 429a cmp r2, r3 + 8002e58: ea4f 0b84 mov.w fp, r4, lsl #2 + 8002e5c: eb08 0984 add.w r9, r8, r4, lsl #2 + 8002e60: fbb2 f6f3 udiv r6, r2, r3 + 8002e64: d331 bcc.n 8002eca + 8002e66: f04f 0e00 mov.w lr, #0 + 8002e6a: 4640 mov r0, r8 + 8002e6c: 46ac mov ip, r5 + 8002e6e: 46f2 mov sl, lr + 8002e70: f850 2b04 ldr.w r2, [r0], #4 + 8002e74: b293 uxth r3, r2 + 8002e76: fb06 e303 mla r3, r6, r3, lr + 8002e7a: ea4f 4e13 mov.w lr, r3, lsr #16 + 8002e7e: b29b uxth r3, r3 + 8002e80: ebaa 0303 sub.w r3, sl, r3 + 8002e84: 0c12 lsrs r2, r2, #16 + 8002e86: f8dc a000 ldr.w sl, [ip] + 8002e8a: fb06 e202 mla r2, r6, r2, lr + 8002e8e: fa13 f38a uxtah r3, r3, sl + 8002e92: ea4f 4e12 mov.w lr, r2, lsr #16 + 8002e96: fa1f fa82 uxth.w sl, r2 + 8002e9a: f8dc 2000 ldr.w r2, [ip] + 8002e9e: ebca 4212 rsb r2, sl, r2, lsr #16 + 8002ea2: eb02 4223 add.w r2, r2, r3, asr #16 + 8002ea6: b29b uxth r3, r3 + 8002ea8: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8002eac: 4581 cmp r9, r0 + 8002eae: f84c 3b04 str.w r3, [ip], #4 + 8002eb2: ea4f 4a22 mov.w sl, r2, asr #16 + 8002eb6: d2db bcs.n 8002e70 + 8002eb8: f855 300b ldr.w r3, [r5, fp] + 8002ebc: b92b cbnz r3, 8002eca + 8002ebe: 9b01 ldr r3, [sp, #4] + 8002ec0: 3b04 subs r3, #4 + 8002ec2: 429d cmp r5, r3 + 8002ec4: 461a mov r2, r3 + 8002ec6: d32e bcc.n 8002f26 + 8002ec8: 613c str r4, [r7, #16] + 8002eca: 4638 mov r0, r7 + 8002ecc: f001 ff0e bl 8004cec <__mcmp> + 8002ed0: 2800 cmp r0, #0 + 8002ed2: db24 blt.n 8002f1e + 8002ed4: 3601 adds r6, #1 + 8002ed6: 4628 mov r0, r5 + 8002ed8: f04f 0c00 mov.w ip, #0 + 8002edc: f858 2b04 ldr.w r2, [r8], #4 + 8002ee0: f8d0 e000 ldr.w lr, [r0] + 8002ee4: b293 uxth r3, r2 + 8002ee6: ebac 0303 sub.w r3, ip, r3 + 8002eea: 0c12 lsrs r2, r2, #16 + 8002eec: fa13 f38e uxtah r3, r3, lr + 8002ef0: ebc2 421e rsb r2, r2, lr, lsr #16 + 8002ef4: eb02 4223 add.w r2, r2, r3, asr #16 + 8002ef8: b29b uxth r3, r3 + 8002efa: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8002efe: 45c1 cmp r9, r8 + 8002f00: f840 3b04 str.w r3, [r0], #4 + 8002f04: ea4f 4c22 mov.w ip, r2, asr #16 + 8002f08: d2e8 bcs.n 8002edc + 8002f0a: f855 2024 ldr.w r2, [r5, r4, lsl #2] + 8002f0e: eb05 0384 add.w r3, r5, r4, lsl #2 + 8002f12: b922 cbnz r2, 8002f1e + 8002f14: 3b04 subs r3, #4 + 8002f16: 429d cmp r5, r3 + 8002f18: 461a mov r2, r3 + 8002f1a: d30a bcc.n 8002f32 + 8002f1c: 613c str r4, [r7, #16] + 8002f1e: 4630 mov r0, r6 + 8002f20: b003 add sp, #12 + 8002f22: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8002f26: 6812 ldr r2, [r2, #0] + 8002f28: 3b04 subs r3, #4 + 8002f2a: 2a00 cmp r2, #0 + 8002f2c: d1cc bne.n 8002ec8 + 8002f2e: 3c01 subs r4, #1 + 8002f30: e7c7 b.n 8002ec2 + 8002f32: 6812 ldr r2, [r2, #0] + 8002f34: 3b04 subs r3, #4 + 8002f36: 2a00 cmp r2, #0 + 8002f38: d1f0 bne.n 8002f1c + 8002f3a: 3c01 subs r4, #1 + 8002f3c: e7eb b.n 8002f16 + 8002f3e: 2000 movs r0, #0 + 8002f40: e7ee b.n 8002f20 + 8002f42: 0000 movs r0, r0 + 8002f44: 0000 movs r0, r0 + ... + +08002f48 <_dtoa_r>: + 8002f48: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8002f4c: 6a44 ldr r4, [r0, #36] ; 0x24 + 8002f4e: b099 sub sp, #100 ; 0x64 + 8002f50: 4616 mov r6, r2 + 8002f52: 461f mov r7, r3 + 8002f54: e9cd 6704 strd r6, r7, [sp, #16] + 8002f58: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94 + 8002f5c: 4605 mov r5, r0 + 8002f5e: b974 cbnz r4, 8002f7e <_dtoa_r+0x36> + 8002f60: 2010 movs r0, #16 + 8002f62: f001 fbd5 bl 8004710 + 8002f66: 4602 mov r2, r0 + 8002f68: 6268 str r0, [r5, #36] ; 0x24 + 8002f6a: b920 cbnz r0, 8002f76 <_dtoa_r+0x2e> + 8002f6c: 4ba8 ldr r3, [pc, #672] ; (8003210 <_dtoa_r+0x2c8>) + 8002f6e: 21ea movs r1, #234 ; 0xea + 8002f70: 48a8 ldr r0, [pc, #672] ; (8003214 <_dtoa_r+0x2cc>) + 8002f72: f002 fd8b bl 8005a8c <__assert_func> + 8002f76: e9c0 4401 strd r4, r4, [r0, #4] + 8002f7a: 6004 str r4, [r0, #0] + 8002f7c: 60c4 str r4, [r0, #12] + 8002f7e: 6a6b ldr r3, [r5, #36] ; 0x24 + 8002f80: 6819 ldr r1, [r3, #0] + 8002f82: b151 cbz r1, 8002f9a <_dtoa_r+0x52> + 8002f84: 685a ldr r2, [r3, #4] + 8002f86: 604a str r2, [r1, #4] + 8002f88: 2301 movs r3, #1 + 8002f8a: 4093 lsls r3, r2 + 8002f8c: 608b str r3, [r1, #8] + 8002f8e: 4628 mov r0, r5 + 8002f90: f001 fc26 bl 80047e0 <_Bfree> + 8002f94: 6a6b ldr r3, [r5, #36] ; 0x24 + 8002f96: 2200 movs r2, #0 + 8002f98: 601a str r2, [r3, #0] + 8002f9a: 1e3b subs r3, r7, #0 + 8002f9c: bfb9 ittee lt + 8002f9e: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 + 8002fa2: 9305 strlt r3, [sp, #20] + 8002fa4: 2300 movge r3, #0 + 8002fa6: f8c8 3000 strge.w r3, [r8] + 8002faa: f8dd 9014 ldr.w r9, [sp, #20] + 8002fae: 4b9a ldr r3, [pc, #616] ; (8003218 <_dtoa_r+0x2d0>) + 8002fb0: bfbc itt lt + 8002fb2: 2201 movlt r2, #1 + 8002fb4: f8c8 2000 strlt.w r2, [r8] + 8002fb8: ea33 0309 bics.w r3, r3, r9 + 8002fbc: d119 bne.n 8002ff2 <_dtoa_r+0xaa> + 8002fbe: 9a24 ldr r2, [sp, #144] ; 0x90 + 8002fc0: f242 730f movw r3, #9999 ; 0x270f + 8002fc4: 6013 str r3, [r2, #0] + 8002fc6: f3c9 0313 ubfx r3, r9, #0, #20 + 8002fca: 4333 orrs r3, r6 + 8002fcc: f000 8581 beq.w 8003ad2 <_dtoa_r+0xb8a> + 8002fd0: 9b26 ldr r3, [sp, #152] ; 0x98 + 8002fd2: b953 cbnz r3, 8002fea <_dtoa_r+0xa2> + 8002fd4: 4b91 ldr r3, [pc, #580] ; (800321c <_dtoa_r+0x2d4>) + 8002fd6: e022 b.n 800301e <_dtoa_r+0xd6> + 8002fd8: 4b91 ldr r3, [pc, #580] ; (8003220 <_dtoa_r+0x2d8>) + 8002fda: 9308 str r3, [sp, #32] + 8002fdc: 3308 adds r3, #8 + 8002fde: 9a26 ldr r2, [sp, #152] ; 0x98 + 8002fe0: 6013 str r3, [r2, #0] + 8002fe2: 9808 ldr r0, [sp, #32] + 8002fe4: b019 add sp, #100 ; 0x64 + 8002fe6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8002fea: 4b8c ldr r3, [pc, #560] ; (800321c <_dtoa_r+0x2d4>) + 8002fec: 9308 str r3, [sp, #32] + 8002fee: 3303 adds r3, #3 + 8002ff0: e7f5 b.n 8002fde <_dtoa_r+0x96> + 8002ff2: e9dd 3404 ldrd r3, r4, [sp, #16] + 8002ff6: e9cd 340c strd r3, r4, [sp, #48] ; 0x30 + 8002ffa: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 + 8002ffe: 2200 movs r2, #0 + 8003000: 2300 movs r3, #0 + 8003002: f7fd fd81 bl 8000b08 <__aeabi_dcmpeq> + 8003006: 4680 mov r8, r0 + 8003008: b158 cbz r0, 8003022 <_dtoa_r+0xda> + 800300a: 9a24 ldr r2, [sp, #144] ; 0x90 + 800300c: 2301 movs r3, #1 + 800300e: 6013 str r3, [r2, #0] + 8003010: 9b26 ldr r3, [sp, #152] ; 0x98 + 8003012: 2b00 cmp r3, #0 + 8003014: f000 855a beq.w 8003acc <_dtoa_r+0xb84> + 8003018: 4882 ldr r0, [pc, #520] ; (8003224 <_dtoa_r+0x2dc>) + 800301a: 6018 str r0, [r3, #0] + 800301c: 1e43 subs r3, r0, #1 + 800301e: 9308 str r3, [sp, #32] + 8003020: e7df b.n 8002fe2 <_dtoa_r+0x9a> + 8003022: ab16 add r3, sp, #88 ; 0x58 + 8003024: 9301 str r3, [sp, #4] + 8003026: ab17 add r3, sp, #92 ; 0x5c + 8003028: 9300 str r3, [sp, #0] + 800302a: 4628 mov r0, r5 + 800302c: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30 + 8003030: f001 ff7c bl 8004f2c <__d2b> + 8003034: f3c9 540a ubfx r4, r9, #20, #11 + 8003038: 4682 mov sl, r0 + 800303a: 2c00 cmp r4, #0 + 800303c: d07e beq.n 800313c <_dtoa_r+0x1f4> + 800303e: 9b0d ldr r3, [sp, #52] ; 0x34 + 8003040: f8cd 804c str.w r8, [sp, #76] ; 0x4c + 8003044: f3c3 0313 ubfx r3, r3, #0, #20 + 8003048: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 + 800304c: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 + 8003050: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 + 8003054: f2a4 34ff subw r4, r4, #1023 ; 0x3ff + 8003058: 4b73 ldr r3, [pc, #460] ; (8003228 <_dtoa_r+0x2e0>) + 800305a: 2200 movs r2, #0 + 800305c: f7fd f934 bl 80002c8 <__aeabi_dsub> + 8003060: a365 add r3, pc, #404 ; (adr r3, 80031f8 <_dtoa_r+0x2b0>) + 8003062: e9d3 2300 ldrd r2, r3, [r3] + 8003066: f7fd fae7 bl 8000638 <__aeabi_dmul> + 800306a: a365 add r3, pc, #404 ; (adr r3, 8003200 <_dtoa_r+0x2b8>) + 800306c: e9d3 2300 ldrd r2, r3, [r3] + 8003070: f7fd f92c bl 80002cc <__adddf3> + 8003074: 4606 mov r6, r0 + 8003076: 4620 mov r0, r4 + 8003078: 460f mov r7, r1 + 800307a: f7fd fa73 bl 8000564 <__aeabi_i2d> + 800307e: a362 add r3, pc, #392 ; (adr r3, 8003208 <_dtoa_r+0x2c0>) + 8003080: e9d3 2300 ldrd r2, r3, [r3] + 8003084: f7fd fad8 bl 8000638 <__aeabi_dmul> + 8003088: 4602 mov r2, r0 + 800308a: 460b mov r3, r1 + 800308c: 4630 mov r0, r6 + 800308e: 4639 mov r1, r7 + 8003090: f7fd f91c bl 80002cc <__adddf3> + 8003094: 4606 mov r6, r0 + 8003096: 460f mov r7, r1 + 8003098: f7fd fd7e bl 8000b98 <__aeabi_d2iz> + 800309c: 2200 movs r2, #0 + 800309e: 4681 mov r9, r0 + 80030a0: 2300 movs r3, #0 + 80030a2: 4630 mov r0, r6 + 80030a4: 4639 mov r1, r7 + 80030a6: f7fd fd39 bl 8000b1c <__aeabi_dcmplt> + 80030aa: b148 cbz r0, 80030c0 <_dtoa_r+0x178> + 80030ac: 4648 mov r0, r9 + 80030ae: f7fd fa59 bl 8000564 <__aeabi_i2d> + 80030b2: 4632 mov r2, r6 + 80030b4: 463b mov r3, r7 + 80030b6: f7fd fd27 bl 8000b08 <__aeabi_dcmpeq> + 80030ba: b908 cbnz r0, 80030c0 <_dtoa_r+0x178> + 80030bc: f109 39ff add.w r9, r9, #4294967295 + 80030c0: f1b9 0f16 cmp.w r9, #22 + 80030c4: d857 bhi.n 8003176 <_dtoa_r+0x22e> + 80030c6: 4b59 ldr r3, [pc, #356] ; (800322c <_dtoa_r+0x2e4>) + 80030c8: eb03 03c9 add.w r3, r3, r9, lsl #3 + 80030cc: e9d3 2300 ldrd r2, r3, [r3] + 80030d0: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 + 80030d4: f7fd fd22 bl 8000b1c <__aeabi_dcmplt> + 80030d8: 2800 cmp r0, #0 + 80030da: d04e beq.n 800317a <_dtoa_r+0x232> + 80030dc: f109 39ff add.w r9, r9, #4294967295 + 80030e0: 2300 movs r3, #0 + 80030e2: 930f str r3, [sp, #60] ; 0x3c + 80030e4: 9b16 ldr r3, [sp, #88] ; 0x58 + 80030e6: 1b1c subs r4, r3, r4 + 80030e8: 1e63 subs r3, r4, #1 + 80030ea: 9309 str r3, [sp, #36] ; 0x24 + 80030ec: bf45 ittet mi + 80030ee: f1c4 0301 rsbmi r3, r4, #1 + 80030f2: 9306 strmi r3, [sp, #24] + 80030f4: 2300 movpl r3, #0 + 80030f6: 2300 movmi r3, #0 + 80030f8: bf4c ite mi + 80030fa: 9309 strmi r3, [sp, #36] ; 0x24 + 80030fc: 9306 strpl r3, [sp, #24] + 80030fe: f1b9 0f00 cmp.w r9, #0 + 8003102: db3c blt.n 800317e <_dtoa_r+0x236> + 8003104: 9b09 ldr r3, [sp, #36] ; 0x24 + 8003106: f8cd 9038 str.w r9, [sp, #56] ; 0x38 + 800310a: 444b add r3, r9 + 800310c: 9309 str r3, [sp, #36] ; 0x24 + 800310e: 2300 movs r3, #0 + 8003110: 930a str r3, [sp, #40] ; 0x28 + 8003112: 9b22 ldr r3, [sp, #136] ; 0x88 + 8003114: 2b09 cmp r3, #9 + 8003116: f200 808d bhi.w 8003234 <_dtoa_r+0x2ec> + 800311a: 2b05 cmp r3, #5 + 800311c: bfc4 itt gt + 800311e: 3b04 subgt r3, #4 + 8003120: 9322 strgt r3, [sp, #136] ; 0x88 + 8003122: 9b22 ldr r3, [sp, #136] ; 0x88 + 8003124: f1a3 0302 sub.w r3, r3, #2 + 8003128: bfcc ite gt + 800312a: 2400 movgt r4, #0 + 800312c: 2401 movle r4, #1 + 800312e: 2b03 cmp r3, #3 + 8003130: f200 808c bhi.w 800324c <_dtoa_r+0x304> + 8003134: e8df f003 tbb [pc, r3] + 8003138: 5b4d4f2d .word 0x5b4d4f2d + 800313c: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58 + 8003140: 441c add r4, r3 + 8003142: f204 4332 addw r3, r4, #1074 ; 0x432 + 8003146: 2b20 cmp r3, #32 + 8003148: bfc3 ittte gt + 800314a: f1c3 0340 rsbgt r3, r3, #64 ; 0x40 + 800314e: f204 4012 addwgt r0, r4, #1042 ; 0x412 + 8003152: fa09 f303 lslgt.w r3, r9, r3 + 8003156: f1c3 0320 rsble r3, r3, #32 + 800315a: bfc6 itte gt + 800315c: fa26 f000 lsrgt.w r0, r6, r0 + 8003160: 4318 orrgt r0, r3 + 8003162: fa06 f003 lslle.w r0, r6, r3 + 8003166: f7fd f9ed bl 8000544 <__aeabi_ui2d> + 800316a: 2301 movs r3, #1 + 800316c: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 + 8003170: 3c01 subs r4, #1 + 8003172: 9313 str r3, [sp, #76] ; 0x4c + 8003174: e770 b.n 8003058 <_dtoa_r+0x110> + 8003176: 2301 movs r3, #1 + 8003178: e7b3 b.n 80030e2 <_dtoa_r+0x19a> + 800317a: 900f str r0, [sp, #60] ; 0x3c + 800317c: e7b2 b.n 80030e4 <_dtoa_r+0x19c> + 800317e: 9b06 ldr r3, [sp, #24] + 8003180: eba3 0309 sub.w r3, r3, r9 + 8003184: 9306 str r3, [sp, #24] + 8003186: f1c9 0300 rsb r3, r9, #0 + 800318a: 930a str r3, [sp, #40] ; 0x28 + 800318c: 2300 movs r3, #0 + 800318e: 930e str r3, [sp, #56] ; 0x38 + 8003190: e7bf b.n 8003112 <_dtoa_r+0x1ca> + 8003192: 2300 movs r3, #0 + 8003194: 930b str r3, [sp, #44] ; 0x2c + 8003196: 9b23 ldr r3, [sp, #140] ; 0x8c + 8003198: 2b00 cmp r3, #0 + 800319a: dc5a bgt.n 8003252 <_dtoa_r+0x30a> + 800319c: f04f 0b01 mov.w fp, #1 + 80031a0: f8cd b008 str.w fp, [sp, #8] + 80031a4: 465b mov r3, fp + 80031a6: f8cd b08c str.w fp, [sp, #140] ; 0x8c + 80031aa: 6a68 ldr r0, [r5, #36] ; 0x24 + 80031ac: 2200 movs r2, #0 + 80031ae: 6042 str r2, [r0, #4] + 80031b0: 2204 movs r2, #4 + 80031b2: f102 0614 add.w r6, r2, #20 + 80031b6: 429e cmp r6, r3 + 80031b8: 6841 ldr r1, [r0, #4] + 80031ba: d950 bls.n 800325e <_dtoa_r+0x316> + 80031bc: 4628 mov r0, r5 + 80031be: f001 facf bl 8004760 <_Balloc> + 80031c2: 9008 str r0, [sp, #32] + 80031c4: 2800 cmp r0, #0 + 80031c6: d14e bne.n 8003266 <_dtoa_r+0x31e> + 80031c8: 4b19 ldr r3, [pc, #100] ; (8003230 <_dtoa_r+0x2e8>) + 80031ca: 4602 mov r2, r0 + 80031cc: f44f 71d5 mov.w r1, #426 ; 0x1aa + 80031d0: e6ce b.n 8002f70 <_dtoa_r+0x28> + 80031d2: 2301 movs r3, #1 + 80031d4: e7de b.n 8003194 <_dtoa_r+0x24c> + 80031d6: 2300 movs r3, #0 + 80031d8: 930b str r3, [sp, #44] ; 0x2c + 80031da: 9b23 ldr r3, [sp, #140] ; 0x8c + 80031dc: eb09 0b03 add.w fp, r9, r3 + 80031e0: f10b 0301 add.w r3, fp, #1 + 80031e4: 2b01 cmp r3, #1 + 80031e6: 9302 str r3, [sp, #8] + 80031e8: bfb8 it lt + 80031ea: 2301 movlt r3, #1 + 80031ec: e7dd b.n 80031aa <_dtoa_r+0x262> + 80031ee: 2301 movs r3, #1 + 80031f0: e7f2 b.n 80031d8 <_dtoa_r+0x290> + 80031f2: bf00 nop + 80031f4: f3af 8000 nop.w + 80031f8: 636f4361 .word 0x636f4361 + 80031fc: 3fd287a7 .word 0x3fd287a7 + 8003200: 8b60c8b3 .word 0x8b60c8b3 + 8003204: 3fc68a28 .word 0x3fc68a28 + 8003208: 509f79fb .word 0x509f79fb + 800320c: 3fd34413 .word 0x3fd34413 + 8003210: 08005fbe .word 0x08005fbe + 8003214: 08005fd5 .word 0x08005fd5 + 8003218: 7ff00000 .word 0x7ff00000 + 800321c: 08005fba .word 0x08005fba + 8003220: 08005fb1 .word 0x08005fb1 + 8003224: 08005e31 .word 0x08005e31 + 8003228: 3ff80000 .word 0x3ff80000 + 800322c: 080061b0 .word 0x080061b0 + 8003230: 08006034 .word 0x08006034 + 8003234: 2401 movs r4, #1 + 8003236: 2300 movs r3, #0 + 8003238: 9322 str r3, [sp, #136] ; 0x88 + 800323a: 940b str r4, [sp, #44] ; 0x2c + 800323c: f04f 3bff mov.w fp, #4294967295 + 8003240: 2200 movs r2, #0 + 8003242: f8cd b008 str.w fp, [sp, #8] + 8003246: 2312 movs r3, #18 + 8003248: 9223 str r2, [sp, #140] ; 0x8c + 800324a: e7ae b.n 80031aa <_dtoa_r+0x262> + 800324c: 2301 movs r3, #1 + 800324e: 930b str r3, [sp, #44] ; 0x2c + 8003250: e7f4 b.n 800323c <_dtoa_r+0x2f4> + 8003252: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c + 8003256: f8cd b008 str.w fp, [sp, #8] + 800325a: 465b mov r3, fp + 800325c: e7a5 b.n 80031aa <_dtoa_r+0x262> + 800325e: 3101 adds r1, #1 + 8003260: 6041 str r1, [r0, #4] + 8003262: 0052 lsls r2, r2, #1 + 8003264: e7a5 b.n 80031b2 <_dtoa_r+0x26a> + 8003266: 6a6b ldr r3, [r5, #36] ; 0x24 + 8003268: 9a08 ldr r2, [sp, #32] + 800326a: 601a str r2, [r3, #0] + 800326c: 9b02 ldr r3, [sp, #8] + 800326e: 2b0e cmp r3, #14 + 8003270: f200 80a8 bhi.w 80033c4 <_dtoa_r+0x47c> + 8003274: 2c00 cmp r4, #0 + 8003276: f000 80a5 beq.w 80033c4 <_dtoa_r+0x47c> + 800327a: f1b9 0f00 cmp.w r9, #0 + 800327e: dd34 ble.n 80032ea <_dtoa_r+0x3a2> + 8003280: 4a9a ldr r2, [pc, #616] ; (80034ec <_dtoa_r+0x5a4>) + 8003282: f009 030f and.w r3, r9, #15 + 8003286: eb02 03c3 add.w r3, r2, r3, lsl #3 + 800328a: e9d3 3400 ldrd r3, r4, [r3] + 800328e: f419 7f80 tst.w r9, #256 ; 0x100 + 8003292: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 + 8003296: ea4f 1429 mov.w r4, r9, asr #4 + 800329a: d016 beq.n 80032ca <_dtoa_r+0x382> + 800329c: 4b94 ldr r3, [pc, #592] ; (80034f0 <_dtoa_r+0x5a8>) + 800329e: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 + 80032a2: e9d3 2308 ldrd r2, r3, [r3, #32] + 80032a6: f7fd faf1 bl 800088c <__aeabi_ddiv> + 80032aa: e9cd 0104 strd r0, r1, [sp, #16] + 80032ae: f004 040f and.w r4, r4, #15 + 80032b2: 2703 movs r7, #3 + 80032b4: 4e8e ldr r6, [pc, #568] ; (80034f0 <_dtoa_r+0x5a8>) + 80032b6: b954 cbnz r4, 80032ce <_dtoa_r+0x386> + 80032b8: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 + 80032bc: e9dd 0104 ldrd r0, r1, [sp, #16] + 80032c0: f7fd fae4 bl 800088c <__aeabi_ddiv> + 80032c4: e9cd 0104 strd r0, r1, [sp, #16] + 80032c8: e029 b.n 800331e <_dtoa_r+0x3d6> + 80032ca: 2702 movs r7, #2 + 80032cc: e7f2 b.n 80032b4 <_dtoa_r+0x36c> + 80032ce: 07e1 lsls r1, r4, #31 + 80032d0: d508 bpl.n 80032e4 <_dtoa_r+0x39c> + 80032d2: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 + 80032d6: e9d6 2300 ldrd r2, r3, [r6] + 80032da: f7fd f9ad bl 8000638 <__aeabi_dmul> + 80032de: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 + 80032e2: 3701 adds r7, #1 + 80032e4: 1064 asrs r4, r4, #1 + 80032e6: 3608 adds r6, #8 + 80032e8: e7e5 b.n 80032b6 <_dtoa_r+0x36e> + 80032ea: f000 80a5 beq.w 8003438 <_dtoa_r+0x4f0> + 80032ee: f1c9 0400 rsb r4, r9, #0 + 80032f2: 4b7e ldr r3, [pc, #504] ; (80034ec <_dtoa_r+0x5a4>) + 80032f4: 4e7e ldr r6, [pc, #504] ; (80034f0 <_dtoa_r+0x5a8>) + 80032f6: f004 020f and.w r2, r4, #15 + 80032fa: eb03 03c2 add.w r3, r3, r2, lsl #3 + 80032fe: e9d3 2300 ldrd r2, r3, [r3] + 8003302: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 + 8003306: f7fd f997 bl 8000638 <__aeabi_dmul> + 800330a: e9cd 0104 strd r0, r1, [sp, #16] + 800330e: 1124 asrs r4, r4, #4 + 8003310: 2300 movs r3, #0 + 8003312: 2702 movs r7, #2 + 8003314: 2c00 cmp r4, #0 + 8003316: f040 8084 bne.w 8003422 <_dtoa_r+0x4da> + 800331a: 2b00 cmp r3, #0 + 800331c: d1d2 bne.n 80032c4 <_dtoa_r+0x37c> + 800331e: 9b0f ldr r3, [sp, #60] ; 0x3c + 8003320: 2b00 cmp r3, #0 + 8003322: f000 808b beq.w 800343c <_dtoa_r+0x4f4> + 8003326: e9dd 3404 ldrd r3, r4, [sp, #16] + 800332a: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 + 800332e: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 + 8003332: 4b70 ldr r3, [pc, #448] ; (80034f4 <_dtoa_r+0x5ac>) + 8003334: 2200 movs r2, #0 + 8003336: f7fd fbf1 bl 8000b1c <__aeabi_dcmplt> + 800333a: 2800 cmp r0, #0 + 800333c: d07e beq.n 800343c <_dtoa_r+0x4f4> + 800333e: 9b02 ldr r3, [sp, #8] + 8003340: 2b00 cmp r3, #0 + 8003342: d07b beq.n 800343c <_dtoa_r+0x4f4> + 8003344: f1bb 0f00 cmp.w fp, #0 + 8003348: dd38 ble.n 80033bc <_dtoa_r+0x474> + 800334a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 + 800334e: 4b6a ldr r3, [pc, #424] ; (80034f8 <_dtoa_r+0x5b0>) + 8003350: 2200 movs r2, #0 + 8003352: f7fd f971 bl 8000638 <__aeabi_dmul> + 8003356: e9cd 0104 strd r0, r1, [sp, #16] + 800335a: f109 38ff add.w r8, r9, #4294967295 + 800335e: 3701 adds r7, #1 + 8003360: 465c mov r4, fp + 8003362: 4638 mov r0, r7 + 8003364: f7fd f8fe bl 8000564 <__aeabi_i2d> + 8003368: e9dd 2304 ldrd r2, r3, [sp, #16] + 800336c: f7fd f964 bl 8000638 <__aeabi_dmul> + 8003370: 4b62 ldr r3, [pc, #392] ; (80034fc <_dtoa_r+0x5b4>) + 8003372: 2200 movs r2, #0 + 8003374: f7fc ffaa bl 80002cc <__adddf3> + 8003378: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000 + 800337c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 + 8003380: 9611 str r6, [sp, #68] ; 0x44 + 8003382: 2c00 cmp r4, #0 + 8003384: d15d bne.n 8003442 <_dtoa_r+0x4fa> + 8003386: e9dd 0104 ldrd r0, r1, [sp, #16] + 800338a: 4b5d ldr r3, [pc, #372] ; (8003500 <_dtoa_r+0x5b8>) + 800338c: 2200 movs r2, #0 + 800338e: f7fc ff9b bl 80002c8 <__aeabi_dsub> + 8003392: 4602 mov r2, r0 + 8003394: 460b mov r3, r1 + 8003396: e9cd 2304 strd r2, r3, [sp, #16] + 800339a: 9a10 ldr r2, [sp, #64] ; 0x40 + 800339c: 4633 mov r3, r6 + 800339e: f7fd fbdb bl 8000b58 <__aeabi_dcmpgt> + 80033a2: 2800 cmp r0, #0 + 80033a4: f040 829e bne.w 80038e4 <_dtoa_r+0x99c> + 80033a8: e9dd 0104 ldrd r0, r1, [sp, #16] + 80033ac: 9a10 ldr r2, [sp, #64] ; 0x40 + 80033ae: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000 + 80033b2: f7fd fbb3 bl 8000b1c <__aeabi_dcmplt> + 80033b6: 2800 cmp r0, #0 + 80033b8: f040 8292 bne.w 80038e0 <_dtoa_r+0x998> + 80033bc: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30 + 80033c0: e9cd 3404 strd r3, r4, [sp, #16] + 80033c4: 9b17 ldr r3, [sp, #92] ; 0x5c + 80033c6: 2b00 cmp r3, #0 + 80033c8: f2c0 8153 blt.w 8003672 <_dtoa_r+0x72a> + 80033cc: f1b9 0f0e cmp.w r9, #14 + 80033d0: f300 814f bgt.w 8003672 <_dtoa_r+0x72a> + 80033d4: 4b45 ldr r3, [pc, #276] ; (80034ec <_dtoa_r+0x5a4>) + 80033d6: eb03 03c9 add.w r3, r3, r9, lsl #3 + 80033da: e9d3 3400 ldrd r3, r4, [r3] + 80033de: e9cd 3406 strd r3, r4, [sp, #24] + 80033e2: 9b23 ldr r3, [sp, #140] ; 0x8c + 80033e4: 2b00 cmp r3, #0 + 80033e6: f280 80db bge.w 80035a0 <_dtoa_r+0x658> + 80033ea: 9b02 ldr r3, [sp, #8] + 80033ec: 2b00 cmp r3, #0 + 80033ee: f300 80d7 bgt.w 80035a0 <_dtoa_r+0x658> + 80033f2: f040 8274 bne.w 80038de <_dtoa_r+0x996> + 80033f6: 4b42 ldr r3, [pc, #264] ; (8003500 <_dtoa_r+0x5b8>) + 80033f8: 2200 movs r2, #0 + 80033fa: e9dd 0106 ldrd r0, r1, [sp, #24] + 80033fe: f7fd f91b bl 8000638 <__aeabi_dmul> + 8003402: e9dd 2304 ldrd r2, r3, [sp, #16] + 8003406: f7fd fb9d bl 8000b44 <__aeabi_dcmpge> + 800340a: 9c02 ldr r4, [sp, #8] + 800340c: 4626 mov r6, r4 + 800340e: 2800 cmp r0, #0 + 8003410: f040 824a bne.w 80038a8 <_dtoa_r+0x960> + 8003414: 9f08 ldr r7, [sp, #32] + 8003416: 2331 movs r3, #49 ; 0x31 + 8003418: f807 3b01 strb.w r3, [r7], #1 + 800341c: f109 0901 add.w r9, r9, #1 + 8003420: e246 b.n 80038b0 <_dtoa_r+0x968> + 8003422: 07e2 lsls r2, r4, #31 + 8003424: d505 bpl.n 8003432 <_dtoa_r+0x4ea> + 8003426: e9d6 2300 ldrd r2, r3, [r6] + 800342a: f7fd f905 bl 8000638 <__aeabi_dmul> + 800342e: 3701 adds r7, #1 + 8003430: 2301 movs r3, #1 + 8003432: 1064 asrs r4, r4, #1 + 8003434: 3608 adds r6, #8 + 8003436: e76d b.n 8003314 <_dtoa_r+0x3cc> + 8003438: 2702 movs r7, #2 + 800343a: e770 b.n 800331e <_dtoa_r+0x3d6> + 800343c: 9c02 ldr r4, [sp, #8] + 800343e: 46c8 mov r8, r9 + 8003440: e78f b.n 8003362 <_dtoa_r+0x41a> + 8003442: 9908 ldr r1, [sp, #32] + 8003444: 4b29 ldr r3, [pc, #164] ; (80034ec <_dtoa_r+0x5a4>) + 8003446: 4421 add r1, r4 + 8003448: 9112 str r1, [sp, #72] ; 0x48 + 800344a: 990b ldr r1, [sp, #44] ; 0x2c + 800344c: eb03 03c4 add.w r3, r3, r4, lsl #3 + 8003450: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 + 8003454: e953 2302 ldrd r2, r3, [r3, #-8] + 8003458: 2900 cmp r1, #0 + 800345a: d055 beq.n 8003508 <_dtoa_r+0x5c0> + 800345c: 4929 ldr r1, [pc, #164] ; (8003504 <_dtoa_r+0x5bc>) + 800345e: 2000 movs r0, #0 + 8003460: f7fd fa14 bl 800088c <__aeabi_ddiv> + 8003464: 463b mov r3, r7 + 8003466: 4632 mov r2, r6 + 8003468: f7fc ff2e bl 80002c8 <__aeabi_dsub> + 800346c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 + 8003470: 9f08 ldr r7, [sp, #32] + 8003472: e9dd 0104 ldrd r0, r1, [sp, #16] + 8003476: f7fd fb8f bl 8000b98 <__aeabi_d2iz> + 800347a: 4604 mov r4, r0 + 800347c: f7fd f872 bl 8000564 <__aeabi_i2d> + 8003480: 4602 mov r2, r0 + 8003482: 460b mov r3, r1 + 8003484: e9dd 0104 ldrd r0, r1, [sp, #16] + 8003488: f7fc ff1e bl 80002c8 <__aeabi_dsub> + 800348c: 3430 adds r4, #48 ; 0x30 + 800348e: 4602 mov r2, r0 + 8003490: 460b mov r3, r1 + 8003492: e9cd 2304 strd r2, r3, [sp, #16] + 8003496: f807 4b01 strb.w r4, [r7], #1 + 800349a: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 + 800349e: f7fd fb3d bl 8000b1c <__aeabi_dcmplt> + 80034a2: 2800 cmp r0, #0 + 80034a4: d174 bne.n 8003590 <_dtoa_r+0x648> + 80034a6: e9dd 2304 ldrd r2, r3, [sp, #16] + 80034aa: 4912 ldr r1, [pc, #72] ; (80034f4 <_dtoa_r+0x5ac>) + 80034ac: 2000 movs r0, #0 + 80034ae: f7fc ff0b bl 80002c8 <__aeabi_dsub> + 80034b2: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 + 80034b6: f7fd fb31 bl 8000b1c <__aeabi_dcmplt> + 80034ba: 2800 cmp r0, #0 + 80034bc: f040 80b6 bne.w 800362c <_dtoa_r+0x6e4> + 80034c0: 9b12 ldr r3, [sp, #72] ; 0x48 + 80034c2: 429f cmp r7, r3 + 80034c4: f43f af7a beq.w 80033bc <_dtoa_r+0x474> + 80034c8: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 + 80034cc: 4b0a ldr r3, [pc, #40] ; (80034f8 <_dtoa_r+0x5b0>) + 80034ce: 2200 movs r2, #0 + 80034d0: f7fd f8b2 bl 8000638 <__aeabi_dmul> + 80034d4: 4b08 ldr r3, [pc, #32] ; (80034f8 <_dtoa_r+0x5b0>) + 80034d6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 + 80034da: 2200 movs r2, #0 + 80034dc: e9dd 0104 ldrd r0, r1, [sp, #16] + 80034e0: f7fd f8aa bl 8000638 <__aeabi_dmul> + 80034e4: e9cd 0104 strd r0, r1, [sp, #16] + 80034e8: e7c3 b.n 8003472 <_dtoa_r+0x52a> + 80034ea: bf00 nop + 80034ec: 080061b0 .word 0x080061b0 + 80034f0: 08006188 .word 0x08006188 + 80034f4: 3ff00000 .word 0x3ff00000 + 80034f8: 40240000 .word 0x40240000 + 80034fc: 401c0000 .word 0x401c0000 + 8003500: 40140000 .word 0x40140000 + 8003504: 3fe00000 .word 0x3fe00000 + 8003508: 4630 mov r0, r6 + 800350a: 4639 mov r1, r7 + 800350c: f7fd f894 bl 8000638 <__aeabi_dmul> + 8003510: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 + 8003514: 9b12 ldr r3, [sp, #72] ; 0x48 + 8003516: 9c08 ldr r4, [sp, #32] + 8003518: 9314 str r3, [sp, #80] ; 0x50 + 800351a: e9dd 0104 ldrd r0, r1, [sp, #16] + 800351e: f7fd fb3b bl 8000b98 <__aeabi_d2iz> + 8003522: 9015 str r0, [sp, #84] ; 0x54 + 8003524: f7fd f81e bl 8000564 <__aeabi_i2d> + 8003528: 4602 mov r2, r0 + 800352a: 460b mov r3, r1 + 800352c: e9dd 0104 ldrd r0, r1, [sp, #16] + 8003530: f7fc feca bl 80002c8 <__aeabi_dsub> + 8003534: 9b15 ldr r3, [sp, #84] ; 0x54 + 8003536: 3330 adds r3, #48 ; 0x30 + 8003538: f804 3b01 strb.w r3, [r4], #1 + 800353c: 9b12 ldr r3, [sp, #72] ; 0x48 + 800353e: 429c cmp r4, r3 + 8003540: 4606 mov r6, r0 + 8003542: 460f mov r7, r1 + 8003544: f04f 0200 mov.w r2, #0 + 8003548: d124 bne.n 8003594 <_dtoa_r+0x64c> + 800354a: 4bb2 ldr r3, [pc, #712] ; (8003814 <_dtoa_r+0x8cc>) + 800354c: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 + 8003550: f7fc febc bl 80002cc <__adddf3> + 8003554: 4602 mov r2, r0 + 8003556: 460b mov r3, r1 + 8003558: 4630 mov r0, r6 + 800355a: 4639 mov r1, r7 + 800355c: f7fd fafc bl 8000b58 <__aeabi_dcmpgt> + 8003560: 2800 cmp r0, #0 + 8003562: d162 bne.n 800362a <_dtoa_r+0x6e2> + 8003564: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 + 8003568: 49aa ldr r1, [pc, #680] ; (8003814 <_dtoa_r+0x8cc>) + 800356a: 2000 movs r0, #0 + 800356c: f7fc feac bl 80002c8 <__aeabi_dsub> + 8003570: 4602 mov r2, r0 + 8003572: 460b mov r3, r1 + 8003574: 4630 mov r0, r6 + 8003576: 4639 mov r1, r7 + 8003578: f7fd fad0 bl 8000b1c <__aeabi_dcmplt> + 800357c: 2800 cmp r0, #0 + 800357e: f43f af1d beq.w 80033bc <_dtoa_r+0x474> + 8003582: 9f14 ldr r7, [sp, #80] ; 0x50 + 8003584: 1e7b subs r3, r7, #1 + 8003586: 9314 str r3, [sp, #80] ; 0x50 + 8003588: f817 3c01 ldrb.w r3, [r7, #-1] + 800358c: 2b30 cmp r3, #48 ; 0x30 + 800358e: d0f8 beq.n 8003582 <_dtoa_r+0x63a> + 8003590: 46c1 mov r9, r8 + 8003592: e03a b.n 800360a <_dtoa_r+0x6c2> + 8003594: 4ba0 ldr r3, [pc, #640] ; (8003818 <_dtoa_r+0x8d0>) + 8003596: f7fd f84f bl 8000638 <__aeabi_dmul> + 800359a: e9cd 0104 strd r0, r1, [sp, #16] + 800359e: e7bc b.n 800351a <_dtoa_r+0x5d2> + 80035a0: 9f08 ldr r7, [sp, #32] + 80035a2: e9dd 2306 ldrd r2, r3, [sp, #24] + 80035a6: e9dd 0104 ldrd r0, r1, [sp, #16] + 80035aa: f7fd f96f bl 800088c <__aeabi_ddiv> + 80035ae: f7fd faf3 bl 8000b98 <__aeabi_d2iz> + 80035b2: 4604 mov r4, r0 + 80035b4: f7fc ffd6 bl 8000564 <__aeabi_i2d> + 80035b8: e9dd 2306 ldrd r2, r3, [sp, #24] + 80035bc: f7fd f83c bl 8000638 <__aeabi_dmul> + 80035c0: f104 0630 add.w r6, r4, #48 ; 0x30 + 80035c4: 460b mov r3, r1 + 80035c6: 4602 mov r2, r0 + 80035c8: e9dd 0104 ldrd r0, r1, [sp, #16] + 80035cc: f7fc fe7c bl 80002c8 <__aeabi_dsub> + 80035d0: f807 6b01 strb.w r6, [r7], #1 + 80035d4: 9e08 ldr r6, [sp, #32] + 80035d6: 9b02 ldr r3, [sp, #8] + 80035d8: 1bbe subs r6, r7, r6 + 80035da: 42b3 cmp r3, r6 + 80035dc: d13a bne.n 8003654 <_dtoa_r+0x70c> + 80035de: 4602 mov r2, r0 + 80035e0: 460b mov r3, r1 + 80035e2: f7fc fe73 bl 80002cc <__adddf3> + 80035e6: 4602 mov r2, r0 + 80035e8: 460b mov r3, r1 + 80035ea: e9cd 2302 strd r2, r3, [sp, #8] + 80035ee: e9dd 2306 ldrd r2, r3, [sp, #24] + 80035f2: f7fd fab1 bl 8000b58 <__aeabi_dcmpgt> + 80035f6: bb58 cbnz r0, 8003650 <_dtoa_r+0x708> + 80035f8: e9dd 2306 ldrd r2, r3, [sp, #24] + 80035fc: e9dd 0102 ldrd r0, r1, [sp, #8] + 8003600: f7fd fa82 bl 8000b08 <__aeabi_dcmpeq> + 8003604: b108 cbz r0, 800360a <_dtoa_r+0x6c2> + 8003606: 07e1 lsls r1, r4, #31 + 8003608: d422 bmi.n 8003650 <_dtoa_r+0x708> + 800360a: 4628 mov r0, r5 + 800360c: 4651 mov r1, sl + 800360e: f001 f8e7 bl 80047e0 <_Bfree> + 8003612: 2300 movs r3, #0 + 8003614: 703b strb r3, [r7, #0] + 8003616: 9b24 ldr r3, [sp, #144] ; 0x90 + 8003618: f109 0001 add.w r0, r9, #1 + 800361c: 6018 str r0, [r3, #0] + 800361e: 9b26 ldr r3, [sp, #152] ; 0x98 + 8003620: 2b00 cmp r3, #0 + 8003622: f43f acde beq.w 8002fe2 <_dtoa_r+0x9a> + 8003626: 601f str r7, [r3, #0] + 8003628: e4db b.n 8002fe2 <_dtoa_r+0x9a> + 800362a: 4627 mov r7, r4 + 800362c: 463b mov r3, r7 + 800362e: 461f mov r7, r3 + 8003630: f813 2d01 ldrb.w r2, [r3, #-1]! + 8003634: 2a39 cmp r2, #57 ; 0x39 + 8003636: d107 bne.n 8003648 <_dtoa_r+0x700> + 8003638: 9a08 ldr r2, [sp, #32] + 800363a: 429a cmp r2, r3 + 800363c: d1f7 bne.n 800362e <_dtoa_r+0x6e6> + 800363e: 9908 ldr r1, [sp, #32] + 8003640: 2230 movs r2, #48 ; 0x30 + 8003642: f108 0801 add.w r8, r8, #1 + 8003646: 700a strb r2, [r1, #0] + 8003648: 781a ldrb r2, [r3, #0] + 800364a: 3201 adds r2, #1 + 800364c: 701a strb r2, [r3, #0] + 800364e: e79f b.n 8003590 <_dtoa_r+0x648> + 8003650: 46c8 mov r8, r9 + 8003652: e7eb b.n 800362c <_dtoa_r+0x6e4> + 8003654: 4b70 ldr r3, [pc, #448] ; (8003818 <_dtoa_r+0x8d0>) + 8003656: 2200 movs r2, #0 + 8003658: f7fc ffee bl 8000638 <__aeabi_dmul> + 800365c: 4602 mov r2, r0 + 800365e: 460b mov r3, r1 + 8003660: e9cd 2304 strd r2, r3, [sp, #16] + 8003664: 2200 movs r2, #0 + 8003666: 2300 movs r3, #0 + 8003668: f7fd fa4e bl 8000b08 <__aeabi_dcmpeq> + 800366c: 2800 cmp r0, #0 + 800366e: d098 beq.n 80035a2 <_dtoa_r+0x65a> + 8003670: e7cb b.n 800360a <_dtoa_r+0x6c2> + 8003672: 9a0b ldr r2, [sp, #44] ; 0x2c + 8003674: 2a00 cmp r2, #0 + 8003676: f000 80d1 beq.w 800381c <_dtoa_r+0x8d4> + 800367a: 9a22 ldr r2, [sp, #136] ; 0x88 + 800367c: 2a01 cmp r2, #1 + 800367e: f300 80af bgt.w 80037e0 <_dtoa_r+0x898> + 8003682: 9a13 ldr r2, [sp, #76] ; 0x4c + 8003684: 2a00 cmp r2, #0 + 8003686: f000 80a7 beq.w 80037d8 <_dtoa_r+0x890> + 800368a: f203 4333 addw r3, r3, #1075 ; 0x433 + 800368e: 9c0a ldr r4, [sp, #40] ; 0x28 + 8003690: 9f06 ldr r7, [sp, #24] + 8003692: 9a06 ldr r2, [sp, #24] + 8003694: 441a add r2, r3 + 8003696: 9206 str r2, [sp, #24] + 8003698: 9a09 ldr r2, [sp, #36] ; 0x24 + 800369a: 2101 movs r1, #1 + 800369c: 441a add r2, r3 + 800369e: 4628 mov r0, r5 + 80036a0: 9209 str r2, [sp, #36] ; 0x24 + 80036a2: f001 f9a1 bl 80049e8 <__i2b> + 80036a6: 4606 mov r6, r0 + 80036a8: 2f00 cmp r7, #0 + 80036aa: dd0c ble.n 80036c6 <_dtoa_r+0x77e> + 80036ac: 9b09 ldr r3, [sp, #36] ; 0x24 + 80036ae: 2b00 cmp r3, #0 + 80036b0: dd09 ble.n 80036c6 <_dtoa_r+0x77e> + 80036b2: 42bb cmp r3, r7 + 80036b4: 9a06 ldr r2, [sp, #24] + 80036b6: bfa8 it ge + 80036b8: 463b movge r3, r7 + 80036ba: 1ad2 subs r2, r2, r3 + 80036bc: 9206 str r2, [sp, #24] + 80036be: 9a09 ldr r2, [sp, #36] ; 0x24 + 80036c0: 1aff subs r7, r7, r3 + 80036c2: 1ad3 subs r3, r2, r3 + 80036c4: 9309 str r3, [sp, #36] ; 0x24 + 80036c6: 9b0a ldr r3, [sp, #40] ; 0x28 + 80036c8: b1f3 cbz r3, 8003708 <_dtoa_r+0x7c0> + 80036ca: 9b0b ldr r3, [sp, #44] ; 0x2c + 80036cc: 2b00 cmp r3, #0 + 80036ce: f000 80a9 beq.w 8003824 <_dtoa_r+0x8dc> + 80036d2: 2c00 cmp r4, #0 + 80036d4: dd10 ble.n 80036f8 <_dtoa_r+0x7b0> + 80036d6: 4631 mov r1, r6 + 80036d8: 4622 mov r2, r4 + 80036da: 4628 mov r0, r5 + 80036dc: f001 fa40 bl 8004b60 <__pow5mult> + 80036e0: 4652 mov r2, sl + 80036e2: 4601 mov r1, r0 + 80036e4: 4606 mov r6, r0 + 80036e6: 4628 mov r0, r5 + 80036e8: f001 f994 bl 8004a14 <__multiply> + 80036ec: 4651 mov r1, sl + 80036ee: 4680 mov r8, r0 + 80036f0: 4628 mov r0, r5 + 80036f2: f001 f875 bl 80047e0 <_Bfree> + 80036f6: 46c2 mov sl, r8 + 80036f8: 9b0a ldr r3, [sp, #40] ; 0x28 + 80036fa: 1b1a subs r2, r3, r4 + 80036fc: d004 beq.n 8003708 <_dtoa_r+0x7c0> + 80036fe: 4651 mov r1, sl + 8003700: 4628 mov r0, r5 + 8003702: f001 fa2d bl 8004b60 <__pow5mult> + 8003706: 4682 mov sl, r0 + 8003708: 2101 movs r1, #1 + 800370a: 4628 mov r0, r5 + 800370c: f001 f96c bl 80049e8 <__i2b> + 8003710: 9b0e ldr r3, [sp, #56] ; 0x38 + 8003712: 2b00 cmp r3, #0 + 8003714: 4604 mov r4, r0 + 8003716: f340 8087 ble.w 8003828 <_dtoa_r+0x8e0> + 800371a: 461a mov r2, r3 + 800371c: 4601 mov r1, r0 + 800371e: 4628 mov r0, r5 + 8003720: f001 fa1e bl 8004b60 <__pow5mult> + 8003724: 9b22 ldr r3, [sp, #136] ; 0x88 + 8003726: 2b01 cmp r3, #1 + 8003728: 4604 mov r4, r0 + 800372a: f340 8080 ble.w 800382e <_dtoa_r+0x8e6> + 800372e: f04f 0800 mov.w r8, #0 + 8003732: 6923 ldr r3, [r4, #16] + 8003734: eb04 0383 add.w r3, r4, r3, lsl #2 + 8003738: 6918 ldr r0, [r3, #16] + 800373a: f001 f907 bl 800494c <__hi0bits> + 800373e: f1c0 0020 rsb r0, r0, #32 + 8003742: 9b09 ldr r3, [sp, #36] ; 0x24 + 8003744: 4418 add r0, r3 + 8003746: f010 001f ands.w r0, r0, #31 + 800374a: f000 8092 beq.w 8003872 <_dtoa_r+0x92a> + 800374e: f1c0 0320 rsb r3, r0, #32 + 8003752: 2b04 cmp r3, #4 + 8003754: f340 808a ble.w 800386c <_dtoa_r+0x924> + 8003758: f1c0 001c rsb r0, r0, #28 + 800375c: 9b06 ldr r3, [sp, #24] + 800375e: 4403 add r3, r0 + 8003760: 9306 str r3, [sp, #24] + 8003762: 9b09 ldr r3, [sp, #36] ; 0x24 + 8003764: 4403 add r3, r0 + 8003766: 4407 add r7, r0 + 8003768: 9309 str r3, [sp, #36] ; 0x24 + 800376a: 9b06 ldr r3, [sp, #24] + 800376c: 2b00 cmp r3, #0 + 800376e: dd05 ble.n 800377c <_dtoa_r+0x834> + 8003770: 4651 mov r1, sl + 8003772: 461a mov r2, r3 + 8003774: 4628 mov r0, r5 + 8003776: f001 fa4d bl 8004c14 <__lshift> + 800377a: 4682 mov sl, r0 + 800377c: 9b09 ldr r3, [sp, #36] ; 0x24 + 800377e: 2b00 cmp r3, #0 + 8003780: dd05 ble.n 800378e <_dtoa_r+0x846> + 8003782: 4621 mov r1, r4 + 8003784: 461a mov r2, r3 + 8003786: 4628 mov r0, r5 + 8003788: f001 fa44 bl 8004c14 <__lshift> + 800378c: 4604 mov r4, r0 + 800378e: 9b0f ldr r3, [sp, #60] ; 0x3c + 8003790: 2b00 cmp r3, #0 + 8003792: d070 beq.n 8003876 <_dtoa_r+0x92e> + 8003794: 4621 mov r1, r4 + 8003796: 4650 mov r0, sl + 8003798: f001 faa8 bl 8004cec <__mcmp> + 800379c: 2800 cmp r0, #0 + 800379e: da6a bge.n 8003876 <_dtoa_r+0x92e> + 80037a0: 2300 movs r3, #0 + 80037a2: 4651 mov r1, sl + 80037a4: 220a movs r2, #10 + 80037a6: 4628 mov r0, r5 + 80037a8: f001 f83c bl 8004824 <__multadd> + 80037ac: 9b0b ldr r3, [sp, #44] ; 0x2c + 80037ae: f109 39ff add.w r9, r9, #4294967295 + 80037b2: 4682 mov sl, r0 + 80037b4: 2b00 cmp r3, #0 + 80037b6: f000 8193 beq.w 8003ae0 <_dtoa_r+0xb98> + 80037ba: 4631 mov r1, r6 + 80037bc: 2300 movs r3, #0 + 80037be: 220a movs r2, #10 + 80037c0: 4628 mov r0, r5 + 80037c2: f001 f82f bl 8004824 <__multadd> + 80037c6: f1bb 0f00 cmp.w fp, #0 + 80037ca: 4606 mov r6, r0 + 80037cc: f300 8093 bgt.w 80038f6 <_dtoa_r+0x9ae> + 80037d0: 9b22 ldr r3, [sp, #136] ; 0x88 + 80037d2: 2b02 cmp r3, #2 + 80037d4: dc57 bgt.n 8003886 <_dtoa_r+0x93e> + 80037d6: e08e b.n 80038f6 <_dtoa_r+0x9ae> + 80037d8: 9b16 ldr r3, [sp, #88] ; 0x58 + 80037da: f1c3 0336 rsb r3, r3, #54 ; 0x36 + 80037de: e756 b.n 800368e <_dtoa_r+0x746> + 80037e0: 9b02 ldr r3, [sp, #8] + 80037e2: 1e5c subs r4, r3, #1 + 80037e4: 9b0a ldr r3, [sp, #40] ; 0x28 + 80037e6: 42a3 cmp r3, r4 + 80037e8: bfbf itttt lt + 80037ea: 9b0a ldrlt r3, [sp, #40] ; 0x28 + 80037ec: 940a strlt r4, [sp, #40] ; 0x28 + 80037ee: 1ae2 sublt r2, r4, r3 + 80037f0: 9b0e ldrlt r3, [sp, #56] ; 0x38 + 80037f2: bfb6 itet lt + 80037f4: 189b addlt r3, r3, r2 + 80037f6: 1b1c subge r4, r3, r4 + 80037f8: 930e strlt r3, [sp, #56] ; 0x38 + 80037fa: 9b02 ldr r3, [sp, #8] + 80037fc: bfb8 it lt + 80037fe: 2400 movlt r4, #0 + 8003800: 2b00 cmp r3, #0 + 8003802: bfb9 ittee lt + 8003804: 9b06 ldrlt r3, [sp, #24] + 8003806: 9a02 ldrlt r2, [sp, #8] + 8003808: 9f06 ldrge r7, [sp, #24] + 800380a: 9b02 ldrge r3, [sp, #8] + 800380c: bfbc itt lt + 800380e: 1a9f sublt r7, r3, r2 + 8003810: 2300 movlt r3, #0 + 8003812: e73e b.n 8003692 <_dtoa_r+0x74a> + 8003814: 3fe00000 .word 0x3fe00000 + 8003818: 40240000 .word 0x40240000 + 800381c: 9c0a ldr r4, [sp, #40] ; 0x28 + 800381e: 9f06 ldr r7, [sp, #24] + 8003820: 9e0b ldr r6, [sp, #44] ; 0x2c + 8003822: e741 b.n 80036a8 <_dtoa_r+0x760> + 8003824: 9a0a ldr r2, [sp, #40] ; 0x28 + 8003826: e76a b.n 80036fe <_dtoa_r+0x7b6> + 8003828: 9b22 ldr r3, [sp, #136] ; 0x88 + 800382a: 2b01 cmp r3, #1 + 800382c: dc19 bgt.n 8003862 <_dtoa_r+0x91a> + 800382e: 9b04 ldr r3, [sp, #16] + 8003830: b9bb cbnz r3, 8003862 <_dtoa_r+0x91a> + 8003832: 9b05 ldr r3, [sp, #20] + 8003834: f3c3 0313 ubfx r3, r3, #0, #20 + 8003838: b99b cbnz r3, 8003862 <_dtoa_r+0x91a> + 800383a: 9b05 ldr r3, [sp, #20] + 800383c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 + 8003840: 0d1b lsrs r3, r3, #20 + 8003842: 051b lsls r3, r3, #20 + 8003844: b183 cbz r3, 8003868 <_dtoa_r+0x920> + 8003846: 9b06 ldr r3, [sp, #24] + 8003848: 3301 adds r3, #1 + 800384a: 9306 str r3, [sp, #24] + 800384c: 9b09 ldr r3, [sp, #36] ; 0x24 + 800384e: 3301 adds r3, #1 + 8003850: 9309 str r3, [sp, #36] ; 0x24 + 8003852: f04f 0801 mov.w r8, #1 + 8003856: 9b0e ldr r3, [sp, #56] ; 0x38 + 8003858: 2b00 cmp r3, #0 + 800385a: f47f af6a bne.w 8003732 <_dtoa_r+0x7ea> + 800385e: 2001 movs r0, #1 + 8003860: e76f b.n 8003742 <_dtoa_r+0x7fa> + 8003862: f04f 0800 mov.w r8, #0 + 8003866: e7f6 b.n 8003856 <_dtoa_r+0x90e> + 8003868: 4698 mov r8, r3 + 800386a: e7f4 b.n 8003856 <_dtoa_r+0x90e> + 800386c: f43f af7d beq.w 800376a <_dtoa_r+0x822> + 8003870: 4618 mov r0, r3 + 8003872: 301c adds r0, #28 + 8003874: e772 b.n 800375c <_dtoa_r+0x814> + 8003876: 9b02 ldr r3, [sp, #8] + 8003878: 2b00 cmp r3, #0 + 800387a: dc36 bgt.n 80038ea <_dtoa_r+0x9a2> + 800387c: 9b22 ldr r3, [sp, #136] ; 0x88 + 800387e: 2b02 cmp r3, #2 + 8003880: dd33 ble.n 80038ea <_dtoa_r+0x9a2> + 8003882: f8dd b008 ldr.w fp, [sp, #8] + 8003886: f1bb 0f00 cmp.w fp, #0 + 800388a: d10d bne.n 80038a8 <_dtoa_r+0x960> + 800388c: 4621 mov r1, r4 + 800388e: 465b mov r3, fp + 8003890: 2205 movs r2, #5 + 8003892: 4628 mov r0, r5 + 8003894: f000 ffc6 bl 8004824 <__multadd> + 8003898: 4601 mov r1, r0 + 800389a: 4604 mov r4, r0 + 800389c: 4650 mov r0, sl + 800389e: f001 fa25 bl 8004cec <__mcmp> + 80038a2: 2800 cmp r0, #0 + 80038a4: f73f adb6 bgt.w 8003414 <_dtoa_r+0x4cc> + 80038a8: 9b23 ldr r3, [sp, #140] ; 0x8c + 80038aa: 9f08 ldr r7, [sp, #32] + 80038ac: ea6f 0903 mvn.w r9, r3 + 80038b0: f04f 0800 mov.w r8, #0 + 80038b4: 4621 mov r1, r4 + 80038b6: 4628 mov r0, r5 + 80038b8: f000 ff92 bl 80047e0 <_Bfree> + 80038bc: 2e00 cmp r6, #0 + 80038be: f43f aea4 beq.w 800360a <_dtoa_r+0x6c2> + 80038c2: f1b8 0f00 cmp.w r8, #0 + 80038c6: d005 beq.n 80038d4 <_dtoa_r+0x98c> + 80038c8: 45b0 cmp r8, r6 + 80038ca: d003 beq.n 80038d4 <_dtoa_r+0x98c> + 80038cc: 4641 mov r1, r8 + 80038ce: 4628 mov r0, r5 + 80038d0: f000 ff86 bl 80047e0 <_Bfree> + 80038d4: 4631 mov r1, r6 + 80038d6: 4628 mov r0, r5 + 80038d8: f000 ff82 bl 80047e0 <_Bfree> + 80038dc: e695 b.n 800360a <_dtoa_r+0x6c2> + 80038de: 2400 movs r4, #0 + 80038e0: 4626 mov r6, r4 + 80038e2: e7e1 b.n 80038a8 <_dtoa_r+0x960> + 80038e4: 46c1 mov r9, r8 + 80038e6: 4626 mov r6, r4 + 80038e8: e594 b.n 8003414 <_dtoa_r+0x4cc> + 80038ea: 9b0b ldr r3, [sp, #44] ; 0x2c + 80038ec: f8dd b008 ldr.w fp, [sp, #8] + 80038f0: 2b00 cmp r3, #0 + 80038f2: f000 80fc beq.w 8003aee <_dtoa_r+0xba6> + 80038f6: 2f00 cmp r7, #0 + 80038f8: dd05 ble.n 8003906 <_dtoa_r+0x9be> + 80038fa: 4631 mov r1, r6 + 80038fc: 463a mov r2, r7 + 80038fe: 4628 mov r0, r5 + 8003900: f001 f988 bl 8004c14 <__lshift> + 8003904: 4606 mov r6, r0 + 8003906: f1b8 0f00 cmp.w r8, #0 + 800390a: d05c beq.n 80039c6 <_dtoa_r+0xa7e> + 800390c: 6871 ldr r1, [r6, #4] + 800390e: 4628 mov r0, r5 + 8003910: f000 ff26 bl 8004760 <_Balloc> + 8003914: 4607 mov r7, r0 + 8003916: b928 cbnz r0, 8003924 <_dtoa_r+0x9dc> + 8003918: 4b7f ldr r3, [pc, #508] ; (8003b18 <_dtoa_r+0xbd0>) + 800391a: 4602 mov r2, r0 + 800391c: f240 21ea movw r1, #746 ; 0x2ea + 8003920: f7ff bb26 b.w 8002f70 <_dtoa_r+0x28> + 8003924: 6932 ldr r2, [r6, #16] + 8003926: 3202 adds r2, #2 + 8003928: 0092 lsls r2, r2, #2 + 800392a: f106 010c add.w r1, r6, #12 + 800392e: 300c adds r0, #12 + 8003930: f000 ff08 bl 8004744 + 8003934: 2201 movs r2, #1 + 8003936: 4639 mov r1, r7 + 8003938: 4628 mov r0, r5 + 800393a: f001 f96b bl 8004c14 <__lshift> + 800393e: 9b08 ldr r3, [sp, #32] + 8003940: 3301 adds r3, #1 + 8003942: 9302 str r3, [sp, #8] + 8003944: 9b08 ldr r3, [sp, #32] + 8003946: 445b add r3, fp + 8003948: 930a str r3, [sp, #40] ; 0x28 + 800394a: 9b04 ldr r3, [sp, #16] + 800394c: f003 0301 and.w r3, r3, #1 + 8003950: 46b0 mov r8, r6 + 8003952: 9309 str r3, [sp, #36] ; 0x24 + 8003954: 4606 mov r6, r0 + 8003956: 9b02 ldr r3, [sp, #8] + 8003958: 4621 mov r1, r4 + 800395a: 4650 mov r0, sl + 800395c: f103 3bff add.w fp, r3, #4294967295 + 8003960: f7ff fa64 bl 8002e2c + 8003964: 4603 mov r3, r0 + 8003966: 3330 adds r3, #48 ; 0x30 + 8003968: 9004 str r0, [sp, #16] + 800396a: 4641 mov r1, r8 + 800396c: 4650 mov r0, sl + 800396e: 930b str r3, [sp, #44] ; 0x2c + 8003970: f001 f9bc bl 8004cec <__mcmp> + 8003974: 4632 mov r2, r6 + 8003976: 9006 str r0, [sp, #24] + 8003978: 4621 mov r1, r4 + 800397a: 4628 mov r0, r5 + 800397c: f001 f9d2 bl 8004d24 <__mdiff> + 8003980: 68c2 ldr r2, [r0, #12] + 8003982: 9b0b ldr r3, [sp, #44] ; 0x2c + 8003984: 4607 mov r7, r0 + 8003986: bb02 cbnz r2, 80039ca <_dtoa_r+0xa82> + 8003988: 4601 mov r1, r0 + 800398a: 4650 mov r0, sl + 800398c: f001 f9ae bl 8004cec <__mcmp> + 8003990: 9b0b ldr r3, [sp, #44] ; 0x2c + 8003992: 4602 mov r2, r0 + 8003994: 4639 mov r1, r7 + 8003996: 4628 mov r0, r5 + 8003998: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c + 800399c: f000 ff20 bl 80047e0 <_Bfree> + 80039a0: 9b22 ldr r3, [sp, #136] ; 0x88 + 80039a2: 9a0c ldr r2, [sp, #48] ; 0x30 + 80039a4: 9f02 ldr r7, [sp, #8] + 80039a6: ea43 0102 orr.w r1, r3, r2 + 80039aa: 9b09 ldr r3, [sp, #36] ; 0x24 + 80039ac: 430b orrs r3, r1 + 80039ae: 9b0b ldr r3, [sp, #44] ; 0x2c + 80039b0: d10d bne.n 80039ce <_dtoa_r+0xa86> + 80039b2: 2b39 cmp r3, #57 ; 0x39 + 80039b4: d027 beq.n 8003a06 <_dtoa_r+0xabe> + 80039b6: 9a06 ldr r2, [sp, #24] + 80039b8: 2a00 cmp r2, #0 + 80039ba: dd01 ble.n 80039c0 <_dtoa_r+0xa78> + 80039bc: 9b04 ldr r3, [sp, #16] + 80039be: 3331 adds r3, #49 ; 0x31 + 80039c0: f88b 3000 strb.w r3, [fp] + 80039c4: e776 b.n 80038b4 <_dtoa_r+0x96c> + 80039c6: 4630 mov r0, r6 + 80039c8: e7b9 b.n 800393e <_dtoa_r+0x9f6> + 80039ca: 2201 movs r2, #1 + 80039cc: e7e2 b.n 8003994 <_dtoa_r+0xa4c> + 80039ce: 9906 ldr r1, [sp, #24] + 80039d0: 2900 cmp r1, #0 + 80039d2: db04 blt.n 80039de <_dtoa_r+0xa96> + 80039d4: 9822 ldr r0, [sp, #136] ; 0x88 + 80039d6: 4301 orrs r1, r0 + 80039d8: 9809 ldr r0, [sp, #36] ; 0x24 + 80039da: 4301 orrs r1, r0 + 80039dc: d120 bne.n 8003a20 <_dtoa_r+0xad8> + 80039de: 2a00 cmp r2, #0 + 80039e0: ddee ble.n 80039c0 <_dtoa_r+0xa78> + 80039e2: 4651 mov r1, sl + 80039e4: 2201 movs r2, #1 + 80039e6: 4628 mov r0, r5 + 80039e8: 9302 str r3, [sp, #8] + 80039ea: f001 f913 bl 8004c14 <__lshift> + 80039ee: 4621 mov r1, r4 + 80039f0: 4682 mov sl, r0 + 80039f2: f001 f97b bl 8004cec <__mcmp> + 80039f6: 2800 cmp r0, #0 + 80039f8: 9b02 ldr r3, [sp, #8] + 80039fa: dc02 bgt.n 8003a02 <_dtoa_r+0xaba> + 80039fc: d1e0 bne.n 80039c0 <_dtoa_r+0xa78> + 80039fe: 07da lsls r2, r3, #31 + 8003a00: d5de bpl.n 80039c0 <_dtoa_r+0xa78> + 8003a02: 2b39 cmp r3, #57 ; 0x39 + 8003a04: d1da bne.n 80039bc <_dtoa_r+0xa74> + 8003a06: 2339 movs r3, #57 ; 0x39 + 8003a08: f88b 3000 strb.w r3, [fp] + 8003a0c: 463b mov r3, r7 + 8003a0e: 461f mov r7, r3 + 8003a10: 3b01 subs r3, #1 + 8003a12: f817 2c01 ldrb.w r2, [r7, #-1] + 8003a16: 2a39 cmp r2, #57 ; 0x39 + 8003a18: d050 beq.n 8003abc <_dtoa_r+0xb74> + 8003a1a: 3201 adds r2, #1 + 8003a1c: 701a strb r2, [r3, #0] + 8003a1e: e749 b.n 80038b4 <_dtoa_r+0x96c> + 8003a20: 2a00 cmp r2, #0 + 8003a22: dd03 ble.n 8003a2c <_dtoa_r+0xae4> + 8003a24: 2b39 cmp r3, #57 ; 0x39 + 8003a26: d0ee beq.n 8003a06 <_dtoa_r+0xabe> + 8003a28: 3301 adds r3, #1 + 8003a2a: e7c9 b.n 80039c0 <_dtoa_r+0xa78> + 8003a2c: 9a02 ldr r2, [sp, #8] + 8003a2e: 990a ldr r1, [sp, #40] ; 0x28 + 8003a30: f802 3c01 strb.w r3, [r2, #-1] + 8003a34: 428a cmp r2, r1 + 8003a36: d02a beq.n 8003a8e <_dtoa_r+0xb46> + 8003a38: 4651 mov r1, sl + 8003a3a: 2300 movs r3, #0 + 8003a3c: 220a movs r2, #10 + 8003a3e: 4628 mov r0, r5 + 8003a40: f000 fef0 bl 8004824 <__multadd> + 8003a44: 45b0 cmp r8, r6 + 8003a46: 4682 mov sl, r0 + 8003a48: f04f 0300 mov.w r3, #0 + 8003a4c: f04f 020a mov.w r2, #10 + 8003a50: 4641 mov r1, r8 + 8003a52: 4628 mov r0, r5 + 8003a54: d107 bne.n 8003a66 <_dtoa_r+0xb1e> + 8003a56: f000 fee5 bl 8004824 <__multadd> + 8003a5a: 4680 mov r8, r0 + 8003a5c: 4606 mov r6, r0 + 8003a5e: 9b02 ldr r3, [sp, #8] + 8003a60: 3301 adds r3, #1 + 8003a62: 9302 str r3, [sp, #8] + 8003a64: e777 b.n 8003956 <_dtoa_r+0xa0e> + 8003a66: f000 fedd bl 8004824 <__multadd> + 8003a6a: 4631 mov r1, r6 + 8003a6c: 4680 mov r8, r0 + 8003a6e: 2300 movs r3, #0 + 8003a70: 220a movs r2, #10 + 8003a72: 4628 mov r0, r5 + 8003a74: f000 fed6 bl 8004824 <__multadd> + 8003a78: 4606 mov r6, r0 + 8003a7a: e7f0 b.n 8003a5e <_dtoa_r+0xb16> + 8003a7c: f1bb 0f00 cmp.w fp, #0 + 8003a80: 9a08 ldr r2, [sp, #32] + 8003a82: bfcc ite gt + 8003a84: 465f movgt r7, fp + 8003a86: 2701 movle r7, #1 + 8003a88: 4417 add r7, r2 + 8003a8a: f04f 0800 mov.w r8, #0 + 8003a8e: 4651 mov r1, sl + 8003a90: 2201 movs r2, #1 + 8003a92: 4628 mov r0, r5 + 8003a94: 9302 str r3, [sp, #8] + 8003a96: f001 f8bd bl 8004c14 <__lshift> + 8003a9a: 4621 mov r1, r4 + 8003a9c: 4682 mov sl, r0 + 8003a9e: f001 f925 bl 8004cec <__mcmp> + 8003aa2: 2800 cmp r0, #0 + 8003aa4: dcb2 bgt.n 8003a0c <_dtoa_r+0xac4> + 8003aa6: d102 bne.n 8003aae <_dtoa_r+0xb66> + 8003aa8: 9b02 ldr r3, [sp, #8] + 8003aaa: 07db lsls r3, r3, #31 + 8003aac: d4ae bmi.n 8003a0c <_dtoa_r+0xac4> + 8003aae: 463b mov r3, r7 + 8003ab0: 461f mov r7, r3 + 8003ab2: f813 2d01 ldrb.w r2, [r3, #-1]! + 8003ab6: 2a30 cmp r2, #48 ; 0x30 + 8003ab8: d0fa beq.n 8003ab0 <_dtoa_r+0xb68> + 8003aba: e6fb b.n 80038b4 <_dtoa_r+0x96c> + 8003abc: 9a08 ldr r2, [sp, #32] + 8003abe: 429a cmp r2, r3 + 8003ac0: d1a5 bne.n 8003a0e <_dtoa_r+0xac6> + 8003ac2: 2331 movs r3, #49 ; 0x31 + 8003ac4: f109 0901 add.w r9, r9, #1 + 8003ac8: 7013 strb r3, [r2, #0] + 8003aca: e6f3 b.n 80038b4 <_dtoa_r+0x96c> + 8003acc: 4b13 ldr r3, [pc, #76] ; (8003b1c <_dtoa_r+0xbd4>) + 8003ace: f7ff baa6 b.w 800301e <_dtoa_r+0xd6> + 8003ad2: 9b26 ldr r3, [sp, #152] ; 0x98 + 8003ad4: 2b00 cmp r3, #0 + 8003ad6: f47f aa7f bne.w 8002fd8 <_dtoa_r+0x90> + 8003ada: 4b11 ldr r3, [pc, #68] ; (8003b20 <_dtoa_r+0xbd8>) + 8003adc: f7ff ba9f b.w 800301e <_dtoa_r+0xd6> + 8003ae0: f1bb 0f00 cmp.w fp, #0 + 8003ae4: dc03 bgt.n 8003aee <_dtoa_r+0xba6> + 8003ae6: 9b22 ldr r3, [sp, #136] ; 0x88 + 8003ae8: 2b02 cmp r3, #2 + 8003aea: f73f aecc bgt.w 8003886 <_dtoa_r+0x93e> + 8003aee: 9f08 ldr r7, [sp, #32] + 8003af0: 4621 mov r1, r4 + 8003af2: 4650 mov r0, sl + 8003af4: f7ff f99a bl 8002e2c + 8003af8: f100 0330 add.w r3, r0, #48 ; 0x30 + 8003afc: f807 3b01 strb.w r3, [r7], #1 + 8003b00: 9a08 ldr r2, [sp, #32] + 8003b02: 1aba subs r2, r7, r2 + 8003b04: 4593 cmp fp, r2 + 8003b06: ddb9 ble.n 8003a7c <_dtoa_r+0xb34> + 8003b08: 4651 mov r1, sl + 8003b0a: 2300 movs r3, #0 + 8003b0c: 220a movs r2, #10 + 8003b0e: 4628 mov r0, r5 + 8003b10: f000 fe88 bl 8004824 <__multadd> + 8003b14: 4682 mov sl, r0 + 8003b16: e7eb b.n 8003af0 <_dtoa_r+0xba8> + 8003b18: 08006034 .word 0x08006034 + 8003b1c: 08005e30 .word 0x08005e30 + 8003b20: 08005fb1 .word 0x08005fb1 + +08003b24 <__sflush_r>: + 8003b24: 898a ldrh r2, [r1, #12] + 8003b26: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8003b2a: 4605 mov r5, r0 + 8003b2c: 0710 lsls r0, r2, #28 + 8003b2e: 460c mov r4, r1 + 8003b30: d458 bmi.n 8003be4 <__sflush_r+0xc0> + 8003b32: 684b ldr r3, [r1, #4] + 8003b34: 2b00 cmp r3, #0 + 8003b36: dc05 bgt.n 8003b44 <__sflush_r+0x20> + 8003b38: 6c0b ldr r3, [r1, #64] ; 0x40 + 8003b3a: 2b00 cmp r3, #0 + 8003b3c: dc02 bgt.n 8003b44 <__sflush_r+0x20> + 8003b3e: 2000 movs r0, #0 + 8003b40: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8003b44: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8003b46: 2e00 cmp r6, #0 + 8003b48: d0f9 beq.n 8003b3e <__sflush_r+0x1a> + 8003b4a: 2300 movs r3, #0 + 8003b4c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 8003b50: 682f ldr r7, [r5, #0] + 8003b52: 602b str r3, [r5, #0] + 8003b54: d032 beq.n 8003bbc <__sflush_r+0x98> + 8003b56: 6d60 ldr r0, [r4, #84] ; 0x54 + 8003b58: 89a3 ldrh r3, [r4, #12] + 8003b5a: 075a lsls r2, r3, #29 + 8003b5c: d505 bpl.n 8003b6a <__sflush_r+0x46> + 8003b5e: 6863 ldr r3, [r4, #4] + 8003b60: 1ac0 subs r0, r0, r3 + 8003b62: 6b63 ldr r3, [r4, #52] ; 0x34 + 8003b64: b10b cbz r3, 8003b6a <__sflush_r+0x46> + 8003b66: 6c23 ldr r3, [r4, #64] ; 0x40 + 8003b68: 1ac0 subs r0, r0, r3 + 8003b6a: 2300 movs r3, #0 + 8003b6c: 4602 mov r2, r0 + 8003b6e: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8003b70: 6a21 ldr r1, [r4, #32] + 8003b72: 4628 mov r0, r5 + 8003b74: 47b0 blx r6 + 8003b76: 1c43 adds r3, r0, #1 + 8003b78: 89a3 ldrh r3, [r4, #12] + 8003b7a: d106 bne.n 8003b8a <__sflush_r+0x66> + 8003b7c: 6829 ldr r1, [r5, #0] + 8003b7e: 291d cmp r1, #29 + 8003b80: d82c bhi.n 8003bdc <__sflush_r+0xb8> + 8003b82: 4a2a ldr r2, [pc, #168] ; (8003c2c <__sflush_r+0x108>) + 8003b84: 40ca lsrs r2, r1 + 8003b86: 07d6 lsls r6, r2, #31 + 8003b88: d528 bpl.n 8003bdc <__sflush_r+0xb8> + 8003b8a: 2200 movs r2, #0 + 8003b8c: 6062 str r2, [r4, #4] + 8003b8e: 04d9 lsls r1, r3, #19 + 8003b90: 6922 ldr r2, [r4, #16] + 8003b92: 6022 str r2, [r4, #0] + 8003b94: d504 bpl.n 8003ba0 <__sflush_r+0x7c> + 8003b96: 1c42 adds r2, r0, #1 + 8003b98: d101 bne.n 8003b9e <__sflush_r+0x7a> + 8003b9a: 682b ldr r3, [r5, #0] + 8003b9c: b903 cbnz r3, 8003ba0 <__sflush_r+0x7c> + 8003b9e: 6560 str r0, [r4, #84] ; 0x54 + 8003ba0: 6b61 ldr r1, [r4, #52] ; 0x34 + 8003ba2: 602f str r7, [r5, #0] + 8003ba4: 2900 cmp r1, #0 + 8003ba6: d0ca beq.n 8003b3e <__sflush_r+0x1a> + 8003ba8: f104 0344 add.w r3, r4, #68 ; 0x44 + 8003bac: 4299 cmp r1, r3 + 8003bae: d002 beq.n 8003bb6 <__sflush_r+0x92> + 8003bb0: 4628 mov r0, r5 + 8003bb2: f001 fa97 bl 80050e4 <_free_r> + 8003bb6: 2000 movs r0, #0 + 8003bb8: 6360 str r0, [r4, #52] ; 0x34 + 8003bba: e7c1 b.n 8003b40 <__sflush_r+0x1c> + 8003bbc: 6a21 ldr r1, [r4, #32] + 8003bbe: 2301 movs r3, #1 + 8003bc0: 4628 mov r0, r5 + 8003bc2: 47b0 blx r6 + 8003bc4: 1c41 adds r1, r0, #1 + 8003bc6: d1c7 bne.n 8003b58 <__sflush_r+0x34> + 8003bc8: 682b ldr r3, [r5, #0] + 8003bca: 2b00 cmp r3, #0 + 8003bcc: d0c4 beq.n 8003b58 <__sflush_r+0x34> + 8003bce: 2b1d cmp r3, #29 + 8003bd0: d001 beq.n 8003bd6 <__sflush_r+0xb2> + 8003bd2: 2b16 cmp r3, #22 + 8003bd4: d101 bne.n 8003bda <__sflush_r+0xb6> + 8003bd6: 602f str r7, [r5, #0] + 8003bd8: e7b1 b.n 8003b3e <__sflush_r+0x1a> + 8003bda: 89a3 ldrh r3, [r4, #12] + 8003bdc: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8003be0: 81a3 strh r3, [r4, #12] + 8003be2: e7ad b.n 8003b40 <__sflush_r+0x1c> + 8003be4: 690f ldr r7, [r1, #16] + 8003be6: 2f00 cmp r7, #0 + 8003be8: d0a9 beq.n 8003b3e <__sflush_r+0x1a> + 8003bea: 0793 lsls r3, r2, #30 + 8003bec: 680e ldr r6, [r1, #0] + 8003bee: bf08 it eq + 8003bf0: 694b ldreq r3, [r1, #20] + 8003bf2: 600f str r7, [r1, #0] + 8003bf4: bf18 it ne + 8003bf6: 2300 movne r3, #0 + 8003bf8: eba6 0807 sub.w r8, r6, r7 + 8003bfc: 608b str r3, [r1, #8] + 8003bfe: f1b8 0f00 cmp.w r8, #0 + 8003c02: dd9c ble.n 8003b3e <__sflush_r+0x1a> + 8003c04: 6a21 ldr r1, [r4, #32] + 8003c06: 6aa6 ldr r6, [r4, #40] ; 0x28 + 8003c08: 4643 mov r3, r8 + 8003c0a: 463a mov r2, r7 + 8003c0c: 4628 mov r0, r5 + 8003c0e: 47b0 blx r6 + 8003c10: 2800 cmp r0, #0 + 8003c12: dc06 bgt.n 8003c22 <__sflush_r+0xfe> + 8003c14: 89a3 ldrh r3, [r4, #12] + 8003c16: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8003c1a: 81a3 strh r3, [r4, #12] + 8003c1c: f04f 30ff mov.w r0, #4294967295 + 8003c20: e78e b.n 8003b40 <__sflush_r+0x1c> + 8003c22: 4407 add r7, r0 + 8003c24: eba8 0800 sub.w r8, r8, r0 + 8003c28: e7e9 b.n 8003bfe <__sflush_r+0xda> + 8003c2a: bf00 nop + 8003c2c: 20400001 .word 0x20400001 + +08003c30 <_fflush_r>: + 8003c30: b538 push {r3, r4, r5, lr} + 8003c32: 690b ldr r3, [r1, #16] + 8003c34: 4605 mov r5, r0 + 8003c36: 460c mov r4, r1 + 8003c38: b913 cbnz r3, 8003c40 <_fflush_r+0x10> + 8003c3a: 2500 movs r5, #0 + 8003c3c: 4628 mov r0, r5 + 8003c3e: bd38 pop {r3, r4, r5, pc} + 8003c40: b118 cbz r0, 8003c4a <_fflush_r+0x1a> + 8003c42: 6983 ldr r3, [r0, #24] + 8003c44: b90b cbnz r3, 8003c4a <_fflush_r+0x1a> + 8003c46: f000 f899 bl 8003d7c <__sinit> + 8003c4a: 4b14 ldr r3, [pc, #80] ; (8003c9c <_fflush_r+0x6c>) + 8003c4c: 429c cmp r4, r3 + 8003c4e: d11b bne.n 8003c88 <_fflush_r+0x58> + 8003c50: 686c ldr r4, [r5, #4] + 8003c52: f9b4 300c ldrsh.w r3, [r4, #12] + 8003c56: 2b00 cmp r3, #0 + 8003c58: d0ef beq.n 8003c3a <_fflush_r+0xa> + 8003c5a: 6e62 ldr r2, [r4, #100] ; 0x64 + 8003c5c: 07d0 lsls r0, r2, #31 + 8003c5e: d404 bmi.n 8003c6a <_fflush_r+0x3a> + 8003c60: 0599 lsls r1, r3, #22 + 8003c62: d402 bmi.n 8003c6a <_fflush_r+0x3a> + 8003c64: 6da0 ldr r0, [r4, #88] ; 0x58 + 8003c66: f000 fcec bl 8004642 <__retarget_lock_acquire_recursive> + 8003c6a: 4628 mov r0, r5 + 8003c6c: 4621 mov r1, r4 + 8003c6e: f7ff ff59 bl 8003b24 <__sflush_r> + 8003c72: 6e63 ldr r3, [r4, #100] ; 0x64 + 8003c74: 07da lsls r2, r3, #31 + 8003c76: 4605 mov r5, r0 + 8003c78: d4e0 bmi.n 8003c3c <_fflush_r+0xc> + 8003c7a: 89a3 ldrh r3, [r4, #12] + 8003c7c: 059b lsls r3, r3, #22 + 8003c7e: d4dd bmi.n 8003c3c <_fflush_r+0xc> + 8003c80: 6da0 ldr r0, [r4, #88] ; 0x58 + 8003c82: f000 fcdf bl 8004644 <__retarget_lock_release_recursive> + 8003c86: e7d9 b.n 8003c3c <_fflush_r+0xc> + 8003c88: 4b05 ldr r3, [pc, #20] ; (8003ca0 <_fflush_r+0x70>) + 8003c8a: 429c cmp r4, r3 + 8003c8c: d101 bne.n 8003c92 <_fflush_r+0x62> + 8003c8e: 68ac ldr r4, [r5, #8] + 8003c90: e7df b.n 8003c52 <_fflush_r+0x22> + 8003c92: 4b04 ldr r3, [pc, #16] ; (8003ca4 <_fflush_r+0x74>) + 8003c94: 429c cmp r4, r3 + 8003c96: bf08 it eq + 8003c98: 68ec ldreq r4, [r5, #12] + 8003c9a: e7da b.n 8003c52 <_fflush_r+0x22> + 8003c9c: 08006068 .word 0x08006068 + 8003ca0: 08006088 .word 0x08006088 + 8003ca4: 08006048 .word 0x08006048 + +08003ca8 : + 8003ca8: 4601 mov r1, r0 + 8003caa: b920 cbnz r0, 8003cb6 + 8003cac: 4b04 ldr r3, [pc, #16] ; (8003cc0 ) + 8003cae: 4905 ldr r1, [pc, #20] ; (8003cc4 ) + 8003cb0: 6818 ldr r0, [r3, #0] + 8003cb2: f000 b8fe b.w 8003eb2 <_fwalk_reent> + 8003cb6: 4b04 ldr r3, [pc, #16] ; (8003cc8 ) + 8003cb8: 6818 ldr r0, [r3, #0] + 8003cba: f7ff bfb9 b.w 8003c30 <_fflush_r> + 8003cbe: bf00 nop + 8003cc0: 08005e1c .word 0x08005e1c + 8003cc4: 08003c31 .word 0x08003c31 + 8003cc8: 20000000 .word 0x20000000 + +08003ccc : + 8003ccc: 2300 movs r3, #0 + 8003cce: b510 push {r4, lr} + 8003cd0: 4604 mov r4, r0 + 8003cd2: e9c0 3300 strd r3, r3, [r0] + 8003cd6: e9c0 3304 strd r3, r3, [r0, #16] + 8003cda: 6083 str r3, [r0, #8] + 8003cdc: 8181 strh r1, [r0, #12] + 8003cde: 6643 str r3, [r0, #100] ; 0x64 + 8003ce0: 81c2 strh r2, [r0, #14] + 8003ce2: 6183 str r3, [r0, #24] + 8003ce4: 4619 mov r1, r3 + 8003ce6: 2208 movs r2, #8 + 8003ce8: 305c adds r0, #92 ; 0x5c + 8003cea: f7fd fa85 bl 80011f8 + 8003cee: 4b05 ldr r3, [pc, #20] ; (8003d04 ) + 8003cf0: 6263 str r3, [r4, #36] ; 0x24 + 8003cf2: 4b05 ldr r3, [pc, #20] ; (8003d08 ) + 8003cf4: 62a3 str r3, [r4, #40] ; 0x28 + 8003cf6: 4b05 ldr r3, [pc, #20] ; (8003d0c ) + 8003cf8: 62e3 str r3, [r4, #44] ; 0x2c + 8003cfa: 4b05 ldr r3, [pc, #20] ; (8003d10 ) + 8003cfc: 6224 str r4, [r4, #32] + 8003cfe: 6323 str r3, [r4, #48] ; 0x30 + 8003d00: bd10 pop {r4, pc} + 8003d02: bf00 nop + 8003d04: 08005821 .word 0x08005821 + 8003d08: 08005843 .word 0x08005843 + 8003d0c: 0800587b .word 0x0800587b + 8003d10: 0800589f .word 0x0800589f + +08003d14 <_cleanup_r>: + 8003d14: 4901 ldr r1, [pc, #4] ; (8003d1c <_cleanup_r+0x8>) + 8003d16: f000 b8cc b.w 8003eb2 <_fwalk_reent> + 8003d1a: bf00 nop + 8003d1c: 08003c31 .word 0x08003c31 + +08003d20 <__sfmoreglue>: + 8003d20: b570 push {r4, r5, r6, lr} + 8003d22: 1e4a subs r2, r1, #1 + 8003d24: 2568 movs r5, #104 ; 0x68 + 8003d26: 4355 muls r5, r2 + 8003d28: 460e mov r6, r1 + 8003d2a: f105 0174 add.w r1, r5, #116 ; 0x74 + 8003d2e: f001 fa27 bl 8005180 <_malloc_r> + 8003d32: 4604 mov r4, r0 + 8003d34: b140 cbz r0, 8003d48 <__sfmoreglue+0x28> + 8003d36: 2100 movs r1, #0 + 8003d38: e9c0 1600 strd r1, r6, [r0] + 8003d3c: 300c adds r0, #12 + 8003d3e: 60a0 str r0, [r4, #8] + 8003d40: f105 0268 add.w r2, r5, #104 ; 0x68 + 8003d44: f7fd fa58 bl 80011f8 + 8003d48: 4620 mov r0, r4 + 8003d4a: bd70 pop {r4, r5, r6, pc} + +08003d4c <__sfp_lock_acquire>: + 8003d4c: 4801 ldr r0, [pc, #4] ; (8003d54 <__sfp_lock_acquire+0x8>) + 8003d4e: f000 bc78 b.w 8004642 <__retarget_lock_acquire_recursive> + 8003d52: bf00 nop + 8003d54: 20000204 .word 0x20000204 + +08003d58 <__sfp_lock_release>: + 8003d58: 4801 ldr r0, [pc, #4] ; (8003d60 <__sfp_lock_release+0x8>) + 8003d5a: f000 bc73 b.w 8004644 <__retarget_lock_release_recursive> + 8003d5e: bf00 nop + 8003d60: 20000204 .word 0x20000204 + +08003d64 <__sinit_lock_acquire>: + 8003d64: 4801 ldr r0, [pc, #4] ; (8003d6c <__sinit_lock_acquire+0x8>) + 8003d66: f000 bc6c b.w 8004642 <__retarget_lock_acquire_recursive> + 8003d6a: bf00 nop + 8003d6c: 200001ff .word 0x200001ff + +08003d70 <__sinit_lock_release>: + 8003d70: 4801 ldr r0, [pc, #4] ; (8003d78 <__sinit_lock_release+0x8>) + 8003d72: f000 bc67 b.w 8004644 <__retarget_lock_release_recursive> + 8003d76: bf00 nop + 8003d78: 200001ff .word 0x200001ff + +08003d7c <__sinit>: + 8003d7c: b510 push {r4, lr} + 8003d7e: 4604 mov r4, r0 + 8003d80: f7ff fff0 bl 8003d64 <__sinit_lock_acquire> + 8003d84: 69a3 ldr r3, [r4, #24] + 8003d86: b11b cbz r3, 8003d90 <__sinit+0x14> + 8003d88: e8bd 4010 ldmia.w sp!, {r4, lr} + 8003d8c: f7ff bff0 b.w 8003d70 <__sinit_lock_release> + 8003d90: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 8003d94: 6523 str r3, [r4, #80] ; 0x50 + 8003d96: 4b13 ldr r3, [pc, #76] ; (8003de4 <__sinit+0x68>) + 8003d98: 4a13 ldr r2, [pc, #76] ; (8003de8 <__sinit+0x6c>) + 8003d9a: 681b ldr r3, [r3, #0] + 8003d9c: 62a2 str r2, [r4, #40] ; 0x28 + 8003d9e: 42a3 cmp r3, r4 + 8003da0: bf04 itt eq + 8003da2: 2301 moveq r3, #1 + 8003da4: 61a3 streq r3, [r4, #24] + 8003da6: 4620 mov r0, r4 + 8003da8: f000 f820 bl 8003dec <__sfp> + 8003dac: 6060 str r0, [r4, #4] + 8003dae: 4620 mov r0, r4 + 8003db0: f000 f81c bl 8003dec <__sfp> + 8003db4: 60a0 str r0, [r4, #8] + 8003db6: 4620 mov r0, r4 + 8003db8: f000 f818 bl 8003dec <__sfp> + 8003dbc: 2200 movs r2, #0 + 8003dbe: 60e0 str r0, [r4, #12] + 8003dc0: 2104 movs r1, #4 + 8003dc2: 6860 ldr r0, [r4, #4] + 8003dc4: f7ff ff82 bl 8003ccc + 8003dc8: 68a0 ldr r0, [r4, #8] + 8003dca: 2201 movs r2, #1 + 8003dcc: 2109 movs r1, #9 + 8003dce: f7ff ff7d bl 8003ccc + 8003dd2: 68e0 ldr r0, [r4, #12] + 8003dd4: 2202 movs r2, #2 + 8003dd6: 2112 movs r1, #18 + 8003dd8: f7ff ff78 bl 8003ccc + 8003ddc: 2301 movs r3, #1 + 8003dde: 61a3 str r3, [r4, #24] + 8003de0: e7d2 b.n 8003d88 <__sinit+0xc> + 8003de2: bf00 nop + 8003de4: 08005e1c .word 0x08005e1c + 8003de8: 08003d15 .word 0x08003d15 + +08003dec <__sfp>: + 8003dec: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003dee: 4607 mov r7, r0 + 8003df0: f7ff ffac bl 8003d4c <__sfp_lock_acquire> + 8003df4: 4b1e ldr r3, [pc, #120] ; (8003e70 <__sfp+0x84>) + 8003df6: 681e ldr r6, [r3, #0] + 8003df8: 69b3 ldr r3, [r6, #24] + 8003dfa: b913 cbnz r3, 8003e02 <__sfp+0x16> + 8003dfc: 4630 mov r0, r6 + 8003dfe: f7ff ffbd bl 8003d7c <__sinit> + 8003e02: 3648 adds r6, #72 ; 0x48 + 8003e04: e9d6 3401 ldrd r3, r4, [r6, #4] + 8003e08: 3b01 subs r3, #1 + 8003e0a: d503 bpl.n 8003e14 <__sfp+0x28> + 8003e0c: 6833 ldr r3, [r6, #0] + 8003e0e: b30b cbz r3, 8003e54 <__sfp+0x68> + 8003e10: 6836 ldr r6, [r6, #0] + 8003e12: e7f7 b.n 8003e04 <__sfp+0x18> + 8003e14: f9b4 500c ldrsh.w r5, [r4, #12] + 8003e18: b9d5 cbnz r5, 8003e50 <__sfp+0x64> + 8003e1a: 4b16 ldr r3, [pc, #88] ; (8003e74 <__sfp+0x88>) + 8003e1c: 60e3 str r3, [r4, #12] + 8003e1e: f104 0058 add.w r0, r4, #88 ; 0x58 + 8003e22: 6665 str r5, [r4, #100] ; 0x64 + 8003e24: f000 fc0c bl 8004640 <__retarget_lock_init_recursive> + 8003e28: f7ff ff96 bl 8003d58 <__sfp_lock_release> + 8003e2c: e9c4 5501 strd r5, r5, [r4, #4] + 8003e30: e9c4 5504 strd r5, r5, [r4, #16] + 8003e34: 6025 str r5, [r4, #0] + 8003e36: 61a5 str r5, [r4, #24] + 8003e38: 2208 movs r2, #8 + 8003e3a: 4629 mov r1, r5 + 8003e3c: f104 005c add.w r0, r4, #92 ; 0x5c + 8003e40: f7fd f9da bl 80011f8 + 8003e44: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 8003e48: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 8003e4c: 4620 mov r0, r4 + 8003e4e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8003e50: 3468 adds r4, #104 ; 0x68 + 8003e52: e7d9 b.n 8003e08 <__sfp+0x1c> + 8003e54: 2104 movs r1, #4 + 8003e56: 4638 mov r0, r7 + 8003e58: f7ff ff62 bl 8003d20 <__sfmoreglue> + 8003e5c: 4604 mov r4, r0 + 8003e5e: 6030 str r0, [r6, #0] + 8003e60: 2800 cmp r0, #0 + 8003e62: d1d5 bne.n 8003e10 <__sfp+0x24> + 8003e64: f7ff ff78 bl 8003d58 <__sfp_lock_release> + 8003e68: 230c movs r3, #12 + 8003e6a: 603b str r3, [r7, #0] + 8003e6c: e7ee b.n 8003e4c <__sfp+0x60> + 8003e6e: bf00 nop + 8003e70: 08005e1c .word 0x08005e1c + 8003e74: ffff0001 .word 0xffff0001 + +08003e78 <_fwalk>: + 8003e78: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8003e7c: 460f mov r7, r1 + 8003e7e: f100 0448 add.w r4, r0, #72 ; 0x48 + 8003e82: 2600 movs r6, #0 + 8003e84: e9d4 8501 ldrd r8, r5, [r4, #4] + 8003e88: f1b8 0801 subs.w r8, r8, #1 + 8003e8c: d505 bpl.n 8003e9a <_fwalk+0x22> + 8003e8e: 6824 ldr r4, [r4, #0] + 8003e90: 2c00 cmp r4, #0 + 8003e92: d1f7 bne.n 8003e84 <_fwalk+0xc> + 8003e94: 4630 mov r0, r6 + 8003e96: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8003e9a: 89ab ldrh r3, [r5, #12] + 8003e9c: 2b01 cmp r3, #1 + 8003e9e: d906 bls.n 8003eae <_fwalk+0x36> + 8003ea0: f9b5 300e ldrsh.w r3, [r5, #14] + 8003ea4: 3301 adds r3, #1 + 8003ea6: d002 beq.n 8003eae <_fwalk+0x36> + 8003ea8: 4628 mov r0, r5 + 8003eaa: 47b8 blx r7 + 8003eac: 4306 orrs r6, r0 + 8003eae: 3568 adds r5, #104 ; 0x68 + 8003eb0: e7ea b.n 8003e88 <_fwalk+0x10> + +08003eb2 <_fwalk_reent>: + 8003eb2: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8003eb6: 4606 mov r6, r0 + 8003eb8: 4688 mov r8, r1 + 8003eba: f100 0448 add.w r4, r0, #72 ; 0x48 + 8003ebe: 2700 movs r7, #0 + 8003ec0: e9d4 9501 ldrd r9, r5, [r4, #4] + 8003ec4: f1b9 0901 subs.w r9, r9, #1 + 8003ec8: d505 bpl.n 8003ed6 <_fwalk_reent+0x24> + 8003eca: 6824 ldr r4, [r4, #0] + 8003ecc: 2c00 cmp r4, #0 + 8003ece: d1f7 bne.n 8003ec0 <_fwalk_reent+0xe> + 8003ed0: 4638 mov r0, r7 + 8003ed2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8003ed6: 89ab ldrh r3, [r5, #12] + 8003ed8: 2b01 cmp r3, #1 + 8003eda: d907 bls.n 8003eec <_fwalk_reent+0x3a> + 8003edc: f9b5 300e ldrsh.w r3, [r5, #14] + 8003ee0: 3301 adds r3, #1 + 8003ee2: d003 beq.n 8003eec <_fwalk_reent+0x3a> + 8003ee4: 4629 mov r1, r5 + 8003ee6: 4630 mov r0, r6 + 8003ee8: 47c0 blx r8 + 8003eea: 4307 orrs r7, r0 + 8003eec: 3568 adds r5, #104 ; 0x68 + 8003eee: e7e9 b.n 8003ec4 <_fwalk_reent+0x12> + +08003ef0 : + 8003ef0: 6903 ldr r3, [r0, #16] + 8003ef2: ebb3 1f61 cmp.w r3, r1, asr #5 + 8003ef6: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} + 8003efa: ea4f 1261 mov.w r2, r1, asr #5 + 8003efe: f100 0414 add.w r4, r0, #20 + 8003f02: dd45 ble.n 8003f90 + 8003f04: f011 011f ands.w r1, r1, #31 + 8003f08: eb04 0683 add.w r6, r4, r3, lsl #2 + 8003f0c: eb04 0582 add.w r5, r4, r2, lsl #2 + 8003f10: d10c bne.n 8003f2c + 8003f12: f100 0710 add.w r7, r0, #16 + 8003f16: 4629 mov r1, r5 + 8003f18: 42b1 cmp r1, r6 + 8003f1a: d334 bcc.n 8003f86 + 8003f1c: 1a9b subs r3, r3, r2 + 8003f1e: 009b lsls r3, r3, #2 + 8003f20: 1eea subs r2, r5, #3 + 8003f22: 4296 cmp r6, r2 + 8003f24: bf38 it cc + 8003f26: 2300 movcc r3, #0 + 8003f28: 4423 add r3, r4 + 8003f2a: e015 b.n 8003f58 + 8003f2c: f854 7022 ldr.w r7, [r4, r2, lsl #2] + 8003f30: f1c1 0820 rsb r8, r1, #32 + 8003f34: 40cf lsrs r7, r1 + 8003f36: f105 0e04 add.w lr, r5, #4 + 8003f3a: 46a1 mov r9, r4 + 8003f3c: 4576 cmp r6, lr + 8003f3e: 46f4 mov ip, lr + 8003f40: d815 bhi.n 8003f6e + 8003f42: 1a9b subs r3, r3, r2 + 8003f44: 009a lsls r2, r3, #2 + 8003f46: 3a04 subs r2, #4 + 8003f48: 3501 adds r5, #1 + 8003f4a: 42ae cmp r6, r5 + 8003f4c: bf38 it cc + 8003f4e: 2200 movcc r2, #0 + 8003f50: 18a3 adds r3, r4, r2 + 8003f52: 50a7 str r7, [r4, r2] + 8003f54: b107 cbz r7, 8003f58 + 8003f56: 3304 adds r3, #4 + 8003f58: 1b1a subs r2, r3, r4 + 8003f5a: 42a3 cmp r3, r4 + 8003f5c: ea4f 02a2 mov.w r2, r2, asr #2 + 8003f60: bf08 it eq + 8003f62: 2300 moveq r3, #0 + 8003f64: 6102 str r2, [r0, #16] + 8003f66: bf08 it eq + 8003f68: 6143 streq r3, [r0, #20] + 8003f6a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8003f6e: f8dc c000 ldr.w ip, [ip] + 8003f72: fa0c fc08 lsl.w ip, ip, r8 + 8003f76: ea4c 0707 orr.w r7, ip, r7 + 8003f7a: f849 7b04 str.w r7, [r9], #4 + 8003f7e: f85e 7b04 ldr.w r7, [lr], #4 + 8003f82: 40cf lsrs r7, r1 + 8003f84: e7da b.n 8003f3c + 8003f86: f851 cb04 ldr.w ip, [r1], #4 + 8003f8a: f847 cf04 str.w ip, [r7, #4]! + 8003f8e: e7c3 b.n 8003f18 + 8003f90: 4623 mov r3, r4 + 8003f92: e7e1 b.n 8003f58 + +08003f94 <__hexdig_fun>: + 8003f94: f1a0 0330 sub.w r3, r0, #48 ; 0x30 + 8003f98: 2b09 cmp r3, #9 + 8003f9a: d802 bhi.n 8003fa2 <__hexdig_fun+0xe> + 8003f9c: 3820 subs r0, #32 + 8003f9e: b2c0 uxtb r0, r0 + 8003fa0: 4770 bx lr + 8003fa2: f1a0 0361 sub.w r3, r0, #97 ; 0x61 + 8003fa6: 2b05 cmp r3, #5 + 8003fa8: d801 bhi.n 8003fae <__hexdig_fun+0x1a> + 8003faa: 3847 subs r0, #71 ; 0x47 + 8003fac: e7f7 b.n 8003f9e <__hexdig_fun+0xa> + 8003fae: f1a0 0341 sub.w r3, r0, #65 ; 0x41 + 8003fb2: 2b05 cmp r3, #5 + 8003fb4: d801 bhi.n 8003fba <__hexdig_fun+0x26> + 8003fb6: 3827 subs r0, #39 ; 0x27 + 8003fb8: e7f1 b.n 8003f9e <__hexdig_fun+0xa> + 8003fba: 2000 movs r0, #0 + 8003fbc: 4770 bx lr + ... + +08003fc0 <__gethex>: + 8003fc0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8003fc4: b08b sub sp, #44 ; 0x2c + 8003fc6: 468b mov fp, r1 + 8003fc8: 9306 str r3, [sp, #24] + 8003fca: 4bb9 ldr r3, [pc, #740] ; (80042b0 <__gethex+0x2f0>) + 8003fcc: 9002 str r0, [sp, #8] + 8003fce: 681b ldr r3, [r3, #0] + 8003fd0: 9303 str r3, [sp, #12] + 8003fd2: 4618 mov r0, r3 + 8003fd4: 4690 mov r8, r2 + 8003fd6: f7fc f91b bl 8000210 + 8003fda: 9b03 ldr r3, [sp, #12] + 8003fdc: f8db 2000 ldr.w r2, [fp] + 8003fe0: 4403 add r3, r0 + 8003fe2: 4682 mov sl, r0 + 8003fe4: f813 3c01 ldrb.w r3, [r3, #-1] + 8003fe8: 9307 str r3, [sp, #28] + 8003fea: 1c93 adds r3, r2, #2 + 8003fec: f1c2 22ff rsb r2, r2, #4278255360 ; 0xff00ff00 + 8003ff0: f502 027f add.w r2, r2, #16711680 ; 0xff0000 + 8003ff4: 32fe adds r2, #254 ; 0xfe + 8003ff6: 18d1 adds r1, r2, r3 + 8003ff8: 461f mov r7, r3 + 8003ffa: f813 0b01 ldrb.w r0, [r3], #1 + 8003ffe: 9101 str r1, [sp, #4] + 8004000: 2830 cmp r0, #48 ; 0x30 + 8004002: d0f8 beq.n 8003ff6 <__gethex+0x36> + 8004004: f7ff ffc6 bl 8003f94 <__hexdig_fun> + 8004008: 4604 mov r4, r0 + 800400a: 2800 cmp r0, #0 + 800400c: d13a bne.n 8004084 <__gethex+0xc4> + 800400e: 9903 ldr r1, [sp, #12] + 8004010: 4652 mov r2, sl + 8004012: 4638 mov r0, r7 + 8004014: f001 fc47 bl 80058a6 + 8004018: 4605 mov r5, r0 + 800401a: 2800 cmp r0, #0 + 800401c: d166 bne.n 80040ec <__gethex+0x12c> + 800401e: f817 000a ldrb.w r0, [r7, sl] + 8004022: eb07 060a add.w r6, r7, sl + 8004026: f7ff ffb5 bl 8003f94 <__hexdig_fun> + 800402a: 2800 cmp r0, #0 + 800402c: d060 beq.n 80040f0 <__gethex+0x130> + 800402e: 4633 mov r3, r6 + 8004030: 7818 ldrb r0, [r3, #0] + 8004032: 2830 cmp r0, #48 ; 0x30 + 8004034: 461f mov r7, r3 + 8004036: f103 0301 add.w r3, r3, #1 + 800403a: d0f9 beq.n 8004030 <__gethex+0x70> + 800403c: f7ff ffaa bl 8003f94 <__hexdig_fun> + 8004040: 2301 movs r3, #1 + 8004042: fab0 f480 clz r4, r0 + 8004046: 0964 lsrs r4, r4, #5 + 8004048: 4635 mov r5, r6 + 800404a: 9301 str r3, [sp, #4] + 800404c: 463a mov r2, r7 + 800404e: 4616 mov r6, r2 + 8004050: 3201 adds r2, #1 + 8004052: 7830 ldrb r0, [r6, #0] + 8004054: f7ff ff9e bl 8003f94 <__hexdig_fun> + 8004058: 2800 cmp r0, #0 + 800405a: d1f8 bne.n 800404e <__gethex+0x8e> + 800405c: 9903 ldr r1, [sp, #12] + 800405e: 4652 mov r2, sl + 8004060: 4630 mov r0, r6 + 8004062: f001 fc20 bl 80058a6 + 8004066: b980 cbnz r0, 800408a <__gethex+0xca> + 8004068: b94d cbnz r5, 800407e <__gethex+0xbe> + 800406a: eb06 050a add.w r5, r6, sl + 800406e: 462a mov r2, r5 + 8004070: 4616 mov r6, r2 + 8004072: 3201 adds r2, #1 + 8004074: 7830 ldrb r0, [r6, #0] + 8004076: f7ff ff8d bl 8003f94 <__hexdig_fun> + 800407a: 2800 cmp r0, #0 + 800407c: d1f8 bne.n 8004070 <__gethex+0xb0> + 800407e: 1bad subs r5, r5, r6 + 8004080: 00ad lsls r5, r5, #2 + 8004082: e004 b.n 800408e <__gethex+0xce> + 8004084: 2400 movs r4, #0 + 8004086: 4625 mov r5, r4 + 8004088: e7e0 b.n 800404c <__gethex+0x8c> + 800408a: 2d00 cmp r5, #0 + 800408c: d1f7 bne.n 800407e <__gethex+0xbe> + 800408e: 7833 ldrb r3, [r6, #0] + 8004090: f003 03df and.w r3, r3, #223 ; 0xdf + 8004094: 2b50 cmp r3, #80 ; 0x50 + 8004096: d139 bne.n 800410c <__gethex+0x14c> + 8004098: 7873 ldrb r3, [r6, #1] + 800409a: 2b2b cmp r3, #43 ; 0x2b + 800409c: d02a beq.n 80040f4 <__gethex+0x134> + 800409e: 2b2d cmp r3, #45 ; 0x2d + 80040a0: d02c beq.n 80040fc <__gethex+0x13c> + 80040a2: 1c71 adds r1, r6, #1 + 80040a4: f04f 0900 mov.w r9, #0 + 80040a8: 7808 ldrb r0, [r1, #0] + 80040aa: f7ff ff73 bl 8003f94 <__hexdig_fun> + 80040ae: 1e43 subs r3, r0, #1 + 80040b0: b2db uxtb r3, r3 + 80040b2: 2b18 cmp r3, #24 + 80040b4: d82a bhi.n 800410c <__gethex+0x14c> + 80040b6: f1a0 0210 sub.w r2, r0, #16 + 80040ba: f811 0f01 ldrb.w r0, [r1, #1]! + 80040be: f7ff ff69 bl 8003f94 <__hexdig_fun> + 80040c2: 1e43 subs r3, r0, #1 + 80040c4: b2db uxtb r3, r3 + 80040c6: 2b18 cmp r3, #24 + 80040c8: d91b bls.n 8004102 <__gethex+0x142> + 80040ca: f1b9 0f00 cmp.w r9, #0 + 80040ce: d000 beq.n 80040d2 <__gethex+0x112> + 80040d0: 4252 negs r2, r2 + 80040d2: 4415 add r5, r2 + 80040d4: f8cb 1000 str.w r1, [fp] + 80040d8: b1d4 cbz r4, 8004110 <__gethex+0x150> + 80040da: 9b01 ldr r3, [sp, #4] + 80040dc: 2b00 cmp r3, #0 + 80040de: bf14 ite ne + 80040e0: 2700 movne r7, #0 + 80040e2: 2706 moveq r7, #6 + 80040e4: 4638 mov r0, r7 + 80040e6: b00b add sp, #44 ; 0x2c + 80040e8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80040ec: 463e mov r6, r7 + 80040ee: 4625 mov r5, r4 + 80040f0: 2401 movs r4, #1 + 80040f2: e7cc b.n 800408e <__gethex+0xce> + 80040f4: f04f 0900 mov.w r9, #0 + 80040f8: 1cb1 adds r1, r6, #2 + 80040fa: e7d5 b.n 80040a8 <__gethex+0xe8> + 80040fc: f04f 0901 mov.w r9, #1 + 8004100: e7fa b.n 80040f8 <__gethex+0x138> + 8004102: 230a movs r3, #10 + 8004104: fb03 0202 mla r2, r3, r2, r0 + 8004108: 3a10 subs r2, #16 + 800410a: e7d6 b.n 80040ba <__gethex+0xfa> + 800410c: 4631 mov r1, r6 + 800410e: e7e1 b.n 80040d4 <__gethex+0x114> + 8004110: 1bf3 subs r3, r6, r7 + 8004112: 3b01 subs r3, #1 + 8004114: 4621 mov r1, r4 + 8004116: 2b07 cmp r3, #7 + 8004118: dc0a bgt.n 8004130 <__gethex+0x170> + 800411a: 9802 ldr r0, [sp, #8] + 800411c: f000 fb20 bl 8004760 <_Balloc> + 8004120: 4604 mov r4, r0 + 8004122: b940 cbnz r0, 8004136 <__gethex+0x176> + 8004124: 4b63 ldr r3, [pc, #396] ; (80042b4 <__gethex+0x2f4>) + 8004126: 4602 mov r2, r0 + 8004128: 21de movs r1, #222 ; 0xde + 800412a: 4863 ldr r0, [pc, #396] ; (80042b8 <__gethex+0x2f8>) + 800412c: f001 fcae bl 8005a8c <__assert_func> + 8004130: 3101 adds r1, #1 + 8004132: 105b asrs r3, r3, #1 + 8004134: e7ef b.n 8004116 <__gethex+0x156> + 8004136: f100 0914 add.w r9, r0, #20 + 800413a: f04f 0b00 mov.w fp, #0 + 800413e: f1ca 0301 rsb r3, sl, #1 + 8004142: f8cd 9010 str.w r9, [sp, #16] + 8004146: f8cd b004 str.w fp, [sp, #4] + 800414a: 9308 str r3, [sp, #32] + 800414c: 42b7 cmp r7, r6 + 800414e: d33f bcc.n 80041d0 <__gethex+0x210> + 8004150: 9f04 ldr r7, [sp, #16] + 8004152: 9b01 ldr r3, [sp, #4] + 8004154: f847 3b04 str.w r3, [r7], #4 + 8004158: eba7 0709 sub.w r7, r7, r9 + 800415c: 10bf asrs r7, r7, #2 + 800415e: 6127 str r7, [r4, #16] + 8004160: 4618 mov r0, r3 + 8004162: f000 fbf3 bl 800494c <__hi0bits> + 8004166: 017f lsls r7, r7, #5 + 8004168: f8d8 6000 ldr.w r6, [r8] + 800416c: 1a3f subs r7, r7, r0 + 800416e: 42b7 cmp r7, r6 + 8004170: dd62 ble.n 8004238 <__gethex+0x278> + 8004172: 1bbf subs r7, r7, r6 + 8004174: 4639 mov r1, r7 + 8004176: 4620 mov r0, r4 + 8004178: f000 ff85 bl 8005086 <__any_on> + 800417c: 4682 mov sl, r0 + 800417e: b1a8 cbz r0, 80041ac <__gethex+0x1ec> + 8004180: 1e7b subs r3, r7, #1 + 8004182: 1159 asrs r1, r3, #5 + 8004184: f003 021f and.w r2, r3, #31 + 8004188: f859 1021 ldr.w r1, [r9, r1, lsl #2] + 800418c: f04f 0a01 mov.w sl, #1 + 8004190: fa0a f202 lsl.w r2, sl, r2 + 8004194: 420a tst r2, r1 + 8004196: d009 beq.n 80041ac <__gethex+0x1ec> + 8004198: 4553 cmp r3, sl + 800419a: dd05 ble.n 80041a8 <__gethex+0x1e8> + 800419c: 1eb9 subs r1, r7, #2 + 800419e: 4620 mov r0, r4 + 80041a0: f000 ff71 bl 8005086 <__any_on> + 80041a4: 2800 cmp r0, #0 + 80041a6: d144 bne.n 8004232 <__gethex+0x272> + 80041a8: f04f 0a02 mov.w sl, #2 + 80041ac: 4639 mov r1, r7 + 80041ae: 4620 mov r0, r4 + 80041b0: f7ff fe9e bl 8003ef0 + 80041b4: 443d add r5, r7 + 80041b6: f8d8 3008 ldr.w r3, [r8, #8] + 80041ba: 42ab cmp r3, r5 + 80041bc: da4a bge.n 8004254 <__gethex+0x294> + 80041be: 9802 ldr r0, [sp, #8] + 80041c0: 4621 mov r1, r4 + 80041c2: f000 fb0d bl 80047e0 <_Bfree> + 80041c6: 9a14 ldr r2, [sp, #80] ; 0x50 + 80041c8: 2300 movs r3, #0 + 80041ca: 6013 str r3, [r2, #0] + 80041cc: 27a3 movs r7, #163 ; 0xa3 + 80041ce: e789 b.n 80040e4 <__gethex+0x124> + 80041d0: 1e73 subs r3, r6, #1 + 80041d2: 9a07 ldr r2, [sp, #28] + 80041d4: 9305 str r3, [sp, #20] + 80041d6: f816 3c01 ldrb.w r3, [r6, #-1] + 80041da: 4293 cmp r3, r2 + 80041dc: d019 beq.n 8004212 <__gethex+0x252> + 80041de: f1bb 0f20 cmp.w fp, #32 + 80041e2: d107 bne.n 80041f4 <__gethex+0x234> + 80041e4: 9b04 ldr r3, [sp, #16] + 80041e6: 9a01 ldr r2, [sp, #4] + 80041e8: f843 2b04 str.w r2, [r3], #4 + 80041ec: 9304 str r3, [sp, #16] + 80041ee: 2300 movs r3, #0 + 80041f0: 9301 str r3, [sp, #4] + 80041f2: 469b mov fp, r3 + 80041f4: f816 0c01 ldrb.w r0, [r6, #-1] + 80041f8: f7ff fecc bl 8003f94 <__hexdig_fun> + 80041fc: 9b01 ldr r3, [sp, #4] + 80041fe: f000 000f and.w r0, r0, #15 + 8004202: fa00 f00b lsl.w r0, r0, fp + 8004206: 4303 orrs r3, r0 + 8004208: 9301 str r3, [sp, #4] + 800420a: f10b 0b04 add.w fp, fp, #4 + 800420e: 9b05 ldr r3, [sp, #20] + 8004210: e00d b.n 800422e <__gethex+0x26e> + 8004212: 9b05 ldr r3, [sp, #20] + 8004214: 9a08 ldr r2, [sp, #32] + 8004216: 4413 add r3, r2 + 8004218: 42bb cmp r3, r7 + 800421a: d3e0 bcc.n 80041de <__gethex+0x21e> + 800421c: 4618 mov r0, r3 + 800421e: 9903 ldr r1, [sp, #12] + 8004220: 9309 str r3, [sp, #36] ; 0x24 + 8004222: 4652 mov r2, sl + 8004224: f001 fb3f bl 80058a6 + 8004228: 9b09 ldr r3, [sp, #36] ; 0x24 + 800422a: 2800 cmp r0, #0 + 800422c: d1d7 bne.n 80041de <__gethex+0x21e> + 800422e: 461e mov r6, r3 + 8004230: e78c b.n 800414c <__gethex+0x18c> + 8004232: f04f 0a03 mov.w sl, #3 + 8004236: e7b9 b.n 80041ac <__gethex+0x1ec> + 8004238: da09 bge.n 800424e <__gethex+0x28e> + 800423a: 1bf7 subs r7, r6, r7 + 800423c: 4621 mov r1, r4 + 800423e: 9802 ldr r0, [sp, #8] + 8004240: 463a mov r2, r7 + 8004242: f000 fce7 bl 8004c14 <__lshift> + 8004246: 1bed subs r5, r5, r7 + 8004248: 4604 mov r4, r0 + 800424a: f100 0914 add.w r9, r0, #20 + 800424e: f04f 0a00 mov.w sl, #0 + 8004252: e7b0 b.n 80041b6 <__gethex+0x1f6> + 8004254: f8d8 0004 ldr.w r0, [r8, #4] + 8004258: 42a8 cmp r0, r5 + 800425a: dd70 ble.n 800433e <__gethex+0x37e> + 800425c: 1b45 subs r5, r0, r5 + 800425e: 42ae cmp r6, r5 + 8004260: dc34 bgt.n 80042cc <__gethex+0x30c> + 8004262: f8d8 300c ldr.w r3, [r8, #12] + 8004266: 2b02 cmp r3, #2 + 8004268: d028 beq.n 80042bc <__gethex+0x2fc> + 800426a: 2b03 cmp r3, #3 + 800426c: d02a beq.n 80042c4 <__gethex+0x304> + 800426e: 2b01 cmp r3, #1 + 8004270: d115 bne.n 800429e <__gethex+0x2de> + 8004272: 42ae cmp r6, r5 + 8004274: d113 bne.n 800429e <__gethex+0x2de> + 8004276: 2e01 cmp r6, #1 + 8004278: d10b bne.n 8004292 <__gethex+0x2d2> + 800427a: 9a06 ldr r2, [sp, #24] + 800427c: f8d8 3004 ldr.w r3, [r8, #4] + 8004280: 6013 str r3, [r2, #0] + 8004282: 2301 movs r3, #1 + 8004284: 6123 str r3, [r4, #16] + 8004286: f8c9 3000 str.w r3, [r9] + 800428a: 9b14 ldr r3, [sp, #80] ; 0x50 + 800428c: 2762 movs r7, #98 ; 0x62 + 800428e: 601c str r4, [r3, #0] + 8004290: e728 b.n 80040e4 <__gethex+0x124> + 8004292: 1e71 subs r1, r6, #1 + 8004294: 4620 mov r0, r4 + 8004296: f000 fef6 bl 8005086 <__any_on> + 800429a: 2800 cmp r0, #0 + 800429c: d1ed bne.n 800427a <__gethex+0x2ba> + 800429e: 9802 ldr r0, [sp, #8] + 80042a0: 4621 mov r1, r4 + 80042a2: f000 fa9d bl 80047e0 <_Bfree> + 80042a6: 9a14 ldr r2, [sp, #80] ; 0x50 + 80042a8: 2300 movs r3, #0 + 80042aa: 6013 str r3, [r2, #0] + 80042ac: 2750 movs r7, #80 ; 0x50 + 80042ae: e719 b.n 80040e4 <__gethex+0x124> + 80042b0: 08006114 .word 0x08006114 + 80042b4: 08006034 .word 0x08006034 + 80042b8: 080060a8 .word 0x080060a8 + 80042bc: 9b15 ldr r3, [sp, #84] ; 0x54 + 80042be: 2b00 cmp r3, #0 + 80042c0: d1ed bne.n 800429e <__gethex+0x2de> + 80042c2: e7da b.n 800427a <__gethex+0x2ba> + 80042c4: 9b15 ldr r3, [sp, #84] ; 0x54 + 80042c6: 2b00 cmp r3, #0 + 80042c8: d1d7 bne.n 800427a <__gethex+0x2ba> + 80042ca: e7e8 b.n 800429e <__gethex+0x2de> + 80042cc: 1e6f subs r7, r5, #1 + 80042ce: f1ba 0f00 cmp.w sl, #0 + 80042d2: d131 bne.n 8004338 <__gethex+0x378> + 80042d4: b127 cbz r7, 80042e0 <__gethex+0x320> + 80042d6: 4639 mov r1, r7 + 80042d8: 4620 mov r0, r4 + 80042da: f000 fed4 bl 8005086 <__any_on> + 80042de: 4682 mov sl, r0 + 80042e0: 117b asrs r3, r7, #5 + 80042e2: 2101 movs r1, #1 + 80042e4: f859 3023 ldr.w r3, [r9, r3, lsl #2] + 80042e8: f007 071f and.w r7, r7, #31 + 80042ec: fa01 f707 lsl.w r7, r1, r7 + 80042f0: 421f tst r7, r3 + 80042f2: 4629 mov r1, r5 + 80042f4: 4620 mov r0, r4 + 80042f6: bf18 it ne + 80042f8: f04a 0a02 orrne.w sl, sl, #2 + 80042fc: 1b76 subs r6, r6, r5 + 80042fe: f7ff fdf7 bl 8003ef0 + 8004302: f8d8 5004 ldr.w r5, [r8, #4] + 8004306: 2702 movs r7, #2 + 8004308: f1ba 0f00 cmp.w sl, #0 + 800430c: d048 beq.n 80043a0 <__gethex+0x3e0> + 800430e: f8d8 300c ldr.w r3, [r8, #12] + 8004312: 2b02 cmp r3, #2 + 8004314: d015 beq.n 8004342 <__gethex+0x382> + 8004316: 2b03 cmp r3, #3 + 8004318: d017 beq.n 800434a <__gethex+0x38a> + 800431a: 2b01 cmp r3, #1 + 800431c: d109 bne.n 8004332 <__gethex+0x372> + 800431e: f01a 0f02 tst.w sl, #2 + 8004322: d006 beq.n 8004332 <__gethex+0x372> + 8004324: f8d9 0000 ldr.w r0, [r9] + 8004328: ea4a 0a00 orr.w sl, sl, r0 + 800432c: f01a 0f01 tst.w sl, #1 + 8004330: d10e bne.n 8004350 <__gethex+0x390> + 8004332: f047 0710 orr.w r7, r7, #16 + 8004336: e033 b.n 80043a0 <__gethex+0x3e0> + 8004338: f04f 0a01 mov.w sl, #1 + 800433c: e7d0 b.n 80042e0 <__gethex+0x320> + 800433e: 2701 movs r7, #1 + 8004340: e7e2 b.n 8004308 <__gethex+0x348> + 8004342: 9b15 ldr r3, [sp, #84] ; 0x54 + 8004344: f1c3 0301 rsb r3, r3, #1 + 8004348: 9315 str r3, [sp, #84] ; 0x54 + 800434a: 9b15 ldr r3, [sp, #84] ; 0x54 + 800434c: 2b00 cmp r3, #0 + 800434e: d0f0 beq.n 8004332 <__gethex+0x372> + 8004350: f8d4 b010 ldr.w fp, [r4, #16] + 8004354: f104 0314 add.w r3, r4, #20 + 8004358: ea4f 0a8b mov.w sl, fp, lsl #2 + 800435c: eb03 018b add.w r1, r3, fp, lsl #2 + 8004360: f04f 0c00 mov.w ip, #0 + 8004364: 4618 mov r0, r3 + 8004366: f853 2b04 ldr.w r2, [r3], #4 + 800436a: f1b2 3fff cmp.w r2, #4294967295 + 800436e: d01c beq.n 80043aa <__gethex+0x3ea> + 8004370: 3201 adds r2, #1 + 8004372: 6002 str r2, [r0, #0] + 8004374: 2f02 cmp r7, #2 + 8004376: f104 0314 add.w r3, r4, #20 + 800437a: d13d bne.n 80043f8 <__gethex+0x438> + 800437c: f8d8 2000 ldr.w r2, [r8] + 8004380: 3a01 subs r2, #1 + 8004382: 42b2 cmp r2, r6 + 8004384: d10a bne.n 800439c <__gethex+0x3dc> + 8004386: 1171 asrs r1, r6, #5 + 8004388: 2201 movs r2, #1 + 800438a: f853 3021 ldr.w r3, [r3, r1, lsl #2] + 800438e: f006 061f and.w r6, r6, #31 + 8004392: fa02 f606 lsl.w r6, r2, r6 + 8004396: 421e tst r6, r3 + 8004398: bf18 it ne + 800439a: 4617 movne r7, r2 + 800439c: f047 0720 orr.w r7, r7, #32 + 80043a0: 9b14 ldr r3, [sp, #80] ; 0x50 + 80043a2: 601c str r4, [r3, #0] + 80043a4: 9b06 ldr r3, [sp, #24] + 80043a6: 601d str r5, [r3, #0] + 80043a8: e69c b.n 80040e4 <__gethex+0x124> + 80043aa: 4299 cmp r1, r3 + 80043ac: f843 cc04 str.w ip, [r3, #-4] + 80043b0: d8d8 bhi.n 8004364 <__gethex+0x3a4> + 80043b2: 68a3 ldr r3, [r4, #8] + 80043b4: 459b cmp fp, r3 + 80043b6: db17 blt.n 80043e8 <__gethex+0x428> + 80043b8: 6861 ldr r1, [r4, #4] + 80043ba: 9802 ldr r0, [sp, #8] + 80043bc: 3101 adds r1, #1 + 80043be: f000 f9cf bl 8004760 <_Balloc> + 80043c2: 4681 mov r9, r0 + 80043c4: b918 cbnz r0, 80043ce <__gethex+0x40e> + 80043c6: 4b1a ldr r3, [pc, #104] ; (8004430 <__gethex+0x470>) + 80043c8: 4602 mov r2, r0 + 80043ca: 2184 movs r1, #132 ; 0x84 + 80043cc: e6ad b.n 800412a <__gethex+0x16a> + 80043ce: 6922 ldr r2, [r4, #16] + 80043d0: 3202 adds r2, #2 + 80043d2: f104 010c add.w r1, r4, #12 + 80043d6: 0092 lsls r2, r2, #2 + 80043d8: 300c adds r0, #12 + 80043da: f000 f9b3 bl 8004744 + 80043de: 4621 mov r1, r4 + 80043e0: 9802 ldr r0, [sp, #8] + 80043e2: f000 f9fd bl 80047e0 <_Bfree> + 80043e6: 464c mov r4, r9 + 80043e8: 6923 ldr r3, [r4, #16] + 80043ea: 1c5a adds r2, r3, #1 + 80043ec: eb04 0383 add.w r3, r4, r3, lsl #2 + 80043f0: 6122 str r2, [r4, #16] + 80043f2: 2201 movs r2, #1 + 80043f4: 615a str r2, [r3, #20] + 80043f6: e7bd b.n 8004374 <__gethex+0x3b4> + 80043f8: 6922 ldr r2, [r4, #16] + 80043fa: 455a cmp r2, fp + 80043fc: dd0b ble.n 8004416 <__gethex+0x456> + 80043fe: 2101 movs r1, #1 + 8004400: 4620 mov r0, r4 + 8004402: f7ff fd75 bl 8003ef0 + 8004406: f8d8 3008 ldr.w r3, [r8, #8] + 800440a: 3501 adds r5, #1 + 800440c: 42ab cmp r3, r5 + 800440e: f6ff aed6 blt.w 80041be <__gethex+0x1fe> + 8004412: 2701 movs r7, #1 + 8004414: e7c2 b.n 800439c <__gethex+0x3dc> + 8004416: f016 061f ands.w r6, r6, #31 + 800441a: d0fa beq.n 8004412 <__gethex+0x452> + 800441c: 449a add sl, r3 + 800441e: f1c6 0620 rsb r6, r6, #32 + 8004422: f85a 0c04 ldr.w r0, [sl, #-4] + 8004426: f000 fa91 bl 800494c <__hi0bits> + 800442a: 42b0 cmp r0, r6 + 800442c: dbe7 blt.n 80043fe <__gethex+0x43e> + 800442e: e7f0 b.n 8004412 <__gethex+0x452> + 8004430: 08006034 .word 0x08006034 + +08004434 : + 8004434: f1c2 0208 rsb r2, r2, #8 + 8004438: 0092 lsls r2, r2, #2 + 800443a: b570 push {r4, r5, r6, lr} + 800443c: f1c2 0620 rsb r6, r2, #32 + 8004440: 6843 ldr r3, [r0, #4] + 8004442: 6804 ldr r4, [r0, #0] + 8004444: fa03 f506 lsl.w r5, r3, r6 + 8004448: 432c orrs r4, r5 + 800444a: 40d3 lsrs r3, r2 + 800444c: 6004 str r4, [r0, #0] + 800444e: f840 3f04 str.w r3, [r0, #4]! + 8004452: 4288 cmp r0, r1 + 8004454: d3f4 bcc.n 8004440 + 8004456: bd70 pop {r4, r5, r6, pc} + +08004458 <__match>: + 8004458: b530 push {r4, r5, lr} + 800445a: 6803 ldr r3, [r0, #0] + 800445c: 3301 adds r3, #1 + 800445e: f811 4b01 ldrb.w r4, [r1], #1 + 8004462: b914 cbnz r4, 800446a <__match+0x12> + 8004464: 6003 str r3, [r0, #0] + 8004466: 2001 movs r0, #1 + 8004468: bd30 pop {r4, r5, pc} + 800446a: f813 2b01 ldrb.w r2, [r3], #1 + 800446e: f1a2 0541 sub.w r5, r2, #65 ; 0x41 + 8004472: 2d19 cmp r5, #25 + 8004474: bf98 it ls + 8004476: 3220 addls r2, #32 + 8004478: 42a2 cmp r2, r4 + 800447a: d0f0 beq.n 800445e <__match+0x6> + 800447c: 2000 movs r0, #0 + 800447e: e7f3 b.n 8004468 <__match+0x10> + +08004480 <__hexnan>: + 8004480: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004484: 680b ldr r3, [r1, #0] + 8004486: 6801 ldr r1, [r0, #0] + 8004488: 115e asrs r6, r3, #5 + 800448a: eb02 0686 add.w r6, r2, r6, lsl #2 + 800448e: f013 031f ands.w r3, r3, #31 + 8004492: b087 sub sp, #28 + 8004494: bf18 it ne + 8004496: 3604 addne r6, #4 + 8004498: 2500 movs r5, #0 + 800449a: 1f37 subs r7, r6, #4 + 800449c: 4682 mov sl, r0 + 800449e: 4690 mov r8, r2 + 80044a0: 9301 str r3, [sp, #4] + 80044a2: f846 5c04 str.w r5, [r6, #-4] + 80044a6: 46b9 mov r9, r7 + 80044a8: 463c mov r4, r7 + 80044aa: 9502 str r5, [sp, #8] + 80044ac: 46ab mov fp, r5 + 80044ae: 784a ldrb r2, [r1, #1] + 80044b0: 1c4b adds r3, r1, #1 + 80044b2: 9303 str r3, [sp, #12] + 80044b4: b342 cbz r2, 8004508 <__hexnan+0x88> + 80044b6: 4610 mov r0, r2 + 80044b8: 9105 str r1, [sp, #20] + 80044ba: 9204 str r2, [sp, #16] + 80044bc: f7ff fd6a bl 8003f94 <__hexdig_fun> + 80044c0: 2800 cmp r0, #0 + 80044c2: d14f bne.n 8004564 <__hexnan+0xe4> + 80044c4: 9a04 ldr r2, [sp, #16] + 80044c6: 9905 ldr r1, [sp, #20] + 80044c8: 2a20 cmp r2, #32 + 80044ca: d818 bhi.n 80044fe <__hexnan+0x7e> + 80044cc: 9b02 ldr r3, [sp, #8] + 80044ce: 459b cmp fp, r3 + 80044d0: dd13 ble.n 80044fa <__hexnan+0x7a> + 80044d2: 454c cmp r4, r9 + 80044d4: d206 bcs.n 80044e4 <__hexnan+0x64> + 80044d6: 2d07 cmp r5, #7 + 80044d8: dc04 bgt.n 80044e4 <__hexnan+0x64> + 80044da: 462a mov r2, r5 + 80044dc: 4649 mov r1, r9 + 80044de: 4620 mov r0, r4 + 80044e0: f7ff ffa8 bl 8004434 + 80044e4: 4544 cmp r4, r8 + 80044e6: d950 bls.n 800458a <__hexnan+0x10a> + 80044e8: 2300 movs r3, #0 + 80044ea: f1a4 0904 sub.w r9, r4, #4 + 80044ee: f844 3c04 str.w r3, [r4, #-4] + 80044f2: f8cd b008 str.w fp, [sp, #8] + 80044f6: 464c mov r4, r9 + 80044f8: 461d mov r5, r3 + 80044fa: 9903 ldr r1, [sp, #12] + 80044fc: e7d7 b.n 80044ae <__hexnan+0x2e> + 80044fe: 2a29 cmp r2, #41 ; 0x29 + 8004500: d156 bne.n 80045b0 <__hexnan+0x130> + 8004502: 3102 adds r1, #2 + 8004504: f8ca 1000 str.w r1, [sl] + 8004508: f1bb 0f00 cmp.w fp, #0 + 800450c: d050 beq.n 80045b0 <__hexnan+0x130> + 800450e: 454c cmp r4, r9 + 8004510: d206 bcs.n 8004520 <__hexnan+0xa0> + 8004512: 2d07 cmp r5, #7 + 8004514: dc04 bgt.n 8004520 <__hexnan+0xa0> + 8004516: 462a mov r2, r5 + 8004518: 4649 mov r1, r9 + 800451a: 4620 mov r0, r4 + 800451c: f7ff ff8a bl 8004434 + 8004520: 4544 cmp r4, r8 + 8004522: d934 bls.n 800458e <__hexnan+0x10e> + 8004524: f1a8 0204 sub.w r2, r8, #4 + 8004528: 4623 mov r3, r4 + 800452a: f853 1b04 ldr.w r1, [r3], #4 + 800452e: f842 1f04 str.w r1, [r2, #4]! + 8004532: 429f cmp r7, r3 + 8004534: d2f9 bcs.n 800452a <__hexnan+0xaa> + 8004536: 1b3b subs r3, r7, r4 + 8004538: f023 0303 bic.w r3, r3, #3 + 800453c: 3304 adds r3, #4 + 800453e: 3401 adds r4, #1 + 8004540: 3e03 subs r6, #3 + 8004542: 42b4 cmp r4, r6 + 8004544: bf88 it hi + 8004546: 2304 movhi r3, #4 + 8004548: 4443 add r3, r8 + 800454a: 2200 movs r2, #0 + 800454c: f843 2b04 str.w r2, [r3], #4 + 8004550: 429f cmp r7, r3 + 8004552: d2fb bcs.n 800454c <__hexnan+0xcc> + 8004554: 683b ldr r3, [r7, #0] + 8004556: b91b cbnz r3, 8004560 <__hexnan+0xe0> + 8004558: 4547 cmp r7, r8 + 800455a: d127 bne.n 80045ac <__hexnan+0x12c> + 800455c: 2301 movs r3, #1 + 800455e: 603b str r3, [r7, #0] + 8004560: 2005 movs r0, #5 + 8004562: e026 b.n 80045b2 <__hexnan+0x132> + 8004564: 3501 adds r5, #1 + 8004566: 2d08 cmp r5, #8 + 8004568: f10b 0b01 add.w fp, fp, #1 + 800456c: dd06 ble.n 800457c <__hexnan+0xfc> + 800456e: 4544 cmp r4, r8 + 8004570: d9c3 bls.n 80044fa <__hexnan+0x7a> + 8004572: 2300 movs r3, #0 + 8004574: f844 3c04 str.w r3, [r4, #-4] + 8004578: 2501 movs r5, #1 + 800457a: 3c04 subs r4, #4 + 800457c: 6822 ldr r2, [r4, #0] + 800457e: f000 000f and.w r0, r0, #15 + 8004582: ea40 1202 orr.w r2, r0, r2, lsl #4 + 8004586: 6022 str r2, [r4, #0] + 8004588: e7b7 b.n 80044fa <__hexnan+0x7a> + 800458a: 2508 movs r5, #8 + 800458c: e7b5 b.n 80044fa <__hexnan+0x7a> + 800458e: 9b01 ldr r3, [sp, #4] + 8004590: 2b00 cmp r3, #0 + 8004592: d0df beq.n 8004554 <__hexnan+0xd4> + 8004594: f04f 32ff mov.w r2, #4294967295 + 8004598: f1c3 0320 rsb r3, r3, #32 + 800459c: fa22 f303 lsr.w r3, r2, r3 + 80045a0: f856 2c04 ldr.w r2, [r6, #-4] + 80045a4: 401a ands r2, r3 + 80045a6: f846 2c04 str.w r2, [r6, #-4] + 80045aa: e7d3 b.n 8004554 <__hexnan+0xd4> + 80045ac: 3f04 subs r7, #4 + 80045ae: e7d1 b.n 8004554 <__hexnan+0xd4> + 80045b0: 2004 movs r0, #4 + 80045b2: b007 add sp, #28 + 80045b4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + +080045b8 <_getc_r>: + 80045b8: b538 push {r3, r4, r5, lr} + 80045ba: 460c mov r4, r1 + 80045bc: 4605 mov r5, r0 + 80045be: b118 cbz r0, 80045c8 <_getc_r+0x10> + 80045c0: 6983 ldr r3, [r0, #24] + 80045c2: b90b cbnz r3, 80045c8 <_getc_r+0x10> + 80045c4: f7ff fbda bl 8003d7c <__sinit> + 80045c8: 4b18 ldr r3, [pc, #96] ; (800462c <_getc_r+0x74>) + 80045ca: 429c cmp r4, r3 + 80045cc: d11e bne.n 800460c <_getc_r+0x54> + 80045ce: 686c ldr r4, [r5, #4] + 80045d0: 6e63 ldr r3, [r4, #100] ; 0x64 + 80045d2: 07d8 lsls r0, r3, #31 + 80045d4: d405 bmi.n 80045e2 <_getc_r+0x2a> + 80045d6: 89a3 ldrh r3, [r4, #12] + 80045d8: 0599 lsls r1, r3, #22 + 80045da: d402 bmi.n 80045e2 <_getc_r+0x2a> + 80045dc: 6da0 ldr r0, [r4, #88] ; 0x58 + 80045de: f000 f830 bl 8004642 <__retarget_lock_acquire_recursive> + 80045e2: 6863 ldr r3, [r4, #4] + 80045e4: 3b01 subs r3, #1 + 80045e6: 2b00 cmp r3, #0 + 80045e8: 6063 str r3, [r4, #4] + 80045ea: da19 bge.n 8004620 <_getc_r+0x68> + 80045ec: 4628 mov r0, r5 + 80045ee: 4621 mov r1, r4 + 80045f0: f001 f8d4 bl 800579c <__srget_r> + 80045f4: 4605 mov r5, r0 + 80045f6: 6e63 ldr r3, [r4, #100] ; 0x64 + 80045f8: 07da lsls r2, r3, #31 + 80045fa: d405 bmi.n 8004608 <_getc_r+0x50> + 80045fc: 89a3 ldrh r3, [r4, #12] + 80045fe: 059b lsls r3, r3, #22 + 8004600: d402 bmi.n 8004608 <_getc_r+0x50> + 8004602: 6da0 ldr r0, [r4, #88] ; 0x58 + 8004604: f000 f81e bl 8004644 <__retarget_lock_release_recursive> + 8004608: 4628 mov r0, r5 + 800460a: bd38 pop {r3, r4, r5, pc} + 800460c: 4b08 ldr r3, [pc, #32] ; (8004630 <_getc_r+0x78>) + 800460e: 429c cmp r4, r3 + 8004610: d101 bne.n 8004616 <_getc_r+0x5e> + 8004612: 68ac ldr r4, [r5, #8] + 8004614: e7dc b.n 80045d0 <_getc_r+0x18> + 8004616: 4b07 ldr r3, [pc, #28] ; (8004634 <_getc_r+0x7c>) + 8004618: 429c cmp r4, r3 + 800461a: bf08 it eq + 800461c: 68ec ldreq r4, [r5, #12] + 800461e: e7d7 b.n 80045d0 <_getc_r+0x18> + 8004620: 6823 ldr r3, [r4, #0] + 8004622: 1c5a adds r2, r3, #1 + 8004624: 6022 str r2, [r4, #0] + 8004626: 781d ldrb r5, [r3, #0] + 8004628: e7e5 b.n 80045f6 <_getc_r+0x3e> + 800462a: bf00 nop + 800462c: 08006068 .word 0x08006068 + 8004630: 08006088 .word 0x08006088 + 8004634: 08006048 .word 0x08006048 + +08004638 <_localeconv_r>: + 8004638: 4800 ldr r0, [pc, #0] ; (800463c <_localeconv_r+0x4>) + 800463a: 4770 bx lr + 800463c: 20000158 .word 0x20000158 + +08004640 <__retarget_lock_init_recursive>: + 8004640: 4770 bx lr + +08004642 <__retarget_lock_acquire_recursive>: + 8004642: 4770 bx lr + +08004644 <__retarget_lock_release_recursive>: + 8004644: 4770 bx lr + +08004646 <__swhatbuf_r>: + 8004646: b570 push {r4, r5, r6, lr} + 8004648: 460e mov r6, r1 + 800464a: f9b1 100e ldrsh.w r1, [r1, #14] + 800464e: 2900 cmp r1, #0 + 8004650: b096 sub sp, #88 ; 0x58 + 8004652: 4614 mov r4, r2 + 8004654: 461d mov r5, r3 + 8004656: da07 bge.n 8004668 <__swhatbuf_r+0x22> + 8004658: 2300 movs r3, #0 + 800465a: 602b str r3, [r5, #0] + 800465c: 89b3 ldrh r3, [r6, #12] + 800465e: 061a lsls r2, r3, #24 + 8004660: d410 bmi.n 8004684 <__swhatbuf_r+0x3e> + 8004662: f44f 6380 mov.w r3, #1024 ; 0x400 + 8004666: e00e b.n 8004686 <__swhatbuf_r+0x40> + 8004668: 466a mov r2, sp + 800466a: f001 fa4f bl 8005b0c <_fstat_r> + 800466e: 2800 cmp r0, #0 + 8004670: dbf2 blt.n 8004658 <__swhatbuf_r+0x12> + 8004672: 9a01 ldr r2, [sp, #4] + 8004674: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 8004678: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 800467c: 425a negs r2, r3 + 800467e: 415a adcs r2, r3 + 8004680: 602a str r2, [r5, #0] + 8004682: e7ee b.n 8004662 <__swhatbuf_r+0x1c> + 8004684: 2340 movs r3, #64 ; 0x40 + 8004686: 2000 movs r0, #0 + 8004688: 6023 str r3, [r4, #0] + 800468a: b016 add sp, #88 ; 0x58 + 800468c: bd70 pop {r4, r5, r6, pc} + ... + +08004690 <__smakebuf_r>: + 8004690: 898b ldrh r3, [r1, #12] + 8004692: b573 push {r0, r1, r4, r5, r6, lr} + 8004694: 079d lsls r5, r3, #30 + 8004696: 4606 mov r6, r0 + 8004698: 460c mov r4, r1 + 800469a: d507 bpl.n 80046ac <__smakebuf_r+0x1c> + 800469c: f104 0347 add.w r3, r4, #71 ; 0x47 + 80046a0: 6023 str r3, [r4, #0] + 80046a2: 6123 str r3, [r4, #16] + 80046a4: 2301 movs r3, #1 + 80046a6: 6163 str r3, [r4, #20] + 80046a8: b002 add sp, #8 + 80046aa: bd70 pop {r4, r5, r6, pc} + 80046ac: ab01 add r3, sp, #4 + 80046ae: 466a mov r2, sp + 80046b0: f7ff ffc9 bl 8004646 <__swhatbuf_r> + 80046b4: 9900 ldr r1, [sp, #0] + 80046b6: 4605 mov r5, r0 + 80046b8: 4630 mov r0, r6 + 80046ba: f000 fd61 bl 8005180 <_malloc_r> + 80046be: b948 cbnz r0, 80046d4 <__smakebuf_r+0x44> + 80046c0: f9b4 300c ldrsh.w r3, [r4, #12] + 80046c4: 059a lsls r2, r3, #22 + 80046c6: d4ef bmi.n 80046a8 <__smakebuf_r+0x18> + 80046c8: f023 0303 bic.w r3, r3, #3 + 80046cc: f043 0302 orr.w r3, r3, #2 + 80046d0: 81a3 strh r3, [r4, #12] + 80046d2: e7e3 b.n 800469c <__smakebuf_r+0xc> + 80046d4: 4b0d ldr r3, [pc, #52] ; (800470c <__smakebuf_r+0x7c>) + 80046d6: 62b3 str r3, [r6, #40] ; 0x28 + 80046d8: 89a3 ldrh r3, [r4, #12] + 80046da: 6020 str r0, [r4, #0] + 80046dc: f043 0380 orr.w r3, r3, #128 ; 0x80 + 80046e0: 81a3 strh r3, [r4, #12] + 80046e2: 9b00 ldr r3, [sp, #0] + 80046e4: 6163 str r3, [r4, #20] + 80046e6: 9b01 ldr r3, [sp, #4] + 80046e8: 6120 str r0, [r4, #16] + 80046ea: b15b cbz r3, 8004704 <__smakebuf_r+0x74> + 80046ec: f9b4 100e ldrsh.w r1, [r4, #14] + 80046f0: 4630 mov r0, r6 + 80046f2: f001 fa1d bl 8005b30 <_isatty_r> + 80046f6: b128 cbz r0, 8004704 <__smakebuf_r+0x74> + 80046f8: 89a3 ldrh r3, [r4, #12] + 80046fa: f023 0303 bic.w r3, r3, #3 + 80046fe: f043 0301 orr.w r3, r3, #1 + 8004702: 81a3 strh r3, [r4, #12] + 8004704: 89a0 ldrh r0, [r4, #12] + 8004706: 4305 orrs r5, r0 + 8004708: 81a5 strh r5, [r4, #12] + 800470a: e7cd b.n 80046a8 <__smakebuf_r+0x18> + 800470c: 08003d15 .word 0x08003d15 + +08004710 : + 8004710: 4b02 ldr r3, [pc, #8] ; (800471c ) + 8004712: 4601 mov r1, r0 + 8004714: 6818 ldr r0, [r3, #0] + 8004716: f000 bd33 b.w 8005180 <_malloc_r> + 800471a: bf00 nop + 800471c: 20000000 .word 0x20000000 + +08004720 <__ascii_mbtowc>: + 8004720: b082 sub sp, #8 + 8004722: b901 cbnz r1, 8004726 <__ascii_mbtowc+0x6> + 8004724: a901 add r1, sp, #4 + 8004726: b142 cbz r2, 800473a <__ascii_mbtowc+0x1a> + 8004728: b14b cbz r3, 800473e <__ascii_mbtowc+0x1e> + 800472a: 7813 ldrb r3, [r2, #0] + 800472c: 600b str r3, [r1, #0] + 800472e: 7812 ldrb r2, [r2, #0] + 8004730: 1e10 subs r0, r2, #0 + 8004732: bf18 it ne + 8004734: 2001 movne r0, #1 + 8004736: b002 add sp, #8 + 8004738: 4770 bx lr + 800473a: 4610 mov r0, r2 + 800473c: e7fb b.n 8004736 <__ascii_mbtowc+0x16> + 800473e: f06f 0001 mvn.w r0, #1 + 8004742: e7f8 b.n 8004736 <__ascii_mbtowc+0x16> + +08004744 : + 8004744: 440a add r2, r1 + 8004746: 4291 cmp r1, r2 + 8004748: f100 33ff add.w r3, r0, #4294967295 + 800474c: d100 bne.n 8004750 + 800474e: 4770 bx lr + 8004750: b510 push {r4, lr} + 8004752: f811 4b01 ldrb.w r4, [r1], #1 + 8004756: f803 4f01 strb.w r4, [r3, #1]! + 800475a: 4291 cmp r1, r2 + 800475c: d1f9 bne.n 8004752 + 800475e: bd10 pop {r4, pc} + +08004760 <_Balloc>: + 8004760: b570 push {r4, r5, r6, lr} + 8004762: 6a46 ldr r6, [r0, #36] ; 0x24 + 8004764: 4604 mov r4, r0 + 8004766: 460d mov r5, r1 + 8004768: b976 cbnz r6, 8004788 <_Balloc+0x28> + 800476a: 2010 movs r0, #16 + 800476c: f7ff ffd0 bl 8004710 + 8004770: 4602 mov r2, r0 + 8004772: 6260 str r0, [r4, #36] ; 0x24 + 8004774: b920 cbnz r0, 8004780 <_Balloc+0x20> + 8004776: 4b18 ldr r3, [pc, #96] ; (80047d8 <_Balloc+0x78>) + 8004778: 4818 ldr r0, [pc, #96] ; (80047dc <_Balloc+0x7c>) + 800477a: 2166 movs r1, #102 ; 0x66 + 800477c: f001 f986 bl 8005a8c <__assert_func> + 8004780: e9c0 6601 strd r6, r6, [r0, #4] + 8004784: 6006 str r6, [r0, #0] + 8004786: 60c6 str r6, [r0, #12] + 8004788: 6a66 ldr r6, [r4, #36] ; 0x24 + 800478a: 68f3 ldr r3, [r6, #12] + 800478c: b183 cbz r3, 80047b0 <_Balloc+0x50> + 800478e: 6a63 ldr r3, [r4, #36] ; 0x24 + 8004790: 68db ldr r3, [r3, #12] + 8004792: f853 0025 ldr.w r0, [r3, r5, lsl #2] + 8004796: b9b8 cbnz r0, 80047c8 <_Balloc+0x68> + 8004798: 2101 movs r1, #1 + 800479a: fa01 f605 lsl.w r6, r1, r5 + 800479e: 1d72 adds r2, r6, #5 + 80047a0: 0092 lsls r2, r2, #2 + 80047a2: 4620 mov r0, r4 + 80047a4: f000 fc90 bl 80050c8 <_calloc_r> + 80047a8: b160 cbz r0, 80047c4 <_Balloc+0x64> + 80047aa: e9c0 5601 strd r5, r6, [r0, #4] + 80047ae: e00e b.n 80047ce <_Balloc+0x6e> + 80047b0: 2221 movs r2, #33 ; 0x21 + 80047b2: 2104 movs r1, #4 + 80047b4: 4620 mov r0, r4 + 80047b6: f000 fc87 bl 80050c8 <_calloc_r> + 80047ba: 6a63 ldr r3, [r4, #36] ; 0x24 + 80047bc: 60f0 str r0, [r6, #12] + 80047be: 68db ldr r3, [r3, #12] + 80047c0: 2b00 cmp r3, #0 + 80047c2: d1e4 bne.n 800478e <_Balloc+0x2e> + 80047c4: 2000 movs r0, #0 + 80047c6: bd70 pop {r4, r5, r6, pc} + 80047c8: 6802 ldr r2, [r0, #0] + 80047ca: f843 2025 str.w r2, [r3, r5, lsl #2] + 80047ce: 2300 movs r3, #0 + 80047d0: e9c0 3303 strd r3, r3, [r0, #12] + 80047d4: e7f7 b.n 80047c6 <_Balloc+0x66> + 80047d6: bf00 nop + 80047d8: 08005fbe .word 0x08005fbe + 80047dc: 08006128 .word 0x08006128 + +080047e0 <_Bfree>: + 80047e0: b570 push {r4, r5, r6, lr} + 80047e2: 6a46 ldr r6, [r0, #36] ; 0x24 + 80047e4: 4605 mov r5, r0 + 80047e6: 460c mov r4, r1 + 80047e8: b976 cbnz r6, 8004808 <_Bfree+0x28> + 80047ea: 2010 movs r0, #16 + 80047ec: f7ff ff90 bl 8004710 + 80047f0: 4602 mov r2, r0 + 80047f2: 6268 str r0, [r5, #36] ; 0x24 + 80047f4: b920 cbnz r0, 8004800 <_Bfree+0x20> + 80047f6: 4b09 ldr r3, [pc, #36] ; (800481c <_Bfree+0x3c>) + 80047f8: 4809 ldr r0, [pc, #36] ; (8004820 <_Bfree+0x40>) + 80047fa: 218a movs r1, #138 ; 0x8a + 80047fc: f001 f946 bl 8005a8c <__assert_func> + 8004800: e9c0 6601 strd r6, r6, [r0, #4] + 8004804: 6006 str r6, [r0, #0] + 8004806: 60c6 str r6, [r0, #12] + 8004808: b13c cbz r4, 800481a <_Bfree+0x3a> + 800480a: 6a6b ldr r3, [r5, #36] ; 0x24 + 800480c: 6862 ldr r2, [r4, #4] + 800480e: 68db ldr r3, [r3, #12] + 8004810: f853 1022 ldr.w r1, [r3, r2, lsl #2] + 8004814: 6021 str r1, [r4, #0] + 8004816: f843 4022 str.w r4, [r3, r2, lsl #2] + 800481a: bd70 pop {r4, r5, r6, pc} + 800481c: 08005fbe .word 0x08005fbe + 8004820: 08006128 .word 0x08006128 + +08004824 <__multadd>: + 8004824: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8004828: 690e ldr r6, [r1, #16] + 800482a: 4607 mov r7, r0 + 800482c: 4698 mov r8, r3 + 800482e: 460c mov r4, r1 + 8004830: f101 0014 add.w r0, r1, #20 + 8004834: 2300 movs r3, #0 + 8004836: 6805 ldr r5, [r0, #0] + 8004838: b2a9 uxth r1, r5 + 800483a: fb02 8101 mla r1, r2, r1, r8 + 800483e: ea4f 4c11 mov.w ip, r1, lsr #16 + 8004842: 0c2d lsrs r5, r5, #16 + 8004844: fb02 c505 mla r5, r2, r5, ip + 8004848: b289 uxth r1, r1 + 800484a: 3301 adds r3, #1 + 800484c: eb01 4105 add.w r1, r1, r5, lsl #16 + 8004850: 429e cmp r6, r3 + 8004852: f840 1b04 str.w r1, [r0], #4 + 8004856: ea4f 4815 mov.w r8, r5, lsr #16 + 800485a: dcec bgt.n 8004836 <__multadd+0x12> + 800485c: f1b8 0f00 cmp.w r8, #0 + 8004860: d022 beq.n 80048a8 <__multadd+0x84> + 8004862: 68a3 ldr r3, [r4, #8] + 8004864: 42b3 cmp r3, r6 + 8004866: dc19 bgt.n 800489c <__multadd+0x78> + 8004868: 6861 ldr r1, [r4, #4] + 800486a: 4638 mov r0, r7 + 800486c: 3101 adds r1, #1 + 800486e: f7ff ff77 bl 8004760 <_Balloc> + 8004872: 4605 mov r5, r0 + 8004874: b928 cbnz r0, 8004882 <__multadd+0x5e> + 8004876: 4602 mov r2, r0 + 8004878: 4b0d ldr r3, [pc, #52] ; (80048b0 <__multadd+0x8c>) + 800487a: 480e ldr r0, [pc, #56] ; (80048b4 <__multadd+0x90>) + 800487c: 21b5 movs r1, #181 ; 0xb5 + 800487e: f001 f905 bl 8005a8c <__assert_func> + 8004882: 6922 ldr r2, [r4, #16] + 8004884: 3202 adds r2, #2 + 8004886: f104 010c add.w r1, r4, #12 + 800488a: 0092 lsls r2, r2, #2 + 800488c: 300c adds r0, #12 + 800488e: f7ff ff59 bl 8004744 + 8004892: 4621 mov r1, r4 + 8004894: 4638 mov r0, r7 + 8004896: f7ff ffa3 bl 80047e0 <_Bfree> + 800489a: 462c mov r4, r5 + 800489c: eb04 0386 add.w r3, r4, r6, lsl #2 + 80048a0: 3601 adds r6, #1 + 80048a2: f8c3 8014 str.w r8, [r3, #20] + 80048a6: 6126 str r6, [r4, #16] + 80048a8: 4620 mov r0, r4 + 80048aa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80048ae: bf00 nop + 80048b0: 08006034 .word 0x08006034 + 80048b4: 08006128 .word 0x08006128 + +080048b8 <__s2b>: + 80048b8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 80048bc: 460c mov r4, r1 + 80048be: 4615 mov r5, r2 + 80048c0: 461f mov r7, r3 + 80048c2: 2209 movs r2, #9 + 80048c4: 3308 adds r3, #8 + 80048c6: 4606 mov r6, r0 + 80048c8: fb93 f3f2 sdiv r3, r3, r2 + 80048cc: 2100 movs r1, #0 + 80048ce: 2201 movs r2, #1 + 80048d0: 429a cmp r2, r3 + 80048d2: db09 blt.n 80048e8 <__s2b+0x30> + 80048d4: 4630 mov r0, r6 + 80048d6: f7ff ff43 bl 8004760 <_Balloc> + 80048da: b940 cbnz r0, 80048ee <__s2b+0x36> + 80048dc: 4602 mov r2, r0 + 80048de: 4b19 ldr r3, [pc, #100] ; (8004944 <__s2b+0x8c>) + 80048e0: 4819 ldr r0, [pc, #100] ; (8004948 <__s2b+0x90>) + 80048e2: 21ce movs r1, #206 ; 0xce + 80048e4: f001 f8d2 bl 8005a8c <__assert_func> + 80048e8: 0052 lsls r2, r2, #1 + 80048ea: 3101 adds r1, #1 + 80048ec: e7f0 b.n 80048d0 <__s2b+0x18> + 80048ee: 9b08 ldr r3, [sp, #32] + 80048f0: 6143 str r3, [r0, #20] + 80048f2: 2d09 cmp r5, #9 + 80048f4: f04f 0301 mov.w r3, #1 + 80048f8: 6103 str r3, [r0, #16] + 80048fa: dd16 ble.n 800492a <__s2b+0x72> + 80048fc: f104 0909 add.w r9, r4, #9 + 8004900: 46c8 mov r8, r9 + 8004902: 442c add r4, r5 + 8004904: f818 3b01 ldrb.w r3, [r8], #1 + 8004908: 4601 mov r1, r0 + 800490a: 3b30 subs r3, #48 ; 0x30 + 800490c: 220a movs r2, #10 + 800490e: 4630 mov r0, r6 + 8004910: f7ff ff88 bl 8004824 <__multadd> + 8004914: 45a0 cmp r8, r4 + 8004916: d1f5 bne.n 8004904 <__s2b+0x4c> + 8004918: f1a5 0408 sub.w r4, r5, #8 + 800491c: 444c add r4, r9 + 800491e: 1b2d subs r5, r5, r4 + 8004920: 1963 adds r3, r4, r5 + 8004922: 42bb cmp r3, r7 + 8004924: db04 blt.n 8004930 <__s2b+0x78> + 8004926: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 800492a: 340a adds r4, #10 + 800492c: 2509 movs r5, #9 + 800492e: e7f6 b.n 800491e <__s2b+0x66> + 8004930: f814 3b01 ldrb.w r3, [r4], #1 + 8004934: 4601 mov r1, r0 + 8004936: 3b30 subs r3, #48 ; 0x30 + 8004938: 220a movs r2, #10 + 800493a: 4630 mov r0, r6 + 800493c: f7ff ff72 bl 8004824 <__multadd> + 8004940: e7ee b.n 8004920 <__s2b+0x68> + 8004942: bf00 nop + 8004944: 08006034 .word 0x08006034 + 8004948: 08006128 .word 0x08006128 + +0800494c <__hi0bits>: + 800494c: 0c02 lsrs r2, r0, #16 + 800494e: 0412 lsls r2, r2, #16 + 8004950: 4603 mov r3, r0 + 8004952: b9ca cbnz r2, 8004988 <__hi0bits+0x3c> + 8004954: 0403 lsls r3, r0, #16 + 8004956: 2010 movs r0, #16 + 8004958: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 + 800495c: bf04 itt eq + 800495e: 021b lsleq r3, r3, #8 + 8004960: 3008 addeq r0, #8 + 8004962: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 + 8004966: bf04 itt eq + 8004968: 011b lsleq r3, r3, #4 + 800496a: 3004 addeq r0, #4 + 800496c: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 + 8004970: bf04 itt eq + 8004972: 009b lsleq r3, r3, #2 + 8004974: 3002 addeq r0, #2 + 8004976: 2b00 cmp r3, #0 + 8004978: db05 blt.n 8004986 <__hi0bits+0x3a> + 800497a: f013 4f80 tst.w r3, #1073741824 ; 0x40000000 + 800497e: f100 0001 add.w r0, r0, #1 + 8004982: bf08 it eq + 8004984: 2020 moveq r0, #32 + 8004986: 4770 bx lr + 8004988: 2000 movs r0, #0 + 800498a: e7e5 b.n 8004958 <__hi0bits+0xc> + +0800498c <__lo0bits>: + 800498c: 6803 ldr r3, [r0, #0] + 800498e: 4602 mov r2, r0 + 8004990: f013 0007 ands.w r0, r3, #7 + 8004994: d00b beq.n 80049ae <__lo0bits+0x22> + 8004996: 07d9 lsls r1, r3, #31 + 8004998: d422 bmi.n 80049e0 <__lo0bits+0x54> + 800499a: 0798 lsls r0, r3, #30 + 800499c: bf49 itett mi + 800499e: 085b lsrmi r3, r3, #1 + 80049a0: 089b lsrpl r3, r3, #2 + 80049a2: 2001 movmi r0, #1 + 80049a4: 6013 strmi r3, [r2, #0] + 80049a6: bf5c itt pl + 80049a8: 6013 strpl r3, [r2, #0] + 80049aa: 2002 movpl r0, #2 + 80049ac: 4770 bx lr + 80049ae: b299 uxth r1, r3 + 80049b0: b909 cbnz r1, 80049b6 <__lo0bits+0x2a> + 80049b2: 0c1b lsrs r3, r3, #16 + 80049b4: 2010 movs r0, #16 + 80049b6: f013 0fff tst.w r3, #255 ; 0xff + 80049ba: bf04 itt eq + 80049bc: 0a1b lsreq r3, r3, #8 + 80049be: 3008 addeq r0, #8 + 80049c0: 0719 lsls r1, r3, #28 + 80049c2: bf04 itt eq + 80049c4: 091b lsreq r3, r3, #4 + 80049c6: 3004 addeq r0, #4 + 80049c8: 0799 lsls r1, r3, #30 + 80049ca: bf04 itt eq + 80049cc: 089b lsreq r3, r3, #2 + 80049ce: 3002 addeq r0, #2 + 80049d0: 07d9 lsls r1, r3, #31 + 80049d2: d403 bmi.n 80049dc <__lo0bits+0x50> + 80049d4: 085b lsrs r3, r3, #1 + 80049d6: f100 0001 add.w r0, r0, #1 + 80049da: d003 beq.n 80049e4 <__lo0bits+0x58> + 80049dc: 6013 str r3, [r2, #0] + 80049de: 4770 bx lr + 80049e0: 2000 movs r0, #0 + 80049e2: 4770 bx lr + 80049e4: 2020 movs r0, #32 + 80049e6: 4770 bx lr + +080049e8 <__i2b>: + 80049e8: b510 push {r4, lr} + 80049ea: 460c mov r4, r1 + 80049ec: 2101 movs r1, #1 + 80049ee: f7ff feb7 bl 8004760 <_Balloc> + 80049f2: 4602 mov r2, r0 + 80049f4: b928 cbnz r0, 8004a02 <__i2b+0x1a> + 80049f6: 4b05 ldr r3, [pc, #20] ; (8004a0c <__i2b+0x24>) + 80049f8: 4805 ldr r0, [pc, #20] ; (8004a10 <__i2b+0x28>) + 80049fa: f44f 71a0 mov.w r1, #320 ; 0x140 + 80049fe: f001 f845 bl 8005a8c <__assert_func> + 8004a02: 2301 movs r3, #1 + 8004a04: 6144 str r4, [r0, #20] + 8004a06: 6103 str r3, [r0, #16] + 8004a08: bd10 pop {r4, pc} + 8004a0a: bf00 nop + 8004a0c: 08006034 .word 0x08006034 + 8004a10: 08006128 .word 0x08006128 + +08004a14 <__multiply>: + 8004a14: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004a18: 4614 mov r4, r2 + 8004a1a: 690a ldr r2, [r1, #16] + 8004a1c: 6923 ldr r3, [r4, #16] + 8004a1e: 429a cmp r2, r3 + 8004a20: bfb8 it lt + 8004a22: 460b movlt r3, r1 + 8004a24: 460d mov r5, r1 + 8004a26: bfbc itt lt + 8004a28: 4625 movlt r5, r4 + 8004a2a: 461c movlt r4, r3 + 8004a2c: f8d5 a010 ldr.w sl, [r5, #16] + 8004a30: f8d4 9010 ldr.w r9, [r4, #16] + 8004a34: 68ab ldr r3, [r5, #8] + 8004a36: 6869 ldr r1, [r5, #4] + 8004a38: eb0a 0709 add.w r7, sl, r9 + 8004a3c: 42bb cmp r3, r7 + 8004a3e: b085 sub sp, #20 + 8004a40: bfb8 it lt + 8004a42: 3101 addlt r1, #1 + 8004a44: f7ff fe8c bl 8004760 <_Balloc> + 8004a48: b930 cbnz r0, 8004a58 <__multiply+0x44> + 8004a4a: 4602 mov r2, r0 + 8004a4c: 4b42 ldr r3, [pc, #264] ; (8004b58 <__multiply+0x144>) + 8004a4e: 4843 ldr r0, [pc, #268] ; (8004b5c <__multiply+0x148>) + 8004a50: f240 115d movw r1, #349 ; 0x15d + 8004a54: f001 f81a bl 8005a8c <__assert_func> + 8004a58: f100 0614 add.w r6, r0, #20 + 8004a5c: eb06 0887 add.w r8, r6, r7, lsl #2 + 8004a60: 4633 mov r3, r6 + 8004a62: 2200 movs r2, #0 + 8004a64: 4543 cmp r3, r8 + 8004a66: d31e bcc.n 8004aa6 <__multiply+0x92> + 8004a68: f105 0c14 add.w ip, r5, #20 + 8004a6c: f104 0314 add.w r3, r4, #20 + 8004a70: eb0c 0c8a add.w ip, ip, sl, lsl #2 + 8004a74: eb03 0289 add.w r2, r3, r9, lsl #2 + 8004a78: 9202 str r2, [sp, #8] + 8004a7a: ebac 0205 sub.w r2, ip, r5 + 8004a7e: 3a15 subs r2, #21 + 8004a80: f022 0203 bic.w r2, r2, #3 + 8004a84: 3204 adds r2, #4 + 8004a86: f105 0115 add.w r1, r5, #21 + 8004a8a: 458c cmp ip, r1 + 8004a8c: bf38 it cc + 8004a8e: 2204 movcc r2, #4 + 8004a90: 9201 str r2, [sp, #4] + 8004a92: 9a02 ldr r2, [sp, #8] + 8004a94: 9303 str r3, [sp, #12] + 8004a96: 429a cmp r2, r3 + 8004a98: d808 bhi.n 8004aac <__multiply+0x98> + 8004a9a: 2f00 cmp r7, #0 + 8004a9c: dc55 bgt.n 8004b4a <__multiply+0x136> + 8004a9e: 6107 str r7, [r0, #16] + 8004aa0: b005 add sp, #20 + 8004aa2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004aa6: f843 2b04 str.w r2, [r3], #4 + 8004aaa: e7db b.n 8004a64 <__multiply+0x50> + 8004aac: f8b3 a000 ldrh.w sl, [r3] + 8004ab0: f1ba 0f00 cmp.w sl, #0 + 8004ab4: d020 beq.n 8004af8 <__multiply+0xe4> + 8004ab6: f105 0e14 add.w lr, r5, #20 + 8004aba: 46b1 mov r9, r6 + 8004abc: 2200 movs r2, #0 + 8004abe: f85e 4b04 ldr.w r4, [lr], #4 + 8004ac2: f8d9 b000 ldr.w fp, [r9] + 8004ac6: b2a1 uxth r1, r4 + 8004ac8: fa1f fb8b uxth.w fp, fp + 8004acc: fb0a b101 mla r1, sl, r1, fp + 8004ad0: 4411 add r1, r2 + 8004ad2: f8d9 2000 ldr.w r2, [r9] + 8004ad6: 0c24 lsrs r4, r4, #16 + 8004ad8: 0c12 lsrs r2, r2, #16 + 8004ada: fb0a 2404 mla r4, sl, r4, r2 + 8004ade: eb04 4411 add.w r4, r4, r1, lsr #16 + 8004ae2: b289 uxth r1, r1 + 8004ae4: ea41 4104 orr.w r1, r1, r4, lsl #16 + 8004ae8: 45f4 cmp ip, lr + 8004aea: f849 1b04 str.w r1, [r9], #4 + 8004aee: ea4f 4214 mov.w r2, r4, lsr #16 + 8004af2: d8e4 bhi.n 8004abe <__multiply+0xaa> + 8004af4: 9901 ldr r1, [sp, #4] + 8004af6: 5072 str r2, [r6, r1] + 8004af8: 9a03 ldr r2, [sp, #12] + 8004afa: f8b2 9002 ldrh.w r9, [r2, #2] + 8004afe: 3304 adds r3, #4 + 8004b00: f1b9 0f00 cmp.w r9, #0 + 8004b04: d01f beq.n 8004b46 <__multiply+0x132> + 8004b06: 6834 ldr r4, [r6, #0] + 8004b08: f105 0114 add.w r1, r5, #20 + 8004b0c: 46b6 mov lr, r6 + 8004b0e: f04f 0a00 mov.w sl, #0 + 8004b12: 880a ldrh r2, [r1, #0] + 8004b14: f8be b002 ldrh.w fp, [lr, #2] + 8004b18: fb09 b202 mla r2, r9, r2, fp + 8004b1c: 4492 add sl, r2 + 8004b1e: b2a4 uxth r4, r4 + 8004b20: ea44 440a orr.w r4, r4, sl, lsl #16 + 8004b24: f84e 4b04 str.w r4, [lr], #4 + 8004b28: f851 4b04 ldr.w r4, [r1], #4 + 8004b2c: f8be 2000 ldrh.w r2, [lr] + 8004b30: 0c24 lsrs r4, r4, #16 + 8004b32: fb09 2404 mla r4, r9, r4, r2 + 8004b36: eb04 441a add.w r4, r4, sl, lsr #16 + 8004b3a: 458c cmp ip, r1 + 8004b3c: ea4f 4a14 mov.w sl, r4, lsr #16 + 8004b40: d8e7 bhi.n 8004b12 <__multiply+0xfe> + 8004b42: 9a01 ldr r2, [sp, #4] + 8004b44: 50b4 str r4, [r6, r2] + 8004b46: 3604 adds r6, #4 + 8004b48: e7a3 b.n 8004a92 <__multiply+0x7e> + 8004b4a: f858 3d04 ldr.w r3, [r8, #-4]! + 8004b4e: 2b00 cmp r3, #0 + 8004b50: d1a5 bne.n 8004a9e <__multiply+0x8a> + 8004b52: 3f01 subs r7, #1 + 8004b54: e7a1 b.n 8004a9a <__multiply+0x86> + 8004b56: bf00 nop + 8004b58: 08006034 .word 0x08006034 + 8004b5c: 08006128 .word 0x08006128 + +08004b60 <__pow5mult>: + 8004b60: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8004b64: 4615 mov r5, r2 + 8004b66: f012 0203 ands.w r2, r2, #3 + 8004b6a: 4606 mov r6, r0 + 8004b6c: 460f mov r7, r1 + 8004b6e: d007 beq.n 8004b80 <__pow5mult+0x20> + 8004b70: 4c25 ldr r4, [pc, #148] ; (8004c08 <__pow5mult+0xa8>) + 8004b72: 3a01 subs r2, #1 + 8004b74: 2300 movs r3, #0 + 8004b76: f854 2022 ldr.w r2, [r4, r2, lsl #2] + 8004b7a: f7ff fe53 bl 8004824 <__multadd> + 8004b7e: 4607 mov r7, r0 + 8004b80: 10ad asrs r5, r5, #2 + 8004b82: d03d beq.n 8004c00 <__pow5mult+0xa0> + 8004b84: 6a74 ldr r4, [r6, #36] ; 0x24 + 8004b86: b97c cbnz r4, 8004ba8 <__pow5mult+0x48> + 8004b88: 2010 movs r0, #16 + 8004b8a: f7ff fdc1 bl 8004710 + 8004b8e: 4602 mov r2, r0 + 8004b90: 6270 str r0, [r6, #36] ; 0x24 + 8004b92: b928 cbnz r0, 8004ba0 <__pow5mult+0x40> + 8004b94: 4b1d ldr r3, [pc, #116] ; (8004c0c <__pow5mult+0xac>) + 8004b96: 481e ldr r0, [pc, #120] ; (8004c10 <__pow5mult+0xb0>) + 8004b98: f44f 71d7 mov.w r1, #430 ; 0x1ae + 8004b9c: f000 ff76 bl 8005a8c <__assert_func> + 8004ba0: e9c0 4401 strd r4, r4, [r0, #4] + 8004ba4: 6004 str r4, [r0, #0] + 8004ba6: 60c4 str r4, [r0, #12] + 8004ba8: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24 + 8004bac: f8d8 4008 ldr.w r4, [r8, #8] + 8004bb0: b94c cbnz r4, 8004bc6 <__pow5mult+0x66> + 8004bb2: f240 2171 movw r1, #625 ; 0x271 + 8004bb6: 4630 mov r0, r6 + 8004bb8: f7ff ff16 bl 80049e8 <__i2b> + 8004bbc: 2300 movs r3, #0 + 8004bbe: f8c8 0008 str.w r0, [r8, #8] + 8004bc2: 4604 mov r4, r0 + 8004bc4: 6003 str r3, [r0, #0] + 8004bc6: f04f 0900 mov.w r9, #0 + 8004bca: 07eb lsls r3, r5, #31 + 8004bcc: d50a bpl.n 8004be4 <__pow5mult+0x84> + 8004bce: 4639 mov r1, r7 + 8004bd0: 4622 mov r2, r4 + 8004bd2: 4630 mov r0, r6 + 8004bd4: f7ff ff1e bl 8004a14 <__multiply> + 8004bd8: 4639 mov r1, r7 + 8004bda: 4680 mov r8, r0 + 8004bdc: 4630 mov r0, r6 + 8004bde: f7ff fdff bl 80047e0 <_Bfree> + 8004be2: 4647 mov r7, r8 + 8004be4: 106d asrs r5, r5, #1 + 8004be6: d00b beq.n 8004c00 <__pow5mult+0xa0> + 8004be8: 6820 ldr r0, [r4, #0] + 8004bea: b938 cbnz r0, 8004bfc <__pow5mult+0x9c> + 8004bec: 4622 mov r2, r4 + 8004bee: 4621 mov r1, r4 + 8004bf0: 4630 mov r0, r6 + 8004bf2: f7ff ff0f bl 8004a14 <__multiply> + 8004bf6: 6020 str r0, [r4, #0] + 8004bf8: f8c0 9000 str.w r9, [r0] + 8004bfc: 4604 mov r4, r0 + 8004bfe: e7e4 b.n 8004bca <__pow5mult+0x6a> + 8004c00: 4638 mov r0, r7 + 8004c02: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8004c06: bf00 nop + 8004c08: 08006278 .word 0x08006278 + 8004c0c: 08005fbe .word 0x08005fbe + 8004c10: 08006128 .word 0x08006128 + +08004c14 <__lshift>: + 8004c14: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8004c18: 460c mov r4, r1 + 8004c1a: 6849 ldr r1, [r1, #4] + 8004c1c: 6923 ldr r3, [r4, #16] + 8004c1e: eb03 1862 add.w r8, r3, r2, asr #5 + 8004c22: 68a3 ldr r3, [r4, #8] + 8004c24: 4607 mov r7, r0 + 8004c26: 4691 mov r9, r2 + 8004c28: ea4f 1a62 mov.w sl, r2, asr #5 + 8004c2c: f108 0601 add.w r6, r8, #1 + 8004c30: 42b3 cmp r3, r6 + 8004c32: db0b blt.n 8004c4c <__lshift+0x38> + 8004c34: 4638 mov r0, r7 + 8004c36: f7ff fd93 bl 8004760 <_Balloc> + 8004c3a: 4605 mov r5, r0 + 8004c3c: b948 cbnz r0, 8004c52 <__lshift+0x3e> + 8004c3e: 4602 mov r2, r0 + 8004c40: 4b28 ldr r3, [pc, #160] ; (8004ce4 <__lshift+0xd0>) + 8004c42: 4829 ldr r0, [pc, #164] ; (8004ce8 <__lshift+0xd4>) + 8004c44: f240 11d9 movw r1, #473 ; 0x1d9 + 8004c48: f000 ff20 bl 8005a8c <__assert_func> + 8004c4c: 3101 adds r1, #1 + 8004c4e: 005b lsls r3, r3, #1 + 8004c50: e7ee b.n 8004c30 <__lshift+0x1c> + 8004c52: 2300 movs r3, #0 + 8004c54: f100 0114 add.w r1, r0, #20 + 8004c58: f100 0210 add.w r2, r0, #16 + 8004c5c: 4618 mov r0, r3 + 8004c5e: 4553 cmp r3, sl + 8004c60: db33 blt.n 8004cca <__lshift+0xb6> + 8004c62: 6920 ldr r0, [r4, #16] + 8004c64: ea2a 7aea bic.w sl, sl, sl, asr #31 + 8004c68: f104 0314 add.w r3, r4, #20 + 8004c6c: f019 091f ands.w r9, r9, #31 + 8004c70: eb01 018a add.w r1, r1, sl, lsl #2 + 8004c74: eb03 0c80 add.w ip, r3, r0, lsl #2 + 8004c78: d02b beq.n 8004cd2 <__lshift+0xbe> + 8004c7a: f1c9 0e20 rsb lr, r9, #32 + 8004c7e: 468a mov sl, r1 + 8004c80: 2200 movs r2, #0 + 8004c82: 6818 ldr r0, [r3, #0] + 8004c84: fa00 f009 lsl.w r0, r0, r9 + 8004c88: 4302 orrs r2, r0 + 8004c8a: f84a 2b04 str.w r2, [sl], #4 + 8004c8e: f853 2b04 ldr.w r2, [r3], #4 + 8004c92: 459c cmp ip, r3 + 8004c94: fa22 f20e lsr.w r2, r2, lr + 8004c98: d8f3 bhi.n 8004c82 <__lshift+0x6e> + 8004c9a: ebac 0304 sub.w r3, ip, r4 + 8004c9e: 3b15 subs r3, #21 + 8004ca0: f023 0303 bic.w r3, r3, #3 + 8004ca4: 3304 adds r3, #4 + 8004ca6: f104 0015 add.w r0, r4, #21 + 8004caa: 4584 cmp ip, r0 + 8004cac: bf38 it cc + 8004cae: 2304 movcc r3, #4 + 8004cb0: 50ca str r2, [r1, r3] + 8004cb2: b10a cbz r2, 8004cb8 <__lshift+0xa4> + 8004cb4: f108 0602 add.w r6, r8, #2 + 8004cb8: 3e01 subs r6, #1 + 8004cba: 4638 mov r0, r7 + 8004cbc: 612e str r6, [r5, #16] + 8004cbe: 4621 mov r1, r4 + 8004cc0: f7ff fd8e bl 80047e0 <_Bfree> + 8004cc4: 4628 mov r0, r5 + 8004cc6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8004cca: f842 0f04 str.w r0, [r2, #4]! + 8004cce: 3301 adds r3, #1 + 8004cd0: e7c5 b.n 8004c5e <__lshift+0x4a> + 8004cd2: 3904 subs r1, #4 + 8004cd4: f853 2b04 ldr.w r2, [r3], #4 + 8004cd8: f841 2f04 str.w r2, [r1, #4]! + 8004cdc: 459c cmp ip, r3 + 8004cde: d8f9 bhi.n 8004cd4 <__lshift+0xc0> + 8004ce0: e7ea b.n 8004cb8 <__lshift+0xa4> + 8004ce2: bf00 nop + 8004ce4: 08006034 .word 0x08006034 + 8004ce8: 08006128 .word 0x08006128 + +08004cec <__mcmp>: + 8004cec: 690a ldr r2, [r1, #16] + 8004cee: 4603 mov r3, r0 + 8004cf0: 6900 ldr r0, [r0, #16] + 8004cf2: 1a80 subs r0, r0, r2 + 8004cf4: b530 push {r4, r5, lr} + 8004cf6: d10d bne.n 8004d14 <__mcmp+0x28> + 8004cf8: 3314 adds r3, #20 + 8004cfa: 3114 adds r1, #20 + 8004cfc: eb03 0482 add.w r4, r3, r2, lsl #2 + 8004d00: eb01 0182 add.w r1, r1, r2, lsl #2 + 8004d04: f854 5d04 ldr.w r5, [r4, #-4]! + 8004d08: f851 2d04 ldr.w r2, [r1, #-4]! + 8004d0c: 4295 cmp r5, r2 + 8004d0e: d002 beq.n 8004d16 <__mcmp+0x2a> + 8004d10: d304 bcc.n 8004d1c <__mcmp+0x30> + 8004d12: 2001 movs r0, #1 + 8004d14: bd30 pop {r4, r5, pc} + 8004d16: 42a3 cmp r3, r4 + 8004d18: d3f4 bcc.n 8004d04 <__mcmp+0x18> + 8004d1a: e7fb b.n 8004d14 <__mcmp+0x28> + 8004d1c: f04f 30ff mov.w r0, #4294967295 + 8004d20: e7f8 b.n 8004d14 <__mcmp+0x28> + ... + +08004d24 <__mdiff>: + 8004d24: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004d28: 460c mov r4, r1 + 8004d2a: 4606 mov r6, r0 + 8004d2c: 4611 mov r1, r2 + 8004d2e: 4620 mov r0, r4 + 8004d30: 4617 mov r7, r2 + 8004d32: f7ff ffdb bl 8004cec <__mcmp> + 8004d36: 1e05 subs r5, r0, #0 + 8004d38: d111 bne.n 8004d5e <__mdiff+0x3a> + 8004d3a: 4629 mov r1, r5 + 8004d3c: 4630 mov r0, r6 + 8004d3e: f7ff fd0f bl 8004760 <_Balloc> + 8004d42: 4602 mov r2, r0 + 8004d44: b928 cbnz r0, 8004d52 <__mdiff+0x2e> + 8004d46: 4b3a ldr r3, [pc, #232] ; (8004e30 <__mdiff+0x10c>) + 8004d48: f240 2132 movw r1, #562 ; 0x232 + 8004d4c: 4839 ldr r0, [pc, #228] ; (8004e34 <__mdiff+0x110>) + 8004d4e: f000 fe9d bl 8005a8c <__assert_func> + 8004d52: 2301 movs r3, #1 + 8004d54: e9c0 3504 strd r3, r5, [r0, #16] + 8004d58: 4610 mov r0, r2 + 8004d5a: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8004d5e: bfa4 itt ge + 8004d60: 463b movge r3, r7 + 8004d62: 4627 movge r7, r4 + 8004d64: 4630 mov r0, r6 + 8004d66: 6879 ldr r1, [r7, #4] + 8004d68: bfa6 itte ge + 8004d6a: 461c movge r4, r3 + 8004d6c: 2500 movge r5, #0 + 8004d6e: 2501 movlt r5, #1 + 8004d70: f7ff fcf6 bl 8004760 <_Balloc> + 8004d74: 4602 mov r2, r0 + 8004d76: b918 cbnz r0, 8004d80 <__mdiff+0x5c> + 8004d78: 4b2d ldr r3, [pc, #180] ; (8004e30 <__mdiff+0x10c>) + 8004d7a: f44f 7110 mov.w r1, #576 ; 0x240 + 8004d7e: e7e5 b.n 8004d4c <__mdiff+0x28> + 8004d80: 693e ldr r6, [r7, #16] + 8004d82: 60c5 str r5, [r0, #12] + 8004d84: 6925 ldr r5, [r4, #16] + 8004d86: f107 0114 add.w r1, r7, #20 + 8004d8a: f100 0e14 add.w lr, r0, #20 + 8004d8e: f104 0914 add.w r9, r4, #20 + 8004d92: f107 0010 add.w r0, r7, #16 + 8004d96: eb01 0c86 add.w ip, r1, r6, lsl #2 + 8004d9a: eb09 0585 add.w r5, r9, r5, lsl #2 + 8004d9e: 46f2 mov sl, lr + 8004da0: 2700 movs r7, #0 + 8004da2: f859 3b04 ldr.w r3, [r9], #4 + 8004da6: f850 bf04 ldr.w fp, [r0, #4]! + 8004daa: fa1f f883 uxth.w r8, r3 + 8004dae: fa17 f78b uxtah r7, r7, fp + 8004db2: 0c1b lsrs r3, r3, #16 + 8004db4: eba7 0808 sub.w r8, r7, r8 + 8004db8: ebc3 431b rsb r3, r3, fp, lsr #16 + 8004dbc: eb03 4328 add.w r3, r3, r8, asr #16 + 8004dc0: fa1f f888 uxth.w r8, r8 + 8004dc4: 141f asrs r7, r3, #16 + 8004dc6: 454d cmp r5, r9 + 8004dc8: ea48 4303 orr.w r3, r8, r3, lsl #16 + 8004dcc: f84a 3b04 str.w r3, [sl], #4 + 8004dd0: d8e7 bhi.n 8004da2 <__mdiff+0x7e> + 8004dd2: 1b2b subs r3, r5, r4 + 8004dd4: 3b15 subs r3, #21 + 8004dd6: f023 0303 bic.w r3, r3, #3 + 8004dda: 3304 adds r3, #4 + 8004ddc: 3415 adds r4, #21 + 8004dde: 42a5 cmp r5, r4 + 8004de0: bf38 it cc + 8004de2: 2304 movcc r3, #4 + 8004de4: 4419 add r1, r3 + 8004de6: 4473 add r3, lr + 8004de8: 469e mov lr, r3 + 8004dea: 460d mov r5, r1 + 8004dec: 4565 cmp r5, ip + 8004dee: d30e bcc.n 8004e0e <__mdiff+0xea> + 8004df0: f10c 0003 add.w r0, ip, #3 + 8004df4: 1a40 subs r0, r0, r1 + 8004df6: f020 0003 bic.w r0, r0, #3 + 8004dfa: 3903 subs r1, #3 + 8004dfc: 458c cmp ip, r1 + 8004dfe: bf38 it cc + 8004e00: 2000 movcc r0, #0 + 8004e02: 4418 add r0, r3 + 8004e04: f850 3d04 ldr.w r3, [r0, #-4]! + 8004e08: b17b cbz r3, 8004e2a <__mdiff+0x106> + 8004e0a: 6116 str r6, [r2, #16] + 8004e0c: e7a4 b.n 8004d58 <__mdiff+0x34> + 8004e0e: f855 8b04 ldr.w r8, [r5], #4 + 8004e12: fa17 f488 uxtah r4, r7, r8 + 8004e16: 1420 asrs r0, r4, #16 + 8004e18: eb00 4018 add.w r0, r0, r8, lsr #16 + 8004e1c: b2a4 uxth r4, r4 + 8004e1e: ea44 4400 orr.w r4, r4, r0, lsl #16 + 8004e22: f84e 4b04 str.w r4, [lr], #4 + 8004e26: 1407 asrs r7, r0, #16 + 8004e28: e7e0 b.n 8004dec <__mdiff+0xc8> + 8004e2a: 3e01 subs r6, #1 + 8004e2c: e7ea b.n 8004e04 <__mdiff+0xe0> + 8004e2e: bf00 nop + 8004e30: 08006034 .word 0x08006034 + 8004e34: 08006128 .word 0x08006128 + +08004e38 <__ulp>: + 8004e38: 4b11 ldr r3, [pc, #68] ; (8004e80 <__ulp+0x48>) + 8004e3a: 400b ands r3, r1 + 8004e3c: f1a3 7350 sub.w r3, r3, #54525952 ; 0x3400000 + 8004e40: 2b00 cmp r3, #0 + 8004e42: dd02 ble.n 8004e4a <__ulp+0x12> + 8004e44: 2000 movs r0, #0 + 8004e46: 4619 mov r1, r3 + 8004e48: 4770 bx lr + 8004e4a: 425b negs r3, r3 + 8004e4c: f1b3 7fa0 cmp.w r3, #20971520 ; 0x1400000 + 8004e50: ea4f 5223 mov.w r2, r3, asr #20 + 8004e54: f04f 0000 mov.w r0, #0 + 8004e58: f04f 0100 mov.w r1, #0 + 8004e5c: da04 bge.n 8004e68 <__ulp+0x30> + 8004e5e: f44f 2300 mov.w r3, #524288 ; 0x80000 + 8004e62: fa43 f102 asr.w r1, r3, r2 + 8004e66: 4770 bx lr + 8004e68: f1a2 0314 sub.w r3, r2, #20 + 8004e6c: 2b1e cmp r3, #30 + 8004e6e: bfda itte le + 8004e70: f04f 4200 movle.w r2, #2147483648 ; 0x80000000 + 8004e74: fa22 f303 lsrle.w r3, r2, r3 + 8004e78: 2301 movgt r3, #1 + 8004e7a: 4618 mov r0, r3 + 8004e7c: 4770 bx lr + 8004e7e: bf00 nop + 8004e80: 7ff00000 .word 0x7ff00000 + +08004e84 <__b2d>: + 8004e84: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8004e88: 6907 ldr r7, [r0, #16] + 8004e8a: f100 0914 add.w r9, r0, #20 + 8004e8e: eb09 0787 add.w r7, r9, r7, lsl #2 + 8004e92: f1a7 0804 sub.w r8, r7, #4 + 8004e96: f857 6c04 ldr.w r6, [r7, #-4] + 8004e9a: 4630 mov r0, r6 + 8004e9c: f7ff fd56 bl 800494c <__hi0bits> + 8004ea0: f1c0 0320 rsb r3, r0, #32 + 8004ea4: 280a cmp r0, #10 + 8004ea6: 600b str r3, [r1, #0] + 8004ea8: 491f ldr r1, [pc, #124] ; (8004f28 <__b2d+0xa4>) + 8004eaa: dc17 bgt.n 8004edc <__b2d+0x58> + 8004eac: f1c0 0c0b rsb ip, r0, #11 + 8004eb0: 45c1 cmp r9, r8 + 8004eb2: fa26 f30c lsr.w r3, r6, ip + 8004eb6: bf38 it cc + 8004eb8: f857 2c08 ldrcc.w r2, [r7, #-8] + 8004ebc: ea43 0501 orr.w r5, r3, r1 + 8004ec0: bf28 it cs + 8004ec2: 2200 movcs r2, #0 + 8004ec4: f100 0315 add.w r3, r0, #21 + 8004ec8: fa06 f303 lsl.w r3, r6, r3 + 8004ecc: fa22 f20c lsr.w r2, r2, ip + 8004ed0: ea43 0402 orr.w r4, r3, r2 + 8004ed4: 4620 mov r0, r4 + 8004ed6: 4629 mov r1, r5 + 8004ed8: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8004edc: 45c1 cmp r9, r8 + 8004ede: bf3a itte cc + 8004ee0: f857 2c08 ldrcc.w r2, [r7, #-8] + 8004ee4: f1a7 0808 subcc.w r8, r7, #8 + 8004ee8: 2200 movcs r2, #0 + 8004eea: f1b0 030b subs.w r3, r0, #11 + 8004eee: d016 beq.n 8004f1e <__b2d+0x9a> + 8004ef0: f1c3 0720 rsb r7, r3, #32 + 8004ef4: fa22 f107 lsr.w r1, r2, r7 + 8004ef8: 45c8 cmp r8, r9 + 8004efa: fa06 f603 lsl.w r6, r6, r3 + 8004efe: ea46 0601 orr.w r6, r6, r1 + 8004f02: bf8c ite hi + 8004f04: f858 1c04 ldrhi.w r1, [r8, #-4] + 8004f08: 2100 movls r1, #0 + 8004f0a: f046 557f orr.w r5, r6, #1069547520 ; 0x3fc00000 + 8004f0e: fa02 f003 lsl.w r0, r2, r3 + 8004f12: 40f9 lsrs r1, r7 + 8004f14: f445 1540 orr.w r5, r5, #3145728 ; 0x300000 + 8004f18: ea40 0401 orr.w r4, r0, r1 + 8004f1c: e7da b.n 8004ed4 <__b2d+0x50> + 8004f1e: ea46 0501 orr.w r5, r6, r1 + 8004f22: 4614 mov r4, r2 + 8004f24: e7d6 b.n 8004ed4 <__b2d+0x50> + 8004f26: bf00 nop + 8004f28: 3ff00000 .word 0x3ff00000 + +08004f2c <__d2b>: + 8004f2c: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} + 8004f30: 2101 movs r1, #1 + 8004f32: e9dd 7608 ldrd r7, r6, [sp, #32] + 8004f36: 4690 mov r8, r2 + 8004f38: 461d mov r5, r3 + 8004f3a: f7ff fc11 bl 8004760 <_Balloc> + 8004f3e: 4604 mov r4, r0 + 8004f40: b930 cbnz r0, 8004f50 <__d2b+0x24> + 8004f42: 4602 mov r2, r0 + 8004f44: 4b25 ldr r3, [pc, #148] ; (8004fdc <__d2b+0xb0>) + 8004f46: 4826 ldr r0, [pc, #152] ; (8004fe0 <__d2b+0xb4>) + 8004f48: f240 310a movw r1, #778 ; 0x30a + 8004f4c: f000 fd9e bl 8005a8c <__assert_func> + 8004f50: f3c5 0313 ubfx r3, r5, #0, #20 + 8004f54: f3c5 550a ubfx r5, r5, #20, #11 + 8004f58: bb2d cbnz r5, 8004fa6 <__d2b+0x7a> + 8004f5a: 9301 str r3, [sp, #4] + 8004f5c: f1b8 0300 subs.w r3, r8, #0 + 8004f60: d026 beq.n 8004fb0 <__d2b+0x84> + 8004f62: 4668 mov r0, sp + 8004f64: 9300 str r3, [sp, #0] + 8004f66: f7ff fd11 bl 800498c <__lo0bits> + 8004f6a: 9900 ldr r1, [sp, #0] + 8004f6c: b1f0 cbz r0, 8004fac <__d2b+0x80> + 8004f6e: 9a01 ldr r2, [sp, #4] + 8004f70: f1c0 0320 rsb r3, r0, #32 + 8004f74: fa02 f303 lsl.w r3, r2, r3 + 8004f78: 430b orrs r3, r1 + 8004f7a: 40c2 lsrs r2, r0 + 8004f7c: 6163 str r3, [r4, #20] + 8004f7e: 9201 str r2, [sp, #4] + 8004f80: 9b01 ldr r3, [sp, #4] + 8004f82: 61a3 str r3, [r4, #24] + 8004f84: 2b00 cmp r3, #0 + 8004f86: bf14 ite ne + 8004f88: 2102 movne r1, #2 + 8004f8a: 2101 moveq r1, #1 + 8004f8c: 6121 str r1, [r4, #16] + 8004f8e: b1c5 cbz r5, 8004fc2 <__d2b+0x96> + 8004f90: f2a5 4533 subw r5, r5, #1075 ; 0x433 + 8004f94: 4405 add r5, r0 + 8004f96: f1c0 0035 rsb r0, r0, #53 ; 0x35 + 8004f9a: 603d str r5, [r7, #0] + 8004f9c: 6030 str r0, [r6, #0] + 8004f9e: 4620 mov r0, r4 + 8004fa0: b002 add sp, #8 + 8004fa2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8004fa6: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8004faa: e7d6 b.n 8004f5a <__d2b+0x2e> + 8004fac: 6161 str r1, [r4, #20] + 8004fae: e7e7 b.n 8004f80 <__d2b+0x54> + 8004fb0: a801 add r0, sp, #4 + 8004fb2: f7ff fceb bl 800498c <__lo0bits> + 8004fb6: 9b01 ldr r3, [sp, #4] + 8004fb8: 6163 str r3, [r4, #20] + 8004fba: 2101 movs r1, #1 + 8004fbc: 6121 str r1, [r4, #16] + 8004fbe: 3020 adds r0, #32 + 8004fc0: e7e5 b.n 8004f8e <__d2b+0x62> + 8004fc2: eb04 0381 add.w r3, r4, r1, lsl #2 + 8004fc6: f2a0 4032 subw r0, r0, #1074 ; 0x432 + 8004fca: 6038 str r0, [r7, #0] + 8004fcc: 6918 ldr r0, [r3, #16] + 8004fce: f7ff fcbd bl 800494c <__hi0bits> + 8004fd2: ebc0 1141 rsb r1, r0, r1, lsl #5 + 8004fd6: 6031 str r1, [r6, #0] + 8004fd8: e7e1 b.n 8004f9e <__d2b+0x72> + 8004fda: bf00 nop + 8004fdc: 08006034 .word 0x08006034 + 8004fe0: 08006128 .word 0x08006128 + +08004fe4 <__ratio>: + 8004fe4: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8004fe8: 4688 mov r8, r1 + 8004fea: 4669 mov r1, sp + 8004fec: 4681 mov r9, r0 + 8004fee: f7ff ff49 bl 8004e84 <__b2d> + 8004ff2: 460f mov r7, r1 + 8004ff4: 4604 mov r4, r0 + 8004ff6: 460d mov r5, r1 + 8004ff8: 4640 mov r0, r8 + 8004ffa: a901 add r1, sp, #4 + 8004ffc: f7ff ff42 bl 8004e84 <__b2d> + 8005000: f8d9 3010 ldr.w r3, [r9, #16] + 8005004: f8d8 2010 ldr.w r2, [r8, #16] + 8005008: eba3 0c02 sub.w ip, r3, r2 + 800500c: e9dd 3200 ldrd r3, r2, [sp] + 8005010: 1a9b subs r3, r3, r2 + 8005012: eb03 134c add.w r3, r3, ip, lsl #5 + 8005016: 2b00 cmp r3, #0 + 8005018: bfd5 itete le + 800501a: 460a movle r2, r1 + 800501c: 462a movgt r2, r5 + 800501e: ebc3 3303 rsble r3, r3, r3, lsl #12 + 8005022: eb02 5703 addgt.w r7, r2, r3, lsl #20 + 8005026: 468b mov fp, r1 + 8005028: bfd8 it le + 800502a: eb02 5b03 addle.w fp, r2, r3, lsl #20 + 800502e: 465b mov r3, fp + 8005030: 4602 mov r2, r0 + 8005032: 4639 mov r1, r7 + 8005034: 4620 mov r0, r4 + 8005036: f7fb fc29 bl 800088c <__aeabi_ddiv> + 800503a: b003 add sp, #12 + 800503c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + +08005040 <__copybits>: + 8005040: 3901 subs r1, #1 + 8005042: b570 push {r4, r5, r6, lr} + 8005044: 1149 asrs r1, r1, #5 + 8005046: 6914 ldr r4, [r2, #16] + 8005048: 3101 adds r1, #1 + 800504a: f102 0314 add.w r3, r2, #20 + 800504e: eb00 0181 add.w r1, r0, r1, lsl #2 + 8005052: eb03 0484 add.w r4, r3, r4, lsl #2 + 8005056: 1f05 subs r5, r0, #4 + 8005058: 42a3 cmp r3, r4 + 800505a: d30c bcc.n 8005076 <__copybits+0x36> + 800505c: 1aa3 subs r3, r4, r2 + 800505e: 3b11 subs r3, #17 + 8005060: f023 0303 bic.w r3, r3, #3 + 8005064: 3211 adds r2, #17 + 8005066: 42a2 cmp r2, r4 + 8005068: bf88 it hi + 800506a: 2300 movhi r3, #0 + 800506c: 4418 add r0, r3 + 800506e: 2300 movs r3, #0 + 8005070: 4288 cmp r0, r1 + 8005072: d305 bcc.n 8005080 <__copybits+0x40> + 8005074: bd70 pop {r4, r5, r6, pc} + 8005076: f853 6b04 ldr.w r6, [r3], #4 + 800507a: f845 6f04 str.w r6, [r5, #4]! + 800507e: e7eb b.n 8005058 <__copybits+0x18> + 8005080: f840 3b04 str.w r3, [r0], #4 + 8005084: e7f4 b.n 8005070 <__copybits+0x30> + +08005086 <__any_on>: + 8005086: f100 0214 add.w r2, r0, #20 + 800508a: 6900 ldr r0, [r0, #16] + 800508c: 114b asrs r3, r1, #5 + 800508e: 4298 cmp r0, r3 + 8005090: b510 push {r4, lr} + 8005092: db11 blt.n 80050b8 <__any_on+0x32> + 8005094: dd0a ble.n 80050ac <__any_on+0x26> + 8005096: f011 011f ands.w r1, r1, #31 + 800509a: d007 beq.n 80050ac <__any_on+0x26> + 800509c: f852 4023 ldr.w r4, [r2, r3, lsl #2] + 80050a0: fa24 f001 lsr.w r0, r4, r1 + 80050a4: fa00 f101 lsl.w r1, r0, r1 + 80050a8: 428c cmp r4, r1 + 80050aa: d10b bne.n 80050c4 <__any_on+0x3e> + 80050ac: eb02 0383 add.w r3, r2, r3, lsl #2 + 80050b0: 4293 cmp r3, r2 + 80050b2: d803 bhi.n 80050bc <__any_on+0x36> + 80050b4: 2000 movs r0, #0 + 80050b6: bd10 pop {r4, pc} + 80050b8: 4603 mov r3, r0 + 80050ba: e7f7 b.n 80050ac <__any_on+0x26> + 80050bc: f853 1d04 ldr.w r1, [r3, #-4]! + 80050c0: 2900 cmp r1, #0 + 80050c2: d0f5 beq.n 80050b0 <__any_on+0x2a> + 80050c4: 2001 movs r0, #1 + 80050c6: e7f6 b.n 80050b6 <__any_on+0x30> + +080050c8 <_calloc_r>: + 80050c8: b538 push {r3, r4, r5, lr} + 80050ca: fb02 f501 mul.w r5, r2, r1 + 80050ce: 4629 mov r1, r5 + 80050d0: f000 f856 bl 8005180 <_malloc_r> + 80050d4: 4604 mov r4, r0 + 80050d6: b118 cbz r0, 80050e0 <_calloc_r+0x18> + 80050d8: 462a mov r2, r5 + 80050da: 2100 movs r1, #0 + 80050dc: f7fc f88c bl 80011f8 + 80050e0: 4620 mov r0, r4 + 80050e2: bd38 pop {r3, r4, r5, pc} + +080050e4 <_free_r>: + 80050e4: b538 push {r3, r4, r5, lr} + 80050e6: 4605 mov r5, r0 + 80050e8: 2900 cmp r1, #0 + 80050ea: d045 beq.n 8005178 <_free_r+0x94> + 80050ec: f851 3c04 ldr.w r3, [r1, #-4] + 80050f0: 1f0c subs r4, r1, #4 + 80050f2: 2b00 cmp r3, #0 + 80050f4: bfb8 it lt + 80050f6: 18e4 addlt r4, r4, r3 + 80050f8: f000 fd56 bl 8005ba8 <__malloc_lock> + 80050fc: 4a1f ldr r2, [pc, #124] ; (800517c <_free_r+0x98>) + 80050fe: 6813 ldr r3, [r2, #0] + 8005100: 4610 mov r0, r2 + 8005102: b933 cbnz r3, 8005112 <_free_r+0x2e> + 8005104: 6063 str r3, [r4, #4] + 8005106: 6014 str r4, [r2, #0] + 8005108: 4628 mov r0, r5 + 800510a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 800510e: f000 bd51 b.w 8005bb4 <__malloc_unlock> + 8005112: 42a3 cmp r3, r4 + 8005114: d90b bls.n 800512e <_free_r+0x4a> + 8005116: 6821 ldr r1, [r4, #0] + 8005118: 1862 adds r2, r4, r1 + 800511a: 4293 cmp r3, r2 + 800511c: bf04 itt eq + 800511e: 681a ldreq r2, [r3, #0] + 8005120: 685b ldreq r3, [r3, #4] + 8005122: 6063 str r3, [r4, #4] + 8005124: bf04 itt eq + 8005126: 1852 addeq r2, r2, r1 + 8005128: 6022 streq r2, [r4, #0] + 800512a: 6004 str r4, [r0, #0] + 800512c: e7ec b.n 8005108 <_free_r+0x24> + 800512e: 461a mov r2, r3 + 8005130: 685b ldr r3, [r3, #4] + 8005132: b10b cbz r3, 8005138 <_free_r+0x54> + 8005134: 42a3 cmp r3, r4 + 8005136: d9fa bls.n 800512e <_free_r+0x4a> + 8005138: 6811 ldr r1, [r2, #0] + 800513a: 1850 adds r0, r2, r1 + 800513c: 42a0 cmp r0, r4 + 800513e: d10b bne.n 8005158 <_free_r+0x74> + 8005140: 6820 ldr r0, [r4, #0] + 8005142: 4401 add r1, r0 + 8005144: 1850 adds r0, r2, r1 + 8005146: 4283 cmp r3, r0 + 8005148: 6011 str r1, [r2, #0] + 800514a: d1dd bne.n 8005108 <_free_r+0x24> + 800514c: 6818 ldr r0, [r3, #0] + 800514e: 685b ldr r3, [r3, #4] + 8005150: 6053 str r3, [r2, #4] + 8005152: 4401 add r1, r0 + 8005154: 6011 str r1, [r2, #0] + 8005156: e7d7 b.n 8005108 <_free_r+0x24> + 8005158: d902 bls.n 8005160 <_free_r+0x7c> + 800515a: 230c movs r3, #12 + 800515c: 602b str r3, [r5, #0] + 800515e: e7d3 b.n 8005108 <_free_r+0x24> + 8005160: 6820 ldr r0, [r4, #0] + 8005162: 1821 adds r1, r4, r0 + 8005164: 428b cmp r3, r1 + 8005166: bf04 itt eq + 8005168: 6819 ldreq r1, [r3, #0] + 800516a: 685b ldreq r3, [r3, #4] + 800516c: 6063 str r3, [r4, #4] + 800516e: bf04 itt eq + 8005170: 1809 addeq r1, r1, r0 + 8005172: 6021 streq r1, [r4, #0] + 8005174: 6054 str r4, [r2, #4] + 8005176: e7c7 b.n 8005108 <_free_r+0x24> + 8005178: bd38 pop {r3, r4, r5, pc} + 800517a: bf00 nop + 800517c: 200001f4 .word 0x200001f4 + +08005180 <_malloc_r>: + 8005180: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005182: 1ccd adds r5, r1, #3 + 8005184: f025 0503 bic.w r5, r5, #3 + 8005188: 3508 adds r5, #8 + 800518a: 2d0c cmp r5, #12 + 800518c: bf38 it cc + 800518e: 250c movcc r5, #12 + 8005190: 2d00 cmp r5, #0 + 8005192: 4606 mov r6, r0 + 8005194: db01 blt.n 800519a <_malloc_r+0x1a> + 8005196: 42a9 cmp r1, r5 + 8005198: d903 bls.n 80051a2 <_malloc_r+0x22> + 800519a: 230c movs r3, #12 + 800519c: 6033 str r3, [r6, #0] + 800519e: 2000 movs r0, #0 + 80051a0: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80051a2: f000 fd01 bl 8005ba8 <__malloc_lock> + 80051a6: 4921 ldr r1, [pc, #132] ; (800522c <_malloc_r+0xac>) + 80051a8: 680a ldr r2, [r1, #0] + 80051aa: 4614 mov r4, r2 + 80051ac: b99c cbnz r4, 80051d6 <_malloc_r+0x56> + 80051ae: 4f20 ldr r7, [pc, #128] ; (8005230 <_malloc_r+0xb0>) + 80051b0: 683b ldr r3, [r7, #0] + 80051b2: b923 cbnz r3, 80051be <_malloc_r+0x3e> + 80051b4: 4621 mov r1, r4 + 80051b6: 4630 mov r0, r6 + 80051b8: f000 fb22 bl 8005800 <_sbrk_r> + 80051bc: 6038 str r0, [r7, #0] + 80051be: 4629 mov r1, r5 + 80051c0: 4630 mov r0, r6 + 80051c2: f000 fb1d bl 8005800 <_sbrk_r> + 80051c6: 1c43 adds r3, r0, #1 + 80051c8: d123 bne.n 8005212 <_malloc_r+0x92> + 80051ca: 230c movs r3, #12 + 80051cc: 6033 str r3, [r6, #0] + 80051ce: 4630 mov r0, r6 + 80051d0: f000 fcf0 bl 8005bb4 <__malloc_unlock> + 80051d4: e7e3 b.n 800519e <_malloc_r+0x1e> + 80051d6: 6823 ldr r3, [r4, #0] + 80051d8: 1b5b subs r3, r3, r5 + 80051da: d417 bmi.n 800520c <_malloc_r+0x8c> + 80051dc: 2b0b cmp r3, #11 + 80051de: d903 bls.n 80051e8 <_malloc_r+0x68> + 80051e0: 6023 str r3, [r4, #0] + 80051e2: 441c add r4, r3 + 80051e4: 6025 str r5, [r4, #0] + 80051e6: e004 b.n 80051f2 <_malloc_r+0x72> + 80051e8: 6863 ldr r3, [r4, #4] + 80051ea: 42a2 cmp r2, r4 + 80051ec: bf0c ite eq + 80051ee: 600b streq r3, [r1, #0] + 80051f0: 6053 strne r3, [r2, #4] + 80051f2: 4630 mov r0, r6 + 80051f4: f000 fcde bl 8005bb4 <__malloc_unlock> + 80051f8: f104 000b add.w r0, r4, #11 + 80051fc: 1d23 adds r3, r4, #4 + 80051fe: f020 0007 bic.w r0, r0, #7 + 8005202: 1ac2 subs r2, r0, r3 + 8005204: d0cc beq.n 80051a0 <_malloc_r+0x20> + 8005206: 1a1b subs r3, r3, r0 + 8005208: 50a3 str r3, [r4, r2] + 800520a: e7c9 b.n 80051a0 <_malloc_r+0x20> + 800520c: 4622 mov r2, r4 + 800520e: 6864 ldr r4, [r4, #4] + 8005210: e7cc b.n 80051ac <_malloc_r+0x2c> + 8005212: 1cc4 adds r4, r0, #3 + 8005214: f024 0403 bic.w r4, r4, #3 + 8005218: 42a0 cmp r0, r4 + 800521a: d0e3 beq.n 80051e4 <_malloc_r+0x64> + 800521c: 1a21 subs r1, r4, r0 + 800521e: 4630 mov r0, r6 + 8005220: f000 faee bl 8005800 <_sbrk_r> + 8005224: 3001 adds r0, #1 + 8005226: d1dd bne.n 80051e4 <_malloc_r+0x64> + 8005228: e7cf b.n 80051ca <_malloc_r+0x4a> + 800522a: bf00 nop + 800522c: 200001f4 .word 0x200001f4 + 8005230: 200001f8 .word 0x200001f8 + +08005234 <__ssputs_r>: + 8005234: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8005238: 688e ldr r6, [r1, #8] + 800523a: 429e cmp r6, r3 + 800523c: 4682 mov sl, r0 + 800523e: 460c mov r4, r1 + 8005240: 4690 mov r8, r2 + 8005242: 461f mov r7, r3 + 8005244: d838 bhi.n 80052b8 <__ssputs_r+0x84> + 8005246: 898a ldrh r2, [r1, #12] + 8005248: f412 6f90 tst.w r2, #1152 ; 0x480 + 800524c: d032 beq.n 80052b4 <__ssputs_r+0x80> + 800524e: 6825 ldr r5, [r4, #0] + 8005250: 6909 ldr r1, [r1, #16] + 8005252: eba5 0901 sub.w r9, r5, r1 + 8005256: 6965 ldr r5, [r4, #20] + 8005258: eb05 0545 add.w r5, r5, r5, lsl #1 + 800525c: eb05 75d5 add.w r5, r5, r5, lsr #31 + 8005260: 3301 adds r3, #1 + 8005262: 444b add r3, r9 + 8005264: 106d asrs r5, r5, #1 + 8005266: 429d cmp r5, r3 + 8005268: bf38 it cc + 800526a: 461d movcc r5, r3 + 800526c: 0553 lsls r3, r2, #21 + 800526e: d531 bpl.n 80052d4 <__ssputs_r+0xa0> + 8005270: 4629 mov r1, r5 + 8005272: f7ff ff85 bl 8005180 <_malloc_r> + 8005276: 4606 mov r6, r0 + 8005278: b950 cbnz r0, 8005290 <__ssputs_r+0x5c> + 800527a: 230c movs r3, #12 + 800527c: f8ca 3000 str.w r3, [sl] + 8005280: 89a3 ldrh r3, [r4, #12] + 8005282: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8005286: 81a3 strh r3, [r4, #12] + 8005288: f04f 30ff mov.w r0, #4294967295 + 800528c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8005290: 6921 ldr r1, [r4, #16] + 8005292: 464a mov r2, r9 + 8005294: f7ff fa56 bl 8004744 + 8005298: 89a3 ldrh r3, [r4, #12] + 800529a: f423 6390 bic.w r3, r3, #1152 ; 0x480 + 800529e: f043 0380 orr.w r3, r3, #128 ; 0x80 + 80052a2: 81a3 strh r3, [r4, #12] + 80052a4: 6126 str r6, [r4, #16] + 80052a6: 6165 str r5, [r4, #20] + 80052a8: 444e add r6, r9 + 80052aa: eba5 0509 sub.w r5, r5, r9 + 80052ae: 6026 str r6, [r4, #0] + 80052b0: 60a5 str r5, [r4, #8] + 80052b2: 463e mov r6, r7 + 80052b4: 42be cmp r6, r7 + 80052b6: d900 bls.n 80052ba <__ssputs_r+0x86> + 80052b8: 463e mov r6, r7 + 80052ba: 4632 mov r2, r6 + 80052bc: 6820 ldr r0, [r4, #0] + 80052be: 4641 mov r1, r8 + 80052c0: f000 fc58 bl 8005b74 + 80052c4: 68a3 ldr r3, [r4, #8] + 80052c6: 6822 ldr r2, [r4, #0] + 80052c8: 1b9b subs r3, r3, r6 + 80052ca: 4432 add r2, r6 + 80052cc: 60a3 str r3, [r4, #8] + 80052ce: 6022 str r2, [r4, #0] + 80052d0: 2000 movs r0, #0 + 80052d2: e7db b.n 800528c <__ssputs_r+0x58> + 80052d4: 462a mov r2, r5 + 80052d6: f000 fc73 bl 8005bc0 <_realloc_r> + 80052da: 4606 mov r6, r0 + 80052dc: 2800 cmp r0, #0 + 80052de: d1e1 bne.n 80052a4 <__ssputs_r+0x70> + 80052e0: 6921 ldr r1, [r4, #16] + 80052e2: 4650 mov r0, sl + 80052e4: f7ff fefe bl 80050e4 <_free_r> + 80052e8: e7c7 b.n 800527a <__ssputs_r+0x46> + ... + +080052ec <_svfiprintf_r>: + 80052ec: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80052f0: 4698 mov r8, r3 + 80052f2: 898b ldrh r3, [r1, #12] + 80052f4: 061b lsls r3, r3, #24 + 80052f6: b09d sub sp, #116 ; 0x74 + 80052f8: 4607 mov r7, r0 + 80052fa: 460d mov r5, r1 + 80052fc: 4614 mov r4, r2 + 80052fe: d50e bpl.n 800531e <_svfiprintf_r+0x32> + 8005300: 690b ldr r3, [r1, #16] + 8005302: b963 cbnz r3, 800531e <_svfiprintf_r+0x32> + 8005304: 2140 movs r1, #64 ; 0x40 + 8005306: f7ff ff3b bl 8005180 <_malloc_r> + 800530a: 6028 str r0, [r5, #0] + 800530c: 6128 str r0, [r5, #16] + 800530e: b920 cbnz r0, 800531a <_svfiprintf_r+0x2e> + 8005310: 230c movs r3, #12 + 8005312: 603b str r3, [r7, #0] + 8005314: f04f 30ff mov.w r0, #4294967295 + 8005318: e0d1 b.n 80054be <_svfiprintf_r+0x1d2> + 800531a: 2340 movs r3, #64 ; 0x40 + 800531c: 616b str r3, [r5, #20] + 800531e: 2300 movs r3, #0 + 8005320: 9309 str r3, [sp, #36] ; 0x24 + 8005322: 2320 movs r3, #32 + 8005324: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 8005328: f8cd 800c str.w r8, [sp, #12] + 800532c: 2330 movs r3, #48 ; 0x30 + 800532e: f8df 81a8 ldr.w r8, [pc, #424] ; 80054d8 <_svfiprintf_r+0x1ec> + 8005332: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 8005336: f04f 0901 mov.w r9, #1 + 800533a: 4623 mov r3, r4 + 800533c: 469a mov sl, r3 + 800533e: f813 2b01 ldrb.w r2, [r3], #1 + 8005342: b10a cbz r2, 8005348 <_svfiprintf_r+0x5c> + 8005344: 2a25 cmp r2, #37 ; 0x25 + 8005346: d1f9 bne.n 800533c <_svfiprintf_r+0x50> + 8005348: ebba 0b04 subs.w fp, sl, r4 + 800534c: d00b beq.n 8005366 <_svfiprintf_r+0x7a> + 800534e: 465b mov r3, fp + 8005350: 4622 mov r2, r4 + 8005352: 4629 mov r1, r5 + 8005354: 4638 mov r0, r7 + 8005356: f7ff ff6d bl 8005234 <__ssputs_r> + 800535a: 3001 adds r0, #1 + 800535c: f000 80aa beq.w 80054b4 <_svfiprintf_r+0x1c8> + 8005360: 9a09 ldr r2, [sp, #36] ; 0x24 + 8005362: 445a add r2, fp + 8005364: 9209 str r2, [sp, #36] ; 0x24 + 8005366: f89a 3000 ldrb.w r3, [sl] + 800536a: 2b00 cmp r3, #0 + 800536c: f000 80a2 beq.w 80054b4 <_svfiprintf_r+0x1c8> + 8005370: 2300 movs r3, #0 + 8005372: f04f 32ff mov.w r2, #4294967295 + 8005376: e9cd 2305 strd r2, r3, [sp, #20] + 800537a: f10a 0a01 add.w sl, sl, #1 + 800537e: 9304 str r3, [sp, #16] + 8005380: 9307 str r3, [sp, #28] + 8005382: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 8005386: 931a str r3, [sp, #104] ; 0x68 + 8005388: 4654 mov r4, sl + 800538a: 2205 movs r2, #5 + 800538c: f814 1b01 ldrb.w r1, [r4], #1 + 8005390: 4851 ldr r0, [pc, #324] ; (80054d8 <_svfiprintf_r+0x1ec>) + 8005392: f7fa ff45 bl 8000220 + 8005396: 9a04 ldr r2, [sp, #16] + 8005398: b9d8 cbnz r0, 80053d2 <_svfiprintf_r+0xe6> + 800539a: 06d0 lsls r0, r2, #27 + 800539c: bf44 itt mi + 800539e: 2320 movmi r3, #32 + 80053a0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80053a4: 0711 lsls r1, r2, #28 + 80053a6: bf44 itt mi + 80053a8: 232b movmi r3, #43 ; 0x2b + 80053aa: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80053ae: f89a 3000 ldrb.w r3, [sl] + 80053b2: 2b2a cmp r3, #42 ; 0x2a + 80053b4: d015 beq.n 80053e2 <_svfiprintf_r+0xf6> + 80053b6: 9a07 ldr r2, [sp, #28] + 80053b8: 4654 mov r4, sl + 80053ba: 2000 movs r0, #0 + 80053bc: f04f 0c0a mov.w ip, #10 + 80053c0: 4621 mov r1, r4 + 80053c2: f811 3b01 ldrb.w r3, [r1], #1 + 80053c6: 3b30 subs r3, #48 ; 0x30 + 80053c8: 2b09 cmp r3, #9 + 80053ca: d94e bls.n 800546a <_svfiprintf_r+0x17e> + 80053cc: b1b0 cbz r0, 80053fc <_svfiprintf_r+0x110> + 80053ce: 9207 str r2, [sp, #28] + 80053d0: e014 b.n 80053fc <_svfiprintf_r+0x110> + 80053d2: eba0 0308 sub.w r3, r0, r8 + 80053d6: fa09 f303 lsl.w r3, r9, r3 + 80053da: 4313 orrs r3, r2 + 80053dc: 9304 str r3, [sp, #16] + 80053de: 46a2 mov sl, r4 + 80053e0: e7d2 b.n 8005388 <_svfiprintf_r+0x9c> + 80053e2: 9b03 ldr r3, [sp, #12] + 80053e4: 1d19 adds r1, r3, #4 + 80053e6: 681b ldr r3, [r3, #0] + 80053e8: 9103 str r1, [sp, #12] + 80053ea: 2b00 cmp r3, #0 + 80053ec: bfbb ittet lt + 80053ee: 425b neglt r3, r3 + 80053f0: f042 0202 orrlt.w r2, r2, #2 + 80053f4: 9307 strge r3, [sp, #28] + 80053f6: 9307 strlt r3, [sp, #28] + 80053f8: bfb8 it lt + 80053fa: 9204 strlt r2, [sp, #16] + 80053fc: 7823 ldrb r3, [r4, #0] + 80053fe: 2b2e cmp r3, #46 ; 0x2e + 8005400: d10c bne.n 800541c <_svfiprintf_r+0x130> + 8005402: 7863 ldrb r3, [r4, #1] + 8005404: 2b2a cmp r3, #42 ; 0x2a + 8005406: d135 bne.n 8005474 <_svfiprintf_r+0x188> + 8005408: 9b03 ldr r3, [sp, #12] + 800540a: 1d1a adds r2, r3, #4 + 800540c: 681b ldr r3, [r3, #0] + 800540e: 9203 str r2, [sp, #12] + 8005410: 2b00 cmp r3, #0 + 8005412: bfb8 it lt + 8005414: f04f 33ff movlt.w r3, #4294967295 + 8005418: 3402 adds r4, #2 + 800541a: 9305 str r3, [sp, #20] + 800541c: f8df a0c8 ldr.w sl, [pc, #200] ; 80054e8 <_svfiprintf_r+0x1fc> + 8005420: 7821 ldrb r1, [r4, #0] + 8005422: 2203 movs r2, #3 + 8005424: 4650 mov r0, sl + 8005426: f7fa fefb bl 8000220 + 800542a: b140 cbz r0, 800543e <_svfiprintf_r+0x152> + 800542c: 2340 movs r3, #64 ; 0x40 + 800542e: eba0 000a sub.w r0, r0, sl + 8005432: fa03 f000 lsl.w r0, r3, r0 + 8005436: 9b04 ldr r3, [sp, #16] + 8005438: 4303 orrs r3, r0 + 800543a: 3401 adds r4, #1 + 800543c: 9304 str r3, [sp, #16] + 800543e: f814 1b01 ldrb.w r1, [r4], #1 + 8005442: 4826 ldr r0, [pc, #152] ; (80054dc <_svfiprintf_r+0x1f0>) + 8005444: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 8005448: 2206 movs r2, #6 + 800544a: f7fa fee9 bl 8000220 + 800544e: 2800 cmp r0, #0 + 8005450: d038 beq.n 80054c4 <_svfiprintf_r+0x1d8> + 8005452: 4b23 ldr r3, [pc, #140] ; (80054e0 <_svfiprintf_r+0x1f4>) + 8005454: bb1b cbnz r3, 800549e <_svfiprintf_r+0x1b2> + 8005456: 9b03 ldr r3, [sp, #12] + 8005458: 3307 adds r3, #7 + 800545a: f023 0307 bic.w r3, r3, #7 + 800545e: 3308 adds r3, #8 + 8005460: 9303 str r3, [sp, #12] + 8005462: 9b09 ldr r3, [sp, #36] ; 0x24 + 8005464: 4433 add r3, r6 + 8005466: 9309 str r3, [sp, #36] ; 0x24 + 8005468: e767 b.n 800533a <_svfiprintf_r+0x4e> + 800546a: fb0c 3202 mla r2, ip, r2, r3 + 800546e: 460c mov r4, r1 + 8005470: 2001 movs r0, #1 + 8005472: e7a5 b.n 80053c0 <_svfiprintf_r+0xd4> + 8005474: 2300 movs r3, #0 + 8005476: 3401 adds r4, #1 + 8005478: 9305 str r3, [sp, #20] + 800547a: 4619 mov r1, r3 + 800547c: f04f 0c0a mov.w ip, #10 + 8005480: 4620 mov r0, r4 + 8005482: f810 2b01 ldrb.w r2, [r0], #1 + 8005486: 3a30 subs r2, #48 ; 0x30 + 8005488: 2a09 cmp r2, #9 + 800548a: d903 bls.n 8005494 <_svfiprintf_r+0x1a8> + 800548c: 2b00 cmp r3, #0 + 800548e: d0c5 beq.n 800541c <_svfiprintf_r+0x130> + 8005490: 9105 str r1, [sp, #20] + 8005492: e7c3 b.n 800541c <_svfiprintf_r+0x130> + 8005494: fb0c 2101 mla r1, ip, r1, r2 + 8005498: 4604 mov r4, r0 + 800549a: 2301 movs r3, #1 + 800549c: e7f0 b.n 8005480 <_svfiprintf_r+0x194> + 800549e: ab03 add r3, sp, #12 + 80054a0: 9300 str r3, [sp, #0] + 80054a2: 462a mov r2, r5 + 80054a4: 4b0f ldr r3, [pc, #60] ; (80054e4 <_svfiprintf_r+0x1f8>) + 80054a6: a904 add r1, sp, #16 + 80054a8: 4638 mov r0, r7 + 80054aa: f7fb ff4b bl 8001344 <_printf_float> + 80054ae: 1c42 adds r2, r0, #1 + 80054b0: 4606 mov r6, r0 + 80054b2: d1d6 bne.n 8005462 <_svfiprintf_r+0x176> + 80054b4: 89ab ldrh r3, [r5, #12] + 80054b6: 065b lsls r3, r3, #25 + 80054b8: f53f af2c bmi.w 8005314 <_svfiprintf_r+0x28> + 80054bc: 9809 ldr r0, [sp, #36] ; 0x24 + 80054be: b01d add sp, #116 ; 0x74 + 80054c0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80054c4: ab03 add r3, sp, #12 + 80054c6: 9300 str r3, [sp, #0] + 80054c8: 462a mov r2, r5 + 80054ca: 4b06 ldr r3, [pc, #24] ; (80054e4 <_svfiprintf_r+0x1f8>) + 80054cc: a904 add r1, sp, #16 + 80054ce: 4638 mov r0, r7 + 80054d0: f7fc f9d0 bl 8001874 <_printf_i> + 80054d4: e7eb b.n 80054ae <_svfiprintf_r+0x1c2> + 80054d6: bf00 nop + 80054d8: 08006284 .word 0x08006284 + 80054dc: 0800628e .word 0x0800628e + 80054e0: 08001345 .word 0x08001345 + 80054e4: 08005235 .word 0x08005235 + 80054e8: 0800628a .word 0x0800628a + +080054ec <__sfputc_r>: + 80054ec: 6893 ldr r3, [r2, #8] + 80054ee: 3b01 subs r3, #1 + 80054f0: 2b00 cmp r3, #0 + 80054f2: b410 push {r4} + 80054f4: 6093 str r3, [r2, #8] + 80054f6: da07 bge.n 8005508 <__sfputc_r+0x1c> + 80054f8: 6994 ldr r4, [r2, #24] + 80054fa: 42a3 cmp r3, r4 + 80054fc: db01 blt.n 8005502 <__sfputc_r+0x16> + 80054fe: 290a cmp r1, #10 + 8005500: d102 bne.n 8005508 <__sfputc_r+0x1c> + 8005502: bc10 pop {r4} + 8005504: f000 b9e2 b.w 80058cc <__swbuf_r> + 8005508: 6813 ldr r3, [r2, #0] + 800550a: 1c58 adds r0, r3, #1 + 800550c: 6010 str r0, [r2, #0] + 800550e: 7019 strb r1, [r3, #0] + 8005510: 4608 mov r0, r1 + 8005512: bc10 pop {r4} + 8005514: 4770 bx lr + +08005516 <__sfputs_r>: + 8005516: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005518: 4606 mov r6, r0 + 800551a: 460f mov r7, r1 + 800551c: 4614 mov r4, r2 + 800551e: 18d5 adds r5, r2, r3 + 8005520: 42ac cmp r4, r5 + 8005522: d101 bne.n 8005528 <__sfputs_r+0x12> + 8005524: 2000 movs r0, #0 + 8005526: e007 b.n 8005538 <__sfputs_r+0x22> + 8005528: f814 1b01 ldrb.w r1, [r4], #1 + 800552c: 463a mov r2, r7 + 800552e: 4630 mov r0, r6 + 8005530: f7ff ffdc bl 80054ec <__sfputc_r> + 8005534: 1c43 adds r3, r0, #1 + 8005536: d1f3 bne.n 8005520 <__sfputs_r+0xa> + 8005538: bdf8 pop {r3, r4, r5, r6, r7, pc} + ... + +0800553c <_vfiprintf_r>: + 800553c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8005540: 460d mov r5, r1 + 8005542: b09d sub sp, #116 ; 0x74 + 8005544: 4614 mov r4, r2 + 8005546: 4698 mov r8, r3 + 8005548: 4606 mov r6, r0 + 800554a: b118 cbz r0, 8005554 <_vfiprintf_r+0x18> + 800554c: 6983 ldr r3, [r0, #24] + 800554e: b90b cbnz r3, 8005554 <_vfiprintf_r+0x18> + 8005550: f7fe fc14 bl 8003d7c <__sinit> + 8005554: 4b89 ldr r3, [pc, #548] ; (800577c <_vfiprintf_r+0x240>) + 8005556: 429d cmp r5, r3 + 8005558: d11b bne.n 8005592 <_vfiprintf_r+0x56> + 800555a: 6875 ldr r5, [r6, #4] + 800555c: 6e6b ldr r3, [r5, #100] ; 0x64 + 800555e: 07d9 lsls r1, r3, #31 + 8005560: d405 bmi.n 800556e <_vfiprintf_r+0x32> + 8005562: 89ab ldrh r3, [r5, #12] + 8005564: 059a lsls r2, r3, #22 + 8005566: d402 bmi.n 800556e <_vfiprintf_r+0x32> + 8005568: 6da8 ldr r0, [r5, #88] ; 0x58 + 800556a: f7ff f86a bl 8004642 <__retarget_lock_acquire_recursive> + 800556e: 89ab ldrh r3, [r5, #12] + 8005570: 071b lsls r3, r3, #28 + 8005572: d501 bpl.n 8005578 <_vfiprintf_r+0x3c> + 8005574: 692b ldr r3, [r5, #16] + 8005576: b9eb cbnz r3, 80055b4 <_vfiprintf_r+0x78> + 8005578: 4629 mov r1, r5 + 800557a: 4630 mov r0, r6 + 800557c: f000 fa18 bl 80059b0 <__swsetup_r> + 8005580: b1c0 cbz r0, 80055b4 <_vfiprintf_r+0x78> + 8005582: 6e6b ldr r3, [r5, #100] ; 0x64 + 8005584: 07dc lsls r4, r3, #31 + 8005586: d50e bpl.n 80055a6 <_vfiprintf_r+0x6a> + 8005588: f04f 30ff mov.w r0, #4294967295 + 800558c: b01d add sp, #116 ; 0x74 + 800558e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8005592: 4b7b ldr r3, [pc, #492] ; (8005780 <_vfiprintf_r+0x244>) + 8005594: 429d cmp r5, r3 + 8005596: d101 bne.n 800559c <_vfiprintf_r+0x60> + 8005598: 68b5 ldr r5, [r6, #8] + 800559a: e7df b.n 800555c <_vfiprintf_r+0x20> + 800559c: 4b79 ldr r3, [pc, #484] ; (8005784 <_vfiprintf_r+0x248>) + 800559e: 429d cmp r5, r3 + 80055a0: bf08 it eq + 80055a2: 68f5 ldreq r5, [r6, #12] + 80055a4: e7da b.n 800555c <_vfiprintf_r+0x20> + 80055a6: 89ab ldrh r3, [r5, #12] + 80055a8: 0598 lsls r0, r3, #22 + 80055aa: d4ed bmi.n 8005588 <_vfiprintf_r+0x4c> + 80055ac: 6da8 ldr r0, [r5, #88] ; 0x58 + 80055ae: f7ff f849 bl 8004644 <__retarget_lock_release_recursive> + 80055b2: e7e9 b.n 8005588 <_vfiprintf_r+0x4c> + 80055b4: 2300 movs r3, #0 + 80055b6: 9309 str r3, [sp, #36] ; 0x24 + 80055b8: 2320 movs r3, #32 + 80055ba: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 80055be: f8cd 800c str.w r8, [sp, #12] + 80055c2: 2330 movs r3, #48 ; 0x30 + 80055c4: f8df 81c0 ldr.w r8, [pc, #448] ; 8005788 <_vfiprintf_r+0x24c> + 80055c8: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 80055cc: f04f 0901 mov.w r9, #1 + 80055d0: 4623 mov r3, r4 + 80055d2: 469a mov sl, r3 + 80055d4: f813 2b01 ldrb.w r2, [r3], #1 + 80055d8: b10a cbz r2, 80055de <_vfiprintf_r+0xa2> + 80055da: 2a25 cmp r2, #37 ; 0x25 + 80055dc: d1f9 bne.n 80055d2 <_vfiprintf_r+0x96> + 80055de: ebba 0b04 subs.w fp, sl, r4 + 80055e2: d00b beq.n 80055fc <_vfiprintf_r+0xc0> + 80055e4: 465b mov r3, fp + 80055e6: 4622 mov r2, r4 + 80055e8: 4629 mov r1, r5 + 80055ea: 4630 mov r0, r6 + 80055ec: f7ff ff93 bl 8005516 <__sfputs_r> + 80055f0: 3001 adds r0, #1 + 80055f2: f000 80aa beq.w 800574a <_vfiprintf_r+0x20e> + 80055f6: 9a09 ldr r2, [sp, #36] ; 0x24 + 80055f8: 445a add r2, fp + 80055fa: 9209 str r2, [sp, #36] ; 0x24 + 80055fc: f89a 3000 ldrb.w r3, [sl] + 8005600: 2b00 cmp r3, #0 + 8005602: f000 80a2 beq.w 800574a <_vfiprintf_r+0x20e> + 8005606: 2300 movs r3, #0 + 8005608: f04f 32ff mov.w r2, #4294967295 + 800560c: e9cd 2305 strd r2, r3, [sp, #20] + 8005610: f10a 0a01 add.w sl, sl, #1 + 8005614: 9304 str r3, [sp, #16] + 8005616: 9307 str r3, [sp, #28] + 8005618: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 800561c: 931a str r3, [sp, #104] ; 0x68 + 800561e: 4654 mov r4, sl + 8005620: 2205 movs r2, #5 + 8005622: f814 1b01 ldrb.w r1, [r4], #1 + 8005626: 4858 ldr r0, [pc, #352] ; (8005788 <_vfiprintf_r+0x24c>) + 8005628: f7fa fdfa bl 8000220 + 800562c: 9a04 ldr r2, [sp, #16] + 800562e: b9d8 cbnz r0, 8005668 <_vfiprintf_r+0x12c> + 8005630: 06d1 lsls r1, r2, #27 + 8005632: bf44 itt mi + 8005634: 2320 movmi r3, #32 + 8005636: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 800563a: 0713 lsls r3, r2, #28 + 800563c: bf44 itt mi + 800563e: 232b movmi r3, #43 ; 0x2b + 8005640: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8005644: f89a 3000 ldrb.w r3, [sl] + 8005648: 2b2a cmp r3, #42 ; 0x2a + 800564a: d015 beq.n 8005678 <_vfiprintf_r+0x13c> + 800564c: 9a07 ldr r2, [sp, #28] + 800564e: 4654 mov r4, sl + 8005650: 2000 movs r0, #0 + 8005652: f04f 0c0a mov.w ip, #10 + 8005656: 4621 mov r1, r4 + 8005658: f811 3b01 ldrb.w r3, [r1], #1 + 800565c: 3b30 subs r3, #48 ; 0x30 + 800565e: 2b09 cmp r3, #9 + 8005660: d94e bls.n 8005700 <_vfiprintf_r+0x1c4> + 8005662: b1b0 cbz r0, 8005692 <_vfiprintf_r+0x156> + 8005664: 9207 str r2, [sp, #28] + 8005666: e014 b.n 8005692 <_vfiprintf_r+0x156> + 8005668: eba0 0308 sub.w r3, r0, r8 + 800566c: fa09 f303 lsl.w r3, r9, r3 + 8005670: 4313 orrs r3, r2 + 8005672: 9304 str r3, [sp, #16] + 8005674: 46a2 mov sl, r4 + 8005676: e7d2 b.n 800561e <_vfiprintf_r+0xe2> + 8005678: 9b03 ldr r3, [sp, #12] + 800567a: 1d19 adds r1, r3, #4 + 800567c: 681b ldr r3, [r3, #0] + 800567e: 9103 str r1, [sp, #12] + 8005680: 2b00 cmp r3, #0 + 8005682: bfbb ittet lt + 8005684: 425b neglt r3, r3 + 8005686: f042 0202 orrlt.w r2, r2, #2 + 800568a: 9307 strge r3, [sp, #28] + 800568c: 9307 strlt r3, [sp, #28] + 800568e: bfb8 it lt + 8005690: 9204 strlt r2, [sp, #16] + 8005692: 7823 ldrb r3, [r4, #0] + 8005694: 2b2e cmp r3, #46 ; 0x2e + 8005696: d10c bne.n 80056b2 <_vfiprintf_r+0x176> + 8005698: 7863 ldrb r3, [r4, #1] + 800569a: 2b2a cmp r3, #42 ; 0x2a + 800569c: d135 bne.n 800570a <_vfiprintf_r+0x1ce> + 800569e: 9b03 ldr r3, [sp, #12] + 80056a0: 1d1a adds r2, r3, #4 + 80056a2: 681b ldr r3, [r3, #0] + 80056a4: 9203 str r2, [sp, #12] + 80056a6: 2b00 cmp r3, #0 + 80056a8: bfb8 it lt + 80056aa: f04f 33ff movlt.w r3, #4294967295 + 80056ae: 3402 adds r4, #2 + 80056b0: 9305 str r3, [sp, #20] + 80056b2: f8df a0e4 ldr.w sl, [pc, #228] ; 8005798 <_vfiprintf_r+0x25c> + 80056b6: 7821 ldrb r1, [r4, #0] + 80056b8: 2203 movs r2, #3 + 80056ba: 4650 mov r0, sl + 80056bc: f7fa fdb0 bl 8000220 + 80056c0: b140 cbz r0, 80056d4 <_vfiprintf_r+0x198> + 80056c2: 2340 movs r3, #64 ; 0x40 + 80056c4: eba0 000a sub.w r0, r0, sl + 80056c8: fa03 f000 lsl.w r0, r3, r0 + 80056cc: 9b04 ldr r3, [sp, #16] + 80056ce: 4303 orrs r3, r0 + 80056d0: 3401 adds r4, #1 + 80056d2: 9304 str r3, [sp, #16] + 80056d4: f814 1b01 ldrb.w r1, [r4], #1 + 80056d8: 482c ldr r0, [pc, #176] ; (800578c <_vfiprintf_r+0x250>) + 80056da: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 80056de: 2206 movs r2, #6 + 80056e0: f7fa fd9e bl 8000220 + 80056e4: 2800 cmp r0, #0 + 80056e6: d03f beq.n 8005768 <_vfiprintf_r+0x22c> + 80056e8: 4b29 ldr r3, [pc, #164] ; (8005790 <_vfiprintf_r+0x254>) + 80056ea: bb1b cbnz r3, 8005734 <_vfiprintf_r+0x1f8> + 80056ec: 9b03 ldr r3, [sp, #12] + 80056ee: 3307 adds r3, #7 + 80056f0: f023 0307 bic.w r3, r3, #7 + 80056f4: 3308 adds r3, #8 + 80056f6: 9303 str r3, [sp, #12] + 80056f8: 9b09 ldr r3, [sp, #36] ; 0x24 + 80056fa: 443b add r3, r7 + 80056fc: 9309 str r3, [sp, #36] ; 0x24 + 80056fe: e767 b.n 80055d0 <_vfiprintf_r+0x94> + 8005700: fb0c 3202 mla r2, ip, r2, r3 + 8005704: 460c mov r4, r1 + 8005706: 2001 movs r0, #1 + 8005708: e7a5 b.n 8005656 <_vfiprintf_r+0x11a> + 800570a: 2300 movs r3, #0 + 800570c: 3401 adds r4, #1 + 800570e: 9305 str r3, [sp, #20] + 8005710: 4619 mov r1, r3 + 8005712: f04f 0c0a mov.w ip, #10 + 8005716: 4620 mov r0, r4 + 8005718: f810 2b01 ldrb.w r2, [r0], #1 + 800571c: 3a30 subs r2, #48 ; 0x30 + 800571e: 2a09 cmp r2, #9 + 8005720: d903 bls.n 800572a <_vfiprintf_r+0x1ee> + 8005722: 2b00 cmp r3, #0 + 8005724: d0c5 beq.n 80056b2 <_vfiprintf_r+0x176> + 8005726: 9105 str r1, [sp, #20] + 8005728: e7c3 b.n 80056b2 <_vfiprintf_r+0x176> + 800572a: fb0c 2101 mla r1, ip, r1, r2 + 800572e: 4604 mov r4, r0 + 8005730: 2301 movs r3, #1 + 8005732: e7f0 b.n 8005716 <_vfiprintf_r+0x1da> + 8005734: ab03 add r3, sp, #12 + 8005736: 9300 str r3, [sp, #0] + 8005738: 462a mov r2, r5 + 800573a: 4b16 ldr r3, [pc, #88] ; (8005794 <_vfiprintf_r+0x258>) + 800573c: a904 add r1, sp, #16 + 800573e: 4630 mov r0, r6 + 8005740: f7fb fe00 bl 8001344 <_printf_float> + 8005744: 4607 mov r7, r0 + 8005746: 1c78 adds r0, r7, #1 + 8005748: d1d6 bne.n 80056f8 <_vfiprintf_r+0x1bc> + 800574a: 6e6b ldr r3, [r5, #100] ; 0x64 + 800574c: 07d9 lsls r1, r3, #31 + 800574e: d405 bmi.n 800575c <_vfiprintf_r+0x220> + 8005750: 89ab ldrh r3, [r5, #12] + 8005752: 059a lsls r2, r3, #22 + 8005754: d402 bmi.n 800575c <_vfiprintf_r+0x220> + 8005756: 6da8 ldr r0, [r5, #88] ; 0x58 + 8005758: f7fe ff74 bl 8004644 <__retarget_lock_release_recursive> + 800575c: 89ab ldrh r3, [r5, #12] + 800575e: 065b lsls r3, r3, #25 + 8005760: f53f af12 bmi.w 8005588 <_vfiprintf_r+0x4c> + 8005764: 9809 ldr r0, [sp, #36] ; 0x24 + 8005766: e711 b.n 800558c <_vfiprintf_r+0x50> + 8005768: ab03 add r3, sp, #12 + 800576a: 9300 str r3, [sp, #0] + 800576c: 462a mov r2, r5 + 800576e: 4b09 ldr r3, [pc, #36] ; (8005794 <_vfiprintf_r+0x258>) + 8005770: a904 add r1, sp, #16 + 8005772: 4630 mov r0, r6 + 8005774: f7fc f87e bl 8001874 <_printf_i> + 8005778: e7e4 b.n 8005744 <_vfiprintf_r+0x208> + 800577a: bf00 nop + 800577c: 08006068 .word 0x08006068 + 8005780: 08006088 .word 0x08006088 + 8005784: 08006048 .word 0x08006048 + 8005788: 08006284 .word 0x08006284 + 800578c: 0800628e .word 0x0800628e + 8005790: 08001345 .word 0x08001345 + 8005794: 08005517 .word 0x08005517 + 8005798: 0800628a .word 0x0800628a + +0800579c <__srget_r>: + 800579c: b538 push {r3, r4, r5, lr} + 800579e: 460c mov r4, r1 + 80057a0: 4605 mov r5, r0 + 80057a2: b118 cbz r0, 80057ac <__srget_r+0x10> + 80057a4: 6983 ldr r3, [r0, #24] + 80057a6: b90b cbnz r3, 80057ac <__srget_r+0x10> + 80057a8: f7fe fae8 bl 8003d7c <__sinit> + 80057ac: 4b0e ldr r3, [pc, #56] ; (80057e8 <__srget_r+0x4c>) + 80057ae: 429c cmp r4, r3 + 80057b0: d10d bne.n 80057ce <__srget_r+0x32> + 80057b2: 686c ldr r4, [r5, #4] + 80057b4: 4621 mov r1, r4 + 80057b6: 4628 mov r0, r5 + 80057b8: f000 fa44 bl 8005c44 <__srefill_r> + 80057bc: b988 cbnz r0, 80057e2 <__srget_r+0x46> + 80057be: 6863 ldr r3, [r4, #4] + 80057c0: 3b01 subs r3, #1 + 80057c2: 6063 str r3, [r4, #4] + 80057c4: 6823 ldr r3, [r4, #0] + 80057c6: 1c5a adds r2, r3, #1 + 80057c8: 6022 str r2, [r4, #0] + 80057ca: 7818 ldrb r0, [r3, #0] + 80057cc: bd38 pop {r3, r4, r5, pc} + 80057ce: 4b07 ldr r3, [pc, #28] ; (80057ec <__srget_r+0x50>) + 80057d0: 429c cmp r4, r3 + 80057d2: d101 bne.n 80057d8 <__srget_r+0x3c> + 80057d4: 68ac ldr r4, [r5, #8] + 80057d6: e7ed b.n 80057b4 <__srget_r+0x18> + 80057d8: 4b05 ldr r3, [pc, #20] ; (80057f0 <__srget_r+0x54>) + 80057da: 429c cmp r4, r3 + 80057dc: bf08 it eq + 80057de: 68ec ldreq r4, [r5, #12] + 80057e0: e7e8 b.n 80057b4 <__srget_r+0x18> + 80057e2: f04f 30ff mov.w r0, #4294967295 + 80057e6: e7f1 b.n 80057cc <__srget_r+0x30> + 80057e8: 08006068 .word 0x08006068 + 80057ec: 08006088 .word 0x08006088 + 80057f0: 08006048 .word 0x08006048 + +080057f4 : + 80057f4: 4901 ldr r1, [pc, #4] ; (80057fc ) + 80057f6: 2000 movs r0, #0 + 80057f8: 4770 bx lr + 80057fa: bf00 nop + 80057fc: 7ff80000 .word 0x7ff80000 + +08005800 <_sbrk_r>: + 8005800: b538 push {r3, r4, r5, lr} + 8005802: 4d06 ldr r5, [pc, #24] ; (800581c <_sbrk_r+0x1c>) + 8005804: 2300 movs r3, #0 + 8005806: 4604 mov r4, r0 + 8005808: 4608 mov r0, r1 + 800580a: 602b str r3, [r5, #0] + 800580c: f7fb fb76 bl 8000efc <_sbrk> + 8005810: 1c43 adds r3, r0, #1 + 8005812: d102 bne.n 800581a <_sbrk_r+0x1a> + 8005814: 682b ldr r3, [r5, #0] + 8005816: b103 cbz r3, 800581a <_sbrk_r+0x1a> + 8005818: 6023 str r3, [r4, #0] + 800581a: bd38 pop {r3, r4, r5, pc} + 800581c: 20000208 .word 0x20000208 + +08005820 <__sread>: + 8005820: b510 push {r4, lr} + 8005822: 460c mov r4, r1 + 8005824: f9b1 100e ldrsh.w r1, [r1, #14] + 8005828: f000 f9f0 bl 8005c0c <_read_r> + 800582c: 2800 cmp r0, #0 + 800582e: bfab itete ge + 8005830: 6d63 ldrge r3, [r4, #84] ; 0x54 + 8005832: 89a3 ldrhlt r3, [r4, #12] + 8005834: 181b addge r3, r3, r0 + 8005836: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 800583a: bfac ite ge + 800583c: 6563 strge r3, [r4, #84] ; 0x54 + 800583e: 81a3 strhlt r3, [r4, #12] + 8005840: bd10 pop {r4, pc} + +08005842 <__swrite>: + 8005842: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8005846: 461f mov r7, r3 + 8005848: 898b ldrh r3, [r1, #12] + 800584a: 05db lsls r3, r3, #23 + 800584c: 4605 mov r5, r0 + 800584e: 460c mov r4, r1 + 8005850: 4616 mov r6, r2 + 8005852: d505 bpl.n 8005860 <__swrite+0x1e> + 8005854: f9b1 100e ldrsh.w r1, [r1, #14] + 8005858: 2302 movs r3, #2 + 800585a: 2200 movs r2, #0 + 800585c: f000 f978 bl 8005b50 <_lseek_r> + 8005860: 89a3 ldrh r3, [r4, #12] + 8005862: f9b4 100e ldrsh.w r1, [r4, #14] + 8005866: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 800586a: 81a3 strh r3, [r4, #12] + 800586c: 4632 mov r2, r6 + 800586e: 463b mov r3, r7 + 8005870: 4628 mov r0, r5 + 8005872: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 8005876: f000 b889 b.w 800598c <_write_r> + +0800587a <__sseek>: + 800587a: b510 push {r4, lr} + 800587c: 460c mov r4, r1 + 800587e: f9b1 100e ldrsh.w r1, [r1, #14] + 8005882: f000 f965 bl 8005b50 <_lseek_r> + 8005886: 1c43 adds r3, r0, #1 + 8005888: 89a3 ldrh r3, [r4, #12] + 800588a: bf15 itete ne + 800588c: 6560 strne r0, [r4, #84] ; 0x54 + 800588e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 8005892: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 8005896: 81a3 strheq r3, [r4, #12] + 8005898: bf18 it ne + 800589a: 81a3 strhne r3, [r4, #12] + 800589c: bd10 pop {r4, pc} + +0800589e <__sclose>: + 800589e: f9b1 100e ldrsh.w r1, [r1, #14] + 80058a2: f000 b911 b.w 8005ac8 <_close_r> + +080058a6 : + 80058a6: b510 push {r4, lr} + 80058a8: b16a cbz r2, 80058c6 + 80058aa: 3901 subs r1, #1 + 80058ac: 1884 adds r4, r0, r2 + 80058ae: f810 3b01 ldrb.w r3, [r0], #1 + 80058b2: f811 2f01 ldrb.w r2, [r1, #1]! + 80058b6: 4293 cmp r3, r2 + 80058b8: d103 bne.n 80058c2 + 80058ba: 42a0 cmp r0, r4 + 80058bc: d001 beq.n 80058c2 + 80058be: 2b00 cmp r3, #0 + 80058c0: d1f5 bne.n 80058ae + 80058c2: 1a98 subs r0, r3, r2 + 80058c4: bd10 pop {r4, pc} + 80058c6: 4610 mov r0, r2 + 80058c8: e7fc b.n 80058c4 + ... + +080058cc <__swbuf_r>: + 80058cc: b5f8 push {r3, r4, r5, r6, r7, lr} + 80058ce: 460e mov r6, r1 + 80058d0: 4614 mov r4, r2 + 80058d2: 4605 mov r5, r0 + 80058d4: b118 cbz r0, 80058de <__swbuf_r+0x12> + 80058d6: 6983 ldr r3, [r0, #24] + 80058d8: b90b cbnz r3, 80058de <__swbuf_r+0x12> + 80058da: f7fe fa4f bl 8003d7c <__sinit> + 80058de: 4b21 ldr r3, [pc, #132] ; (8005964 <__swbuf_r+0x98>) + 80058e0: 429c cmp r4, r3 + 80058e2: d12b bne.n 800593c <__swbuf_r+0x70> + 80058e4: 686c ldr r4, [r5, #4] + 80058e6: 69a3 ldr r3, [r4, #24] + 80058e8: 60a3 str r3, [r4, #8] + 80058ea: 89a3 ldrh r3, [r4, #12] + 80058ec: 071a lsls r2, r3, #28 + 80058ee: d52f bpl.n 8005950 <__swbuf_r+0x84> + 80058f0: 6923 ldr r3, [r4, #16] + 80058f2: b36b cbz r3, 8005950 <__swbuf_r+0x84> + 80058f4: 6923 ldr r3, [r4, #16] + 80058f6: 6820 ldr r0, [r4, #0] + 80058f8: 1ac0 subs r0, r0, r3 + 80058fa: 6963 ldr r3, [r4, #20] + 80058fc: b2f6 uxtb r6, r6 + 80058fe: 4283 cmp r3, r0 + 8005900: 4637 mov r7, r6 + 8005902: dc04 bgt.n 800590e <__swbuf_r+0x42> + 8005904: 4621 mov r1, r4 + 8005906: 4628 mov r0, r5 + 8005908: f7fe f992 bl 8003c30 <_fflush_r> + 800590c: bb30 cbnz r0, 800595c <__swbuf_r+0x90> + 800590e: 68a3 ldr r3, [r4, #8] + 8005910: 3b01 subs r3, #1 + 8005912: 60a3 str r3, [r4, #8] + 8005914: 6823 ldr r3, [r4, #0] + 8005916: 1c5a adds r2, r3, #1 + 8005918: 6022 str r2, [r4, #0] + 800591a: 701e strb r6, [r3, #0] + 800591c: 6963 ldr r3, [r4, #20] + 800591e: 3001 adds r0, #1 + 8005920: 4283 cmp r3, r0 + 8005922: d004 beq.n 800592e <__swbuf_r+0x62> + 8005924: 89a3 ldrh r3, [r4, #12] + 8005926: 07db lsls r3, r3, #31 + 8005928: d506 bpl.n 8005938 <__swbuf_r+0x6c> + 800592a: 2e0a cmp r6, #10 + 800592c: d104 bne.n 8005938 <__swbuf_r+0x6c> + 800592e: 4621 mov r1, r4 + 8005930: 4628 mov r0, r5 + 8005932: f7fe f97d bl 8003c30 <_fflush_r> + 8005936: b988 cbnz r0, 800595c <__swbuf_r+0x90> + 8005938: 4638 mov r0, r7 + 800593a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 800593c: 4b0a ldr r3, [pc, #40] ; (8005968 <__swbuf_r+0x9c>) + 800593e: 429c cmp r4, r3 + 8005940: d101 bne.n 8005946 <__swbuf_r+0x7a> + 8005942: 68ac ldr r4, [r5, #8] + 8005944: e7cf b.n 80058e6 <__swbuf_r+0x1a> + 8005946: 4b09 ldr r3, [pc, #36] ; (800596c <__swbuf_r+0xa0>) + 8005948: 429c cmp r4, r3 + 800594a: bf08 it eq + 800594c: 68ec ldreq r4, [r5, #12] + 800594e: e7ca b.n 80058e6 <__swbuf_r+0x1a> + 8005950: 4621 mov r1, r4 + 8005952: 4628 mov r0, r5 + 8005954: f000 f82c bl 80059b0 <__swsetup_r> + 8005958: 2800 cmp r0, #0 + 800595a: d0cb beq.n 80058f4 <__swbuf_r+0x28> + 800595c: f04f 37ff mov.w r7, #4294967295 + 8005960: e7ea b.n 8005938 <__swbuf_r+0x6c> + 8005962: bf00 nop + 8005964: 08006068 .word 0x08006068 + 8005968: 08006088 .word 0x08006088 + 800596c: 08006048 .word 0x08006048 + +08005970 <__ascii_wctomb>: + 8005970: 4603 mov r3, r0 + 8005972: 4608 mov r0, r1 + 8005974: b141 cbz r1, 8005988 <__ascii_wctomb+0x18> + 8005976: 2aff cmp r2, #255 ; 0xff + 8005978: d904 bls.n 8005984 <__ascii_wctomb+0x14> + 800597a: 228a movs r2, #138 ; 0x8a + 800597c: 601a str r2, [r3, #0] + 800597e: f04f 30ff mov.w r0, #4294967295 + 8005982: 4770 bx lr + 8005984: 700a strb r2, [r1, #0] + 8005986: 2001 movs r0, #1 + 8005988: 4770 bx lr + ... + +0800598c <_write_r>: + 800598c: b538 push {r3, r4, r5, lr} + 800598e: 4d07 ldr r5, [pc, #28] ; (80059ac <_write_r+0x20>) + 8005990: 4604 mov r4, r0 + 8005992: 4608 mov r0, r1 + 8005994: 4611 mov r1, r2 + 8005996: 2200 movs r2, #0 + 8005998: 602a str r2, [r5, #0] + 800599a: 461a mov r2, r3 + 800599c: f7fb fb03 bl 8000fa6 <_write> + 80059a0: 1c43 adds r3, r0, #1 + 80059a2: d102 bne.n 80059aa <_write_r+0x1e> + 80059a4: 682b ldr r3, [r5, #0] + 80059a6: b103 cbz r3, 80059aa <_write_r+0x1e> + 80059a8: 6023 str r3, [r4, #0] + 80059aa: bd38 pop {r3, r4, r5, pc} + 80059ac: 20000208 .word 0x20000208 + +080059b0 <__swsetup_r>: + 80059b0: 4b32 ldr r3, [pc, #200] ; (8005a7c <__swsetup_r+0xcc>) + 80059b2: b570 push {r4, r5, r6, lr} + 80059b4: 681d ldr r5, [r3, #0] + 80059b6: 4606 mov r6, r0 + 80059b8: 460c mov r4, r1 + 80059ba: b125 cbz r5, 80059c6 <__swsetup_r+0x16> + 80059bc: 69ab ldr r3, [r5, #24] + 80059be: b913 cbnz r3, 80059c6 <__swsetup_r+0x16> + 80059c0: 4628 mov r0, r5 + 80059c2: f7fe f9db bl 8003d7c <__sinit> + 80059c6: 4b2e ldr r3, [pc, #184] ; (8005a80 <__swsetup_r+0xd0>) + 80059c8: 429c cmp r4, r3 + 80059ca: d10f bne.n 80059ec <__swsetup_r+0x3c> + 80059cc: 686c ldr r4, [r5, #4] + 80059ce: 89a3 ldrh r3, [r4, #12] + 80059d0: f9b4 200c ldrsh.w r2, [r4, #12] + 80059d4: 0719 lsls r1, r3, #28 + 80059d6: d42c bmi.n 8005a32 <__swsetup_r+0x82> + 80059d8: 06dd lsls r5, r3, #27 + 80059da: d411 bmi.n 8005a00 <__swsetup_r+0x50> + 80059dc: 2309 movs r3, #9 + 80059de: 6033 str r3, [r6, #0] + 80059e0: f042 0340 orr.w r3, r2, #64 ; 0x40 + 80059e4: 81a3 strh r3, [r4, #12] + 80059e6: f04f 30ff mov.w r0, #4294967295 + 80059ea: e03e b.n 8005a6a <__swsetup_r+0xba> + 80059ec: 4b25 ldr r3, [pc, #148] ; (8005a84 <__swsetup_r+0xd4>) + 80059ee: 429c cmp r4, r3 + 80059f0: d101 bne.n 80059f6 <__swsetup_r+0x46> + 80059f2: 68ac ldr r4, [r5, #8] + 80059f4: e7eb b.n 80059ce <__swsetup_r+0x1e> + 80059f6: 4b24 ldr r3, [pc, #144] ; (8005a88 <__swsetup_r+0xd8>) + 80059f8: 429c cmp r4, r3 + 80059fa: bf08 it eq + 80059fc: 68ec ldreq r4, [r5, #12] + 80059fe: e7e6 b.n 80059ce <__swsetup_r+0x1e> + 8005a00: 0758 lsls r0, r3, #29 + 8005a02: d512 bpl.n 8005a2a <__swsetup_r+0x7a> + 8005a04: 6b61 ldr r1, [r4, #52] ; 0x34 + 8005a06: b141 cbz r1, 8005a1a <__swsetup_r+0x6a> + 8005a08: f104 0344 add.w r3, r4, #68 ; 0x44 + 8005a0c: 4299 cmp r1, r3 + 8005a0e: d002 beq.n 8005a16 <__swsetup_r+0x66> + 8005a10: 4630 mov r0, r6 + 8005a12: f7ff fb67 bl 80050e4 <_free_r> + 8005a16: 2300 movs r3, #0 + 8005a18: 6363 str r3, [r4, #52] ; 0x34 + 8005a1a: 89a3 ldrh r3, [r4, #12] + 8005a1c: f023 0324 bic.w r3, r3, #36 ; 0x24 + 8005a20: 81a3 strh r3, [r4, #12] + 8005a22: 2300 movs r3, #0 + 8005a24: 6063 str r3, [r4, #4] + 8005a26: 6923 ldr r3, [r4, #16] + 8005a28: 6023 str r3, [r4, #0] + 8005a2a: 89a3 ldrh r3, [r4, #12] + 8005a2c: f043 0308 orr.w r3, r3, #8 + 8005a30: 81a3 strh r3, [r4, #12] + 8005a32: 6923 ldr r3, [r4, #16] + 8005a34: b94b cbnz r3, 8005a4a <__swsetup_r+0x9a> + 8005a36: 89a3 ldrh r3, [r4, #12] + 8005a38: f403 7320 and.w r3, r3, #640 ; 0x280 + 8005a3c: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8005a40: d003 beq.n 8005a4a <__swsetup_r+0x9a> + 8005a42: 4621 mov r1, r4 + 8005a44: 4630 mov r0, r6 + 8005a46: f7fe fe23 bl 8004690 <__smakebuf_r> + 8005a4a: 89a0 ldrh r0, [r4, #12] + 8005a4c: f9b4 200c ldrsh.w r2, [r4, #12] + 8005a50: f010 0301 ands.w r3, r0, #1 + 8005a54: d00a beq.n 8005a6c <__swsetup_r+0xbc> + 8005a56: 2300 movs r3, #0 + 8005a58: 60a3 str r3, [r4, #8] + 8005a5a: 6963 ldr r3, [r4, #20] + 8005a5c: 425b negs r3, r3 + 8005a5e: 61a3 str r3, [r4, #24] + 8005a60: 6923 ldr r3, [r4, #16] + 8005a62: b943 cbnz r3, 8005a76 <__swsetup_r+0xc6> + 8005a64: f010 0080 ands.w r0, r0, #128 ; 0x80 + 8005a68: d1ba bne.n 80059e0 <__swsetup_r+0x30> + 8005a6a: bd70 pop {r4, r5, r6, pc} + 8005a6c: 0781 lsls r1, r0, #30 + 8005a6e: bf58 it pl + 8005a70: 6963 ldrpl r3, [r4, #20] + 8005a72: 60a3 str r3, [r4, #8] + 8005a74: e7f4 b.n 8005a60 <__swsetup_r+0xb0> + 8005a76: 2000 movs r0, #0 + 8005a78: e7f7 b.n 8005a6a <__swsetup_r+0xba> + 8005a7a: bf00 nop + 8005a7c: 20000000 .word 0x20000000 + 8005a80: 08006068 .word 0x08006068 + 8005a84: 08006088 .word 0x08006088 + 8005a88: 08006048 .word 0x08006048 + +08005a8c <__assert_func>: + 8005a8c: b51f push {r0, r1, r2, r3, r4, lr} + 8005a8e: 4614 mov r4, r2 + 8005a90: 461a mov r2, r3 + 8005a92: 4b09 ldr r3, [pc, #36] ; (8005ab8 <__assert_func+0x2c>) + 8005a94: 681b ldr r3, [r3, #0] + 8005a96: 4605 mov r5, r0 + 8005a98: 68d8 ldr r0, [r3, #12] + 8005a9a: b14c cbz r4, 8005ab0 <__assert_func+0x24> + 8005a9c: 4b07 ldr r3, [pc, #28] ; (8005abc <__assert_func+0x30>) + 8005a9e: 9100 str r1, [sp, #0] + 8005aa0: e9cd 3401 strd r3, r4, [sp, #4] + 8005aa4: 4906 ldr r1, [pc, #24] ; (8005ac0 <__assert_func+0x34>) + 8005aa6: 462b mov r3, r5 + 8005aa8: f000 f81e bl 8005ae8 + 8005aac: f000 f954 bl 8005d58 + 8005ab0: 4b04 ldr r3, [pc, #16] ; (8005ac4 <__assert_func+0x38>) + 8005ab2: 461c mov r4, r3 + 8005ab4: e7f3 b.n 8005a9e <__assert_func+0x12> + 8005ab6: bf00 nop + 8005ab8: 20000000 .word 0x20000000 + 8005abc: 08006295 .word 0x08006295 + 8005ac0: 080062a2 .word 0x080062a2 + 8005ac4: 080062d0 .word 0x080062d0 + +08005ac8 <_close_r>: + 8005ac8: b538 push {r3, r4, r5, lr} + 8005aca: 4d06 ldr r5, [pc, #24] ; (8005ae4 <_close_r+0x1c>) + 8005acc: 2300 movs r3, #0 + 8005ace: 4604 mov r4, r0 + 8005ad0: 4608 mov r0, r1 + 8005ad2: 602b str r3, [r5, #0] + 8005ad4: f7fb f9e1 bl 8000e9a <_close> + 8005ad8: 1c43 adds r3, r0, #1 + 8005ada: d102 bne.n 8005ae2 <_close_r+0x1a> + 8005adc: 682b ldr r3, [r5, #0] + 8005ade: b103 cbz r3, 8005ae2 <_close_r+0x1a> + 8005ae0: 6023 str r3, [r4, #0] + 8005ae2: bd38 pop {r3, r4, r5, pc} + 8005ae4: 20000208 .word 0x20000208 + +08005ae8 : + 8005ae8: b40e push {r1, r2, r3} + 8005aea: b503 push {r0, r1, lr} + 8005aec: 4601 mov r1, r0 + 8005aee: ab03 add r3, sp, #12 + 8005af0: 4805 ldr r0, [pc, #20] ; (8005b08 ) + 8005af2: f853 2b04 ldr.w r2, [r3], #4 + 8005af6: 6800 ldr r0, [r0, #0] + 8005af8: 9301 str r3, [sp, #4] + 8005afa: f7ff fd1f bl 800553c <_vfiprintf_r> + 8005afe: b002 add sp, #8 + 8005b00: f85d eb04 ldr.w lr, [sp], #4 + 8005b04: b003 add sp, #12 + 8005b06: 4770 bx lr + 8005b08: 20000000 .word 0x20000000 + +08005b0c <_fstat_r>: + 8005b0c: b538 push {r3, r4, r5, lr} + 8005b0e: 4d07 ldr r5, [pc, #28] ; (8005b2c <_fstat_r+0x20>) + 8005b10: 2300 movs r3, #0 + 8005b12: 4604 mov r4, r0 + 8005b14: 4608 mov r0, r1 + 8005b16: 4611 mov r1, r2 + 8005b18: 602b str r3, [r5, #0] + 8005b1a: f7fb f9c9 bl 8000eb0 <_fstat> + 8005b1e: 1c43 adds r3, r0, #1 + 8005b20: d102 bne.n 8005b28 <_fstat_r+0x1c> + 8005b22: 682b ldr r3, [r5, #0] + 8005b24: b103 cbz r3, 8005b28 <_fstat_r+0x1c> + 8005b26: 6023 str r3, [r4, #0] + 8005b28: bd38 pop {r3, r4, r5, pc} + 8005b2a: bf00 nop + 8005b2c: 20000208 .word 0x20000208 + +08005b30 <_isatty_r>: + 8005b30: b538 push {r3, r4, r5, lr} + 8005b32: 4d06 ldr r5, [pc, #24] ; (8005b4c <_isatty_r+0x1c>) + 8005b34: 2300 movs r3, #0 + 8005b36: 4604 mov r4, r0 + 8005b38: 4608 mov r0, r1 + 8005b3a: 602b str r3, [r5, #0] + 8005b3c: f7fb f9c7 bl 8000ece <_isatty> + 8005b40: 1c43 adds r3, r0, #1 + 8005b42: d102 bne.n 8005b4a <_isatty_r+0x1a> + 8005b44: 682b ldr r3, [r5, #0] + 8005b46: b103 cbz r3, 8005b4a <_isatty_r+0x1a> + 8005b48: 6023 str r3, [r4, #0] + 8005b4a: bd38 pop {r3, r4, r5, pc} + 8005b4c: 20000208 .word 0x20000208 + +08005b50 <_lseek_r>: + 8005b50: b538 push {r3, r4, r5, lr} + 8005b52: 4d07 ldr r5, [pc, #28] ; (8005b70 <_lseek_r+0x20>) + 8005b54: 4604 mov r4, r0 + 8005b56: 4608 mov r0, r1 + 8005b58: 4611 mov r1, r2 + 8005b5a: 2200 movs r2, #0 + 8005b5c: 602a str r2, [r5, #0] + 8005b5e: 461a mov r2, r3 + 8005b60: f7fb f9bf bl 8000ee2 <_lseek> + 8005b64: 1c43 adds r3, r0, #1 + 8005b66: d102 bne.n 8005b6e <_lseek_r+0x1e> + 8005b68: 682b ldr r3, [r5, #0] + 8005b6a: b103 cbz r3, 8005b6e <_lseek_r+0x1e> + 8005b6c: 6023 str r3, [r4, #0] + 8005b6e: bd38 pop {r3, r4, r5, pc} + 8005b70: 20000208 .word 0x20000208 + +08005b74 : + 8005b74: 4288 cmp r0, r1 + 8005b76: b510 push {r4, lr} + 8005b78: eb01 0402 add.w r4, r1, r2 + 8005b7c: d902 bls.n 8005b84 + 8005b7e: 4284 cmp r4, r0 + 8005b80: 4623 mov r3, r4 + 8005b82: d807 bhi.n 8005b94 + 8005b84: 1e43 subs r3, r0, #1 + 8005b86: 42a1 cmp r1, r4 + 8005b88: d008 beq.n 8005b9c + 8005b8a: f811 2b01 ldrb.w r2, [r1], #1 + 8005b8e: f803 2f01 strb.w r2, [r3, #1]! + 8005b92: e7f8 b.n 8005b86 + 8005b94: 4402 add r2, r0 + 8005b96: 4601 mov r1, r0 + 8005b98: 428a cmp r2, r1 + 8005b9a: d100 bne.n 8005b9e + 8005b9c: bd10 pop {r4, pc} + 8005b9e: f813 4d01 ldrb.w r4, [r3, #-1]! + 8005ba2: f802 4d01 strb.w r4, [r2, #-1]! + 8005ba6: e7f7 b.n 8005b98 + +08005ba8 <__malloc_lock>: + 8005ba8: 4801 ldr r0, [pc, #4] ; (8005bb0 <__malloc_lock+0x8>) + 8005baa: f7fe bd4a b.w 8004642 <__retarget_lock_acquire_recursive> + 8005bae: bf00 nop + 8005bb0: 20000200 .word 0x20000200 + +08005bb4 <__malloc_unlock>: + 8005bb4: 4801 ldr r0, [pc, #4] ; (8005bbc <__malloc_unlock+0x8>) + 8005bb6: f7fe bd45 b.w 8004644 <__retarget_lock_release_recursive> + 8005bba: bf00 nop + 8005bbc: 20000200 .word 0x20000200 + +08005bc0 <_realloc_r>: + 8005bc0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005bc2: 4607 mov r7, r0 + 8005bc4: 4614 mov r4, r2 + 8005bc6: 460e mov r6, r1 + 8005bc8: b921 cbnz r1, 8005bd4 <_realloc_r+0x14> + 8005bca: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 8005bce: 4611 mov r1, r2 + 8005bd0: f7ff bad6 b.w 8005180 <_malloc_r> + 8005bd4: b922 cbnz r2, 8005be0 <_realloc_r+0x20> + 8005bd6: f7ff fa85 bl 80050e4 <_free_r> + 8005bda: 4625 mov r5, r4 + 8005bdc: 4628 mov r0, r5 + 8005bde: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8005be0: f000 f8c1 bl 8005d66 <_malloc_usable_size_r> + 8005be4: 42a0 cmp r0, r4 + 8005be6: d20f bcs.n 8005c08 <_realloc_r+0x48> + 8005be8: 4621 mov r1, r4 + 8005bea: 4638 mov r0, r7 + 8005bec: f7ff fac8 bl 8005180 <_malloc_r> + 8005bf0: 4605 mov r5, r0 + 8005bf2: 2800 cmp r0, #0 + 8005bf4: d0f2 beq.n 8005bdc <_realloc_r+0x1c> + 8005bf6: 4631 mov r1, r6 + 8005bf8: 4622 mov r2, r4 + 8005bfa: f7fe fda3 bl 8004744 + 8005bfe: 4631 mov r1, r6 + 8005c00: 4638 mov r0, r7 + 8005c02: f7ff fa6f bl 80050e4 <_free_r> + 8005c06: e7e9 b.n 8005bdc <_realloc_r+0x1c> + 8005c08: 4635 mov r5, r6 + 8005c0a: e7e7 b.n 8005bdc <_realloc_r+0x1c> + +08005c0c <_read_r>: + 8005c0c: b538 push {r3, r4, r5, lr} + 8005c0e: 4d07 ldr r5, [pc, #28] ; (8005c2c <_read_r+0x20>) + 8005c10: 4604 mov r4, r0 + 8005c12: 4608 mov r0, r1 + 8005c14: 4611 mov r1, r2 + 8005c16: 2200 movs r2, #0 + 8005c18: 602a str r2, [r5, #0] + 8005c1a: 461a mov r2, r3 + 8005c1c: f7fb f99a bl 8000f54 <_read> + 8005c20: 1c43 adds r3, r0, #1 + 8005c22: d102 bne.n 8005c2a <_read_r+0x1e> + 8005c24: 682b ldr r3, [r5, #0] + 8005c26: b103 cbz r3, 8005c2a <_read_r+0x1e> + 8005c28: 6023 str r3, [r4, #0] + 8005c2a: bd38 pop {r3, r4, r5, pc} + 8005c2c: 20000208 .word 0x20000208 + +08005c30 : + 8005c30: 8983 ldrh r3, [r0, #12] + 8005c32: f003 0309 and.w r3, r3, #9 + 8005c36: 2b09 cmp r3, #9 + 8005c38: d101 bne.n 8005c3e + 8005c3a: f7fe b835 b.w 8003ca8 + 8005c3e: 2000 movs r0, #0 + 8005c40: 4770 bx lr + ... + +08005c44 <__srefill_r>: + 8005c44: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005c46: 460c mov r4, r1 + 8005c48: 4605 mov r5, r0 + 8005c4a: b118 cbz r0, 8005c54 <__srefill_r+0x10> + 8005c4c: 6983 ldr r3, [r0, #24] + 8005c4e: b90b cbnz r3, 8005c54 <__srefill_r+0x10> + 8005c50: f7fe f894 bl 8003d7c <__sinit> + 8005c54: 4b3b ldr r3, [pc, #236] ; (8005d44 <__srefill_r+0x100>) + 8005c56: 429c cmp r4, r3 + 8005c58: d10a bne.n 8005c70 <__srefill_r+0x2c> + 8005c5a: 686c ldr r4, [r5, #4] + 8005c5c: f9b4 200c ldrsh.w r2, [r4, #12] + 8005c60: 2300 movs r3, #0 + 8005c62: 6063 str r3, [r4, #4] + 8005c64: 89a3 ldrh r3, [r4, #12] + 8005c66: 069e lsls r6, r3, #26 + 8005c68: d50c bpl.n 8005c84 <__srefill_r+0x40> + 8005c6a: f04f 30ff mov.w r0, #4294967295 + 8005c6e: e066 b.n 8005d3e <__srefill_r+0xfa> + 8005c70: 4b35 ldr r3, [pc, #212] ; (8005d48 <__srefill_r+0x104>) + 8005c72: 429c cmp r4, r3 + 8005c74: d101 bne.n 8005c7a <__srefill_r+0x36> + 8005c76: 68ac ldr r4, [r5, #8] + 8005c78: e7f0 b.n 8005c5c <__srefill_r+0x18> + 8005c7a: 4b34 ldr r3, [pc, #208] ; (8005d4c <__srefill_r+0x108>) + 8005c7c: 429c cmp r4, r3 + 8005c7e: bf08 it eq + 8005c80: 68ec ldreq r4, [r5, #12] + 8005c82: e7eb b.n 8005c5c <__srefill_r+0x18> + 8005c84: 0758 lsls r0, r3, #29 + 8005c86: d448 bmi.n 8005d1a <__srefill_r+0xd6> + 8005c88: 06d9 lsls r1, r3, #27 + 8005c8a: d405 bmi.n 8005c98 <__srefill_r+0x54> + 8005c8c: 2309 movs r3, #9 + 8005c8e: 602b str r3, [r5, #0] + 8005c90: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8005c94: 81a3 strh r3, [r4, #12] + 8005c96: e7e8 b.n 8005c6a <__srefill_r+0x26> + 8005c98: 071a lsls r2, r3, #28 + 8005c9a: d50b bpl.n 8005cb4 <__srefill_r+0x70> + 8005c9c: 4621 mov r1, r4 + 8005c9e: 4628 mov r0, r5 + 8005ca0: f7fd ffc6 bl 8003c30 <_fflush_r> + 8005ca4: 2800 cmp r0, #0 + 8005ca6: d1e0 bne.n 8005c6a <__srefill_r+0x26> + 8005ca8: 89a3 ldrh r3, [r4, #12] + 8005caa: 60a0 str r0, [r4, #8] + 8005cac: f023 0308 bic.w r3, r3, #8 + 8005cb0: 81a3 strh r3, [r4, #12] + 8005cb2: 61a0 str r0, [r4, #24] + 8005cb4: 89a3 ldrh r3, [r4, #12] + 8005cb6: f043 0304 orr.w r3, r3, #4 + 8005cba: 81a3 strh r3, [r4, #12] + 8005cbc: 6923 ldr r3, [r4, #16] + 8005cbe: b91b cbnz r3, 8005cc8 <__srefill_r+0x84> + 8005cc0: 4621 mov r1, r4 + 8005cc2: 4628 mov r0, r5 + 8005cc4: f7fe fce4 bl 8004690 <__smakebuf_r> + 8005cc8: 89a6 ldrh r6, [r4, #12] + 8005cca: f9b4 700c ldrsh.w r7, [r4, #12] + 8005cce: 07b3 lsls r3, r6, #30 + 8005cd0: d00f beq.n 8005cf2 <__srefill_r+0xae> + 8005cd2: 2301 movs r3, #1 + 8005cd4: 81a3 strh r3, [r4, #12] + 8005cd6: 4b1e ldr r3, [pc, #120] ; (8005d50 <__srefill_r+0x10c>) + 8005cd8: 491e ldr r1, [pc, #120] ; (8005d54 <__srefill_r+0x110>) + 8005cda: 6818 ldr r0, [r3, #0] + 8005cdc: f006 0609 and.w r6, r6, #9 + 8005ce0: f7fe f8ca bl 8003e78 <_fwalk> + 8005ce4: 2e09 cmp r6, #9 + 8005ce6: 81a7 strh r7, [r4, #12] + 8005ce8: d103 bne.n 8005cf2 <__srefill_r+0xae> + 8005cea: 4621 mov r1, r4 + 8005cec: 4628 mov r0, r5 + 8005cee: f7fd ff19 bl 8003b24 <__sflush_r> + 8005cf2: 6922 ldr r2, [r4, #16] + 8005cf4: 6a66 ldr r6, [r4, #36] ; 0x24 + 8005cf6: 6963 ldr r3, [r4, #20] + 8005cf8: 6a21 ldr r1, [r4, #32] + 8005cfa: 6022 str r2, [r4, #0] + 8005cfc: 4628 mov r0, r5 + 8005cfe: 47b0 blx r6 + 8005d00: 2800 cmp r0, #0 + 8005d02: 6060 str r0, [r4, #4] + 8005d04: dc1c bgt.n 8005d40 <__srefill_r+0xfc> + 8005d06: f9b4 300c ldrsh.w r3, [r4, #12] + 8005d0a: bf17 itett ne + 8005d0c: 2200 movne r2, #0 + 8005d0e: f043 0320 orreq.w r3, r3, #32 + 8005d12: 6062 strne r2, [r4, #4] + 8005d14: f043 0340 orrne.w r3, r3, #64 ; 0x40 + 8005d18: e7bc b.n 8005c94 <__srefill_r+0x50> + 8005d1a: 6b61 ldr r1, [r4, #52] ; 0x34 + 8005d1c: 2900 cmp r1, #0 + 8005d1e: d0cd beq.n 8005cbc <__srefill_r+0x78> + 8005d20: f104 0344 add.w r3, r4, #68 ; 0x44 + 8005d24: 4299 cmp r1, r3 + 8005d26: d002 beq.n 8005d2e <__srefill_r+0xea> + 8005d28: 4628 mov r0, r5 + 8005d2a: f7ff f9db bl 80050e4 <_free_r> + 8005d2e: 6c23 ldr r3, [r4, #64] ; 0x40 + 8005d30: 6063 str r3, [r4, #4] + 8005d32: 2000 movs r0, #0 + 8005d34: 6360 str r0, [r4, #52] ; 0x34 + 8005d36: 2b00 cmp r3, #0 + 8005d38: d0c0 beq.n 8005cbc <__srefill_r+0x78> + 8005d3a: 6be3 ldr r3, [r4, #60] ; 0x3c + 8005d3c: 6023 str r3, [r4, #0] + 8005d3e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8005d40: 2000 movs r0, #0 + 8005d42: e7fc b.n 8005d3e <__srefill_r+0xfa> + 8005d44: 08006068 .word 0x08006068 + 8005d48: 08006088 .word 0x08006088 + 8005d4c: 08006048 .word 0x08006048 + 8005d50: 08005e1c .word 0x08005e1c + 8005d54: 08005c31 .word 0x08005c31 + +08005d58 : + 8005d58: b508 push {r3, lr} + 8005d5a: 2006 movs r0, #6 + 8005d5c: f000 f834 bl 8005dc8 + 8005d60: 2001 movs r0, #1 + 8005d62: f7fb f890 bl 8000e86 <_exit> + +08005d66 <_malloc_usable_size_r>: + 8005d66: f851 3c04 ldr.w r3, [r1, #-4] + 8005d6a: 1f18 subs r0, r3, #4 + 8005d6c: 2b00 cmp r3, #0 + 8005d6e: bfbc itt lt + 8005d70: 580b ldrlt r3, [r1, r0] + 8005d72: 18c0 addlt r0, r0, r3 + 8005d74: 4770 bx lr + +08005d76 <_raise_r>: + 8005d76: 291f cmp r1, #31 + 8005d78: b538 push {r3, r4, r5, lr} + 8005d7a: 4604 mov r4, r0 + 8005d7c: 460d mov r5, r1 + 8005d7e: d904 bls.n 8005d8a <_raise_r+0x14> + 8005d80: 2316 movs r3, #22 + 8005d82: 6003 str r3, [r0, #0] + 8005d84: f04f 30ff mov.w r0, #4294967295 + 8005d88: bd38 pop {r3, r4, r5, pc} + 8005d8a: 6c42 ldr r2, [r0, #68] ; 0x44 + 8005d8c: b112 cbz r2, 8005d94 <_raise_r+0x1e> + 8005d8e: f852 3021 ldr.w r3, [r2, r1, lsl #2] + 8005d92: b94b cbnz r3, 8005da8 <_raise_r+0x32> + 8005d94: 4620 mov r0, r4 + 8005d96: f000 f831 bl 8005dfc <_getpid_r> + 8005d9a: 462a mov r2, r5 + 8005d9c: 4601 mov r1, r0 + 8005d9e: 4620 mov r0, r4 + 8005da0: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8005da4: f000 b818 b.w 8005dd8 <_kill_r> + 8005da8: 2b01 cmp r3, #1 + 8005daa: d00a beq.n 8005dc2 <_raise_r+0x4c> + 8005dac: 1c59 adds r1, r3, #1 + 8005dae: d103 bne.n 8005db8 <_raise_r+0x42> + 8005db0: 2316 movs r3, #22 + 8005db2: 6003 str r3, [r0, #0] + 8005db4: 2001 movs r0, #1 + 8005db6: e7e7 b.n 8005d88 <_raise_r+0x12> + 8005db8: 2400 movs r4, #0 + 8005dba: f842 4025 str.w r4, [r2, r5, lsl #2] + 8005dbe: 4628 mov r0, r5 + 8005dc0: 4798 blx r3 + 8005dc2: 2000 movs r0, #0 + 8005dc4: e7e0 b.n 8005d88 <_raise_r+0x12> + ... + +08005dc8 : + 8005dc8: 4b02 ldr r3, [pc, #8] ; (8005dd4 ) + 8005dca: 4601 mov r1, r0 + 8005dcc: 6818 ldr r0, [r3, #0] + 8005dce: f7ff bfd2 b.w 8005d76 <_raise_r> + 8005dd2: bf00 nop + 8005dd4: 20000000 .word 0x20000000 + +08005dd8 <_kill_r>: + 8005dd8: b538 push {r3, r4, r5, lr} + 8005dda: 4d07 ldr r5, [pc, #28] ; (8005df8 <_kill_r+0x20>) + 8005ddc: 2300 movs r3, #0 + 8005dde: 4604 mov r4, r0 + 8005de0: 4608 mov r0, r1 + 8005de2: 4611 mov r1, r2 + 8005de4: 602b str r3, [r5, #0] + 8005de6: f7fb f83e bl 8000e66 <_kill> + 8005dea: 1c43 adds r3, r0, #1 + 8005dec: d102 bne.n 8005df4 <_kill_r+0x1c> + 8005dee: 682b ldr r3, [r5, #0] + 8005df0: b103 cbz r3, 8005df4 <_kill_r+0x1c> + 8005df2: 6023 str r3, [r4, #0] + 8005df4: bd38 pop {r3, r4, r5, pc} + 8005df6: bf00 nop + 8005df8: 20000208 .word 0x20000208 + +08005dfc <_getpid_r>: + 8005dfc: f7fb b82c b.w 8000e58 <_getpid> + +08005e00 <_init>: + 8005e00: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005e02: bf00 nop + 8005e04: bcf8 pop {r3, r4, r5, r6, r7} + 8005e06: bc08 pop {r3} + 8005e08: 469e mov lr, r3 + 8005e0a: 4770 bx lr + +08005e0c <_fini>: + 8005e0c: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005e0e: bf00 nop + 8005e10: bcf8 pop {r3, r4, r5, r6, r7} + 8005e12: bc08 pop {r3} + 8005e14: 469e mov lr, r3 + 8005e16: 4770 bx lr diff --git a/SerialConsoleTemplate/Inc/uart_driver.h b/SerialConsoleTemplate/Inc/uart_driver.h new file mode 100644 index 0000000..a1d6427 --- /dev/null +++ b/SerialConsoleTemplate/Inc/uart_driver.h @@ -0,0 +1,49 @@ +/* + * uart_driver.h + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ + +#ifndef UART_DRIVER_H_ +#define UART_DRIVER_H_ + +#include + +// RCC registers +#define RCC_APB1ENR (volatile uint32_t*) 0x40023840 +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 + +#define GPIOAEN 0 // GPIOA Enable is bit 0 in RCC_APB1LPENR +#define USART2EN 17 // USART2 enable is bit 17 in RCC_AHB1LPENR + +// GPIOA registers +#define GPIOA_MODER (volatile uint32_t*) 0x40020000 +#define GPIOA_AFRL (volatile uint32_t*) 0x40020020 +#define USART_SR (volatile uint32_t*) 0x40004400 +#define USART_DR (volatile uint32_t*) 0x40004404 +#define USART_BRR (volatile uint32_t*) 0x40004408 +#define USART_CR1 (volatile uint32_t*) 0x4000440c +#define USART_CR2 (volatile uint32_t*) 0x40004410 +#define USART_CR3 (volatile uint32_t*) 0x40004414 + +// CR1 bits +#define UE 13 //UART enable +#define TE 3 // Transmitter enable +#define RE 2 // Receiver enable + +// Status register bits +#define TXE 7 // Transmit register empty +#define RXNE 5 // Receive register is not empty..char received + +// Function prototypes +extern void init_usart2(uint32_t baud, uint32_t sysclk); +extern char usart2_getch(); +extern void usart2_putch(char c); + +// syscalls overrides +int _read(int file, char *ptr, int len); +int _write(int file, char *ptr, int len); + + +#endif /* UART_DRIVER_H_ */ diff --git a/SerialConsoleTemplate/STM32F446RETX_FLASH.ld b/SerialConsoleTemplate/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..1437267 --- /dev/null +++ b/SerialConsoleTemplate/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-F446RE Board embedding STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/SerialConsoleTemplate/STM32F446RETX_RAM.ld b/SerialConsoleTemplate/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..f6d2e2f --- /dev/null +++ b/SerialConsoleTemplate/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-F446RE Board embedding STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/SerialConsoleTemplate/SerialConsoleTemplate Debug.launch b/SerialConsoleTemplate/SerialConsoleTemplate Debug.launch new file mode 100644 index 0000000..26c6676 --- /dev/null +++ b/SerialConsoleTemplate/SerialConsoleTemplate Debug.launch @@ -0,0 +1,64 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/SerialConsoleTemplate/Src/main.c b/SerialConsoleTemplate/Src/main.c new file mode 100644 index 0000000..c53020e --- /dev/null +++ b/SerialConsoleTemplate/Src/main.c @@ -0,0 +1,66 @@ +/** + ****************************************************************************** + * @file main.c + * @author Auto-generated by STM32CubeIDE + * @version V1.0 + * @brief Default main function. + ****************************************************************************** +*/ + + + +#include +#include +#include "uart_driver.h" + +#define F_CPU 16000000UL + +#define ARSIZE 10 + +main(){ + init_usart2(57600,F_CPU); + int ch_arr[ARSIZE],count1; + int count2, stop, lastchar; + + lastchar = 0; + stop = 0; + /* + * Read characters into array. + * Stop if end of line, or array full. + */ + while(stop != 1){ + ch_arr[lastchar] = getchar(); + if(ch_arr[lastchar] == '\n') + stop = 1; + else + lastchar = lastchar + 1; + if(lastchar == ARSIZE) + stop = 1; + }lastchar = lastchar-1; + /* + * Now the traditional bubble sort. + */ + count1 = 0; + while(count1 < lastchar){ + count2 = count1 + 1; + while(count2 <= lastchar){ + if(ch_arr[count1] > ch_arr[count2]){ + /* swap */ + int temp; + temp = ch_arr[count1]; + ch_arr[count1] = ch_arr[count2]; + ch_arr[count2] = temp; + } + count2 = count2 + 1; + } + count1 = count1 + 1; + } + + count1 = 0; + while(count1 <= lastchar){ + printf("%c\n", ch_arr[count1]); + count1 = count1 + 1; + } + exit(EXIT_SUCCESS); +} + diff --git a/SerialConsoleTemplate/Src/syscalls.c b/SerialConsoleTemplate/Src/syscalls.c new file mode 100644 index 0000000..9f32dad --- /dev/null +++ b/SerialConsoleTemplate/Src/syscalls.c @@ -0,0 +1,184 @@ +/** +***************************************************************************** +** +** File : syscalls.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/SerialConsoleTemplate/Src/sysmem.c b/SerialConsoleTemplate/Src/sysmem.c new file mode 100644 index 0000000..e5e1bc2 --- /dev/null +++ b/SerialConsoleTemplate/Src/sysmem.c @@ -0,0 +1,83 @@ +/** +***************************************************************************** +** +** File : sysmem.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System Memory calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include + +/* Variables */ +extern int errno; +register char * stack_ptr asm("sp"); + +/* Functions */ + +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + heap_end = &end; + + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) + { + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + diff --git a/SerialConsoleTemplate/Src/uart_driver.c b/SerialConsoleTemplate/Src/uart_driver.c new file mode 100644 index 0000000..c2707c6 --- /dev/null +++ b/SerialConsoleTemplate/Src/uart_driver.c @@ -0,0 +1,92 @@ +/* + * uart_driver.c + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ +#include "uart_driver.h" +#include +#include + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + //*ptr++ = __io_getchar(); + byteCnt++; + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + if(*ptr == '\n') break; + ptr++; + } + + //return len; + return byteCnt; // Return byte count +} + +int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + usart2_putch(*ptr++); + } + return len; +} + + + +char usart2_getch(){ + char c; + while((*(USART_SR)&(1< + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW2barnestr/.project b/labW2barnestr/.project new file mode 100644 index 0000000..2e816ca --- /dev/null +++ b/labW2barnestr/.project @@ -0,0 +1,32 @@ + + + labW2barnestr + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/labW2barnestr/.settings/language.settings.xml b/labW2barnestr/.settings/language.settings.xml new file mode 100644 index 0000000..907f111 --- /dev/null +++ b/labW2barnestr/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/labW2barnestr/Debug/.gitignore b/labW2barnestr/Debug/.gitignore new file mode 100644 index 0000000..ffd9cbe --- /dev/null +++ b/labW2barnestr/Debug/.gitignore @@ -0,0 +1,6 @@ +/Src/ +/Startup/ +/makefile +/objects.list +/objects.mk +/sources.mk diff --git a/labW2barnestr/Debug/labW2barnestr.bin b/labW2barnestr/Debug/labW2barnestr.bin new file mode 100644 index 0000000..4fbb60c Binary files /dev/null and b/labW2barnestr/Debug/labW2barnestr.bin differ diff --git a/labW2barnestr/Debug/labW2barnestr.list b/labW2barnestr/Debug/labW2barnestr.list new file mode 100644 index 0000000..4233367 --- /dev/null +++ b/labW2barnestr/Debug/labW2barnestr.list @@ -0,0 +1,3580 @@ + +labW2barnestr.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001c4 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00001bbc 080001d0 080001d0 000101d0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 0000022c 08001d8c 08001d8c 00011d8c 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 08001fb8 08001fb8 00020068 2**0 + CONTENTS + 4 .ARM 00000000 08001fb8 08001fb8 00020068 2**0 + CONTENTS + 5 .preinit_array 00000000 08001fb8 08001fb8 00020068 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 08001fb8 08001fb8 00011fb8 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 08001fbc 08001fbc 00011fbc 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 00000068 20000000 08001fc0 00020000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000038 20000068 08002028 00020068 2**2 + ALLOC + 10 ._user_heap_stack 00000600 200000a0 08002028 000200a0 2**0 + ALLOC + 11 .ARM.attributes 00000030 00000000 00000000 00020068 2**0 + CONTENTS, READONLY + 12 .debug_info 000038f2 00000000 00000000 00020098 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 00000b62 00000000 00000000 0002398a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 000001e8 00000000 00000000 000244f0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_ranges 00000180 00000000 00000000 000246d8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 00003912 00000000 00000000 00024858 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 00002793 00000000 00000000 0002816a 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 0000ab69 00000000 00000000 0002a8fd 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000053 00000000 00000000 00035466 2**0 + CONTENTS, READONLY + 20 .debug_frame 00000f2c 00000000 00000000 000354bc 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + +Disassembly of section .text: + +080001d0 <__do_global_dtors_aux>: + 80001d0: b510 push {r4, lr} + 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) + 80001d4: 7823 ldrb r3, [r4, #0] + 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> + 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) + 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> + 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) + 80001de: f3af 8000 nop.w + 80001e2: 2301 movs r3, #1 + 80001e4: 7023 strb r3, [r4, #0] + 80001e6: bd10 pop {r4, pc} + 80001e8: 20000068 .word 0x20000068 + 80001ec: 00000000 .word 0x00000000 + 80001f0: 08001d74 .word 0x08001d74 + +080001f4 : + 80001f4: b508 push {r3, lr} + 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) + 80001f8: b11b cbz r3, 8000202 + 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) + 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) + 80001fe: f3af 8000 nop.w + 8000202: bd08 pop {r3, pc} + 8000204: 00000000 .word 0x00000000 + 8000208: 2000006c .word 0x2000006c + 800020c: 08001d74 .word 0x08001d74 + +08000210 : + 8000210: f001 01ff and.w r1, r1, #255 ; 0xff + 8000214: 2a10 cmp r2, #16 + 8000216: db2b blt.n 8000270 + 8000218: f010 0f07 tst.w r0, #7 + 800021c: d008 beq.n 8000230 + 800021e: f810 3b01 ldrb.w r3, [r0], #1 + 8000222: 3a01 subs r2, #1 + 8000224: 428b cmp r3, r1 + 8000226: d02d beq.n 8000284 + 8000228: f010 0f07 tst.w r0, #7 + 800022c: b342 cbz r2, 8000280 + 800022e: d1f6 bne.n 800021e + 8000230: b4f0 push {r4, r5, r6, r7} + 8000232: ea41 2101 orr.w r1, r1, r1, lsl #8 + 8000236: ea41 4101 orr.w r1, r1, r1, lsl #16 + 800023a: f022 0407 bic.w r4, r2, #7 + 800023e: f07f 0700 mvns.w r7, #0 + 8000242: 2300 movs r3, #0 + 8000244: e8f0 5602 ldrd r5, r6, [r0], #8 + 8000248: 3c08 subs r4, #8 + 800024a: ea85 0501 eor.w r5, r5, r1 + 800024e: ea86 0601 eor.w r6, r6, r1 + 8000252: fa85 f547 uadd8 r5, r5, r7 + 8000256: faa3 f587 sel r5, r3, r7 + 800025a: fa86 f647 uadd8 r6, r6, r7 + 800025e: faa5 f687 sel r6, r5, r7 + 8000262: b98e cbnz r6, 8000288 + 8000264: d1ee bne.n 8000244 + 8000266: bcf0 pop {r4, r5, r6, r7} + 8000268: f001 01ff and.w r1, r1, #255 ; 0xff + 800026c: f002 0207 and.w r2, r2, #7 + 8000270: b132 cbz r2, 8000280 + 8000272: f810 3b01 ldrb.w r3, [r0], #1 + 8000276: 3a01 subs r2, #1 + 8000278: ea83 0301 eor.w r3, r3, r1 + 800027c: b113 cbz r3, 8000284 + 800027e: d1f8 bne.n 8000272 + 8000280: 2000 movs r0, #0 + 8000282: 4770 bx lr + 8000284: 3801 subs r0, #1 + 8000286: 4770 bx lr + 8000288: 2d00 cmp r5, #0 + 800028a: bf06 itte eq + 800028c: 4635 moveq r5, r6 + 800028e: 3803 subeq r0, #3 + 8000290: 3807 subne r0, #7 + 8000292: f015 0f01 tst.w r5, #1 + 8000296: d107 bne.n 80002a8 + 8000298: 3001 adds r0, #1 + 800029a: f415 7f80 tst.w r5, #256 ; 0x100 + 800029e: bf02 ittt eq + 80002a0: 3001 addeq r0, #1 + 80002a2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000 + 80002a6: 3001 addeq r0, #1 + 80002a8: bcf0 pop {r4, r5, r6, r7} + 80002aa: 3801 subs r0, #1 + 80002ac: 4770 bx lr + 80002ae: bf00 nop + +080002b0 : + */ + +#include +#include "delay.h" //include declaration header file + +void delay_1ms(uint32_t n){ + 80002b0: b480 push {r7} + 80002b2: b085 sub sp, #20 + 80002b4: af00 add r7, sp, #0 + 80002b6: 6078 str r0, [r7, #4] + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + 80002b8: 687b ldr r3, [r7, #4] + 80002ba: 60fb str r3, [r7, #12] + 80002bc: e01e b.n 80002fc + // Clear value register + *STK_VAL = 0x0000; + 80002be: 4b14 ldr r3, [pc, #80] ; (8000310 ) + 80002c0: 2200 movs r2, #0 + 80002c2: 601a str r2, [r3, #0] + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + 80002c4: 4b13 ldr r3, [pc, #76] ; (8000314 ) + 80002c6: f44f 527a mov.w r2, #16000 ; 0x3e80 + 80002ca: 601a str r2, [r3, #0] + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + 80002cc: 4b12 ldr r3, [pc, #72] ; (8000318 ) + 80002ce: 681b ldr r3, [r3, #0] + 80002d0: 4a11 ldr r2, [pc, #68] ; (8000318 ) + 80002d2: f043 0304 orr.w r3, r3, #4 + 80002d6: 6013 str r3, [r2, #0] + *STK_CTRL |= EN; + 80002d8: 4b0f ldr r3, [pc, #60] ; (8000318 ) + 80002da: 681b ldr r3, [r3, #0] + 80002dc: 4a0e ldr r2, [pc, #56] ; (8000318 ) + 80002de: f043 0301 orr.w r3, r3, #1 + 80002e2: 6013 str r3, [r2, #0] + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + 80002e4: 4b0c ldr r3, [pc, #48] ; (8000318 ) + 80002e6: 681b ldr r3, [r3, #0] + 80002e8: 0c1b lsrs r3, r3, #16 + 80002ea: f003 0301 and.w r3, r3, #1 + 80002ee: 60bb str r3, [r7, #8] + } while (flag != 1); + 80002f0: 68bb ldr r3, [r7, #8] + 80002f2: 2b01 cmp r3, #1 + 80002f4: d1f6 bne.n 80002e4 + for (int i = n ; i > 0 ; i--) { + 80002f6: 68fb ldr r3, [r7, #12] + 80002f8: 3b01 subs r3, #1 + 80002fa: 60fb str r3, [r7, #12] + 80002fc: 68fb ldr r3, [r7, #12] + 80002fe: 2b00 cmp r3, #0 + 8000300: dcdd bgt.n 80002be + } +} + 8000302: bf00 nop + 8000304: bf00 nop + 8000306: 3714 adds r7, #20 + 8000308: 46bd mov sp, r7 + 800030a: f85d 7b04 ldr.w r7, [sp], #4 + 800030e: 4770 bx lr + 8000310: e000e018 .word 0xe000e018 + 8000314: e000e014 .word 0xe000e014 + 8000318: e000e010 .word 0xe000e010 + +0800031c : +#include +#include + +int ledSpeed = 5; + +void led_init(){ + 800031c: b480 push {r7} + 800031e: af00 add r7, sp, #0 + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<) + 8000322: 681b ldr r3, [r3, #0] + 8000324: 4a12 ldr r2, [pc, #72] ; (8000370 ) + 8000326: f043 0302 orr.w r3, r3, #2 + 800032a: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0x3FFF<<10); + 800032c: 4b11 ldr r3, [pc, #68] ; (8000374 ) + 800032e: 681b ldr r3, [r3, #0] + 8000330: 4a10 ldr r2, [pc, #64] ; (8000374 ) + 8000332: f423 037f bic.w r3, r3, #16711680 ; 0xff0000 + 8000336: f423 437c bic.w r3, r3, #64512 ; 0xfc00 + 800033a: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x555<<10); + 800033c: 4b0d ldr r3, [pc, #52] ; (8000374 ) + 800033e: 681b ldr r3, [r3, #0] + 8000340: 4a0c ldr r2, [pc, #48] ; (8000374 ) + 8000342: f443 13aa orr.w r3, r3, #1392640 ; 0x154000 + 8000346: f443 53a0 orr.w r3, r3, #5120 ; 0x1400 + 800034a: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0xFF<<24); + 800034c: 4b09 ldr r3, [pc, #36] ; (8000374 ) + 800034e: 681b ldr r3, [r3, #0] + 8000350: 4a08 ldr r2, [pc, #32] ; (8000374 ) + 8000352: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 + 8000356: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x55<<24); + 8000358: 4b06 ldr r3, [pc, #24] ; (8000374 ) + 800035a: 681b ldr r3, [r3, #0] + 800035c: 4a05 ldr r2, [pc, #20] ; (8000374 ) + 800035e: f043 43aa orr.w r3, r3, #1426063360 ; 0x55000000 + 8000362: 6013 str r3, [r2, #0] +} + 8000364: bf00 nop + 8000366: 46bd mov sp, r7 + 8000368: f85d 7b04 ldr.w r7, [sp], #4 + 800036c: 4770 bx lr + 800036e: bf00 nop + 8000370: 40023830 .word 0x40023830 + 8000374: 40020400 .word 0x40020400 + +08000378 : + +void led_allOn(){ + 8000378: b480 push {r7} + 800037a: af00 add r7, sp, #0 + // Set all LED Bits + *GPIOB_ODR |= ALL_LEDS; + 800037c: 4b06 ldr r3, [pc, #24] ; (8000398 ) + 800037e: 681b ldr r3, [r3, #0] + 8000380: 4a05 ldr r2, [pc, #20] ; (8000398 ) + 8000382: f443 4377 orr.w r3, r3, #63232 ; 0xf700 + 8000386: f043 03e0 orr.w r3, r3, #224 ; 0xe0 + 800038a: 6013 str r3, [r2, #0] +} + 800038c: bf00 nop + 800038e: 46bd mov sp, r7 + 8000390: f85d 7b04 ldr.w r7, [sp], #4 + 8000394: 4770 bx lr + 8000396: bf00 nop + 8000398: 40020414 .word 0x40020414 + +0800039c : + + +void led_allOff(){ + 800039c: b480 push {r7} + 800039e: af00 add r7, sp, #0 + // Reset all LED bits + *GPIOB_ODR &= ~(ALL_LEDS); + 80003a0: 4b06 ldr r3, [pc, #24] ; (80003bc ) + 80003a2: 681b ldr r3, [r3, #0] + 80003a4: 4a05 ldr r2, [pc, #20] ; (80003bc ) + 80003a6: f423 4377 bic.w r3, r3, #63232 ; 0xf700 + 80003aa: f023 03e0 bic.w r3, r3, #224 ; 0xe0 + 80003ae: 6013 str r3, [r2, #0] + +} + 80003b0: bf00 nop + 80003b2: 46bd mov sp, r7 + 80003b4: f85d 7b04 ldr.w r7, [sp], #4 + 80003b8: 4770 bx lr + 80003ba: bf00 nop + 80003bc: 40020414 .word 0x40020414 + +080003c0 : + +void led_on(uint8_t ledIndex){ + 80003c0: b580 push {r7, lr} + 80003c2: b082 sub sp, #8 + 80003c4: af00 add r7, sp, #0 + 80003c6: 4603 mov r3, r0 + 80003c8: 71fb strb r3, [r7, #7] + // Set individual LED based on passed in index + switch (ledIndex) { + 80003ca: 79fb ldrb r3, [r7, #7] + 80003cc: 2b09 cmp r3, #9 + 80003ce: d846 bhi.n 800045e + 80003d0: a201 add r2, pc, #4 ; (adr r2, 80003d8 ) + 80003d2: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80003d6: bf00 nop + 80003d8: 08000401 .word 0x08000401 + 80003dc: 08000409 .word 0x08000409 + 80003e0: 08000411 .word 0x08000411 + 80003e4: 08000419 .word 0x08000419 + 80003e8: 08000423 .word 0x08000423 + 80003ec: 0800042d .word 0x0800042d + 80003f0: 08000437 .word 0x08000437 + 80003f4: 08000441 .word 0x08000441 + 80003f8: 0800044b .word 0x0800044b + 80003fc: 08000455 .word 0x08000455 + case 0: + *GPIOB_BSRR = (1<<5); + 8000400: 4b1b ldr r3, [pc, #108] ; (8000470 ) + 8000402: 2220 movs r2, #32 + 8000404: 601a str r2, [r3, #0] + break; + 8000406: e02e b.n 8000466 + case 1: + *GPIOB_BSRR = (1<<6); + 8000408: 4b19 ldr r3, [pc, #100] ; (8000470 ) + 800040a: 2240 movs r2, #64 ; 0x40 + 800040c: 601a str r2, [r3, #0] + break; + 800040e: e02a b.n 8000466 + case 2: + *GPIOB_BSRR = (1<<7); + 8000410: 4b17 ldr r3, [pc, #92] ; (8000470 ) + 8000412: 2280 movs r2, #128 ; 0x80 + 8000414: 601a str r2, [r3, #0] + break; + 8000416: e026 b.n 8000466 + case 3: + *GPIOB_BSRR = (1<<8); + 8000418: 4b15 ldr r3, [pc, #84] ; (8000470 ) + 800041a: f44f 7280 mov.w r2, #256 ; 0x100 + 800041e: 601a str r2, [r3, #0] + break; + 8000420: e021 b.n 8000466 + case 4: + *GPIOB_BSRR = (1<<9); + 8000422: 4b13 ldr r3, [pc, #76] ; (8000470 ) + 8000424: f44f 7200 mov.w r2, #512 ; 0x200 + 8000428: 601a str r2, [r3, #0] + break; + 800042a: e01c b.n 8000466 + case 5: + *GPIOB_BSRR = (1<<10); + 800042c: 4b10 ldr r3, [pc, #64] ; (8000470 ) + 800042e: f44f 6280 mov.w r2, #1024 ; 0x400 + 8000432: 601a str r2, [r3, #0] + break; + 8000434: e017 b.n 8000466 + case 6: + *GPIOB_BSRR = (1<<12); + 8000436: 4b0e ldr r3, [pc, #56] ; (8000470 ) + 8000438: f44f 5280 mov.w r2, #4096 ; 0x1000 + 800043c: 601a str r2, [r3, #0] + break; + 800043e: e012 b.n 8000466 + case 7: + *GPIOB_BSRR = (1<<13); + 8000440: 4b0b ldr r3, [pc, #44] ; (8000470 ) + 8000442: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8000446: 601a str r2, [r3, #0] + break; + 8000448: e00d b.n 8000466 + case 8: + *GPIOB_BSRR = (1<<14); + 800044a: 4b09 ldr r3, [pc, #36] ; (8000470 ) + 800044c: f44f 4280 mov.w r2, #16384 ; 0x4000 + 8000450: 601a str r2, [r3, #0] + break; + 8000452: e008 b.n 8000466 + case 9: + *GPIOB_BSRR = (1<<15); + 8000454: 4b06 ldr r3, [pc, #24] ; (8000470 ) + 8000456: f44f 4200 mov.w r2, #32768 ; 0x8000 + 800045a: 601a str r2, [r3, #0] + break; + 800045c: e003 b.n 8000466 + default: + printf("LED index out of range\n\r"); + 800045e: 4805 ldr r0, [pc, #20] ; (8000474 ) + 8000460: f000 fb34 bl 8000acc + break; + 8000464: bf00 nop + } +} + 8000466: bf00 nop + 8000468: 3708 adds r7, #8 + 800046a: 46bd mov sp, r7 + 800046c: bd80 pop {r7, pc} + 800046e: bf00 nop + 8000470: 40020418 .word 0x40020418 + 8000474: 08001d8c .word 0x08001d8c + +08000478 : + +void led_off(uint8_t ledIndex){ + 8000478: b580 push {r7, lr} + 800047a: b082 sub sp, #8 + 800047c: af00 add r7, sp, #0 + 800047e: 4603 mov r3, r0 + 8000480: 71fb strb r3, [r7, #7] + // Reset individual LED based on passed in index + if (ledIndex < 6) { + 8000482: 79fb ldrb r3, [r7, #7] + 8000484: 2b05 cmp r3, #5 + 8000486: d806 bhi.n 8000496 + *GPIOB_BSRR = (1<<(21+ledIndex)); + 8000488: 79fb ldrb r3, [r7, #7] + 800048a: 3315 adds r3, #21 + 800048c: 2201 movs r2, #1 + 800048e: 409a lsls r2, r3 + 8000490: 4b09 ldr r3, [pc, #36] ; (80004b8 ) + 8000492: 601a str r2, [r3, #0] + // Add pin offset to index + *GPIOB_BSRR = (1<<(22+ledIndex)); + } else { + printf("LED index out of range\n\r"); + } +} + 8000494: e00c b.n 80004b0 + } else if (ledIndex >= 6) { + 8000496: 79fb ldrb r3, [r7, #7] + 8000498: 2b05 cmp r3, #5 + 800049a: d906 bls.n 80004aa + *GPIOB_BSRR = (1<<(22+ledIndex)); + 800049c: 79fb ldrb r3, [r7, #7] + 800049e: 3316 adds r3, #22 + 80004a0: 2201 movs r2, #1 + 80004a2: 409a lsls r2, r3 + 80004a4: 4b04 ldr r3, [pc, #16] ; (80004b8 ) + 80004a6: 601a str r2, [r3, #0] +} + 80004a8: e002 b.n 80004b0 + printf("LED index out of range\n\r"); + 80004aa: 4804 ldr r0, [pc, #16] ; (80004bc ) + 80004ac: f000 fb0e bl 8000acc +} + 80004b0: bf00 nop + 80004b2: 3708 adds r7, #8 + 80004b4: 46bd mov sp, r7 + 80004b6: bd80 pop {r7, pc} + 80004b8: 40020418 .word 0x40020418 + 80004bc: 08001d8c .word 0x08001d8c + +080004c0 : + +void led_scan(){ + 80004c0: b580 push {r7, lr} + 80004c2: b082 sub sp, #8 + 80004c4: af00 add r7, sp, #0 + led_allOff(); + 80004c6: f7ff ff69 bl 800039c + // Right to left each LED + for (int i = 0; i <= 9 ; i++) { + 80004ca: 2300 movs r3, #0 + 80004cc: 607b str r3, [r7, #4] + 80004ce: e01a b.n 8000506 + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + 80004d0: 4b22 ldr r3, [pc, #136] ; (800055c ) + 80004d2: 681b ldr r3, [r3, #0] + 80004d4: 3301 adds r3, #1 + 80004d6: 2232 movs r2, #50 ; 0x32 + 80004d8: fb02 f303 mul.w r3, r2, r3 + 80004dc: 4618 mov r0, r3 + 80004de: f7ff fee7 bl 80002b0 + if(i != 0){ + 80004e2: 687b ldr r3, [r7, #4] + 80004e4: 2b00 cmp r3, #0 + 80004e6: d006 beq.n 80004f6 + led_off(i-1); + 80004e8: 687b ldr r3, [r7, #4] + 80004ea: b2db uxtb r3, r3 + 80004ec: 3b01 subs r3, #1 + 80004ee: b2db uxtb r3, r3 + 80004f0: 4618 mov r0, r3 + 80004f2: f7ff ffc1 bl 8000478 + } + led_on(i); + 80004f6: 687b ldr r3, [r7, #4] + 80004f8: b2db uxtb r3, r3 + 80004fa: 4618 mov r0, r3 + 80004fc: f7ff ff60 bl 80003c0 + for (int i = 0; i <= 9 ; i++) { + 8000500: 687b ldr r3, [r7, #4] + 8000502: 3301 adds r3, #1 + 8000504: 607b str r3, [r7, #4] + 8000506: 687b ldr r3, [r7, #4] + 8000508: 2b09 cmp r3, #9 + 800050a: dde1 ble.n 80004d0 + } + // Left to right each LED + for (int i = 9; i >= 0; i--) { + 800050c: 2309 movs r3, #9 + 800050e: 603b str r3, [r7, #0] + 8000510: e01a b.n 8000548 + if(i != 9){ + 8000512: 683b ldr r3, [r7, #0] + 8000514: 2b09 cmp r3, #9 + 8000516: d006 beq.n 8000526 + led_off(i+1); + 8000518: 683b ldr r3, [r7, #0] + 800051a: b2db uxtb r3, r3 + 800051c: 3301 adds r3, #1 + 800051e: b2db uxtb r3, r3 + 8000520: 4618 mov r0, r3 + 8000522: f7ff ffa9 bl 8000478 + } + led_on(i); + 8000526: 683b ldr r3, [r7, #0] + 8000528: b2db uxtb r3, r3 + 800052a: 4618 mov r0, r3 + 800052c: f7ff ff48 bl 80003c0 + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + 8000530: 4b0a ldr r3, [pc, #40] ; (800055c ) + 8000532: 681b ldr r3, [r3, #0] + 8000534: 3301 adds r3, #1 + 8000536: 2232 movs r2, #50 ; 0x32 + 8000538: fb02 f303 mul.w r3, r2, r3 + 800053c: 4618 mov r0, r3 + 800053e: f7ff feb7 bl 80002b0 + for (int i = 9; i >= 0; i--) { + 8000542: 683b ldr r3, [r7, #0] + 8000544: 3b01 subs r3, #1 + 8000546: 603b str r3, [r7, #0] + 8000548: 683b ldr r3, [r7, #0] + 800054a: 2b00 cmp r3, #0 + 800054c: dae1 bge.n 8000512 + } + led_off(0); + 800054e: 2000 movs r0, #0 + 8000550: f7ff ff92 bl 8000478 +} + 8000554: bf00 nop + 8000556: 3708 adds r7, #8 + 8000558: 46bd mov sp, r7 + 800055a: bd80 pop {r7, pc} + 800055c: 20000000 .word 0x20000000 + +08000560 : + +void led_flash(){ + 8000560: b580 push {r7, lr} + 8000562: b082 sub sp, #8 + 8000564: af00 add r7, sp, #0 + // Flash LED on and off 10 times at a speed between 0-1 seconds + for (int i = 0; i < 10; i++) { + 8000566: 2300 movs r3, #0 + 8000568: 607b str r3, [r7, #4] + 800056a: e018 b.n 800059e + led_allOn(); + 800056c: f7ff ff04 bl 8000378 + delay_1ms(100+(ledSpeed*100)); + 8000570: 4b0f ldr r3, [pc, #60] ; (80005b0 ) + 8000572: 681b ldr r3, [r3, #0] + 8000574: 3301 adds r3, #1 + 8000576: 2264 movs r2, #100 ; 0x64 + 8000578: fb02 f303 mul.w r3, r2, r3 + 800057c: 4618 mov r0, r3 + 800057e: f7ff fe97 bl 80002b0 + led_allOff(); + 8000582: f7ff ff0b bl 800039c + delay_1ms(100+(ledSpeed*100)); + 8000586: 4b0a ldr r3, [pc, #40] ; (80005b0 ) + 8000588: 681b ldr r3, [r3, #0] + 800058a: 3301 adds r3, #1 + 800058c: 2264 movs r2, #100 ; 0x64 + 800058e: fb02 f303 mul.w r3, r2, r3 + 8000592: 4618 mov r0, r3 + 8000594: f7ff fe8c bl 80002b0 + for (int i = 0; i < 10; i++) { + 8000598: 687b ldr r3, [r7, #4] + 800059a: 3301 adds r3, #1 + 800059c: 607b str r3, [r7, #4] + 800059e: 687b ldr r3, [r7, #4] + 80005a0: 2b09 cmp r3, #9 + 80005a2: dde3 ble.n 800056c + } +} + 80005a4: bf00 nop + 80005a6: bf00 nop + 80005a8: 3708 adds r7, #8 + 80005aa: 46bd mov sp, r7 + 80005ac: bd80 pop {r7, pc} + 80005ae: bf00 nop + 80005b0: 20000000 .word 0x20000000 + +080005b4 : + +void led_setSpeed(uint8_t speed){ + ledSpeed = speed; +} + +void led_incSpeed(){ + 80005b4: b580 push {r7, lr} + 80005b6: af00 add r7, sp, #0 + if (ledSpeed == 0){ + 80005b8: 4b07 ldr r3, [pc, #28] ; (80005d8 ) + 80005ba: 681b ldr r3, [r3, #0] + 80005bc: 2b00 cmp r3, #0 + 80005be: d103 bne.n 80005c8 + printf("Speed too fast\n\r"); + 80005c0: 4806 ldr r0, [pc, #24] ; (80005dc ) + 80005c2: f000 fa83 bl 8000acc + } else { + ledSpeed--; + } +} + 80005c6: e004 b.n 80005d2 + ledSpeed--; + 80005c8: 4b03 ldr r3, [pc, #12] ; (80005d8 ) + 80005ca: 681b ldr r3, [r3, #0] + 80005cc: 3b01 subs r3, #1 + 80005ce: 4a02 ldr r2, [pc, #8] ; (80005d8 ) + 80005d0: 6013 str r3, [r2, #0] +} + 80005d2: bf00 nop + 80005d4: bd80 pop {r7, pc} + 80005d6: bf00 nop + 80005d8: 20000000 .word 0x20000000 + 80005dc: 08001da8 .word 0x08001da8 + +080005e0 : + +void led_decSpeed(){ + 80005e0: b580 push {r7, lr} + 80005e2: af00 add r7, sp, #0 + if (ledSpeed == 9){ + 80005e4: 4b07 ldr r3, [pc, #28] ; (8000604 ) + 80005e6: 681b ldr r3, [r3, #0] + 80005e8: 2b09 cmp r3, #9 + 80005ea: d103 bne.n 80005f4 + printf("Speed too slow\n\r"); + 80005ec: 4806 ldr r0, [pc, #24] ; (8000608 ) + 80005ee: f000 fa6d bl 8000acc + } else { + ledSpeed++; + } +} + 80005f2: e004 b.n 80005fe + ledSpeed++; + 80005f4: 4b03 ldr r3, [pc, #12] ; (8000604 ) + 80005f6: 681b ldr r3, [r3, #0] + 80005f8: 3301 adds r3, #1 + 80005fa: 4a02 ldr r2, [pc, #8] ; (8000604 ) + 80005fc: 6013 str r3, [r2, #0] +} + 80005fe: bf00 nop + 8000600: bd80 pop {r7, pc} + 8000602: bf00 nop + 8000604: 20000000 .word 0x20000000 + 8000608: 08001dbc .word 0x08001dbc + +0800060c : + +uint8_t getCurrentSpeed() +{ + 800060c: b480 push {r7} + 800060e: af00 add r7, sp, #0 + return ledSpeed; + 8000610: 4b03 ldr r3, [pc, #12] ; (8000620 ) + 8000612: 681b ldr r3, [r3, #0] + 8000614: b2db uxtb r3, r3 +} + 8000616: 4618 mov r0, r3 + 8000618: 46bd mov sp, r7 + 800061a: f85d 7b04 ldr.w r7, [sp], #4 + 800061e: 4770 bx lr + 8000620: 20000000 .word 0x20000000 + +08000624 : +#include "led.h" + +#define F_CPU 16000000UL +#define ARSIZE 10 + +void printHelp() { + 8000624: b580 push {r7, lr} + 8000626: af00 add r7, sp, #0 + printf("*Commands*\n\r"); + 8000628: 480e ldr r0, [pc, #56] ; (8000664 ) + 800062a: f000 fa4f bl 8000acc + printf("'f' - Flash Lights 10 Times\n\r"); + 800062e: 480e ldr r0, [pc, #56] ; (8000668 ) + 8000630: f000 fa4c bl 8000acc + printf("'s' - Scan Lights (Once back and forth)\n\r"); + 8000634: 480d ldr r0, [pc, #52] ; (800066c ) + 8000636: f000 fa49 bl 8000acc + printf("'i' - Scan Lights (Infinitely)\n\r"); + 800063a: 480d ldr r0, [pc, #52] ; (8000670 ) + 800063c: f000 fa46 bl 8000acc + printf("'p' - Print Current Speed Interval (0-9)\n\r"); + 8000640: 480c ldr r0, [pc, #48] ; (8000674 ) + 8000642: f000 fa43 bl 8000acc + printf("'+' - Increase Speed\n\r"); + 8000646: 480c ldr r0, [pc, #48] ; (8000678 ) + 8000648: f000 fa40 bl 8000acc + printf("'-' - Decrease Speed\n\r"); + 800064c: 480b ldr r0, [pc, #44] ; (800067c ) + 800064e: f000 fa3d bl 8000acc + printf("'x' - Turn Off Lights\n\r"); + 8000652: 480b ldr r0, [pc, #44] ; (8000680 ) + 8000654: f000 fa3a bl 8000acc + printf("'o' - Turn On Lights\n\r"); + 8000658: 480a ldr r0, [pc, #40] ; (8000684 ) + 800065a: f000 fa37 bl 8000acc + } + 800065e: bf00 nop + 8000660: bd80 pop {r7, pc} + 8000662: bf00 nop + 8000664: 08001dd0 .word 0x08001dd0 + 8000668: 08001de0 .word 0x08001de0 + 800066c: 08001e00 .word 0x08001e00 + 8000670: 08001e2c .word 0x08001e2c + 8000674: 08001e50 .word 0x08001e50 + 8000678: 08001e7c .word 0x08001e7c + 800067c: 08001e94 .word 0x08001e94 + 8000680: 08001eac .word 0x08001eac + 8000684: 08001ec4 .word 0x08001ec4 + +08000688
: + +// main +int main(){ + 8000688: b580 push {r7, lr} + 800068a: b082 sub sp, #8 + 800068c: af00 add r7, sp, #0 + + init_usart2(19200,F_CPU); + 800068e: 4937 ldr r1, [pc, #220] ; (800076c ) + 8000690: f44f 4096 mov.w r0, #19200 ; 0x4b00 + 8000694: f000 f954 bl 8000940 + + // Initialize LEDs + led_init(); + 8000698: f7ff fe40 bl 800031c + + char selection, dummy; + + // Selection Prompt + printf("Choose an option ('h' for help)\n\r"); + 800069c: 4834 ldr r0, [pc, #208] ; (8000770 ) + 800069e: f000 fa15 bl 8000acc + while (1) { + selection = getchar(); + 80006a2: f000 f9d5 bl 8000a50 + 80006a6: 4603 mov r3, r0 + 80006a8: 71fb strb r3, [r7, #7] + switch (selection) { + 80006aa: 79fb ldrb r3, [r7, #7] + 80006ac: 2b78 cmp r3, #120 ; 0x78 + 80006ae: dc53 bgt.n 8000758 + 80006b0: 2b66 cmp r3, #102 ; 0x66 + 80006b2: da04 bge.n 80006be + 80006b4: 2b2b cmp r3, #43 ; 0x2b + 80006b6: d049 beq.n 800074c + 80006b8: 2b2d cmp r3, #45 ; 0x2d + 80006ba: d04a beq.n 8000752 + 80006bc: e04c b.n 8000758 + 80006be: 3b66 subs r3, #102 ; 0x66 + 80006c0: 2b12 cmp r3, #18 + 80006c2: d849 bhi.n 8000758 + 80006c4: a201 add r2, pc, #4 ; (adr r2, 80006cc ) + 80006c6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80006ca: bf00 nop + 80006cc: 0800072b .word 0x0800072b + 80006d0: 08000759 .word 0x08000759 + 80006d4: 08000725 .word 0x08000725 + 80006d8: 08000737 .word 0x08000737 + 80006dc: 08000759 .word 0x08000759 + 80006e0: 08000759 .word 0x08000759 + 80006e4: 08000759 .word 0x08000759 + 80006e8: 08000759 .word 0x08000759 + 80006ec: 08000759 .word 0x08000759 + 80006f0: 08000719 .word 0x08000719 + 80006f4: 0800073d .word 0x0800073d + 80006f8: 08000759 .word 0x08000759 + 80006fc: 08000759 .word 0x08000759 + 8000700: 08000731 .word 0x08000731 + 8000704: 08000759 .word 0x08000759 + 8000708: 08000759 .word 0x08000759 + 800070c: 08000759 .word 0x08000759 + 8000710: 08000759 .word 0x08000759 + 8000714: 0800071f .word 0x0800071f + case 'o': + led_allOn(); + 8000718: f7ff fe2e bl 8000378 + break; + 800071c: e020 b.n 8000760 + case 'x': + led_allOff(); + 800071e: f7ff fe3d bl 800039c + break; + 8000722: e01d b.n 8000760 + case 'h': + printHelp(); + 8000724: f7ff ff7e bl 8000624 + break; + 8000728: e01a b.n 8000760 + case 'f': + led_flash(); + 800072a: f7ff ff19 bl 8000560 + break; + 800072e: e017 b.n 8000760 + case 's': + led_scan(); + 8000730: f7ff fec6 bl 80004c0 + break; + 8000734: e014 b.n 8000760 + case 'i': + while(1){ + led_scan(); + 8000736: f7ff fec3 bl 80004c0 + 800073a: e7fc b.n 8000736 + } + break; + case 'p': + printf("Current Interval: %d\n\r", getCurrentSpeed()); + 800073c: f7ff ff66 bl 800060c + 8000740: 4603 mov r3, r0 + 8000742: 4619 mov r1, r3 + 8000744: 480b ldr r0, [pc, #44] ; (8000774 ) + 8000746: f000 f9c1 bl 8000acc + break; + 800074a: e009 b.n 8000760 + case '+': + led_incSpeed(); + 800074c: f7ff ff32 bl 80005b4 + break; + 8000750: e006 b.n 8000760 + case '-': + led_decSpeed(); + 8000752: f7ff ff45 bl 80005e0 + break; + 8000756: e003 b.n 8000760 + default: + printf("????\n\r"); + 8000758: 4807 ldr r0, [pc, #28] ; (8000778 ) + 800075a: f000 f9b7 bl 8000acc + break; + 800075e: bf00 nop + } + dummy = getchar(); + 8000760: f000 f976 bl 8000a50 + 8000764: 4603 mov r3, r0 + 8000766: 71bb strb r3, [r7, #6] + selection = getchar(); + 8000768: e79b b.n 80006a2 + 800076a: bf00 nop + 800076c: 00f42400 .word 0x00f42400 + 8000770: 08001edc .word 0x08001edc + 8000774: 08001f00 .word 0x08001f00 + 8000778: 08001f18 .word 0x08001f18 + +0800077c <_close>: + } + return len; +} + +int _close(int file) +{ + 800077c: b480 push {r7} + 800077e: b083 sub sp, #12 + 8000780: af00 add r7, sp, #0 + 8000782: 6078 str r0, [r7, #4] + return -1; + 8000784: f04f 33ff mov.w r3, #4294967295 +} + 8000788: 4618 mov r0, r3 + 800078a: 370c adds r7, #12 + 800078c: 46bd mov sp, r7 + 800078e: f85d 7b04 ldr.w r7, [sp], #4 + 8000792: 4770 bx lr + +08000794 <_fstat>: + + +int _fstat(int file, struct stat *st) +{ + 8000794: b480 push {r7} + 8000796: b083 sub sp, #12 + 8000798: af00 add r7, sp, #0 + 800079a: 6078 str r0, [r7, #4] + 800079c: 6039 str r1, [r7, #0] + st->st_mode = S_IFCHR; + 800079e: 683b ldr r3, [r7, #0] + 80007a0: f44f 5200 mov.w r2, #8192 ; 0x2000 + 80007a4: 605a str r2, [r3, #4] + return 0; + 80007a6: 2300 movs r3, #0 +} + 80007a8: 4618 mov r0, r3 + 80007aa: 370c adds r7, #12 + 80007ac: 46bd mov sp, r7 + 80007ae: f85d 7b04 ldr.w r7, [sp], #4 + 80007b2: 4770 bx lr + +080007b4 <_isatty>: + +int _isatty(int file) +{ + 80007b4: b480 push {r7} + 80007b6: b083 sub sp, #12 + 80007b8: af00 add r7, sp, #0 + 80007ba: 6078 str r0, [r7, #4] + return 1; + 80007bc: 2301 movs r3, #1 +} + 80007be: 4618 mov r0, r3 + 80007c0: 370c adds r7, #12 + 80007c2: 46bd mov sp, r7 + 80007c4: f85d 7b04 ldr.w r7, [sp], #4 + 80007c8: 4770 bx lr + +080007ca <_lseek>: + +int _lseek(int file, int ptr, int dir) +{ + 80007ca: b480 push {r7} + 80007cc: b085 sub sp, #20 + 80007ce: af00 add r7, sp, #0 + 80007d0: 60f8 str r0, [r7, #12] + 80007d2: 60b9 str r1, [r7, #8] + 80007d4: 607a str r2, [r7, #4] + return 0; + 80007d6: 2300 movs r3, #0 +} + 80007d8: 4618 mov r0, r3 + 80007da: 3714 adds r7, #20 + 80007dc: 46bd mov sp, r7 + 80007de: f85d 7b04 ldr.w r7, [sp], #4 + 80007e2: 4770 bx lr + +080007e4 <_sbrk>: +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + 80007e4: b580 push {r7, lr} + 80007e6: b084 sub sp, #16 + 80007e8: af00 add r7, sp, #0 + 80007ea: 6078 str r0, [r7, #4] + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + 80007ec: 4b11 ldr r3, [pc, #68] ; (8000834 <_sbrk+0x50>) + 80007ee: 681b ldr r3, [r3, #0] + 80007f0: 2b00 cmp r3, #0 + 80007f2: d102 bne.n 80007fa <_sbrk+0x16> + heap_end = &end; + 80007f4: 4b0f ldr r3, [pc, #60] ; (8000834 <_sbrk+0x50>) + 80007f6: 4a10 ldr r2, [pc, #64] ; (8000838 <_sbrk+0x54>) + 80007f8: 601a str r2, [r3, #0] + + prev_heap_end = heap_end; + 80007fa: 4b0e ldr r3, [pc, #56] ; (8000834 <_sbrk+0x50>) + 80007fc: 681b ldr r3, [r3, #0] + 80007fe: 60fb str r3, [r7, #12] + if (heap_end + incr > stack_ptr) + 8000800: 4b0c ldr r3, [pc, #48] ; (8000834 <_sbrk+0x50>) + 8000802: 681a ldr r2, [r3, #0] + 8000804: 687b ldr r3, [r7, #4] + 8000806: 4413 add r3, r2 + 8000808: 466a mov r2, sp + 800080a: 4293 cmp r3, r2 + 800080c: d907 bls.n 800081e <_sbrk+0x3a> + { + errno = ENOMEM; + 800080e: f000 f919 bl 8000a44 <__errno> + 8000812: 4603 mov r3, r0 + 8000814: 220c movs r2, #12 + 8000816: 601a str r2, [r3, #0] + return (caddr_t) -1; + 8000818: f04f 33ff mov.w r3, #4294967295 + 800081c: e006 b.n 800082c <_sbrk+0x48> + } + + heap_end += incr; + 800081e: 4b05 ldr r3, [pc, #20] ; (8000834 <_sbrk+0x50>) + 8000820: 681a ldr r2, [r3, #0] + 8000822: 687b ldr r3, [r7, #4] + 8000824: 4413 add r3, r2 + 8000826: 4a03 ldr r2, [pc, #12] ; (8000834 <_sbrk+0x50>) + 8000828: 6013 str r3, [r2, #0] + + return (caddr_t) prev_heap_end; + 800082a: 68fb ldr r3, [r7, #12] +} + 800082c: 4618 mov r0, r3 + 800082e: 3710 adds r7, #16 + 8000830: 46bd mov sp, r7 + 8000832: bd80 pop {r7, pc} + 8000834: 20000084 .word 0x20000084 + 8000838: 200000a0 .word 0x200000a0 + +0800083c <_read>: + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + 800083c: b580 push {r7, lr} + 800083e: b086 sub sp, #24 + 8000840: af00 add r7, sp, #0 + 8000842: 60f8 str r0, [r7, #12] + 8000844: 60b9 str r1, [r7, #8] + 8000846: 607a str r2, [r7, #4] + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + 8000848: 2300 movs r3, #0 + 800084a: 613b str r3, [r7, #16] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 800084c: 2300 movs r3, #0 + 800084e: 617b str r3, [r7, #20] + 8000850: e012 b.n 8000878 <_read+0x3c> + { + //*ptr++ = __io_getchar(); + byteCnt++; + 8000852: 693b ldr r3, [r7, #16] + 8000854: 3301 adds r3, #1 + 8000856: 613b str r3, [r7, #16] + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + 8000858: f000 f836 bl 80008c8 + 800085c: 4603 mov r3, r0 + 800085e: 461a mov r2, r3 + 8000860: 68bb ldr r3, [r7, #8] + 8000862: 701a strb r2, [r3, #0] + if(*ptr == '\n') break; + 8000864: 68bb ldr r3, [r7, #8] + 8000866: 781b ldrb r3, [r3, #0] + 8000868: 2b0a cmp r3, #10 + 800086a: d00a beq.n 8000882 <_read+0x46> + ptr++; + 800086c: 68bb ldr r3, [r7, #8] + 800086e: 3301 adds r3, #1 + 8000870: 60bb str r3, [r7, #8] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000872: 697b ldr r3, [r7, #20] + 8000874: 3301 adds r3, #1 + 8000876: 617b str r3, [r7, #20] + 8000878: 697a ldr r2, [r7, #20] + 800087a: 687b ldr r3, [r7, #4] + 800087c: 429a cmp r2, r3 + 800087e: dbe8 blt.n 8000852 <_read+0x16> + 8000880: e000 b.n 8000884 <_read+0x48> + if(*ptr == '\n') break; + 8000882: bf00 nop + } + + //return len; + return byteCnt; // Return byte count + 8000884: 693b ldr r3, [r7, #16] +} + 8000886: 4618 mov r0, r3 + 8000888: 3718 adds r7, #24 + 800088a: 46bd mov sp, r7 + 800088c: bd80 pop {r7, pc} + +0800088e <_write>: + +int _write(int file, char *ptr, int len) +{ + 800088e: b580 push {r7, lr} + 8000890: b086 sub sp, #24 + 8000892: af00 add r7, sp, #0 + 8000894: 60f8 str r0, [r7, #12] + 8000896: 60b9 str r1, [r7, #8] + 8000898: 607a str r2, [r7, #4] + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + 800089a: 2300 movs r3, #0 + 800089c: 617b str r3, [r7, #20] + 800089e: e009 b.n 80008b4 <_write+0x26> + { + usart2_putch(*ptr++); + 80008a0: 68bb ldr r3, [r7, #8] + 80008a2: 1c5a adds r2, r3, #1 + 80008a4: 60ba str r2, [r7, #8] + 80008a6: 781b ldrb r3, [r3, #0] + 80008a8: 4618 mov r0, r3 + 80008aa: f000 f82f bl 800090c + for (DataIdx = 0; DataIdx < len; DataIdx++) + 80008ae: 697b ldr r3, [r7, #20] + 80008b0: 3301 adds r3, #1 + 80008b2: 617b str r3, [r7, #20] + 80008b4: 697a ldr r2, [r7, #20] + 80008b6: 687b ldr r3, [r7, #4] + 80008b8: 429a cmp r2, r3 + 80008ba: dbf1 blt.n 80008a0 <_write+0x12> + } + return len; + 80008bc: 687b ldr r3, [r7, #4] +} + 80008be: 4618 mov r0, r3 + 80008c0: 3718 adds r7, #24 + 80008c2: 46bd mov sp, r7 + 80008c4: bd80 pop {r7, pc} + ... + +080008c8 : + + + +char usart2_getch(){ + 80008c8: b580 push {r7, lr} + 80008ca: b082 sub sp, #8 + 80008cc: af00 add r7, sp, #0 + char c; + while((*(USART_SR)&(1<) + 80008d2: 681b ldr r3, [r3, #0] + 80008d4: f003 0320 and.w r3, r3, #32 + 80008d8: 2b20 cmp r3, #32 + 80008da: d1f9 bne.n 80008d0 + c = ((char) *USART_DR); // Read character from usart + 80008dc: 4b0a ldr r3, [pc, #40] ; (8000908 ) + 80008de: 681b ldr r3, [r3, #0] + 80008e0: 71fb strb r3, [r7, #7] + usart2_putch(c); // Echo back + 80008e2: 79fb ldrb r3, [r7, #7] + 80008e4: 4618 mov r0, r3 + 80008e6: f000 f811 bl 800090c + + if (c == '\r'){ // If character is CR + 80008ea: 79fb ldrb r3, [r7, #7] + 80008ec: 2b0d cmp r3, #13 + 80008ee: d104 bne.n 80008fa + usart2_putch('\n'); // send it + 80008f0: 200a movs r0, #10 + 80008f2: f000 f80b bl 800090c + c = '\n'; // Return LF. fgets is terminated by LF + 80008f6: 230a movs r3, #10 + 80008f8: 71fb strb r3, [r7, #7] + } + + return c; + 80008fa: 79fb ldrb r3, [r7, #7] +} + 80008fc: 4618 mov r0, r3 + 80008fe: 3708 adds r7, #8 + 8000900: 46bd mov sp, r7 + 8000902: bd80 pop {r7, pc} + 8000904: 40004400 .word 0x40004400 + 8000908: 40004404 .word 0x40004404 + +0800090c : + +void usart2_putch(char c){ + 800090c: b480 push {r7} + 800090e: b083 sub sp, #12 + 8000910: af00 add r7, sp, #0 + 8000912: 4603 mov r3, r0 + 8000914: 71fb strb r3, [r7, #7] + while((*(USART_SR)&(1<) + 800091a: 681b ldr r3, [r3, #0] + 800091c: f003 0380 and.w r3, r3, #128 ; 0x80 + 8000920: 2b80 cmp r3, #128 ; 0x80 + 8000922: d1f9 bne.n 8000918 + *(USART_DR) = c; + 8000924: 4a05 ldr r2, [pc, #20] ; (800093c ) + 8000926: 79fb ldrb r3, [r7, #7] + 8000928: 6013 str r3, [r2, #0] +} + 800092a: bf00 nop + 800092c: 370c adds r7, #12 + 800092e: 46bd mov sp, r7 + 8000930: f85d 7b04 ldr.w r7, [sp], #4 + 8000934: 4770 bx lr + 8000936: bf00 nop + 8000938: 40004400 .word 0x40004400 + 800093c: 40004404 .word 0x40004404 + +08000940 : + +void init_usart2(uint32_t baud, uint32_t sysclk){ + 8000940: b580 push {r7, lr} + 8000942: b082 sub sp, #8 + 8000944: af00 add r7, sp, #0 + 8000946: 6078 str r0, [r7, #4] + 8000948: 6039 str r1, [r7, #0] + // Enable clocks for GPIOA and USART2 + *(RCC_AHB1ENR) |= (1<) + 800094c: 681b ldr r3, [r3, #0] + 800094e: 4a1f ldr r2, [pc, #124] ; (80009cc ) + 8000950: f043 0301 orr.w r3, r3, #1 + 8000954: 6013 str r3, [r2, #0] + *(RCC_APB1ENR) |= (1<) + 8000958: 681b ldr r3, [r3, #0] + 800095a: 4a1d ldr r2, [pc, #116] ; (80009d0 ) + 800095c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8000960: 6013 str r3, [r2, #0] + + // Function 7 of PORTA pins is USART + *(GPIOA_AFRL) &= (0xFFFF00FF); // Clear the bits associated with PA3 and PA2 + 8000962: 4b1c ldr r3, [pc, #112] ; (80009d4 ) + 8000964: 681b ldr r3, [r3, #0] + 8000966: 4a1b ldr r2, [pc, #108] ; (80009d4 ) + 8000968: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 800096c: 6013 str r3, [r2, #0] + *(GPIOA_AFRL) |= (0b01110111<<8); // Choose function 7 for both PA3 and PA2 + 800096e: 4b19 ldr r3, [pc, #100] ; (80009d4 ) + 8000970: 681b ldr r3, [r3, #0] + 8000972: 4a18 ldr r2, [pc, #96] ; (80009d4 ) + 8000974: f443 43ee orr.w r3, r3, #30464 ; 0x7700 + 8000978: 6013 str r3, [r2, #0] + *(GPIOA_MODER) &= (0xFFFFFF0F); // Clear mode bits for PA3 and PA2 + 800097a: 4b17 ldr r3, [pc, #92] ; (80009d8 ) + 800097c: 681b ldr r3, [r3, #0] + 800097e: 4a16 ldr r2, [pc, #88] ; (80009d8 ) + 8000980: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 8000984: 6013 str r3, [r2, #0] + *(GPIOA_MODER) |= (0b1010<<4); // Both PA3 and PA2 in alt function mode + 8000986: 4b14 ldr r3, [pc, #80] ; (80009d8 ) + 8000988: 681b ldr r3, [r3, #0] + 800098a: 4a13 ldr r2, [pc, #76] ; (80009d8 ) + 800098c: f043 03a0 orr.w r3, r3, #160 ; 0xa0 + 8000990: 6013 str r3, [r2, #0] + //USART2_init(); //8n1 no flow control + // over8 = 0..oversample by 16 + // M = 0..1 start bit, data size is 8, 1 stop bit + // PCE= 0..Parity check not enabled + // no interrupts... using polling + *(USART_CR1) = (1<) + 8000994: f242 020c movw r2, #8204 ; 0x200c + 8000998: 601a str r2, [r3, #0] + *(USART_CR2) = 0; // This is the default, but do it anyway + 800099a: 4b11 ldr r3, [pc, #68] ; (80009e0 ) + 800099c: 2200 movs r2, #0 + 800099e: 601a str r2, [r3, #0] + *(USART_CR3) = 0; // This is the default, but do it anyway + 80009a0: 4b10 ldr r3, [pc, #64] ; (80009e4 ) + 80009a2: 2200 movs r2, #0 + 80009a4: 601a str r2, [r3, #0] + *(USART_BRR) = sysclk/baud; + 80009a6: 4910 ldr r1, [pc, #64] ; (80009e8 ) + 80009a8: 683a ldr r2, [r7, #0] + 80009aa: 687b ldr r3, [r7, #4] + 80009ac: fbb2 f3f3 udiv r3, r2, r3 + 80009b0: 600b str r3, [r1, #0] + + /* I'm not sure if this is needed for standard IO*/ + //setvbuf(stderr, NULL, _IONBF, 0); + //setvbuf(stdin, NULL, _IONBF, 0); + setvbuf(stdout, NULL, _IONBF, 0); + 80009b2: 4b0e ldr r3, [pc, #56] ; (80009ec ) + 80009b4: 681b ldr r3, [r3, #0] + 80009b6: 6898 ldr r0, [r3, #8] + 80009b8: 2300 movs r3, #0 + 80009ba: 2202 movs r2, #2 + 80009bc: 2100 movs r1, #0 + 80009be: f000 f89d bl 8000afc +} + 80009c2: bf00 nop + 80009c4: 3708 adds r7, #8 + 80009c6: 46bd mov sp, r7 + 80009c8: bd80 pop {r7, pc} + 80009ca: bf00 nop + 80009cc: 40023830 .word 0x40023830 + 80009d0: 40023840 .word 0x40023840 + 80009d4: 40020020 .word 0x40020020 + 80009d8: 40020000 .word 0x40020000 + 80009dc: 4000440c .word 0x4000440c + 80009e0: 40004410 .word 0x40004410 + 80009e4: 40004414 .word 0x40004414 + 80009e8: 40004408 .word 0x40004408 + 80009ec: 20000004 .word 0x20000004 + +080009f0 : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 80009f0: 480d ldr r0, [pc, #52] ; (8000a28 ) + mov sp, r0 /* set stack pointer */ + 80009f2: 4685 mov sp, r0 + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 80009f4: 480d ldr r0, [pc, #52] ; (8000a2c ) + ldr r1, =_edata + 80009f6: 490e ldr r1, [pc, #56] ; (8000a30 ) + ldr r2, =_sidata + 80009f8: 4a0e ldr r2, [pc, #56] ; (8000a34 ) + movs r3, #0 + 80009fa: 2300 movs r3, #0 + b LoopCopyDataInit + 80009fc: e002 b.n 8000a04 + +080009fe : + +CopyDataInit: + ldr r4, [r2, r3] + 80009fe: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8000a00: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8000a02: 3304 adds r3, #4 + +08000a04 : + +LoopCopyDataInit: + adds r4, r0, r3 + 8000a04: 18c4 adds r4, r0, r3 + cmp r4, r1 + 8000a06: 428c cmp r4, r1 + bcc CopyDataInit + 8000a08: d3f9 bcc.n 80009fe + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 8000a0a: 4a0b ldr r2, [pc, #44] ; (8000a38 ) + ldr r4, =_ebss + 8000a0c: 4c0b ldr r4, [pc, #44] ; (8000a3c ) + movs r3, #0 + 8000a0e: 2300 movs r3, #0 + b LoopFillZerobss + 8000a10: e001 b.n 8000a16 + +08000a12 : + +FillZerobss: + str r3, [r2] + 8000a12: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8000a14: 3204 adds r2, #4 + +08000a16 : + +LoopFillZerobss: + cmp r2, r4 + 8000a16: 42a2 cmp r2, r4 + bcc FillZerobss + 8000a18: d3fb bcc.n 8000a12 + +/* Call the clock system intitialization function.*/ + bl SystemInit + 8000a1a: f3af 8000 nop.w +/* Call static constructors */ + bl __libc_init_array + 8000a1e: f000 f829 bl 8000a74 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8000a22: f7ff fe31 bl 8000688
+ +08000a26 : + +LoopForever: + b LoopForever + 8000a26: e7fe b.n 8000a26 + ldr r0, =_estack + 8000a28: 20020000 .word 0x20020000 + ldr r0, =_sdata + 8000a2c: 20000000 .word 0x20000000 + ldr r1, =_edata + 8000a30: 20000068 .word 0x20000068 + ldr r2, =_sidata + 8000a34: 08001fc0 .word 0x08001fc0 + ldr r2, =_sbss + 8000a38: 20000068 .word 0x20000068 + ldr r4, =_ebss + 8000a3c: 200000a0 .word 0x200000a0 + +08000a40 : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8000a40: e7fe b.n 8000a40 + ... + +08000a44 <__errno>: + 8000a44: 4b01 ldr r3, [pc, #4] ; (8000a4c <__errno+0x8>) + 8000a46: 6818 ldr r0, [r3, #0] + 8000a48: 4770 bx lr + 8000a4a: bf00 nop + 8000a4c: 20000004 .word 0x20000004 + +08000a50 : + 8000a50: 4b07 ldr r3, [pc, #28] ; (8000a70 ) + 8000a52: b510 push {r4, lr} + 8000a54: 681c ldr r4, [r3, #0] + 8000a56: b124 cbz r4, 8000a62 + 8000a58: 69a3 ldr r3, [r4, #24] + 8000a5a: b913 cbnz r3, 8000a62 + 8000a5c: 4620 mov r0, r4 + 8000a5e: f000 fa3f bl 8000ee0 <__sinit> + 8000a62: 6861 ldr r1, [r4, #4] + 8000a64: 4620 mov r0, r4 + 8000a66: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000a6a: f000 baf3 b.w 8001054 <_getc_r> + 8000a6e: bf00 nop + 8000a70: 20000004 .word 0x20000004 + +08000a74 <__libc_init_array>: + 8000a74: b570 push {r4, r5, r6, lr} + 8000a76: 4d0d ldr r5, [pc, #52] ; (8000aac <__libc_init_array+0x38>) + 8000a78: 4c0d ldr r4, [pc, #52] ; (8000ab0 <__libc_init_array+0x3c>) + 8000a7a: 1b64 subs r4, r4, r5 + 8000a7c: 10a4 asrs r4, r4, #2 + 8000a7e: 2600 movs r6, #0 + 8000a80: 42a6 cmp r6, r4 + 8000a82: d109 bne.n 8000a98 <__libc_init_array+0x24> + 8000a84: 4d0b ldr r5, [pc, #44] ; (8000ab4 <__libc_init_array+0x40>) + 8000a86: 4c0c ldr r4, [pc, #48] ; (8000ab8 <__libc_init_array+0x44>) + 8000a88: f001 f974 bl 8001d74 <_init> + 8000a8c: 1b64 subs r4, r4, r5 + 8000a8e: 10a4 asrs r4, r4, #2 + 8000a90: 2600 movs r6, #0 + 8000a92: 42a6 cmp r6, r4 + 8000a94: d105 bne.n 8000aa2 <__libc_init_array+0x2e> + 8000a96: bd70 pop {r4, r5, r6, pc} + 8000a98: f855 3b04 ldr.w r3, [r5], #4 + 8000a9c: 4798 blx r3 + 8000a9e: 3601 adds r6, #1 + 8000aa0: e7ee b.n 8000a80 <__libc_init_array+0xc> + 8000aa2: f855 3b04 ldr.w r3, [r5], #4 + 8000aa6: 4798 blx r3 + 8000aa8: 3601 adds r6, #1 + 8000aaa: e7f2 b.n 8000a92 <__libc_init_array+0x1e> + 8000aac: 08001fb8 .word 0x08001fb8 + 8000ab0: 08001fb8 .word 0x08001fb8 + 8000ab4: 08001fb8 .word 0x08001fb8 + 8000ab8: 08001fbc .word 0x08001fbc + +08000abc : + 8000abc: 4402 add r2, r0 + 8000abe: 4603 mov r3, r0 + 8000ac0: 4293 cmp r3, r2 + 8000ac2: d100 bne.n 8000ac6 + 8000ac4: 4770 bx lr + 8000ac6: f803 1b01 strb.w r1, [r3], #1 + 8000aca: e7f9 b.n 8000ac0 + +08000acc : + 8000acc: b40f push {r0, r1, r2, r3} + 8000ace: 4b0a ldr r3, [pc, #40] ; (8000af8 ) + 8000ad0: b513 push {r0, r1, r4, lr} + 8000ad2: 681c ldr r4, [r3, #0] + 8000ad4: b124 cbz r4, 8000ae0 + 8000ad6: 69a3 ldr r3, [r4, #24] + 8000ad8: b913 cbnz r3, 8000ae0 + 8000ada: 4620 mov r0, r4 + 8000adc: f000 fa00 bl 8000ee0 <__sinit> + 8000ae0: ab05 add r3, sp, #20 + 8000ae2: 9a04 ldr r2, [sp, #16] + 8000ae4: 68a1 ldr r1, [r4, #8] + 8000ae6: 9301 str r3, [sp, #4] + 8000ae8: 4620 mov r0, r4 + 8000aea: f000 fc37 bl 800135c <_vfiprintf_r> + 8000aee: b002 add sp, #8 + 8000af0: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000af4: b004 add sp, #16 + 8000af6: 4770 bx lr + 8000af8: 20000004 .word 0x20000004 + +08000afc : + 8000afc: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + 8000b00: 461d mov r5, r3 + 8000b02: 4b5d ldr r3, [pc, #372] ; (8000c78 ) + 8000b04: 681f ldr r7, [r3, #0] + 8000b06: 4604 mov r4, r0 + 8000b08: 460e mov r6, r1 + 8000b0a: 4690 mov r8, r2 + 8000b0c: b127 cbz r7, 8000b18 + 8000b0e: 69bb ldr r3, [r7, #24] + 8000b10: b913 cbnz r3, 8000b18 + 8000b12: 4638 mov r0, r7 + 8000b14: f000 f9e4 bl 8000ee0 <__sinit> + 8000b18: 4b58 ldr r3, [pc, #352] ; (8000c7c ) + 8000b1a: 429c cmp r4, r3 + 8000b1c: d167 bne.n 8000bee + 8000b1e: 687c ldr r4, [r7, #4] + 8000b20: f1b8 0f02 cmp.w r8, #2 + 8000b24: d006 beq.n 8000b34 + 8000b26: f1b8 0f01 cmp.w r8, #1 + 8000b2a: f200 809f bhi.w 8000c6c + 8000b2e: 2d00 cmp r5, #0 + 8000b30: f2c0 809c blt.w 8000c6c + 8000b34: 6e63 ldr r3, [r4, #100] ; 0x64 + 8000b36: 07db lsls r3, r3, #31 + 8000b38: d405 bmi.n 8000b46 + 8000b3a: 89a3 ldrh r3, [r4, #12] + 8000b3c: 0598 lsls r0, r3, #22 + 8000b3e: d402 bmi.n 8000b46 + 8000b40: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000b42: f000 fac8 bl 80010d6 <__retarget_lock_acquire_recursive> + 8000b46: 4621 mov r1, r4 + 8000b48: 4638 mov r0, r7 + 8000b4a: f000 f923 bl 8000d94 <_fflush_r> + 8000b4e: 6b61 ldr r1, [r4, #52] ; 0x34 + 8000b50: b141 cbz r1, 8000b64 + 8000b52: f104 0344 add.w r3, r4, #68 ; 0x44 + 8000b56: 4299 cmp r1, r3 + 8000b58: d002 beq.n 8000b60 + 8000b5a: 4638 mov r0, r7 + 8000b5c: f000 fb2a bl 80011b4 <_free_r> + 8000b60: 2300 movs r3, #0 + 8000b62: 6363 str r3, [r4, #52] ; 0x34 + 8000b64: 2300 movs r3, #0 + 8000b66: 61a3 str r3, [r4, #24] + 8000b68: 6063 str r3, [r4, #4] + 8000b6a: 89a3 ldrh r3, [r4, #12] + 8000b6c: 0619 lsls r1, r3, #24 + 8000b6e: d503 bpl.n 8000b78 + 8000b70: 6921 ldr r1, [r4, #16] + 8000b72: 4638 mov r0, r7 + 8000b74: f000 fb1e bl 80011b4 <_free_r> + 8000b78: 89a3 ldrh r3, [r4, #12] + 8000b7a: f423 634a bic.w r3, r3, #3232 ; 0xca0 + 8000b7e: f023 0303 bic.w r3, r3, #3 + 8000b82: f1b8 0f02 cmp.w r8, #2 + 8000b86: 81a3 strh r3, [r4, #12] + 8000b88: d06c beq.n 8000c64 + 8000b8a: ab01 add r3, sp, #4 + 8000b8c: 466a mov r2, sp + 8000b8e: 4621 mov r1, r4 + 8000b90: 4638 mov r0, r7 + 8000b92: f000 faa2 bl 80010da <__swhatbuf_r> + 8000b96: 89a3 ldrh r3, [r4, #12] + 8000b98: 4318 orrs r0, r3 + 8000b9a: 81a0 strh r0, [r4, #12] + 8000b9c: 2d00 cmp r5, #0 + 8000b9e: d130 bne.n 8000c02 + 8000ba0: 9d00 ldr r5, [sp, #0] + 8000ba2: 4628 mov r0, r5 + 8000ba4: f000 fafe bl 80011a4 + 8000ba8: 4606 mov r6, r0 + 8000baa: 2800 cmp r0, #0 + 8000bac: d155 bne.n 8000c5a + 8000bae: f8dd 9000 ldr.w r9, [sp] + 8000bb2: 45a9 cmp r9, r5 + 8000bb4: d14a bne.n 8000c4c + 8000bb6: f04f 35ff mov.w r5, #4294967295 + 8000bba: 2200 movs r2, #0 + 8000bbc: 60a2 str r2, [r4, #8] + 8000bbe: f104 0247 add.w r2, r4, #71 ; 0x47 + 8000bc2: 6022 str r2, [r4, #0] + 8000bc4: 6122 str r2, [r4, #16] + 8000bc6: 2201 movs r2, #1 + 8000bc8: f9b4 300c ldrsh.w r3, [r4, #12] + 8000bcc: 6162 str r2, [r4, #20] + 8000bce: 6e62 ldr r2, [r4, #100] ; 0x64 + 8000bd0: f043 0302 orr.w r3, r3, #2 + 8000bd4: 07d2 lsls r2, r2, #31 + 8000bd6: 81a3 strh r3, [r4, #12] + 8000bd8: d405 bmi.n 8000be6 + 8000bda: f413 7f00 tst.w r3, #512 ; 0x200 + 8000bde: d102 bne.n 8000be6 + 8000be0: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000be2: f000 fa79 bl 80010d8 <__retarget_lock_release_recursive> + 8000be6: 4628 mov r0, r5 + 8000be8: b003 add sp, #12 + 8000bea: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8000bee: 4b24 ldr r3, [pc, #144] ; (8000c80 ) + 8000bf0: 429c cmp r4, r3 + 8000bf2: d101 bne.n 8000bf8 + 8000bf4: 68bc ldr r4, [r7, #8] + 8000bf6: e793 b.n 8000b20 + 8000bf8: 4b22 ldr r3, [pc, #136] ; (8000c84 ) + 8000bfa: 429c cmp r4, r3 + 8000bfc: bf08 it eq + 8000bfe: 68fc ldreq r4, [r7, #12] + 8000c00: e78e b.n 8000b20 + 8000c02: 2e00 cmp r6, #0 + 8000c04: d0cd beq.n 8000ba2 + 8000c06: 69bb ldr r3, [r7, #24] + 8000c08: b913 cbnz r3, 8000c10 + 8000c0a: 4638 mov r0, r7 + 8000c0c: f000 f968 bl 8000ee0 <__sinit> + 8000c10: f1b8 0f01 cmp.w r8, #1 + 8000c14: bf08 it eq + 8000c16: 89a3 ldrheq r3, [r4, #12] + 8000c18: 6026 str r6, [r4, #0] + 8000c1a: bf04 itt eq + 8000c1c: f043 0301 orreq.w r3, r3, #1 + 8000c20: 81a3 strheq r3, [r4, #12] + 8000c22: 89a2 ldrh r2, [r4, #12] + 8000c24: f012 0308 ands.w r3, r2, #8 + 8000c28: e9c4 6504 strd r6, r5, [r4, #16] + 8000c2c: d01c beq.n 8000c68 + 8000c2e: 07d3 lsls r3, r2, #31 + 8000c30: bf41 itttt mi + 8000c32: 2300 movmi r3, #0 + 8000c34: 426d negmi r5, r5 + 8000c36: 60a3 strmi r3, [r4, #8] + 8000c38: 61a5 strmi r5, [r4, #24] + 8000c3a: bf58 it pl + 8000c3c: 60a5 strpl r5, [r4, #8] + 8000c3e: 6e65 ldr r5, [r4, #100] ; 0x64 + 8000c40: f015 0501 ands.w r5, r5, #1 + 8000c44: d115 bne.n 8000c72 + 8000c46: f412 7f00 tst.w r2, #512 ; 0x200 + 8000c4a: e7c8 b.n 8000bde + 8000c4c: 4648 mov r0, r9 + 8000c4e: f000 faa9 bl 80011a4 + 8000c52: 4606 mov r6, r0 + 8000c54: 2800 cmp r0, #0 + 8000c56: d0ae beq.n 8000bb6 + 8000c58: 464d mov r5, r9 + 8000c5a: 89a3 ldrh r3, [r4, #12] + 8000c5c: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8000c60: 81a3 strh r3, [r4, #12] + 8000c62: e7d0 b.n 8000c06 + 8000c64: 2500 movs r5, #0 + 8000c66: e7a8 b.n 8000bba + 8000c68: 60a3 str r3, [r4, #8] + 8000c6a: e7e8 b.n 8000c3e + 8000c6c: f04f 35ff mov.w r5, #4294967295 + 8000c70: e7b9 b.n 8000be6 + 8000c72: 2500 movs r5, #0 + 8000c74: e7b7 b.n 8000be6 + 8000c76: bf00 nop + 8000c78: 20000004 .word 0x20000004 + 8000c7c: 08001f44 .word 0x08001f44 + 8000c80: 08001f64 .word 0x08001f64 + 8000c84: 08001f24 .word 0x08001f24 + +08000c88 <__sflush_r>: + 8000c88: 898a ldrh r2, [r1, #12] + 8000c8a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000c8e: 4605 mov r5, r0 + 8000c90: 0710 lsls r0, r2, #28 + 8000c92: 460c mov r4, r1 + 8000c94: d458 bmi.n 8000d48 <__sflush_r+0xc0> + 8000c96: 684b ldr r3, [r1, #4] + 8000c98: 2b00 cmp r3, #0 + 8000c9a: dc05 bgt.n 8000ca8 <__sflush_r+0x20> + 8000c9c: 6c0b ldr r3, [r1, #64] ; 0x40 + 8000c9e: 2b00 cmp r3, #0 + 8000ca0: dc02 bgt.n 8000ca8 <__sflush_r+0x20> + 8000ca2: 2000 movs r0, #0 + 8000ca4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8000ca8: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8000caa: 2e00 cmp r6, #0 + 8000cac: d0f9 beq.n 8000ca2 <__sflush_r+0x1a> + 8000cae: 2300 movs r3, #0 + 8000cb0: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 8000cb4: 682f ldr r7, [r5, #0] + 8000cb6: 602b str r3, [r5, #0] + 8000cb8: d032 beq.n 8000d20 <__sflush_r+0x98> + 8000cba: 6d60 ldr r0, [r4, #84] ; 0x54 + 8000cbc: 89a3 ldrh r3, [r4, #12] + 8000cbe: 075a lsls r2, r3, #29 + 8000cc0: d505 bpl.n 8000cce <__sflush_r+0x46> + 8000cc2: 6863 ldr r3, [r4, #4] + 8000cc4: 1ac0 subs r0, r0, r3 + 8000cc6: 6b63 ldr r3, [r4, #52] ; 0x34 + 8000cc8: b10b cbz r3, 8000cce <__sflush_r+0x46> + 8000cca: 6c23 ldr r3, [r4, #64] ; 0x40 + 8000ccc: 1ac0 subs r0, r0, r3 + 8000cce: 2300 movs r3, #0 + 8000cd0: 4602 mov r2, r0 + 8000cd2: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8000cd4: 6a21 ldr r1, [r4, #32] + 8000cd6: 4628 mov r0, r5 + 8000cd8: 47b0 blx r6 + 8000cda: 1c43 adds r3, r0, #1 + 8000cdc: 89a3 ldrh r3, [r4, #12] + 8000cde: d106 bne.n 8000cee <__sflush_r+0x66> + 8000ce0: 6829 ldr r1, [r5, #0] + 8000ce2: 291d cmp r1, #29 + 8000ce4: d82c bhi.n 8000d40 <__sflush_r+0xb8> + 8000ce6: 4a2a ldr r2, [pc, #168] ; (8000d90 <__sflush_r+0x108>) + 8000ce8: 40ca lsrs r2, r1 + 8000cea: 07d6 lsls r6, r2, #31 + 8000cec: d528 bpl.n 8000d40 <__sflush_r+0xb8> + 8000cee: 2200 movs r2, #0 + 8000cf0: 6062 str r2, [r4, #4] + 8000cf2: 04d9 lsls r1, r3, #19 + 8000cf4: 6922 ldr r2, [r4, #16] + 8000cf6: 6022 str r2, [r4, #0] + 8000cf8: d504 bpl.n 8000d04 <__sflush_r+0x7c> + 8000cfa: 1c42 adds r2, r0, #1 + 8000cfc: d101 bne.n 8000d02 <__sflush_r+0x7a> + 8000cfe: 682b ldr r3, [r5, #0] + 8000d00: b903 cbnz r3, 8000d04 <__sflush_r+0x7c> + 8000d02: 6560 str r0, [r4, #84] ; 0x54 + 8000d04: 6b61 ldr r1, [r4, #52] ; 0x34 + 8000d06: 602f str r7, [r5, #0] + 8000d08: 2900 cmp r1, #0 + 8000d0a: d0ca beq.n 8000ca2 <__sflush_r+0x1a> + 8000d0c: f104 0344 add.w r3, r4, #68 ; 0x44 + 8000d10: 4299 cmp r1, r3 + 8000d12: d002 beq.n 8000d1a <__sflush_r+0x92> + 8000d14: 4628 mov r0, r5 + 8000d16: f000 fa4d bl 80011b4 <_free_r> + 8000d1a: 2000 movs r0, #0 + 8000d1c: 6360 str r0, [r4, #52] ; 0x34 + 8000d1e: e7c1 b.n 8000ca4 <__sflush_r+0x1c> + 8000d20: 6a21 ldr r1, [r4, #32] + 8000d22: 2301 movs r3, #1 + 8000d24: 4628 mov r0, r5 + 8000d26: 47b0 blx r6 + 8000d28: 1c41 adds r1, r0, #1 + 8000d2a: d1c7 bne.n 8000cbc <__sflush_r+0x34> + 8000d2c: 682b ldr r3, [r5, #0] + 8000d2e: 2b00 cmp r3, #0 + 8000d30: d0c4 beq.n 8000cbc <__sflush_r+0x34> + 8000d32: 2b1d cmp r3, #29 + 8000d34: d001 beq.n 8000d3a <__sflush_r+0xb2> + 8000d36: 2b16 cmp r3, #22 + 8000d38: d101 bne.n 8000d3e <__sflush_r+0xb6> + 8000d3a: 602f str r7, [r5, #0] + 8000d3c: e7b1 b.n 8000ca2 <__sflush_r+0x1a> + 8000d3e: 89a3 ldrh r3, [r4, #12] + 8000d40: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8000d44: 81a3 strh r3, [r4, #12] + 8000d46: e7ad b.n 8000ca4 <__sflush_r+0x1c> + 8000d48: 690f ldr r7, [r1, #16] + 8000d4a: 2f00 cmp r7, #0 + 8000d4c: d0a9 beq.n 8000ca2 <__sflush_r+0x1a> + 8000d4e: 0793 lsls r3, r2, #30 + 8000d50: 680e ldr r6, [r1, #0] + 8000d52: bf08 it eq + 8000d54: 694b ldreq r3, [r1, #20] + 8000d56: 600f str r7, [r1, #0] + 8000d58: bf18 it ne + 8000d5a: 2300 movne r3, #0 + 8000d5c: eba6 0807 sub.w r8, r6, r7 + 8000d60: 608b str r3, [r1, #8] + 8000d62: f1b8 0f00 cmp.w r8, #0 + 8000d66: dd9c ble.n 8000ca2 <__sflush_r+0x1a> + 8000d68: 6a21 ldr r1, [r4, #32] + 8000d6a: 6aa6 ldr r6, [r4, #40] ; 0x28 + 8000d6c: 4643 mov r3, r8 + 8000d6e: 463a mov r2, r7 + 8000d70: 4628 mov r0, r5 + 8000d72: 47b0 blx r6 + 8000d74: 2800 cmp r0, #0 + 8000d76: dc06 bgt.n 8000d86 <__sflush_r+0xfe> + 8000d78: 89a3 ldrh r3, [r4, #12] + 8000d7a: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8000d7e: 81a3 strh r3, [r4, #12] + 8000d80: f04f 30ff mov.w r0, #4294967295 + 8000d84: e78e b.n 8000ca4 <__sflush_r+0x1c> + 8000d86: 4407 add r7, r0 + 8000d88: eba8 0800 sub.w r8, r8, r0 + 8000d8c: e7e9 b.n 8000d62 <__sflush_r+0xda> + 8000d8e: bf00 nop + 8000d90: 20400001 .word 0x20400001 + +08000d94 <_fflush_r>: + 8000d94: b538 push {r3, r4, r5, lr} + 8000d96: 690b ldr r3, [r1, #16] + 8000d98: 4605 mov r5, r0 + 8000d9a: 460c mov r4, r1 + 8000d9c: b913 cbnz r3, 8000da4 <_fflush_r+0x10> + 8000d9e: 2500 movs r5, #0 + 8000da0: 4628 mov r0, r5 + 8000da2: bd38 pop {r3, r4, r5, pc} + 8000da4: b118 cbz r0, 8000dae <_fflush_r+0x1a> + 8000da6: 6983 ldr r3, [r0, #24] + 8000da8: b90b cbnz r3, 8000dae <_fflush_r+0x1a> + 8000daa: f000 f899 bl 8000ee0 <__sinit> + 8000dae: 4b14 ldr r3, [pc, #80] ; (8000e00 <_fflush_r+0x6c>) + 8000db0: 429c cmp r4, r3 + 8000db2: d11b bne.n 8000dec <_fflush_r+0x58> + 8000db4: 686c ldr r4, [r5, #4] + 8000db6: f9b4 300c ldrsh.w r3, [r4, #12] + 8000dba: 2b00 cmp r3, #0 + 8000dbc: d0ef beq.n 8000d9e <_fflush_r+0xa> + 8000dbe: 6e62 ldr r2, [r4, #100] ; 0x64 + 8000dc0: 07d0 lsls r0, r2, #31 + 8000dc2: d404 bmi.n 8000dce <_fflush_r+0x3a> + 8000dc4: 0599 lsls r1, r3, #22 + 8000dc6: d402 bmi.n 8000dce <_fflush_r+0x3a> + 8000dc8: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000dca: f000 f984 bl 80010d6 <__retarget_lock_acquire_recursive> + 8000dce: 4628 mov r0, r5 + 8000dd0: 4621 mov r1, r4 + 8000dd2: f7ff ff59 bl 8000c88 <__sflush_r> + 8000dd6: 6e63 ldr r3, [r4, #100] ; 0x64 + 8000dd8: 07da lsls r2, r3, #31 + 8000dda: 4605 mov r5, r0 + 8000ddc: d4e0 bmi.n 8000da0 <_fflush_r+0xc> + 8000dde: 89a3 ldrh r3, [r4, #12] + 8000de0: 059b lsls r3, r3, #22 + 8000de2: d4dd bmi.n 8000da0 <_fflush_r+0xc> + 8000de4: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000de6: f000 f977 bl 80010d8 <__retarget_lock_release_recursive> + 8000dea: e7d9 b.n 8000da0 <_fflush_r+0xc> + 8000dec: 4b05 ldr r3, [pc, #20] ; (8000e04 <_fflush_r+0x70>) + 8000dee: 429c cmp r4, r3 + 8000df0: d101 bne.n 8000df6 <_fflush_r+0x62> + 8000df2: 68ac ldr r4, [r5, #8] + 8000df4: e7df b.n 8000db6 <_fflush_r+0x22> + 8000df6: 4b04 ldr r3, [pc, #16] ; (8000e08 <_fflush_r+0x74>) + 8000df8: 429c cmp r4, r3 + 8000dfa: bf08 it eq + 8000dfc: 68ec ldreq r4, [r5, #12] + 8000dfe: e7da b.n 8000db6 <_fflush_r+0x22> + 8000e00: 08001f44 .word 0x08001f44 + 8000e04: 08001f64 .word 0x08001f64 + 8000e08: 08001f24 .word 0x08001f24 + +08000e0c : + 8000e0c: 4601 mov r1, r0 + 8000e0e: b920 cbnz r0, 8000e1a + 8000e10: 4b04 ldr r3, [pc, #16] ; (8000e24 ) + 8000e12: 4905 ldr r1, [pc, #20] ; (8000e28 ) + 8000e14: 6818 ldr r0, [r3, #0] + 8000e16: f000 b8fe b.w 8001016 <_fwalk_reent> + 8000e1a: 4b04 ldr r3, [pc, #16] ; (8000e2c ) + 8000e1c: 6818 ldr r0, [r3, #0] + 8000e1e: f7ff bfb9 b.w 8000d94 <_fflush_r> + 8000e22: bf00 nop + 8000e24: 08001f20 .word 0x08001f20 + 8000e28: 08000d95 .word 0x08000d95 + 8000e2c: 20000004 .word 0x20000004 + +08000e30 : + 8000e30: 2300 movs r3, #0 + 8000e32: b510 push {r4, lr} + 8000e34: 4604 mov r4, r0 + 8000e36: e9c0 3300 strd r3, r3, [r0] + 8000e3a: e9c0 3304 strd r3, r3, [r0, #16] + 8000e3e: 6083 str r3, [r0, #8] + 8000e40: 8181 strh r1, [r0, #12] + 8000e42: 6643 str r3, [r0, #100] ; 0x64 + 8000e44: 81c2 strh r2, [r0, #14] + 8000e46: 6183 str r3, [r0, #24] + 8000e48: 4619 mov r1, r3 + 8000e4a: 2208 movs r2, #8 + 8000e4c: 305c adds r0, #92 ; 0x5c + 8000e4e: f7ff fe35 bl 8000abc + 8000e52: 4b05 ldr r3, [pc, #20] ; (8000e68 ) + 8000e54: 6263 str r3, [r4, #36] ; 0x24 + 8000e56: 4b05 ldr r3, [pc, #20] ; (8000e6c ) + 8000e58: 62a3 str r3, [r4, #40] ; 0x28 + 8000e5a: 4b05 ldr r3, [pc, #20] ; (8000e70 ) + 8000e5c: 62e3 str r3, [r4, #44] ; 0x2c + 8000e5e: 4b05 ldr r3, [pc, #20] ; (8000e74 ) + 8000e60: 6224 str r4, [r4, #32] + 8000e62: 6323 str r3, [r4, #48] ; 0x30 + 8000e64: bd10 pop {r4, pc} + 8000e66: bf00 nop + 8000e68: 0800195d .word 0x0800195d + 8000e6c: 0800197f .word 0x0800197f + 8000e70: 080019b7 .word 0x080019b7 + 8000e74: 080019db .word 0x080019db + +08000e78 <_cleanup_r>: + 8000e78: 4901 ldr r1, [pc, #4] ; (8000e80 <_cleanup_r+0x8>) + 8000e7a: f000 b8cc b.w 8001016 <_fwalk_reent> + 8000e7e: bf00 nop + 8000e80: 08000d95 .word 0x08000d95 + +08000e84 <__sfmoreglue>: + 8000e84: b570 push {r4, r5, r6, lr} + 8000e86: 1e4a subs r2, r1, #1 + 8000e88: 2568 movs r5, #104 ; 0x68 + 8000e8a: 4355 muls r5, r2 + 8000e8c: 460e mov r6, r1 + 8000e8e: f105 0174 add.w r1, r5, #116 ; 0x74 + 8000e92: f000 f9df bl 8001254 <_malloc_r> + 8000e96: 4604 mov r4, r0 + 8000e98: b140 cbz r0, 8000eac <__sfmoreglue+0x28> + 8000e9a: 2100 movs r1, #0 + 8000e9c: e9c0 1600 strd r1, r6, [r0] + 8000ea0: 300c adds r0, #12 + 8000ea2: 60a0 str r0, [r4, #8] + 8000ea4: f105 0268 add.w r2, r5, #104 ; 0x68 + 8000ea8: f7ff fe08 bl 8000abc + 8000eac: 4620 mov r0, r4 + 8000eae: bd70 pop {r4, r5, r6, pc} + +08000eb0 <__sfp_lock_acquire>: + 8000eb0: 4801 ldr r0, [pc, #4] ; (8000eb8 <__sfp_lock_acquire+0x8>) + 8000eb2: f000 b910 b.w 80010d6 <__retarget_lock_acquire_recursive> + 8000eb6: bf00 nop + 8000eb8: 20000098 .word 0x20000098 + +08000ebc <__sfp_lock_release>: + 8000ebc: 4801 ldr r0, [pc, #4] ; (8000ec4 <__sfp_lock_release+0x8>) + 8000ebe: f000 b90b b.w 80010d8 <__retarget_lock_release_recursive> + 8000ec2: bf00 nop + 8000ec4: 20000098 .word 0x20000098 + +08000ec8 <__sinit_lock_acquire>: + 8000ec8: 4801 ldr r0, [pc, #4] ; (8000ed0 <__sinit_lock_acquire+0x8>) + 8000eca: f000 b904 b.w 80010d6 <__retarget_lock_acquire_recursive> + 8000ece: bf00 nop + 8000ed0: 20000093 .word 0x20000093 + +08000ed4 <__sinit_lock_release>: + 8000ed4: 4801 ldr r0, [pc, #4] ; (8000edc <__sinit_lock_release+0x8>) + 8000ed6: f000 b8ff b.w 80010d8 <__retarget_lock_release_recursive> + 8000eda: bf00 nop + 8000edc: 20000093 .word 0x20000093 + +08000ee0 <__sinit>: + 8000ee0: b510 push {r4, lr} + 8000ee2: 4604 mov r4, r0 + 8000ee4: f7ff fff0 bl 8000ec8 <__sinit_lock_acquire> + 8000ee8: 69a3 ldr r3, [r4, #24] + 8000eea: b11b cbz r3, 8000ef4 <__sinit+0x14> + 8000eec: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000ef0: f7ff bff0 b.w 8000ed4 <__sinit_lock_release> + 8000ef4: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 8000ef8: 6523 str r3, [r4, #80] ; 0x50 + 8000efa: 4b13 ldr r3, [pc, #76] ; (8000f48 <__sinit+0x68>) + 8000efc: 4a13 ldr r2, [pc, #76] ; (8000f4c <__sinit+0x6c>) + 8000efe: 681b ldr r3, [r3, #0] + 8000f00: 62a2 str r2, [r4, #40] ; 0x28 + 8000f02: 42a3 cmp r3, r4 + 8000f04: bf04 itt eq + 8000f06: 2301 moveq r3, #1 + 8000f08: 61a3 streq r3, [r4, #24] + 8000f0a: 4620 mov r0, r4 + 8000f0c: f000 f820 bl 8000f50 <__sfp> + 8000f10: 6060 str r0, [r4, #4] + 8000f12: 4620 mov r0, r4 + 8000f14: f000 f81c bl 8000f50 <__sfp> + 8000f18: 60a0 str r0, [r4, #8] + 8000f1a: 4620 mov r0, r4 + 8000f1c: f000 f818 bl 8000f50 <__sfp> + 8000f20: 2200 movs r2, #0 + 8000f22: 60e0 str r0, [r4, #12] + 8000f24: 2104 movs r1, #4 + 8000f26: 6860 ldr r0, [r4, #4] + 8000f28: f7ff ff82 bl 8000e30 + 8000f2c: 68a0 ldr r0, [r4, #8] + 8000f2e: 2201 movs r2, #1 + 8000f30: 2109 movs r1, #9 + 8000f32: f7ff ff7d bl 8000e30 + 8000f36: 68e0 ldr r0, [r4, #12] + 8000f38: 2202 movs r2, #2 + 8000f3a: 2112 movs r1, #18 + 8000f3c: f7ff ff78 bl 8000e30 + 8000f40: 2301 movs r3, #1 + 8000f42: 61a3 str r3, [r4, #24] + 8000f44: e7d2 b.n 8000eec <__sinit+0xc> + 8000f46: bf00 nop + 8000f48: 08001f20 .word 0x08001f20 + 8000f4c: 08000e79 .word 0x08000e79 + +08000f50 <__sfp>: + 8000f50: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000f52: 4607 mov r7, r0 + 8000f54: f7ff ffac bl 8000eb0 <__sfp_lock_acquire> + 8000f58: 4b1e ldr r3, [pc, #120] ; (8000fd4 <__sfp+0x84>) + 8000f5a: 681e ldr r6, [r3, #0] + 8000f5c: 69b3 ldr r3, [r6, #24] + 8000f5e: b913 cbnz r3, 8000f66 <__sfp+0x16> + 8000f60: 4630 mov r0, r6 + 8000f62: f7ff ffbd bl 8000ee0 <__sinit> + 8000f66: 3648 adds r6, #72 ; 0x48 + 8000f68: e9d6 3401 ldrd r3, r4, [r6, #4] + 8000f6c: 3b01 subs r3, #1 + 8000f6e: d503 bpl.n 8000f78 <__sfp+0x28> + 8000f70: 6833 ldr r3, [r6, #0] + 8000f72: b30b cbz r3, 8000fb8 <__sfp+0x68> + 8000f74: 6836 ldr r6, [r6, #0] + 8000f76: e7f7 b.n 8000f68 <__sfp+0x18> + 8000f78: f9b4 500c ldrsh.w r5, [r4, #12] + 8000f7c: b9d5 cbnz r5, 8000fb4 <__sfp+0x64> + 8000f7e: 4b16 ldr r3, [pc, #88] ; (8000fd8 <__sfp+0x88>) + 8000f80: 60e3 str r3, [r4, #12] + 8000f82: f104 0058 add.w r0, r4, #88 ; 0x58 + 8000f86: 6665 str r5, [r4, #100] ; 0x64 + 8000f88: f000 f8a4 bl 80010d4 <__retarget_lock_init_recursive> + 8000f8c: f7ff ff96 bl 8000ebc <__sfp_lock_release> + 8000f90: e9c4 5501 strd r5, r5, [r4, #4] + 8000f94: e9c4 5504 strd r5, r5, [r4, #16] + 8000f98: 6025 str r5, [r4, #0] + 8000f9a: 61a5 str r5, [r4, #24] + 8000f9c: 2208 movs r2, #8 + 8000f9e: 4629 mov r1, r5 + 8000fa0: f104 005c add.w r0, r4, #92 ; 0x5c + 8000fa4: f7ff fd8a bl 8000abc + 8000fa8: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 8000fac: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 8000fb0: 4620 mov r0, r4 + 8000fb2: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000fb4: 3468 adds r4, #104 ; 0x68 + 8000fb6: e7d9 b.n 8000f6c <__sfp+0x1c> + 8000fb8: 2104 movs r1, #4 + 8000fba: 4638 mov r0, r7 + 8000fbc: f7ff ff62 bl 8000e84 <__sfmoreglue> + 8000fc0: 4604 mov r4, r0 + 8000fc2: 6030 str r0, [r6, #0] + 8000fc4: 2800 cmp r0, #0 + 8000fc6: d1d5 bne.n 8000f74 <__sfp+0x24> + 8000fc8: f7ff ff78 bl 8000ebc <__sfp_lock_release> + 8000fcc: 230c movs r3, #12 + 8000fce: 603b str r3, [r7, #0] + 8000fd0: e7ee b.n 8000fb0 <__sfp+0x60> + 8000fd2: bf00 nop + 8000fd4: 08001f20 .word 0x08001f20 + 8000fd8: ffff0001 .word 0xffff0001 + +08000fdc <_fwalk>: + 8000fdc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000fe0: 460f mov r7, r1 + 8000fe2: f100 0448 add.w r4, r0, #72 ; 0x48 + 8000fe6: 2600 movs r6, #0 + 8000fe8: e9d4 8501 ldrd r8, r5, [r4, #4] + 8000fec: f1b8 0801 subs.w r8, r8, #1 + 8000ff0: d505 bpl.n 8000ffe <_fwalk+0x22> + 8000ff2: 6824 ldr r4, [r4, #0] + 8000ff4: 2c00 cmp r4, #0 + 8000ff6: d1f7 bne.n 8000fe8 <_fwalk+0xc> + 8000ff8: 4630 mov r0, r6 + 8000ffa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8000ffe: 89ab ldrh r3, [r5, #12] + 8001000: 2b01 cmp r3, #1 + 8001002: d906 bls.n 8001012 <_fwalk+0x36> + 8001004: f9b5 300e ldrsh.w r3, [r5, #14] + 8001008: 3301 adds r3, #1 + 800100a: d002 beq.n 8001012 <_fwalk+0x36> + 800100c: 4628 mov r0, r5 + 800100e: 47b8 blx r7 + 8001010: 4306 orrs r6, r0 + 8001012: 3568 adds r5, #104 ; 0x68 + 8001014: e7ea b.n 8000fec <_fwalk+0x10> + +08001016 <_fwalk_reent>: + 8001016: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 800101a: 4606 mov r6, r0 + 800101c: 4688 mov r8, r1 + 800101e: f100 0448 add.w r4, r0, #72 ; 0x48 + 8001022: 2700 movs r7, #0 + 8001024: e9d4 9501 ldrd r9, r5, [r4, #4] + 8001028: f1b9 0901 subs.w r9, r9, #1 + 800102c: d505 bpl.n 800103a <_fwalk_reent+0x24> + 800102e: 6824 ldr r4, [r4, #0] + 8001030: 2c00 cmp r4, #0 + 8001032: d1f7 bne.n 8001024 <_fwalk_reent+0xe> + 8001034: 4638 mov r0, r7 + 8001036: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 800103a: 89ab ldrh r3, [r5, #12] + 800103c: 2b01 cmp r3, #1 + 800103e: d907 bls.n 8001050 <_fwalk_reent+0x3a> + 8001040: f9b5 300e ldrsh.w r3, [r5, #14] + 8001044: 3301 adds r3, #1 + 8001046: d003 beq.n 8001050 <_fwalk_reent+0x3a> + 8001048: 4629 mov r1, r5 + 800104a: 4630 mov r0, r6 + 800104c: 47c0 blx r8 + 800104e: 4307 orrs r7, r0 + 8001050: 3568 adds r5, #104 ; 0x68 + 8001052: e7e9 b.n 8001028 <_fwalk_reent+0x12> + +08001054 <_getc_r>: + 8001054: b538 push {r3, r4, r5, lr} + 8001056: 460c mov r4, r1 + 8001058: 4605 mov r5, r0 + 800105a: b118 cbz r0, 8001064 <_getc_r+0x10> + 800105c: 6983 ldr r3, [r0, #24] + 800105e: b90b cbnz r3, 8001064 <_getc_r+0x10> + 8001060: f7ff ff3e bl 8000ee0 <__sinit> + 8001064: 4b18 ldr r3, [pc, #96] ; (80010c8 <_getc_r+0x74>) + 8001066: 429c cmp r4, r3 + 8001068: d11e bne.n 80010a8 <_getc_r+0x54> + 800106a: 686c ldr r4, [r5, #4] + 800106c: 6e63 ldr r3, [r4, #100] ; 0x64 + 800106e: 07d8 lsls r0, r3, #31 + 8001070: d405 bmi.n 800107e <_getc_r+0x2a> + 8001072: 89a3 ldrh r3, [r4, #12] + 8001074: 0599 lsls r1, r3, #22 + 8001076: d402 bmi.n 800107e <_getc_r+0x2a> + 8001078: 6da0 ldr r0, [r4, #88] ; 0x58 + 800107a: f000 f82c bl 80010d6 <__retarget_lock_acquire_recursive> + 800107e: 6863 ldr r3, [r4, #4] + 8001080: 3b01 subs r3, #1 + 8001082: 2b00 cmp r3, #0 + 8001084: 6063 str r3, [r4, #4] + 8001086: da19 bge.n 80010bc <_getc_r+0x68> + 8001088: 4628 mov r0, r5 + 800108a: 4621 mov r1, r4 + 800108c: f000 fc2a bl 80018e4 <__srget_r> + 8001090: 4605 mov r5, r0 + 8001092: 6e63 ldr r3, [r4, #100] ; 0x64 + 8001094: 07da lsls r2, r3, #31 + 8001096: d405 bmi.n 80010a4 <_getc_r+0x50> + 8001098: 89a3 ldrh r3, [r4, #12] + 800109a: 059b lsls r3, r3, #22 + 800109c: d402 bmi.n 80010a4 <_getc_r+0x50> + 800109e: 6da0 ldr r0, [r4, #88] ; 0x58 + 80010a0: f000 f81a bl 80010d8 <__retarget_lock_release_recursive> + 80010a4: 4628 mov r0, r5 + 80010a6: bd38 pop {r3, r4, r5, pc} + 80010a8: 4b08 ldr r3, [pc, #32] ; (80010cc <_getc_r+0x78>) + 80010aa: 429c cmp r4, r3 + 80010ac: d101 bne.n 80010b2 <_getc_r+0x5e> + 80010ae: 68ac ldr r4, [r5, #8] + 80010b0: e7dc b.n 800106c <_getc_r+0x18> + 80010b2: 4b07 ldr r3, [pc, #28] ; (80010d0 <_getc_r+0x7c>) + 80010b4: 429c cmp r4, r3 + 80010b6: bf08 it eq + 80010b8: 68ec ldreq r4, [r5, #12] + 80010ba: e7d7 b.n 800106c <_getc_r+0x18> + 80010bc: 6823 ldr r3, [r4, #0] + 80010be: 1c5a adds r2, r3, #1 + 80010c0: 6022 str r2, [r4, #0] + 80010c2: 781d ldrb r5, [r3, #0] + 80010c4: e7e5 b.n 8001092 <_getc_r+0x3e> + 80010c6: bf00 nop + 80010c8: 08001f44 .word 0x08001f44 + 80010cc: 08001f64 .word 0x08001f64 + 80010d0: 08001f24 .word 0x08001f24 + +080010d4 <__retarget_lock_init_recursive>: + 80010d4: 4770 bx lr + +080010d6 <__retarget_lock_acquire_recursive>: + 80010d6: 4770 bx lr + +080010d8 <__retarget_lock_release_recursive>: + 80010d8: 4770 bx lr + +080010da <__swhatbuf_r>: + 80010da: b570 push {r4, r5, r6, lr} + 80010dc: 460e mov r6, r1 + 80010de: f9b1 100e ldrsh.w r1, [r1, #14] + 80010e2: 2900 cmp r1, #0 + 80010e4: b096 sub sp, #88 ; 0x58 + 80010e6: 4614 mov r4, r2 + 80010e8: 461d mov r5, r3 + 80010ea: da07 bge.n 80010fc <__swhatbuf_r+0x22> + 80010ec: 2300 movs r3, #0 + 80010ee: 602b str r3, [r5, #0] + 80010f0: 89b3 ldrh r3, [r6, #12] + 80010f2: 061a lsls r2, r3, #24 + 80010f4: d410 bmi.n 8001118 <__swhatbuf_r+0x3e> + 80010f6: f44f 6380 mov.w r3, #1024 ; 0x400 + 80010fa: e00e b.n 800111a <__swhatbuf_r+0x40> + 80010fc: 466a mov r2, sp + 80010fe: f000 fd53 bl 8001ba8 <_fstat_r> + 8001102: 2800 cmp r0, #0 + 8001104: dbf2 blt.n 80010ec <__swhatbuf_r+0x12> + 8001106: 9a01 ldr r2, [sp, #4] + 8001108: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 800110c: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 8001110: 425a negs r2, r3 + 8001112: 415a adcs r2, r3 + 8001114: 602a str r2, [r5, #0] + 8001116: e7ee b.n 80010f6 <__swhatbuf_r+0x1c> + 8001118: 2340 movs r3, #64 ; 0x40 + 800111a: 2000 movs r0, #0 + 800111c: 6023 str r3, [r4, #0] + 800111e: b016 add sp, #88 ; 0x58 + 8001120: bd70 pop {r4, r5, r6, pc} + ... + +08001124 <__smakebuf_r>: + 8001124: 898b ldrh r3, [r1, #12] + 8001126: b573 push {r0, r1, r4, r5, r6, lr} + 8001128: 079d lsls r5, r3, #30 + 800112a: 4606 mov r6, r0 + 800112c: 460c mov r4, r1 + 800112e: d507 bpl.n 8001140 <__smakebuf_r+0x1c> + 8001130: f104 0347 add.w r3, r4, #71 ; 0x47 + 8001134: 6023 str r3, [r4, #0] + 8001136: 6123 str r3, [r4, #16] + 8001138: 2301 movs r3, #1 + 800113a: 6163 str r3, [r4, #20] + 800113c: b002 add sp, #8 + 800113e: bd70 pop {r4, r5, r6, pc} + 8001140: ab01 add r3, sp, #4 + 8001142: 466a mov r2, sp + 8001144: f7ff ffc9 bl 80010da <__swhatbuf_r> + 8001148: 9900 ldr r1, [sp, #0] + 800114a: 4605 mov r5, r0 + 800114c: 4630 mov r0, r6 + 800114e: f000 f881 bl 8001254 <_malloc_r> + 8001152: b948 cbnz r0, 8001168 <__smakebuf_r+0x44> + 8001154: f9b4 300c ldrsh.w r3, [r4, #12] + 8001158: 059a lsls r2, r3, #22 + 800115a: d4ef bmi.n 800113c <__smakebuf_r+0x18> + 800115c: f023 0303 bic.w r3, r3, #3 + 8001160: f043 0302 orr.w r3, r3, #2 + 8001164: 81a3 strh r3, [r4, #12] + 8001166: e7e3 b.n 8001130 <__smakebuf_r+0xc> + 8001168: 4b0d ldr r3, [pc, #52] ; (80011a0 <__smakebuf_r+0x7c>) + 800116a: 62b3 str r3, [r6, #40] ; 0x28 + 800116c: 89a3 ldrh r3, [r4, #12] + 800116e: 6020 str r0, [r4, #0] + 8001170: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8001174: 81a3 strh r3, [r4, #12] + 8001176: 9b00 ldr r3, [sp, #0] + 8001178: 6163 str r3, [r4, #20] + 800117a: 9b01 ldr r3, [sp, #4] + 800117c: 6120 str r0, [r4, #16] + 800117e: b15b cbz r3, 8001198 <__smakebuf_r+0x74> + 8001180: f9b4 100e ldrsh.w r1, [r4, #14] + 8001184: 4630 mov r0, r6 + 8001186: f000 fd21 bl 8001bcc <_isatty_r> + 800118a: b128 cbz r0, 8001198 <__smakebuf_r+0x74> + 800118c: 89a3 ldrh r3, [r4, #12] + 800118e: f023 0303 bic.w r3, r3, #3 + 8001192: f043 0301 orr.w r3, r3, #1 + 8001196: 81a3 strh r3, [r4, #12] + 8001198: 89a0 ldrh r0, [r4, #12] + 800119a: 4305 orrs r5, r0 + 800119c: 81a5 strh r5, [r4, #12] + 800119e: e7cd b.n 800113c <__smakebuf_r+0x18> + 80011a0: 08000e79 .word 0x08000e79 + +080011a4 : + 80011a4: 4b02 ldr r3, [pc, #8] ; (80011b0 ) + 80011a6: 4601 mov r1, r0 + 80011a8: 6818 ldr r0, [r3, #0] + 80011aa: f000 b853 b.w 8001254 <_malloc_r> + 80011ae: bf00 nop + 80011b0: 20000004 .word 0x20000004 + +080011b4 <_free_r>: + 80011b4: b537 push {r0, r1, r2, r4, r5, lr} + 80011b6: 2900 cmp r1, #0 + 80011b8: d048 beq.n 800124c <_free_r+0x98> + 80011ba: f851 3c04 ldr.w r3, [r1, #-4] + 80011be: 9001 str r0, [sp, #4] + 80011c0: 2b00 cmp r3, #0 + 80011c2: f1a1 0404 sub.w r4, r1, #4 + 80011c6: bfb8 it lt + 80011c8: 18e4 addlt r4, r4, r3 + 80011ca: f000 fd21 bl 8001c10 <__malloc_lock> + 80011ce: 4a20 ldr r2, [pc, #128] ; (8001250 <_free_r+0x9c>) + 80011d0: 9801 ldr r0, [sp, #4] + 80011d2: 6813 ldr r3, [r2, #0] + 80011d4: 4615 mov r5, r2 + 80011d6: b933 cbnz r3, 80011e6 <_free_r+0x32> + 80011d8: 6063 str r3, [r4, #4] + 80011da: 6014 str r4, [r2, #0] + 80011dc: b003 add sp, #12 + 80011de: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 80011e2: f000 bd1b b.w 8001c1c <__malloc_unlock> + 80011e6: 42a3 cmp r3, r4 + 80011e8: d90b bls.n 8001202 <_free_r+0x4e> + 80011ea: 6821 ldr r1, [r4, #0] + 80011ec: 1862 adds r2, r4, r1 + 80011ee: 4293 cmp r3, r2 + 80011f0: bf04 itt eq + 80011f2: 681a ldreq r2, [r3, #0] + 80011f4: 685b ldreq r3, [r3, #4] + 80011f6: 6063 str r3, [r4, #4] + 80011f8: bf04 itt eq + 80011fa: 1852 addeq r2, r2, r1 + 80011fc: 6022 streq r2, [r4, #0] + 80011fe: 602c str r4, [r5, #0] + 8001200: e7ec b.n 80011dc <_free_r+0x28> + 8001202: 461a mov r2, r3 + 8001204: 685b ldr r3, [r3, #4] + 8001206: b10b cbz r3, 800120c <_free_r+0x58> + 8001208: 42a3 cmp r3, r4 + 800120a: d9fa bls.n 8001202 <_free_r+0x4e> + 800120c: 6811 ldr r1, [r2, #0] + 800120e: 1855 adds r5, r2, r1 + 8001210: 42a5 cmp r5, r4 + 8001212: d10b bne.n 800122c <_free_r+0x78> + 8001214: 6824 ldr r4, [r4, #0] + 8001216: 4421 add r1, r4 + 8001218: 1854 adds r4, r2, r1 + 800121a: 42a3 cmp r3, r4 + 800121c: 6011 str r1, [r2, #0] + 800121e: d1dd bne.n 80011dc <_free_r+0x28> + 8001220: 681c ldr r4, [r3, #0] + 8001222: 685b ldr r3, [r3, #4] + 8001224: 6053 str r3, [r2, #4] + 8001226: 4421 add r1, r4 + 8001228: 6011 str r1, [r2, #0] + 800122a: e7d7 b.n 80011dc <_free_r+0x28> + 800122c: d902 bls.n 8001234 <_free_r+0x80> + 800122e: 230c movs r3, #12 + 8001230: 6003 str r3, [r0, #0] + 8001232: e7d3 b.n 80011dc <_free_r+0x28> + 8001234: 6825 ldr r5, [r4, #0] + 8001236: 1961 adds r1, r4, r5 + 8001238: 428b cmp r3, r1 + 800123a: bf04 itt eq + 800123c: 6819 ldreq r1, [r3, #0] + 800123e: 685b ldreq r3, [r3, #4] + 8001240: 6063 str r3, [r4, #4] + 8001242: bf04 itt eq + 8001244: 1949 addeq r1, r1, r5 + 8001246: 6021 streq r1, [r4, #0] + 8001248: 6054 str r4, [r2, #4] + 800124a: e7c7 b.n 80011dc <_free_r+0x28> + 800124c: b003 add sp, #12 + 800124e: bd30 pop {r4, r5, pc} + 8001250: 20000088 .word 0x20000088 + +08001254 <_malloc_r>: + 8001254: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001256: 1ccd adds r5, r1, #3 + 8001258: f025 0503 bic.w r5, r5, #3 + 800125c: 3508 adds r5, #8 + 800125e: 2d0c cmp r5, #12 + 8001260: bf38 it cc + 8001262: 250c movcc r5, #12 + 8001264: 2d00 cmp r5, #0 + 8001266: 4606 mov r6, r0 + 8001268: db01 blt.n 800126e <_malloc_r+0x1a> + 800126a: 42a9 cmp r1, r5 + 800126c: d903 bls.n 8001276 <_malloc_r+0x22> + 800126e: 230c movs r3, #12 + 8001270: 6033 str r3, [r6, #0] + 8001272: 2000 movs r0, #0 + 8001274: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8001276: f000 fccb bl 8001c10 <__malloc_lock> + 800127a: 4921 ldr r1, [pc, #132] ; (8001300 <_malloc_r+0xac>) + 800127c: 680a ldr r2, [r1, #0] + 800127e: 4614 mov r4, r2 + 8001280: b99c cbnz r4, 80012aa <_malloc_r+0x56> + 8001282: 4f20 ldr r7, [pc, #128] ; (8001304 <_malloc_r+0xb0>) + 8001284: 683b ldr r3, [r7, #0] + 8001286: b923 cbnz r3, 8001292 <_malloc_r+0x3e> + 8001288: 4621 mov r1, r4 + 800128a: 4630 mov r0, r6 + 800128c: f000 fb56 bl 800193c <_sbrk_r> + 8001290: 6038 str r0, [r7, #0] + 8001292: 4629 mov r1, r5 + 8001294: 4630 mov r0, r6 + 8001296: f000 fb51 bl 800193c <_sbrk_r> + 800129a: 1c43 adds r3, r0, #1 + 800129c: d123 bne.n 80012e6 <_malloc_r+0x92> + 800129e: 230c movs r3, #12 + 80012a0: 6033 str r3, [r6, #0] + 80012a2: 4630 mov r0, r6 + 80012a4: f000 fcba bl 8001c1c <__malloc_unlock> + 80012a8: e7e3 b.n 8001272 <_malloc_r+0x1e> + 80012aa: 6823 ldr r3, [r4, #0] + 80012ac: 1b5b subs r3, r3, r5 + 80012ae: d417 bmi.n 80012e0 <_malloc_r+0x8c> + 80012b0: 2b0b cmp r3, #11 + 80012b2: d903 bls.n 80012bc <_malloc_r+0x68> + 80012b4: 6023 str r3, [r4, #0] + 80012b6: 441c add r4, r3 + 80012b8: 6025 str r5, [r4, #0] + 80012ba: e004 b.n 80012c6 <_malloc_r+0x72> + 80012bc: 6863 ldr r3, [r4, #4] + 80012be: 42a2 cmp r2, r4 + 80012c0: bf0c ite eq + 80012c2: 600b streq r3, [r1, #0] + 80012c4: 6053 strne r3, [r2, #4] + 80012c6: 4630 mov r0, r6 + 80012c8: f000 fca8 bl 8001c1c <__malloc_unlock> + 80012cc: f104 000b add.w r0, r4, #11 + 80012d0: 1d23 adds r3, r4, #4 + 80012d2: f020 0007 bic.w r0, r0, #7 + 80012d6: 1ac2 subs r2, r0, r3 + 80012d8: d0cc beq.n 8001274 <_malloc_r+0x20> + 80012da: 1a1b subs r3, r3, r0 + 80012dc: 50a3 str r3, [r4, r2] + 80012de: e7c9 b.n 8001274 <_malloc_r+0x20> + 80012e0: 4622 mov r2, r4 + 80012e2: 6864 ldr r4, [r4, #4] + 80012e4: e7cc b.n 8001280 <_malloc_r+0x2c> + 80012e6: 1cc4 adds r4, r0, #3 + 80012e8: f024 0403 bic.w r4, r4, #3 + 80012ec: 42a0 cmp r0, r4 + 80012ee: d0e3 beq.n 80012b8 <_malloc_r+0x64> + 80012f0: 1a21 subs r1, r4, r0 + 80012f2: 4630 mov r0, r6 + 80012f4: f000 fb22 bl 800193c <_sbrk_r> + 80012f8: 3001 adds r0, #1 + 80012fa: d1dd bne.n 80012b8 <_malloc_r+0x64> + 80012fc: e7cf b.n 800129e <_malloc_r+0x4a> + 80012fe: bf00 nop + 8001300: 20000088 .word 0x20000088 + 8001304: 2000008c .word 0x2000008c + +08001308 <__sfputc_r>: + 8001308: 6893 ldr r3, [r2, #8] + 800130a: 3b01 subs r3, #1 + 800130c: 2b00 cmp r3, #0 + 800130e: b410 push {r4} + 8001310: 6093 str r3, [r2, #8] + 8001312: da08 bge.n 8001326 <__sfputc_r+0x1e> + 8001314: 6994 ldr r4, [r2, #24] + 8001316: 42a3 cmp r3, r4 + 8001318: db01 blt.n 800131e <__sfputc_r+0x16> + 800131a: 290a cmp r1, #10 + 800131c: d103 bne.n 8001326 <__sfputc_r+0x1e> + 800131e: f85d 4b04 ldr.w r4, [sp], #4 + 8001322: f000 bb5f b.w 80019e4 <__swbuf_r> + 8001326: 6813 ldr r3, [r2, #0] + 8001328: 1c58 adds r0, r3, #1 + 800132a: 6010 str r0, [r2, #0] + 800132c: 7019 strb r1, [r3, #0] + 800132e: 4608 mov r0, r1 + 8001330: f85d 4b04 ldr.w r4, [sp], #4 + 8001334: 4770 bx lr + +08001336 <__sfputs_r>: + 8001336: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001338: 4606 mov r6, r0 + 800133a: 460f mov r7, r1 + 800133c: 4614 mov r4, r2 + 800133e: 18d5 adds r5, r2, r3 + 8001340: 42ac cmp r4, r5 + 8001342: d101 bne.n 8001348 <__sfputs_r+0x12> + 8001344: 2000 movs r0, #0 + 8001346: e007 b.n 8001358 <__sfputs_r+0x22> + 8001348: f814 1b01 ldrb.w r1, [r4], #1 + 800134c: 463a mov r2, r7 + 800134e: 4630 mov r0, r6 + 8001350: f7ff ffda bl 8001308 <__sfputc_r> + 8001354: 1c43 adds r3, r0, #1 + 8001356: d1f3 bne.n 8001340 <__sfputs_r+0xa> + 8001358: bdf8 pop {r3, r4, r5, r6, r7, pc} + ... + +0800135c <_vfiprintf_r>: + 800135c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8001360: 460d mov r5, r1 + 8001362: b09d sub sp, #116 ; 0x74 + 8001364: 4614 mov r4, r2 + 8001366: 4698 mov r8, r3 + 8001368: 4606 mov r6, r0 + 800136a: b118 cbz r0, 8001374 <_vfiprintf_r+0x18> + 800136c: 6983 ldr r3, [r0, #24] + 800136e: b90b cbnz r3, 8001374 <_vfiprintf_r+0x18> + 8001370: f7ff fdb6 bl 8000ee0 <__sinit> + 8001374: 4b89 ldr r3, [pc, #548] ; (800159c <_vfiprintf_r+0x240>) + 8001376: 429d cmp r5, r3 + 8001378: d11b bne.n 80013b2 <_vfiprintf_r+0x56> + 800137a: 6875 ldr r5, [r6, #4] + 800137c: 6e6b ldr r3, [r5, #100] ; 0x64 + 800137e: 07d9 lsls r1, r3, #31 + 8001380: d405 bmi.n 800138e <_vfiprintf_r+0x32> + 8001382: 89ab ldrh r3, [r5, #12] + 8001384: 059a lsls r2, r3, #22 + 8001386: d402 bmi.n 800138e <_vfiprintf_r+0x32> + 8001388: 6da8 ldr r0, [r5, #88] ; 0x58 + 800138a: f7ff fea4 bl 80010d6 <__retarget_lock_acquire_recursive> + 800138e: 89ab ldrh r3, [r5, #12] + 8001390: 071b lsls r3, r3, #28 + 8001392: d501 bpl.n 8001398 <_vfiprintf_r+0x3c> + 8001394: 692b ldr r3, [r5, #16] + 8001396: b9eb cbnz r3, 80013d4 <_vfiprintf_r+0x78> + 8001398: 4629 mov r1, r5 + 800139a: 4630 mov r0, r6 + 800139c: f000 fb86 bl 8001aac <__swsetup_r> + 80013a0: b1c0 cbz r0, 80013d4 <_vfiprintf_r+0x78> + 80013a2: 6e6b ldr r3, [r5, #100] ; 0x64 + 80013a4: 07dc lsls r4, r3, #31 + 80013a6: d50e bpl.n 80013c6 <_vfiprintf_r+0x6a> + 80013a8: f04f 30ff mov.w r0, #4294967295 + 80013ac: b01d add sp, #116 ; 0x74 + 80013ae: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80013b2: 4b7b ldr r3, [pc, #492] ; (80015a0 <_vfiprintf_r+0x244>) + 80013b4: 429d cmp r5, r3 + 80013b6: d101 bne.n 80013bc <_vfiprintf_r+0x60> + 80013b8: 68b5 ldr r5, [r6, #8] + 80013ba: e7df b.n 800137c <_vfiprintf_r+0x20> + 80013bc: 4b79 ldr r3, [pc, #484] ; (80015a4 <_vfiprintf_r+0x248>) + 80013be: 429d cmp r5, r3 + 80013c0: bf08 it eq + 80013c2: 68f5 ldreq r5, [r6, #12] + 80013c4: e7da b.n 800137c <_vfiprintf_r+0x20> + 80013c6: 89ab ldrh r3, [r5, #12] + 80013c8: 0598 lsls r0, r3, #22 + 80013ca: d4ed bmi.n 80013a8 <_vfiprintf_r+0x4c> + 80013cc: 6da8 ldr r0, [r5, #88] ; 0x58 + 80013ce: f7ff fe83 bl 80010d8 <__retarget_lock_release_recursive> + 80013d2: e7e9 b.n 80013a8 <_vfiprintf_r+0x4c> + 80013d4: 2300 movs r3, #0 + 80013d6: 9309 str r3, [sp, #36] ; 0x24 + 80013d8: 2320 movs r3, #32 + 80013da: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 80013de: f8cd 800c str.w r8, [sp, #12] + 80013e2: 2330 movs r3, #48 ; 0x30 + 80013e4: f8df 81c0 ldr.w r8, [pc, #448] ; 80015a8 <_vfiprintf_r+0x24c> + 80013e8: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 80013ec: f04f 0901 mov.w r9, #1 + 80013f0: 4623 mov r3, r4 + 80013f2: 469a mov sl, r3 + 80013f4: f813 2b01 ldrb.w r2, [r3], #1 + 80013f8: b10a cbz r2, 80013fe <_vfiprintf_r+0xa2> + 80013fa: 2a25 cmp r2, #37 ; 0x25 + 80013fc: d1f9 bne.n 80013f2 <_vfiprintf_r+0x96> + 80013fe: ebba 0b04 subs.w fp, sl, r4 + 8001402: d00b beq.n 800141c <_vfiprintf_r+0xc0> + 8001404: 465b mov r3, fp + 8001406: 4622 mov r2, r4 + 8001408: 4629 mov r1, r5 + 800140a: 4630 mov r0, r6 + 800140c: f7ff ff93 bl 8001336 <__sfputs_r> + 8001410: 3001 adds r0, #1 + 8001412: f000 80aa beq.w 800156a <_vfiprintf_r+0x20e> + 8001416: 9a09 ldr r2, [sp, #36] ; 0x24 + 8001418: 445a add r2, fp + 800141a: 9209 str r2, [sp, #36] ; 0x24 + 800141c: f89a 3000 ldrb.w r3, [sl] + 8001420: 2b00 cmp r3, #0 + 8001422: f000 80a2 beq.w 800156a <_vfiprintf_r+0x20e> + 8001426: 2300 movs r3, #0 + 8001428: f04f 32ff mov.w r2, #4294967295 + 800142c: e9cd 2305 strd r2, r3, [sp, #20] + 8001430: f10a 0a01 add.w sl, sl, #1 + 8001434: 9304 str r3, [sp, #16] + 8001436: 9307 str r3, [sp, #28] + 8001438: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 800143c: 931a str r3, [sp, #104] ; 0x68 + 800143e: 4654 mov r4, sl + 8001440: 2205 movs r2, #5 + 8001442: f814 1b01 ldrb.w r1, [r4], #1 + 8001446: 4858 ldr r0, [pc, #352] ; (80015a8 <_vfiprintf_r+0x24c>) + 8001448: f7fe fee2 bl 8000210 + 800144c: 9a04 ldr r2, [sp, #16] + 800144e: b9d8 cbnz r0, 8001488 <_vfiprintf_r+0x12c> + 8001450: 06d1 lsls r1, r2, #27 + 8001452: bf44 itt mi + 8001454: 2320 movmi r3, #32 + 8001456: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 800145a: 0713 lsls r3, r2, #28 + 800145c: bf44 itt mi + 800145e: 232b movmi r3, #43 ; 0x2b + 8001460: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8001464: f89a 3000 ldrb.w r3, [sl] + 8001468: 2b2a cmp r3, #42 ; 0x2a + 800146a: d015 beq.n 8001498 <_vfiprintf_r+0x13c> + 800146c: 9a07 ldr r2, [sp, #28] + 800146e: 4654 mov r4, sl + 8001470: 2000 movs r0, #0 + 8001472: f04f 0c0a mov.w ip, #10 + 8001476: 4621 mov r1, r4 + 8001478: f811 3b01 ldrb.w r3, [r1], #1 + 800147c: 3b30 subs r3, #48 ; 0x30 + 800147e: 2b09 cmp r3, #9 + 8001480: d94e bls.n 8001520 <_vfiprintf_r+0x1c4> + 8001482: b1b0 cbz r0, 80014b2 <_vfiprintf_r+0x156> + 8001484: 9207 str r2, [sp, #28] + 8001486: e014 b.n 80014b2 <_vfiprintf_r+0x156> + 8001488: eba0 0308 sub.w r3, r0, r8 + 800148c: fa09 f303 lsl.w r3, r9, r3 + 8001490: 4313 orrs r3, r2 + 8001492: 9304 str r3, [sp, #16] + 8001494: 46a2 mov sl, r4 + 8001496: e7d2 b.n 800143e <_vfiprintf_r+0xe2> + 8001498: 9b03 ldr r3, [sp, #12] + 800149a: 1d19 adds r1, r3, #4 + 800149c: 681b ldr r3, [r3, #0] + 800149e: 9103 str r1, [sp, #12] + 80014a0: 2b00 cmp r3, #0 + 80014a2: bfbb ittet lt + 80014a4: 425b neglt r3, r3 + 80014a6: f042 0202 orrlt.w r2, r2, #2 + 80014aa: 9307 strge r3, [sp, #28] + 80014ac: 9307 strlt r3, [sp, #28] + 80014ae: bfb8 it lt + 80014b0: 9204 strlt r2, [sp, #16] + 80014b2: 7823 ldrb r3, [r4, #0] + 80014b4: 2b2e cmp r3, #46 ; 0x2e + 80014b6: d10c bne.n 80014d2 <_vfiprintf_r+0x176> + 80014b8: 7863 ldrb r3, [r4, #1] + 80014ba: 2b2a cmp r3, #42 ; 0x2a + 80014bc: d135 bne.n 800152a <_vfiprintf_r+0x1ce> + 80014be: 9b03 ldr r3, [sp, #12] + 80014c0: 1d1a adds r2, r3, #4 + 80014c2: 681b ldr r3, [r3, #0] + 80014c4: 9203 str r2, [sp, #12] + 80014c6: 2b00 cmp r3, #0 + 80014c8: bfb8 it lt + 80014ca: f04f 33ff movlt.w r3, #4294967295 + 80014ce: 3402 adds r4, #2 + 80014d0: 9305 str r3, [sp, #20] + 80014d2: f8df a0e4 ldr.w sl, [pc, #228] ; 80015b8 <_vfiprintf_r+0x25c> + 80014d6: 7821 ldrb r1, [r4, #0] + 80014d8: 2203 movs r2, #3 + 80014da: 4650 mov r0, sl + 80014dc: f7fe fe98 bl 8000210 + 80014e0: b140 cbz r0, 80014f4 <_vfiprintf_r+0x198> + 80014e2: 2340 movs r3, #64 ; 0x40 + 80014e4: eba0 000a sub.w r0, r0, sl + 80014e8: fa03 f000 lsl.w r0, r3, r0 + 80014ec: 9b04 ldr r3, [sp, #16] + 80014ee: 4303 orrs r3, r0 + 80014f0: 3401 adds r4, #1 + 80014f2: 9304 str r3, [sp, #16] + 80014f4: f814 1b01 ldrb.w r1, [r4], #1 + 80014f8: 482c ldr r0, [pc, #176] ; (80015ac <_vfiprintf_r+0x250>) + 80014fa: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 80014fe: 2206 movs r2, #6 + 8001500: f7fe fe86 bl 8000210 + 8001504: 2800 cmp r0, #0 + 8001506: d03f beq.n 8001588 <_vfiprintf_r+0x22c> + 8001508: 4b29 ldr r3, [pc, #164] ; (80015b0 <_vfiprintf_r+0x254>) + 800150a: bb1b cbnz r3, 8001554 <_vfiprintf_r+0x1f8> + 800150c: 9b03 ldr r3, [sp, #12] + 800150e: 3307 adds r3, #7 + 8001510: f023 0307 bic.w r3, r3, #7 + 8001514: 3308 adds r3, #8 + 8001516: 9303 str r3, [sp, #12] + 8001518: 9b09 ldr r3, [sp, #36] ; 0x24 + 800151a: 443b add r3, r7 + 800151c: 9309 str r3, [sp, #36] ; 0x24 + 800151e: e767 b.n 80013f0 <_vfiprintf_r+0x94> + 8001520: fb0c 3202 mla r2, ip, r2, r3 + 8001524: 460c mov r4, r1 + 8001526: 2001 movs r0, #1 + 8001528: e7a5 b.n 8001476 <_vfiprintf_r+0x11a> + 800152a: 2300 movs r3, #0 + 800152c: 3401 adds r4, #1 + 800152e: 9305 str r3, [sp, #20] + 8001530: 4619 mov r1, r3 + 8001532: f04f 0c0a mov.w ip, #10 + 8001536: 4620 mov r0, r4 + 8001538: f810 2b01 ldrb.w r2, [r0], #1 + 800153c: 3a30 subs r2, #48 ; 0x30 + 800153e: 2a09 cmp r2, #9 + 8001540: d903 bls.n 800154a <_vfiprintf_r+0x1ee> + 8001542: 2b00 cmp r3, #0 + 8001544: d0c5 beq.n 80014d2 <_vfiprintf_r+0x176> + 8001546: 9105 str r1, [sp, #20] + 8001548: e7c3 b.n 80014d2 <_vfiprintf_r+0x176> + 800154a: fb0c 2101 mla r1, ip, r1, r2 + 800154e: 4604 mov r4, r0 + 8001550: 2301 movs r3, #1 + 8001552: e7f0 b.n 8001536 <_vfiprintf_r+0x1da> + 8001554: ab03 add r3, sp, #12 + 8001556: 9300 str r3, [sp, #0] + 8001558: 462a mov r2, r5 + 800155a: 4b16 ldr r3, [pc, #88] ; (80015b4 <_vfiprintf_r+0x258>) + 800155c: a904 add r1, sp, #16 + 800155e: 4630 mov r0, r6 + 8001560: f3af 8000 nop.w + 8001564: 4607 mov r7, r0 + 8001566: 1c78 adds r0, r7, #1 + 8001568: d1d6 bne.n 8001518 <_vfiprintf_r+0x1bc> + 800156a: 6e6b ldr r3, [r5, #100] ; 0x64 + 800156c: 07d9 lsls r1, r3, #31 + 800156e: d405 bmi.n 800157c <_vfiprintf_r+0x220> + 8001570: 89ab ldrh r3, [r5, #12] + 8001572: 059a lsls r2, r3, #22 + 8001574: d402 bmi.n 800157c <_vfiprintf_r+0x220> + 8001576: 6da8 ldr r0, [r5, #88] ; 0x58 + 8001578: f7ff fdae bl 80010d8 <__retarget_lock_release_recursive> + 800157c: 89ab ldrh r3, [r5, #12] + 800157e: 065b lsls r3, r3, #25 + 8001580: f53f af12 bmi.w 80013a8 <_vfiprintf_r+0x4c> + 8001584: 9809 ldr r0, [sp, #36] ; 0x24 + 8001586: e711 b.n 80013ac <_vfiprintf_r+0x50> + 8001588: ab03 add r3, sp, #12 + 800158a: 9300 str r3, [sp, #0] + 800158c: 462a mov r2, r5 + 800158e: 4b09 ldr r3, [pc, #36] ; (80015b4 <_vfiprintf_r+0x258>) + 8001590: a904 add r1, sp, #16 + 8001592: 4630 mov r0, r6 + 8001594: f000 f880 bl 8001698 <_printf_i> + 8001598: e7e4 b.n 8001564 <_vfiprintf_r+0x208> + 800159a: bf00 nop + 800159c: 08001f44 .word 0x08001f44 + 80015a0: 08001f64 .word 0x08001f64 + 80015a4: 08001f24 .word 0x08001f24 + 80015a8: 08001f84 .word 0x08001f84 + 80015ac: 08001f8e .word 0x08001f8e + 80015b0: 00000000 .word 0x00000000 + 80015b4: 08001337 .word 0x08001337 + 80015b8: 08001f8a .word 0x08001f8a + +080015bc <_printf_common>: + 80015bc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 80015c0: 4616 mov r6, r2 + 80015c2: 4699 mov r9, r3 + 80015c4: 688a ldr r2, [r1, #8] + 80015c6: 690b ldr r3, [r1, #16] + 80015c8: f8dd 8020 ldr.w r8, [sp, #32] + 80015cc: 4293 cmp r3, r2 + 80015ce: bfb8 it lt + 80015d0: 4613 movlt r3, r2 + 80015d2: 6033 str r3, [r6, #0] + 80015d4: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 80015d8: 4607 mov r7, r0 + 80015da: 460c mov r4, r1 + 80015dc: b10a cbz r2, 80015e2 <_printf_common+0x26> + 80015de: 3301 adds r3, #1 + 80015e0: 6033 str r3, [r6, #0] + 80015e2: 6823 ldr r3, [r4, #0] + 80015e4: 0699 lsls r1, r3, #26 + 80015e6: bf42 ittt mi + 80015e8: 6833 ldrmi r3, [r6, #0] + 80015ea: 3302 addmi r3, #2 + 80015ec: 6033 strmi r3, [r6, #0] + 80015ee: 6825 ldr r5, [r4, #0] + 80015f0: f015 0506 ands.w r5, r5, #6 + 80015f4: d106 bne.n 8001604 <_printf_common+0x48> + 80015f6: f104 0a19 add.w sl, r4, #25 + 80015fa: 68e3 ldr r3, [r4, #12] + 80015fc: 6832 ldr r2, [r6, #0] + 80015fe: 1a9b subs r3, r3, r2 + 8001600: 42ab cmp r3, r5 + 8001602: dc26 bgt.n 8001652 <_printf_common+0x96> + 8001604: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 8001608: 1e13 subs r3, r2, #0 + 800160a: 6822 ldr r2, [r4, #0] + 800160c: bf18 it ne + 800160e: 2301 movne r3, #1 + 8001610: 0692 lsls r2, r2, #26 + 8001612: d42b bmi.n 800166c <_printf_common+0xb0> + 8001614: f104 0243 add.w r2, r4, #67 ; 0x43 + 8001618: 4649 mov r1, r9 + 800161a: 4638 mov r0, r7 + 800161c: 47c0 blx r8 + 800161e: 3001 adds r0, #1 + 8001620: d01e beq.n 8001660 <_printf_common+0xa4> + 8001622: 6823 ldr r3, [r4, #0] + 8001624: 68e5 ldr r5, [r4, #12] + 8001626: 6832 ldr r2, [r6, #0] + 8001628: f003 0306 and.w r3, r3, #6 + 800162c: 2b04 cmp r3, #4 + 800162e: bf08 it eq + 8001630: 1aad subeq r5, r5, r2 + 8001632: 68a3 ldr r3, [r4, #8] + 8001634: 6922 ldr r2, [r4, #16] + 8001636: bf0c ite eq + 8001638: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 800163c: 2500 movne r5, #0 + 800163e: 4293 cmp r3, r2 + 8001640: bfc4 itt gt + 8001642: 1a9b subgt r3, r3, r2 + 8001644: 18ed addgt r5, r5, r3 + 8001646: 2600 movs r6, #0 + 8001648: 341a adds r4, #26 + 800164a: 42b5 cmp r5, r6 + 800164c: d11a bne.n 8001684 <_printf_common+0xc8> + 800164e: 2000 movs r0, #0 + 8001650: e008 b.n 8001664 <_printf_common+0xa8> + 8001652: 2301 movs r3, #1 + 8001654: 4652 mov r2, sl + 8001656: 4649 mov r1, r9 + 8001658: 4638 mov r0, r7 + 800165a: 47c0 blx r8 + 800165c: 3001 adds r0, #1 + 800165e: d103 bne.n 8001668 <_printf_common+0xac> + 8001660: f04f 30ff mov.w r0, #4294967295 + 8001664: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001668: 3501 adds r5, #1 + 800166a: e7c6 b.n 80015fa <_printf_common+0x3e> + 800166c: 18e1 adds r1, r4, r3 + 800166e: 1c5a adds r2, r3, #1 + 8001670: 2030 movs r0, #48 ; 0x30 + 8001672: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 8001676: 4422 add r2, r4 + 8001678: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 800167c: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 8001680: 3302 adds r3, #2 + 8001682: e7c7 b.n 8001614 <_printf_common+0x58> + 8001684: 2301 movs r3, #1 + 8001686: 4622 mov r2, r4 + 8001688: 4649 mov r1, r9 + 800168a: 4638 mov r0, r7 + 800168c: 47c0 blx r8 + 800168e: 3001 adds r0, #1 + 8001690: d0e6 beq.n 8001660 <_printf_common+0xa4> + 8001692: 3601 adds r6, #1 + 8001694: e7d9 b.n 800164a <_printf_common+0x8e> + ... + +08001698 <_printf_i>: + 8001698: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 800169c: 460c mov r4, r1 + 800169e: 4691 mov r9, r2 + 80016a0: 7e27 ldrb r7, [r4, #24] + 80016a2: 990c ldr r1, [sp, #48] ; 0x30 + 80016a4: 2f78 cmp r7, #120 ; 0x78 + 80016a6: 4680 mov r8, r0 + 80016a8: 469a mov sl, r3 + 80016aa: f104 0243 add.w r2, r4, #67 ; 0x43 + 80016ae: d807 bhi.n 80016c0 <_printf_i+0x28> + 80016b0: 2f62 cmp r7, #98 ; 0x62 + 80016b2: d80a bhi.n 80016ca <_printf_i+0x32> + 80016b4: 2f00 cmp r7, #0 + 80016b6: f000 80d8 beq.w 800186a <_printf_i+0x1d2> + 80016ba: 2f58 cmp r7, #88 ; 0x58 + 80016bc: f000 80a3 beq.w 8001806 <_printf_i+0x16e> + 80016c0: f104 0642 add.w r6, r4, #66 ; 0x42 + 80016c4: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 80016c8: e03a b.n 8001740 <_printf_i+0xa8> + 80016ca: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 80016ce: 2b15 cmp r3, #21 + 80016d0: d8f6 bhi.n 80016c0 <_printf_i+0x28> + 80016d2: a001 add r0, pc, #4 ; (adr r0, 80016d8 <_printf_i+0x40>) + 80016d4: f850 f023 ldr.w pc, [r0, r3, lsl #2] + 80016d8: 08001731 .word 0x08001731 + 80016dc: 08001745 .word 0x08001745 + 80016e0: 080016c1 .word 0x080016c1 + 80016e4: 080016c1 .word 0x080016c1 + 80016e8: 080016c1 .word 0x080016c1 + 80016ec: 080016c1 .word 0x080016c1 + 80016f0: 08001745 .word 0x08001745 + 80016f4: 080016c1 .word 0x080016c1 + 80016f8: 080016c1 .word 0x080016c1 + 80016fc: 080016c1 .word 0x080016c1 + 8001700: 080016c1 .word 0x080016c1 + 8001704: 08001851 .word 0x08001851 + 8001708: 08001775 .word 0x08001775 + 800170c: 08001833 .word 0x08001833 + 8001710: 080016c1 .word 0x080016c1 + 8001714: 080016c1 .word 0x080016c1 + 8001718: 08001873 .word 0x08001873 + 800171c: 080016c1 .word 0x080016c1 + 8001720: 08001775 .word 0x08001775 + 8001724: 080016c1 .word 0x080016c1 + 8001728: 080016c1 .word 0x080016c1 + 800172c: 0800183b .word 0x0800183b + 8001730: 680b ldr r3, [r1, #0] + 8001732: 1d1a adds r2, r3, #4 + 8001734: 681b ldr r3, [r3, #0] + 8001736: 600a str r2, [r1, #0] + 8001738: f104 0642 add.w r6, r4, #66 ; 0x42 + 800173c: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 8001740: 2301 movs r3, #1 + 8001742: e0a3 b.n 800188c <_printf_i+0x1f4> + 8001744: 6825 ldr r5, [r4, #0] + 8001746: 6808 ldr r0, [r1, #0] + 8001748: 062e lsls r6, r5, #24 + 800174a: f100 0304 add.w r3, r0, #4 + 800174e: d50a bpl.n 8001766 <_printf_i+0xce> + 8001750: 6805 ldr r5, [r0, #0] + 8001752: 600b str r3, [r1, #0] + 8001754: 2d00 cmp r5, #0 + 8001756: da03 bge.n 8001760 <_printf_i+0xc8> + 8001758: 232d movs r3, #45 ; 0x2d + 800175a: 426d negs r5, r5 + 800175c: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001760: 485e ldr r0, [pc, #376] ; (80018dc <_printf_i+0x244>) + 8001762: 230a movs r3, #10 + 8001764: e019 b.n 800179a <_printf_i+0x102> + 8001766: f015 0f40 tst.w r5, #64 ; 0x40 + 800176a: 6805 ldr r5, [r0, #0] + 800176c: 600b str r3, [r1, #0] + 800176e: bf18 it ne + 8001770: b22d sxthne r5, r5 + 8001772: e7ef b.n 8001754 <_printf_i+0xbc> + 8001774: 680b ldr r3, [r1, #0] + 8001776: 6825 ldr r5, [r4, #0] + 8001778: 1d18 adds r0, r3, #4 + 800177a: 6008 str r0, [r1, #0] + 800177c: 0628 lsls r0, r5, #24 + 800177e: d501 bpl.n 8001784 <_printf_i+0xec> + 8001780: 681d ldr r5, [r3, #0] + 8001782: e002 b.n 800178a <_printf_i+0xf2> + 8001784: 0669 lsls r1, r5, #25 + 8001786: d5fb bpl.n 8001780 <_printf_i+0xe8> + 8001788: 881d ldrh r5, [r3, #0] + 800178a: 4854 ldr r0, [pc, #336] ; (80018dc <_printf_i+0x244>) + 800178c: 2f6f cmp r7, #111 ; 0x6f + 800178e: bf0c ite eq + 8001790: 2308 moveq r3, #8 + 8001792: 230a movne r3, #10 + 8001794: 2100 movs r1, #0 + 8001796: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 800179a: 6866 ldr r6, [r4, #4] + 800179c: 60a6 str r6, [r4, #8] + 800179e: 2e00 cmp r6, #0 + 80017a0: bfa2 ittt ge + 80017a2: 6821 ldrge r1, [r4, #0] + 80017a4: f021 0104 bicge.w r1, r1, #4 + 80017a8: 6021 strge r1, [r4, #0] + 80017aa: b90d cbnz r5, 80017b0 <_printf_i+0x118> + 80017ac: 2e00 cmp r6, #0 + 80017ae: d04d beq.n 800184c <_printf_i+0x1b4> + 80017b0: 4616 mov r6, r2 + 80017b2: fbb5 f1f3 udiv r1, r5, r3 + 80017b6: fb03 5711 mls r7, r3, r1, r5 + 80017ba: 5dc7 ldrb r7, [r0, r7] + 80017bc: f806 7d01 strb.w r7, [r6, #-1]! + 80017c0: 462f mov r7, r5 + 80017c2: 42bb cmp r3, r7 + 80017c4: 460d mov r5, r1 + 80017c6: d9f4 bls.n 80017b2 <_printf_i+0x11a> + 80017c8: 2b08 cmp r3, #8 + 80017ca: d10b bne.n 80017e4 <_printf_i+0x14c> + 80017cc: 6823 ldr r3, [r4, #0] + 80017ce: 07df lsls r7, r3, #31 + 80017d0: d508 bpl.n 80017e4 <_printf_i+0x14c> + 80017d2: 6923 ldr r3, [r4, #16] + 80017d4: 6861 ldr r1, [r4, #4] + 80017d6: 4299 cmp r1, r3 + 80017d8: bfde ittt le + 80017da: 2330 movle r3, #48 ; 0x30 + 80017dc: f806 3c01 strble.w r3, [r6, #-1] + 80017e0: f106 36ff addle.w r6, r6, #4294967295 + 80017e4: 1b92 subs r2, r2, r6 + 80017e6: 6122 str r2, [r4, #16] + 80017e8: f8cd a000 str.w sl, [sp] + 80017ec: 464b mov r3, r9 + 80017ee: aa03 add r2, sp, #12 + 80017f0: 4621 mov r1, r4 + 80017f2: 4640 mov r0, r8 + 80017f4: f7ff fee2 bl 80015bc <_printf_common> + 80017f8: 3001 adds r0, #1 + 80017fa: d14c bne.n 8001896 <_printf_i+0x1fe> + 80017fc: f04f 30ff mov.w r0, #4294967295 + 8001800: b004 add sp, #16 + 8001802: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001806: 4835 ldr r0, [pc, #212] ; (80018dc <_printf_i+0x244>) + 8001808: f884 7045 strb.w r7, [r4, #69] ; 0x45 + 800180c: 6823 ldr r3, [r4, #0] + 800180e: 680e ldr r6, [r1, #0] + 8001810: 061f lsls r7, r3, #24 + 8001812: f856 5b04 ldr.w r5, [r6], #4 + 8001816: 600e str r6, [r1, #0] + 8001818: d514 bpl.n 8001844 <_printf_i+0x1ac> + 800181a: 07d9 lsls r1, r3, #31 + 800181c: bf44 itt mi + 800181e: f043 0320 orrmi.w r3, r3, #32 + 8001822: 6023 strmi r3, [r4, #0] + 8001824: b91d cbnz r5, 800182e <_printf_i+0x196> + 8001826: 6823 ldr r3, [r4, #0] + 8001828: f023 0320 bic.w r3, r3, #32 + 800182c: 6023 str r3, [r4, #0] + 800182e: 2310 movs r3, #16 + 8001830: e7b0 b.n 8001794 <_printf_i+0xfc> + 8001832: 6823 ldr r3, [r4, #0] + 8001834: f043 0320 orr.w r3, r3, #32 + 8001838: 6023 str r3, [r4, #0] + 800183a: 2378 movs r3, #120 ; 0x78 + 800183c: 4828 ldr r0, [pc, #160] ; (80018e0 <_printf_i+0x248>) + 800183e: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 8001842: e7e3 b.n 800180c <_printf_i+0x174> + 8001844: 065e lsls r6, r3, #25 + 8001846: bf48 it mi + 8001848: b2ad uxthmi r5, r5 + 800184a: e7e6 b.n 800181a <_printf_i+0x182> + 800184c: 4616 mov r6, r2 + 800184e: e7bb b.n 80017c8 <_printf_i+0x130> + 8001850: 680b ldr r3, [r1, #0] + 8001852: 6826 ldr r6, [r4, #0] + 8001854: 6960 ldr r0, [r4, #20] + 8001856: 1d1d adds r5, r3, #4 + 8001858: 600d str r5, [r1, #0] + 800185a: 0635 lsls r5, r6, #24 + 800185c: 681b ldr r3, [r3, #0] + 800185e: d501 bpl.n 8001864 <_printf_i+0x1cc> + 8001860: 6018 str r0, [r3, #0] + 8001862: e002 b.n 800186a <_printf_i+0x1d2> + 8001864: 0671 lsls r1, r6, #25 + 8001866: d5fb bpl.n 8001860 <_printf_i+0x1c8> + 8001868: 8018 strh r0, [r3, #0] + 800186a: 2300 movs r3, #0 + 800186c: 6123 str r3, [r4, #16] + 800186e: 4616 mov r6, r2 + 8001870: e7ba b.n 80017e8 <_printf_i+0x150> + 8001872: 680b ldr r3, [r1, #0] + 8001874: 1d1a adds r2, r3, #4 + 8001876: 600a str r2, [r1, #0] + 8001878: 681e ldr r6, [r3, #0] + 800187a: 6862 ldr r2, [r4, #4] + 800187c: 2100 movs r1, #0 + 800187e: 4630 mov r0, r6 + 8001880: f7fe fcc6 bl 8000210 + 8001884: b108 cbz r0, 800188a <_printf_i+0x1f2> + 8001886: 1b80 subs r0, r0, r6 + 8001888: 6060 str r0, [r4, #4] + 800188a: 6863 ldr r3, [r4, #4] + 800188c: 6123 str r3, [r4, #16] + 800188e: 2300 movs r3, #0 + 8001890: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001894: e7a8 b.n 80017e8 <_printf_i+0x150> + 8001896: 6923 ldr r3, [r4, #16] + 8001898: 4632 mov r2, r6 + 800189a: 4649 mov r1, r9 + 800189c: 4640 mov r0, r8 + 800189e: 47d0 blx sl + 80018a0: 3001 adds r0, #1 + 80018a2: d0ab beq.n 80017fc <_printf_i+0x164> + 80018a4: 6823 ldr r3, [r4, #0] + 80018a6: 079b lsls r3, r3, #30 + 80018a8: d413 bmi.n 80018d2 <_printf_i+0x23a> + 80018aa: 68e0 ldr r0, [r4, #12] + 80018ac: 9b03 ldr r3, [sp, #12] + 80018ae: 4298 cmp r0, r3 + 80018b0: bfb8 it lt + 80018b2: 4618 movlt r0, r3 + 80018b4: e7a4 b.n 8001800 <_printf_i+0x168> + 80018b6: 2301 movs r3, #1 + 80018b8: 4632 mov r2, r6 + 80018ba: 4649 mov r1, r9 + 80018bc: 4640 mov r0, r8 + 80018be: 47d0 blx sl + 80018c0: 3001 adds r0, #1 + 80018c2: d09b beq.n 80017fc <_printf_i+0x164> + 80018c4: 3501 adds r5, #1 + 80018c6: 68e3 ldr r3, [r4, #12] + 80018c8: 9903 ldr r1, [sp, #12] + 80018ca: 1a5b subs r3, r3, r1 + 80018cc: 42ab cmp r3, r5 + 80018ce: dcf2 bgt.n 80018b6 <_printf_i+0x21e> + 80018d0: e7eb b.n 80018aa <_printf_i+0x212> + 80018d2: 2500 movs r5, #0 + 80018d4: f104 0619 add.w r6, r4, #25 + 80018d8: e7f5 b.n 80018c6 <_printf_i+0x22e> + 80018da: bf00 nop + 80018dc: 08001f95 .word 0x08001f95 + 80018e0: 08001fa6 .word 0x08001fa6 + +080018e4 <__srget_r>: + 80018e4: b538 push {r3, r4, r5, lr} + 80018e6: 460c mov r4, r1 + 80018e8: 4605 mov r5, r0 + 80018ea: b118 cbz r0, 80018f4 <__srget_r+0x10> + 80018ec: 6983 ldr r3, [r0, #24] + 80018ee: b90b cbnz r3, 80018f4 <__srget_r+0x10> + 80018f0: f7ff faf6 bl 8000ee0 <__sinit> + 80018f4: 4b0e ldr r3, [pc, #56] ; (8001930 <__srget_r+0x4c>) + 80018f6: 429c cmp r4, r3 + 80018f8: d10d bne.n 8001916 <__srget_r+0x32> + 80018fa: 686c ldr r4, [r5, #4] + 80018fc: 4621 mov r1, r4 + 80018fe: 4628 mov r0, r5 + 8001900: f000 f9ae bl 8001c60 <__srefill_r> + 8001904: b988 cbnz r0, 800192a <__srget_r+0x46> + 8001906: 6863 ldr r3, [r4, #4] + 8001908: 3b01 subs r3, #1 + 800190a: 6063 str r3, [r4, #4] + 800190c: 6823 ldr r3, [r4, #0] + 800190e: 1c5a adds r2, r3, #1 + 8001910: 6022 str r2, [r4, #0] + 8001912: 7818 ldrb r0, [r3, #0] + 8001914: bd38 pop {r3, r4, r5, pc} + 8001916: 4b07 ldr r3, [pc, #28] ; (8001934 <__srget_r+0x50>) + 8001918: 429c cmp r4, r3 + 800191a: d101 bne.n 8001920 <__srget_r+0x3c> + 800191c: 68ac ldr r4, [r5, #8] + 800191e: e7ed b.n 80018fc <__srget_r+0x18> + 8001920: 4b05 ldr r3, [pc, #20] ; (8001938 <__srget_r+0x54>) + 8001922: 429c cmp r4, r3 + 8001924: bf08 it eq + 8001926: 68ec ldreq r4, [r5, #12] + 8001928: e7e8 b.n 80018fc <__srget_r+0x18> + 800192a: f04f 30ff mov.w r0, #4294967295 + 800192e: e7f1 b.n 8001914 <__srget_r+0x30> + 8001930: 08001f44 .word 0x08001f44 + 8001934: 08001f64 .word 0x08001f64 + 8001938: 08001f24 .word 0x08001f24 + +0800193c <_sbrk_r>: + 800193c: b538 push {r3, r4, r5, lr} + 800193e: 4d06 ldr r5, [pc, #24] ; (8001958 <_sbrk_r+0x1c>) + 8001940: 2300 movs r3, #0 + 8001942: 4604 mov r4, r0 + 8001944: 4608 mov r0, r1 + 8001946: 602b str r3, [r5, #0] + 8001948: f7fe ff4c bl 80007e4 <_sbrk> + 800194c: 1c43 adds r3, r0, #1 + 800194e: d102 bne.n 8001956 <_sbrk_r+0x1a> + 8001950: 682b ldr r3, [r5, #0] + 8001952: b103 cbz r3, 8001956 <_sbrk_r+0x1a> + 8001954: 6023 str r3, [r4, #0] + 8001956: bd38 pop {r3, r4, r5, pc} + 8001958: 2000009c .word 0x2000009c + +0800195c <__sread>: + 800195c: b510 push {r4, lr} + 800195e: 460c mov r4, r1 + 8001960: f9b1 100e ldrsh.w r1, [r1, #14] + 8001964: f000 f960 bl 8001c28 <_read_r> + 8001968: 2800 cmp r0, #0 + 800196a: bfab itete ge + 800196c: 6d63 ldrge r3, [r4, #84] ; 0x54 + 800196e: 89a3 ldrhlt r3, [r4, #12] + 8001970: 181b addge r3, r3, r0 + 8001972: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 8001976: bfac ite ge + 8001978: 6563 strge r3, [r4, #84] ; 0x54 + 800197a: 81a3 strhlt r3, [r4, #12] + 800197c: bd10 pop {r4, pc} + +0800197e <__swrite>: + 800197e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8001982: 461f mov r7, r3 + 8001984: 898b ldrh r3, [r1, #12] + 8001986: 05db lsls r3, r3, #23 + 8001988: 4605 mov r5, r0 + 800198a: 460c mov r4, r1 + 800198c: 4616 mov r6, r2 + 800198e: d505 bpl.n 800199c <__swrite+0x1e> + 8001990: f9b1 100e ldrsh.w r1, [r1, #14] + 8001994: 2302 movs r3, #2 + 8001996: 2200 movs r2, #0 + 8001998: f000 f928 bl 8001bec <_lseek_r> + 800199c: 89a3 ldrh r3, [r4, #12] + 800199e: f9b4 100e ldrsh.w r1, [r4, #14] + 80019a2: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 80019a6: 81a3 strh r3, [r4, #12] + 80019a8: 4632 mov r2, r6 + 80019aa: 463b mov r3, r7 + 80019ac: 4628 mov r0, r5 + 80019ae: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 80019b2: f000 b869 b.w 8001a88 <_write_r> + +080019b6 <__sseek>: + 80019b6: b510 push {r4, lr} + 80019b8: 460c mov r4, r1 + 80019ba: f9b1 100e ldrsh.w r1, [r1, #14] + 80019be: f000 f915 bl 8001bec <_lseek_r> + 80019c2: 1c43 adds r3, r0, #1 + 80019c4: 89a3 ldrh r3, [r4, #12] + 80019c6: bf15 itete ne + 80019c8: 6560 strne r0, [r4, #84] ; 0x54 + 80019ca: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 80019ce: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 80019d2: 81a3 strheq r3, [r4, #12] + 80019d4: bf18 it ne + 80019d6: 81a3 strhne r3, [r4, #12] + 80019d8: bd10 pop {r4, pc} + +080019da <__sclose>: + 80019da: f9b1 100e ldrsh.w r1, [r1, #14] + 80019de: f000 b8d3 b.w 8001b88 <_close_r> + ... + +080019e4 <__swbuf_r>: + 80019e4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80019e6: 460e mov r6, r1 + 80019e8: 4614 mov r4, r2 + 80019ea: 4605 mov r5, r0 + 80019ec: b118 cbz r0, 80019f6 <__swbuf_r+0x12> + 80019ee: 6983 ldr r3, [r0, #24] + 80019f0: b90b cbnz r3, 80019f6 <__swbuf_r+0x12> + 80019f2: f7ff fa75 bl 8000ee0 <__sinit> + 80019f6: 4b21 ldr r3, [pc, #132] ; (8001a7c <__swbuf_r+0x98>) + 80019f8: 429c cmp r4, r3 + 80019fa: d12b bne.n 8001a54 <__swbuf_r+0x70> + 80019fc: 686c ldr r4, [r5, #4] + 80019fe: 69a3 ldr r3, [r4, #24] + 8001a00: 60a3 str r3, [r4, #8] + 8001a02: 89a3 ldrh r3, [r4, #12] + 8001a04: 071a lsls r2, r3, #28 + 8001a06: d52f bpl.n 8001a68 <__swbuf_r+0x84> + 8001a08: 6923 ldr r3, [r4, #16] + 8001a0a: b36b cbz r3, 8001a68 <__swbuf_r+0x84> + 8001a0c: 6923 ldr r3, [r4, #16] + 8001a0e: 6820 ldr r0, [r4, #0] + 8001a10: 1ac0 subs r0, r0, r3 + 8001a12: 6963 ldr r3, [r4, #20] + 8001a14: b2f6 uxtb r6, r6 + 8001a16: 4283 cmp r3, r0 + 8001a18: 4637 mov r7, r6 + 8001a1a: dc04 bgt.n 8001a26 <__swbuf_r+0x42> + 8001a1c: 4621 mov r1, r4 + 8001a1e: 4628 mov r0, r5 + 8001a20: f7ff f9b8 bl 8000d94 <_fflush_r> + 8001a24: bb30 cbnz r0, 8001a74 <__swbuf_r+0x90> + 8001a26: 68a3 ldr r3, [r4, #8] + 8001a28: 3b01 subs r3, #1 + 8001a2a: 60a3 str r3, [r4, #8] + 8001a2c: 6823 ldr r3, [r4, #0] + 8001a2e: 1c5a adds r2, r3, #1 + 8001a30: 6022 str r2, [r4, #0] + 8001a32: 701e strb r6, [r3, #0] + 8001a34: 6963 ldr r3, [r4, #20] + 8001a36: 3001 adds r0, #1 + 8001a38: 4283 cmp r3, r0 + 8001a3a: d004 beq.n 8001a46 <__swbuf_r+0x62> + 8001a3c: 89a3 ldrh r3, [r4, #12] + 8001a3e: 07db lsls r3, r3, #31 + 8001a40: d506 bpl.n 8001a50 <__swbuf_r+0x6c> + 8001a42: 2e0a cmp r6, #10 + 8001a44: d104 bne.n 8001a50 <__swbuf_r+0x6c> + 8001a46: 4621 mov r1, r4 + 8001a48: 4628 mov r0, r5 + 8001a4a: f7ff f9a3 bl 8000d94 <_fflush_r> + 8001a4e: b988 cbnz r0, 8001a74 <__swbuf_r+0x90> + 8001a50: 4638 mov r0, r7 + 8001a52: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8001a54: 4b0a ldr r3, [pc, #40] ; (8001a80 <__swbuf_r+0x9c>) + 8001a56: 429c cmp r4, r3 + 8001a58: d101 bne.n 8001a5e <__swbuf_r+0x7a> + 8001a5a: 68ac ldr r4, [r5, #8] + 8001a5c: e7cf b.n 80019fe <__swbuf_r+0x1a> + 8001a5e: 4b09 ldr r3, [pc, #36] ; (8001a84 <__swbuf_r+0xa0>) + 8001a60: 429c cmp r4, r3 + 8001a62: bf08 it eq + 8001a64: 68ec ldreq r4, [r5, #12] + 8001a66: e7ca b.n 80019fe <__swbuf_r+0x1a> + 8001a68: 4621 mov r1, r4 + 8001a6a: 4628 mov r0, r5 + 8001a6c: f000 f81e bl 8001aac <__swsetup_r> + 8001a70: 2800 cmp r0, #0 + 8001a72: d0cb beq.n 8001a0c <__swbuf_r+0x28> + 8001a74: f04f 37ff mov.w r7, #4294967295 + 8001a78: e7ea b.n 8001a50 <__swbuf_r+0x6c> + 8001a7a: bf00 nop + 8001a7c: 08001f44 .word 0x08001f44 + 8001a80: 08001f64 .word 0x08001f64 + 8001a84: 08001f24 .word 0x08001f24 + +08001a88 <_write_r>: + 8001a88: b538 push {r3, r4, r5, lr} + 8001a8a: 4d07 ldr r5, [pc, #28] ; (8001aa8 <_write_r+0x20>) + 8001a8c: 4604 mov r4, r0 + 8001a8e: 4608 mov r0, r1 + 8001a90: 4611 mov r1, r2 + 8001a92: 2200 movs r2, #0 + 8001a94: 602a str r2, [r5, #0] + 8001a96: 461a mov r2, r3 + 8001a98: f7fe fef9 bl 800088e <_write> + 8001a9c: 1c43 adds r3, r0, #1 + 8001a9e: d102 bne.n 8001aa6 <_write_r+0x1e> + 8001aa0: 682b ldr r3, [r5, #0] + 8001aa2: b103 cbz r3, 8001aa6 <_write_r+0x1e> + 8001aa4: 6023 str r3, [r4, #0] + 8001aa6: bd38 pop {r3, r4, r5, pc} + 8001aa8: 2000009c .word 0x2000009c + +08001aac <__swsetup_r>: + 8001aac: 4b32 ldr r3, [pc, #200] ; (8001b78 <__swsetup_r+0xcc>) + 8001aae: b570 push {r4, r5, r6, lr} + 8001ab0: 681d ldr r5, [r3, #0] + 8001ab2: 4606 mov r6, r0 + 8001ab4: 460c mov r4, r1 + 8001ab6: b125 cbz r5, 8001ac2 <__swsetup_r+0x16> + 8001ab8: 69ab ldr r3, [r5, #24] + 8001aba: b913 cbnz r3, 8001ac2 <__swsetup_r+0x16> + 8001abc: 4628 mov r0, r5 + 8001abe: f7ff fa0f bl 8000ee0 <__sinit> + 8001ac2: 4b2e ldr r3, [pc, #184] ; (8001b7c <__swsetup_r+0xd0>) + 8001ac4: 429c cmp r4, r3 + 8001ac6: d10f bne.n 8001ae8 <__swsetup_r+0x3c> + 8001ac8: 686c ldr r4, [r5, #4] + 8001aca: 89a3 ldrh r3, [r4, #12] + 8001acc: f9b4 200c ldrsh.w r2, [r4, #12] + 8001ad0: 0719 lsls r1, r3, #28 + 8001ad2: d42c bmi.n 8001b2e <__swsetup_r+0x82> + 8001ad4: 06dd lsls r5, r3, #27 + 8001ad6: d411 bmi.n 8001afc <__swsetup_r+0x50> + 8001ad8: 2309 movs r3, #9 + 8001ada: 6033 str r3, [r6, #0] + 8001adc: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8001ae0: 81a3 strh r3, [r4, #12] + 8001ae2: f04f 30ff mov.w r0, #4294967295 + 8001ae6: e03e b.n 8001b66 <__swsetup_r+0xba> + 8001ae8: 4b25 ldr r3, [pc, #148] ; (8001b80 <__swsetup_r+0xd4>) + 8001aea: 429c cmp r4, r3 + 8001aec: d101 bne.n 8001af2 <__swsetup_r+0x46> + 8001aee: 68ac ldr r4, [r5, #8] + 8001af0: e7eb b.n 8001aca <__swsetup_r+0x1e> + 8001af2: 4b24 ldr r3, [pc, #144] ; (8001b84 <__swsetup_r+0xd8>) + 8001af4: 429c cmp r4, r3 + 8001af6: bf08 it eq + 8001af8: 68ec ldreq r4, [r5, #12] + 8001afa: e7e6 b.n 8001aca <__swsetup_r+0x1e> + 8001afc: 0758 lsls r0, r3, #29 + 8001afe: d512 bpl.n 8001b26 <__swsetup_r+0x7a> + 8001b00: 6b61 ldr r1, [r4, #52] ; 0x34 + 8001b02: b141 cbz r1, 8001b16 <__swsetup_r+0x6a> + 8001b04: f104 0344 add.w r3, r4, #68 ; 0x44 + 8001b08: 4299 cmp r1, r3 + 8001b0a: d002 beq.n 8001b12 <__swsetup_r+0x66> + 8001b0c: 4630 mov r0, r6 + 8001b0e: f7ff fb51 bl 80011b4 <_free_r> + 8001b12: 2300 movs r3, #0 + 8001b14: 6363 str r3, [r4, #52] ; 0x34 + 8001b16: 89a3 ldrh r3, [r4, #12] + 8001b18: f023 0324 bic.w r3, r3, #36 ; 0x24 + 8001b1c: 81a3 strh r3, [r4, #12] + 8001b1e: 2300 movs r3, #0 + 8001b20: 6063 str r3, [r4, #4] + 8001b22: 6923 ldr r3, [r4, #16] + 8001b24: 6023 str r3, [r4, #0] + 8001b26: 89a3 ldrh r3, [r4, #12] + 8001b28: f043 0308 orr.w r3, r3, #8 + 8001b2c: 81a3 strh r3, [r4, #12] + 8001b2e: 6923 ldr r3, [r4, #16] + 8001b30: b94b cbnz r3, 8001b46 <__swsetup_r+0x9a> + 8001b32: 89a3 ldrh r3, [r4, #12] + 8001b34: f403 7320 and.w r3, r3, #640 ; 0x280 + 8001b38: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8001b3c: d003 beq.n 8001b46 <__swsetup_r+0x9a> + 8001b3e: 4621 mov r1, r4 + 8001b40: 4630 mov r0, r6 + 8001b42: f7ff faef bl 8001124 <__smakebuf_r> + 8001b46: 89a0 ldrh r0, [r4, #12] + 8001b48: f9b4 200c ldrsh.w r2, [r4, #12] + 8001b4c: f010 0301 ands.w r3, r0, #1 + 8001b50: d00a beq.n 8001b68 <__swsetup_r+0xbc> + 8001b52: 2300 movs r3, #0 + 8001b54: 60a3 str r3, [r4, #8] + 8001b56: 6963 ldr r3, [r4, #20] + 8001b58: 425b negs r3, r3 + 8001b5a: 61a3 str r3, [r4, #24] + 8001b5c: 6923 ldr r3, [r4, #16] + 8001b5e: b943 cbnz r3, 8001b72 <__swsetup_r+0xc6> + 8001b60: f010 0080 ands.w r0, r0, #128 ; 0x80 + 8001b64: d1ba bne.n 8001adc <__swsetup_r+0x30> + 8001b66: bd70 pop {r4, r5, r6, pc} + 8001b68: 0781 lsls r1, r0, #30 + 8001b6a: bf58 it pl + 8001b6c: 6963 ldrpl r3, [r4, #20] + 8001b6e: 60a3 str r3, [r4, #8] + 8001b70: e7f4 b.n 8001b5c <__swsetup_r+0xb0> + 8001b72: 2000 movs r0, #0 + 8001b74: e7f7 b.n 8001b66 <__swsetup_r+0xba> + 8001b76: bf00 nop + 8001b78: 20000004 .word 0x20000004 + 8001b7c: 08001f44 .word 0x08001f44 + 8001b80: 08001f64 .word 0x08001f64 + 8001b84: 08001f24 .word 0x08001f24 + +08001b88 <_close_r>: + 8001b88: b538 push {r3, r4, r5, lr} + 8001b8a: 4d06 ldr r5, [pc, #24] ; (8001ba4 <_close_r+0x1c>) + 8001b8c: 2300 movs r3, #0 + 8001b8e: 4604 mov r4, r0 + 8001b90: 4608 mov r0, r1 + 8001b92: 602b str r3, [r5, #0] + 8001b94: f7fe fdf2 bl 800077c <_close> + 8001b98: 1c43 adds r3, r0, #1 + 8001b9a: d102 bne.n 8001ba2 <_close_r+0x1a> + 8001b9c: 682b ldr r3, [r5, #0] + 8001b9e: b103 cbz r3, 8001ba2 <_close_r+0x1a> + 8001ba0: 6023 str r3, [r4, #0] + 8001ba2: bd38 pop {r3, r4, r5, pc} + 8001ba4: 2000009c .word 0x2000009c + +08001ba8 <_fstat_r>: + 8001ba8: b538 push {r3, r4, r5, lr} + 8001baa: 4d07 ldr r5, [pc, #28] ; (8001bc8 <_fstat_r+0x20>) + 8001bac: 2300 movs r3, #0 + 8001bae: 4604 mov r4, r0 + 8001bb0: 4608 mov r0, r1 + 8001bb2: 4611 mov r1, r2 + 8001bb4: 602b str r3, [r5, #0] + 8001bb6: f7fe fded bl 8000794 <_fstat> + 8001bba: 1c43 adds r3, r0, #1 + 8001bbc: d102 bne.n 8001bc4 <_fstat_r+0x1c> + 8001bbe: 682b ldr r3, [r5, #0] + 8001bc0: b103 cbz r3, 8001bc4 <_fstat_r+0x1c> + 8001bc2: 6023 str r3, [r4, #0] + 8001bc4: bd38 pop {r3, r4, r5, pc} + 8001bc6: bf00 nop + 8001bc8: 2000009c .word 0x2000009c + +08001bcc <_isatty_r>: + 8001bcc: b538 push {r3, r4, r5, lr} + 8001bce: 4d06 ldr r5, [pc, #24] ; (8001be8 <_isatty_r+0x1c>) + 8001bd0: 2300 movs r3, #0 + 8001bd2: 4604 mov r4, r0 + 8001bd4: 4608 mov r0, r1 + 8001bd6: 602b str r3, [r5, #0] + 8001bd8: f7fe fdec bl 80007b4 <_isatty> + 8001bdc: 1c43 adds r3, r0, #1 + 8001bde: d102 bne.n 8001be6 <_isatty_r+0x1a> + 8001be0: 682b ldr r3, [r5, #0] + 8001be2: b103 cbz r3, 8001be6 <_isatty_r+0x1a> + 8001be4: 6023 str r3, [r4, #0] + 8001be6: bd38 pop {r3, r4, r5, pc} + 8001be8: 2000009c .word 0x2000009c + +08001bec <_lseek_r>: + 8001bec: b538 push {r3, r4, r5, lr} + 8001bee: 4d07 ldr r5, [pc, #28] ; (8001c0c <_lseek_r+0x20>) + 8001bf0: 4604 mov r4, r0 + 8001bf2: 4608 mov r0, r1 + 8001bf4: 4611 mov r1, r2 + 8001bf6: 2200 movs r2, #0 + 8001bf8: 602a str r2, [r5, #0] + 8001bfa: 461a mov r2, r3 + 8001bfc: f7fe fde5 bl 80007ca <_lseek> + 8001c00: 1c43 adds r3, r0, #1 + 8001c02: d102 bne.n 8001c0a <_lseek_r+0x1e> + 8001c04: 682b ldr r3, [r5, #0] + 8001c06: b103 cbz r3, 8001c0a <_lseek_r+0x1e> + 8001c08: 6023 str r3, [r4, #0] + 8001c0a: bd38 pop {r3, r4, r5, pc} + 8001c0c: 2000009c .word 0x2000009c + +08001c10 <__malloc_lock>: + 8001c10: 4801 ldr r0, [pc, #4] ; (8001c18 <__malloc_lock+0x8>) + 8001c12: f7ff ba60 b.w 80010d6 <__retarget_lock_acquire_recursive> + 8001c16: bf00 nop + 8001c18: 20000094 .word 0x20000094 + +08001c1c <__malloc_unlock>: + 8001c1c: 4801 ldr r0, [pc, #4] ; (8001c24 <__malloc_unlock+0x8>) + 8001c1e: f7ff ba5b b.w 80010d8 <__retarget_lock_release_recursive> + 8001c22: bf00 nop + 8001c24: 20000094 .word 0x20000094 + +08001c28 <_read_r>: + 8001c28: b538 push {r3, r4, r5, lr} + 8001c2a: 4d07 ldr r5, [pc, #28] ; (8001c48 <_read_r+0x20>) + 8001c2c: 4604 mov r4, r0 + 8001c2e: 4608 mov r0, r1 + 8001c30: 4611 mov r1, r2 + 8001c32: 2200 movs r2, #0 + 8001c34: 602a str r2, [r5, #0] + 8001c36: 461a mov r2, r3 + 8001c38: f7fe fe00 bl 800083c <_read> + 8001c3c: 1c43 adds r3, r0, #1 + 8001c3e: d102 bne.n 8001c46 <_read_r+0x1e> + 8001c40: 682b ldr r3, [r5, #0] + 8001c42: b103 cbz r3, 8001c46 <_read_r+0x1e> + 8001c44: 6023 str r3, [r4, #0] + 8001c46: bd38 pop {r3, r4, r5, pc} + 8001c48: 2000009c .word 0x2000009c + +08001c4c : + 8001c4c: 8983 ldrh r3, [r0, #12] + 8001c4e: f003 0309 and.w r3, r3, #9 + 8001c52: 2b09 cmp r3, #9 + 8001c54: d101 bne.n 8001c5a + 8001c56: f7ff b8d9 b.w 8000e0c + 8001c5a: 2000 movs r0, #0 + 8001c5c: 4770 bx lr + ... + +08001c60 <__srefill_r>: + 8001c60: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001c62: 460c mov r4, r1 + 8001c64: 4605 mov r5, r0 + 8001c66: b118 cbz r0, 8001c70 <__srefill_r+0x10> + 8001c68: 6983 ldr r3, [r0, #24] + 8001c6a: b90b cbnz r3, 8001c70 <__srefill_r+0x10> + 8001c6c: f7ff f938 bl 8000ee0 <__sinit> + 8001c70: 4b3b ldr r3, [pc, #236] ; (8001d60 <__srefill_r+0x100>) + 8001c72: 429c cmp r4, r3 + 8001c74: d10a bne.n 8001c8c <__srefill_r+0x2c> + 8001c76: 686c ldr r4, [r5, #4] + 8001c78: f9b4 200c ldrsh.w r2, [r4, #12] + 8001c7c: 2300 movs r3, #0 + 8001c7e: 6063 str r3, [r4, #4] + 8001c80: 89a3 ldrh r3, [r4, #12] + 8001c82: 069e lsls r6, r3, #26 + 8001c84: d50c bpl.n 8001ca0 <__srefill_r+0x40> + 8001c86: f04f 30ff mov.w r0, #4294967295 + 8001c8a: e066 b.n 8001d5a <__srefill_r+0xfa> + 8001c8c: 4b35 ldr r3, [pc, #212] ; (8001d64 <__srefill_r+0x104>) + 8001c8e: 429c cmp r4, r3 + 8001c90: d101 bne.n 8001c96 <__srefill_r+0x36> + 8001c92: 68ac ldr r4, [r5, #8] + 8001c94: e7f0 b.n 8001c78 <__srefill_r+0x18> + 8001c96: 4b34 ldr r3, [pc, #208] ; (8001d68 <__srefill_r+0x108>) + 8001c98: 429c cmp r4, r3 + 8001c9a: bf08 it eq + 8001c9c: 68ec ldreq r4, [r5, #12] + 8001c9e: e7eb b.n 8001c78 <__srefill_r+0x18> + 8001ca0: 0758 lsls r0, r3, #29 + 8001ca2: d448 bmi.n 8001d36 <__srefill_r+0xd6> + 8001ca4: 06d9 lsls r1, r3, #27 + 8001ca6: d405 bmi.n 8001cb4 <__srefill_r+0x54> + 8001ca8: 2309 movs r3, #9 + 8001caa: 602b str r3, [r5, #0] + 8001cac: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8001cb0: 81a3 strh r3, [r4, #12] + 8001cb2: e7e8 b.n 8001c86 <__srefill_r+0x26> + 8001cb4: 071a lsls r2, r3, #28 + 8001cb6: d50b bpl.n 8001cd0 <__srefill_r+0x70> + 8001cb8: 4621 mov r1, r4 + 8001cba: 4628 mov r0, r5 + 8001cbc: f7ff f86a bl 8000d94 <_fflush_r> + 8001cc0: 2800 cmp r0, #0 + 8001cc2: d1e0 bne.n 8001c86 <__srefill_r+0x26> + 8001cc4: 89a3 ldrh r3, [r4, #12] + 8001cc6: 60a0 str r0, [r4, #8] + 8001cc8: f023 0308 bic.w r3, r3, #8 + 8001ccc: 81a3 strh r3, [r4, #12] + 8001cce: 61a0 str r0, [r4, #24] + 8001cd0: 89a3 ldrh r3, [r4, #12] + 8001cd2: f043 0304 orr.w r3, r3, #4 + 8001cd6: 81a3 strh r3, [r4, #12] + 8001cd8: 6923 ldr r3, [r4, #16] + 8001cda: b91b cbnz r3, 8001ce4 <__srefill_r+0x84> + 8001cdc: 4621 mov r1, r4 + 8001cde: 4628 mov r0, r5 + 8001ce0: f7ff fa20 bl 8001124 <__smakebuf_r> + 8001ce4: 89a6 ldrh r6, [r4, #12] + 8001ce6: f9b4 700c ldrsh.w r7, [r4, #12] + 8001cea: 07b3 lsls r3, r6, #30 + 8001cec: d00f beq.n 8001d0e <__srefill_r+0xae> + 8001cee: 2301 movs r3, #1 + 8001cf0: 81a3 strh r3, [r4, #12] + 8001cf2: 4b1e ldr r3, [pc, #120] ; (8001d6c <__srefill_r+0x10c>) + 8001cf4: 491e ldr r1, [pc, #120] ; (8001d70 <__srefill_r+0x110>) + 8001cf6: 6818 ldr r0, [r3, #0] + 8001cf8: f006 0609 and.w r6, r6, #9 + 8001cfc: f7ff f96e bl 8000fdc <_fwalk> + 8001d00: 2e09 cmp r6, #9 + 8001d02: 81a7 strh r7, [r4, #12] + 8001d04: d103 bne.n 8001d0e <__srefill_r+0xae> + 8001d06: 4621 mov r1, r4 + 8001d08: 4628 mov r0, r5 + 8001d0a: f7fe ffbd bl 8000c88 <__sflush_r> + 8001d0e: 6922 ldr r2, [r4, #16] + 8001d10: 6a66 ldr r6, [r4, #36] ; 0x24 + 8001d12: 6963 ldr r3, [r4, #20] + 8001d14: 6a21 ldr r1, [r4, #32] + 8001d16: 6022 str r2, [r4, #0] + 8001d18: 4628 mov r0, r5 + 8001d1a: 47b0 blx r6 + 8001d1c: 2800 cmp r0, #0 + 8001d1e: 6060 str r0, [r4, #4] + 8001d20: dc1c bgt.n 8001d5c <__srefill_r+0xfc> + 8001d22: f9b4 300c ldrsh.w r3, [r4, #12] + 8001d26: bf17 itett ne + 8001d28: 2200 movne r2, #0 + 8001d2a: f043 0320 orreq.w r3, r3, #32 + 8001d2e: 6062 strne r2, [r4, #4] + 8001d30: f043 0340 orrne.w r3, r3, #64 ; 0x40 + 8001d34: e7bc b.n 8001cb0 <__srefill_r+0x50> + 8001d36: 6b61 ldr r1, [r4, #52] ; 0x34 + 8001d38: 2900 cmp r1, #0 + 8001d3a: d0cd beq.n 8001cd8 <__srefill_r+0x78> + 8001d3c: f104 0344 add.w r3, r4, #68 ; 0x44 + 8001d40: 4299 cmp r1, r3 + 8001d42: d002 beq.n 8001d4a <__srefill_r+0xea> + 8001d44: 4628 mov r0, r5 + 8001d46: f7ff fa35 bl 80011b4 <_free_r> + 8001d4a: 6c23 ldr r3, [r4, #64] ; 0x40 + 8001d4c: 6063 str r3, [r4, #4] + 8001d4e: 2000 movs r0, #0 + 8001d50: 6360 str r0, [r4, #52] ; 0x34 + 8001d52: 2b00 cmp r3, #0 + 8001d54: d0c0 beq.n 8001cd8 <__srefill_r+0x78> + 8001d56: 6be3 ldr r3, [r4, #60] ; 0x3c + 8001d58: 6023 str r3, [r4, #0] + 8001d5a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8001d5c: 2000 movs r0, #0 + 8001d5e: e7fc b.n 8001d5a <__srefill_r+0xfa> + 8001d60: 08001f44 .word 0x08001f44 + 8001d64: 08001f64 .word 0x08001f64 + 8001d68: 08001f24 .word 0x08001f24 + 8001d6c: 08001f20 .word 0x08001f20 + 8001d70: 08001c4d .word 0x08001c4d + +08001d74 <_init>: + 8001d74: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001d76: bf00 nop + 8001d78: bcf8 pop {r3, r4, r5, r6, r7} + 8001d7a: bc08 pop {r3} + 8001d7c: 469e mov lr, r3 + 8001d7e: 4770 bx lr + +08001d80 <_fini>: + 8001d80: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001d82: bf00 nop + 8001d84: bcf8 pop {r3, r4, r5, r6, r7} + 8001d86: bc08 pop {r3} + 8001d88: 469e mov lr, r3 + 8001d8a: 4770 bx lr diff --git a/labW2barnestr/Inc/delay.h b/labW2barnestr/Inc/delay.h new file mode 100644 index 0000000..95d7030 --- /dev/null +++ b/labW2barnestr/Inc/delay.h @@ -0,0 +1,35 @@ +/* + * delay.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +//include guards +#ifndef DELAY_H_ +#define DELAY_H_ + +#define STK_CTRL (volatile uint32_t*) 0xE000E010 +#define STK_LOAD (volatile uint32_t*) 0xE000E014 +#define STK_VAL (volatile uint32_t*) 0xE000E018 + +#define EN 1 +#define TICKINT (1<<1) +#define CLKSOURCE (1<<2) +#define COUNTFLAG (1<<16) + +/* + * delay_1ms + * Busy wait for n ms + * + * For n iterations + * load number of cycles for 1 ms + * set one to enable and clock source + * + * wait for countflag to be set + */ +void delay_1ms(uint32_t n); + + + +#endif /* DELAY_H_ */ diff --git a/labW2barnestr/Inc/led.h b/labW2barnestr/Inc/led.h new file mode 100644 index 0000000..e927468 --- /dev/null +++ b/labW2barnestr/Inc/led.h @@ -0,0 +1,101 @@ +/* + * led.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#ifndef LED_H_ +#define LED_H_ + +#include + +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 +#define GPIOBEN 1 +#define GPIOB_MODER (volatile uint32_t*) 0x40020400 +#define GPIOB_PUPDR (volatile uint32_t*) 0x4002040C +#define GPIOB_IDR (volatile uint32_t*) 0x40020410 +#define GPIOB_ODR (volatile uint32_t*) 0x40020414 +#define GPIOB_BSRR (volatile uint32_t*) 0x40020418 + +#define ALL_LEDS (0b11110111111<<5) + +/* + * led_init() + * This function should: + * 1. Enable the GPIOB in RCC_AHB1ENR + * 2. Turn on to set LED0 - LED9 to output mode ("01") + */ +void led_init(); + +/* + * led_allOn() + * 1. Turn on all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOn(); + +/* + * led_allOff() + * 1. Turn off all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOff(); + +/* + * led_on() + * Args: 0-9 to turn on specific led + * print error message is arg is out of range + */ +void led_on(uint8_t ledIndex); + +/* + * led_off() + * Args: 0-9 to turn off specific led + * print error message is arg is out of range + */ +void led_off(uint8_t ledIndex); + + +/* + * led_scan() + * Scan the light across and back at the current speed + */ +void led_scan(); + +/* + * led_flash() + * flash all of the lights 10 times at the current speed + */ +void led_flash(); + +/* + * led_setSpeed (uint8_t speed) + * arg: speed (0 slow - 9 fast) + * Args out of range should print error to console + */ +void led_setSpeed(uint8_t speed); + +/* + * led_incSpeed() + * increases the speed by one + * if maxed out leaves the speed at the max value + */ +void led_incSpeed(); + +/* + * led_decSpeed() + * decreases the speed by one + * if at zero should stay at zero + */ +void led_decSpeed(); + +/* + * getCurrentSpeed + * returns the current speed + */ +uint8_t getCurrentSpeed(); + + + +#endif diff --git a/labW2barnestr/Inc/uart_driver.h b/labW2barnestr/Inc/uart_driver.h new file mode 100644 index 0000000..a1d6427 --- /dev/null +++ b/labW2barnestr/Inc/uart_driver.h @@ -0,0 +1,49 @@ +/* + * uart_driver.h + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ + +#ifndef UART_DRIVER_H_ +#define UART_DRIVER_H_ + +#include + +// RCC registers +#define RCC_APB1ENR (volatile uint32_t*) 0x40023840 +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 + +#define GPIOAEN 0 // GPIOA Enable is bit 0 in RCC_APB1LPENR +#define USART2EN 17 // USART2 enable is bit 17 in RCC_AHB1LPENR + +// GPIOA registers +#define GPIOA_MODER (volatile uint32_t*) 0x40020000 +#define GPIOA_AFRL (volatile uint32_t*) 0x40020020 +#define USART_SR (volatile uint32_t*) 0x40004400 +#define USART_DR (volatile uint32_t*) 0x40004404 +#define USART_BRR (volatile uint32_t*) 0x40004408 +#define USART_CR1 (volatile uint32_t*) 0x4000440c +#define USART_CR2 (volatile uint32_t*) 0x40004410 +#define USART_CR3 (volatile uint32_t*) 0x40004414 + +// CR1 bits +#define UE 13 //UART enable +#define TE 3 // Transmitter enable +#define RE 2 // Receiver enable + +// Status register bits +#define TXE 7 // Transmit register empty +#define RXNE 5 // Receive register is not empty..char received + +// Function prototypes +extern void init_usart2(uint32_t baud, uint32_t sysclk); +extern char usart2_getch(); +extern void usart2_putch(char c); + +// syscalls overrides +int _read(int file, char *ptr, int len); +int _write(int file, char *ptr, int len); + + +#endif /* UART_DRIVER_H_ */ diff --git a/labW2barnestr/STM32F446RETX_FLASH.ld b/labW2barnestr/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..2749aec --- /dev/null +++ b/labW2barnestr/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW2barnestr/STM32F446RETX_RAM.ld b/labW2barnestr/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..5b11a04 --- /dev/null +++ b/labW2barnestr/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW2barnestr/Src/delay.c b/labW2barnestr/Src/delay.c new file mode 100644 index 0000000..e0e9355 --- /dev/null +++ b/labW2barnestr/Src/delay.c @@ -0,0 +1,28 @@ +/* + * delay.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include +#include "delay.h" //include declaration header file + +void delay_1ms(uint32_t n){ + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + // Clear value register + *STK_VAL = 0x0000; + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + *STK_CTRL |= EN; + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + } while (flag != 1); + } +} diff --git a/labW2barnestr/Src/led.c b/labW2barnestr/Src/led.c new file mode 100644 index 0000000..69add9b --- /dev/null +++ b/labW2barnestr/Src/led.c @@ -0,0 +1,147 @@ +/* + * led.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include "led.h" +#include "delay.h" +#include +#include + +int ledSpeed = 5; + +void led_init(){ + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<= 6) { + // Add pin offset to index + *GPIOB_BSRR = (1<<(22+ledIndex)); + } else { + printf("LED index out of range\n\r"); + } +} + +void led_scan(){ + led_allOff(); + // Right to left each LED + for (int i = 0; i <= 9 ; i++) { + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + if(i != 0){ + led_off(i-1); + } + led_on(i); + } + // Left to right each LED + for (int i = 9; i >= 0; i--) { + if(i != 9){ + led_off(i+1); + } + led_on(i); + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + } + led_off(0); +} + +void led_flash(){ + // Flash LED on and off 10 times at a speed between 0-1 seconds + for (int i = 0; i < 10; i++) { + led_allOn(); + delay_1ms(100+(ledSpeed*100)); + led_allOff(); + delay_1ms(100+(ledSpeed*100)); + } +} + +void led_setSpeed(uint8_t speed){ + ledSpeed = speed; +} + +void led_incSpeed(){ + if (ledSpeed == 0){ + printf("Speed too fast\n\r"); + } else { + ledSpeed--; + } +} + +void led_decSpeed(){ + if (ledSpeed == 9){ + printf("Speed too slow\n\r"); + } else { + ledSpeed++; + } +} + +uint8_t getCurrentSpeed() +{ + return ledSpeed; +} + + diff --git a/labW2barnestr/Src/main.c b/labW2barnestr/Src/main.c new file mode 100644 index 0000000..4a06032 --- /dev/null +++ b/labW2barnestr/Src/main.c @@ -0,0 +1,83 @@ +/* + * main.c + * CE2812 + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + * Description: This program allows the user to control the led bar on the dev board. Users can + * flash the leds or scan them back and forth like the lights on KITT from Knight Rider. The speed + * of the lights can also be adjusted and returned back. This is all controlled through a serial + * terminal using the usart. + */ +#include +#include +#include "uart_driver.h" +#include "led.h" + +#define F_CPU 16000000UL +#define ARSIZE 10 + +void printHelp() { + printf("*Commands*\n\r"); + printf("'f' - Flash Lights 10 Times\n\r"); + printf("'s' - Scan Lights (Once back and forth)\n\r"); + printf("'i' - Scan Lights (Infinitely)\n\r"); + printf("'p' - Print Current Speed Interval (0-9)\n\r"); + printf("'+' - Increase Speed\n\r"); + printf("'-' - Decrease Speed\n\r"); + printf("'x' - Turn Off Lights\n\r"); + printf("'o' - Turn On Lights\n\r"); + } + +// main +int main(){ + + init_usart2(19200,F_CPU); + + // Initialize LEDs + led_init(); + + char selection, dummy; + + // Selection Prompt + printf("Choose an option ('h' for help)\n\r"); + while (1) { + selection = getchar(); + switch (selection) { + case 'o': + led_allOn(); + break; + case 'x': + led_allOff(); + break; + case 'h': + printHelp(); + break; + case 'f': + led_flash(); + break; + case 's': + led_scan(); + break; + case 'i': + while(1){ + led_scan(); + } + break; + case 'p': + printf("Current Interval: %d\n\r", getCurrentSpeed()); + break; + case '+': + led_incSpeed(); + break; + case '-': + led_decSpeed(); + break; + default: + printf("????\n\r"); + break; + } + dummy = getchar(); + dummy = dummy; // No more warning + } + return 0; +} diff --git a/labW2barnestr/Src/syscalls.c b/labW2barnestr/Src/syscalls.c new file mode 100644 index 0000000..9f32dad --- /dev/null +++ b/labW2barnestr/Src/syscalls.c @@ -0,0 +1,184 @@ +/** +***************************************************************************** +** +** File : syscalls.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/labW2barnestr/Src/sysmem.c b/labW2barnestr/Src/sysmem.c new file mode 100644 index 0000000..e5e1bc2 --- /dev/null +++ b/labW2barnestr/Src/sysmem.c @@ -0,0 +1,83 @@ +/** +***************************************************************************** +** +** File : sysmem.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System Memory calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include + +/* Variables */ +extern int errno; +register char * stack_ptr asm("sp"); + +/* Functions */ + +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + heap_end = &end; + + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) + { + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + diff --git a/labW2barnestr/Src/uart_driver.c b/labW2barnestr/Src/uart_driver.c new file mode 100644 index 0000000..c2707c6 --- /dev/null +++ b/labW2barnestr/Src/uart_driver.c @@ -0,0 +1,92 @@ +/* + * uart_driver.c + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ +#include "uart_driver.h" +#include +#include + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + //*ptr++ = __io_getchar(); + byteCnt++; + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + if(*ptr == '\n') break; + ptr++; + } + + //return len; + return byteCnt; // Return byte count +} + +int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + usart2_putch(*ptr++); + } + return len; +} + + + +char usart2_getch(){ + char c; + while((*(USART_SR)&(1< + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW3barnestr/.cproject b/labW3barnestr/.cproject new file mode 100644 index 0000000..07a4fd5 --- /dev/null +++ b/labW3barnestr/.cproject @@ -0,0 +1,172 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW3barnestr/.project b/labW3barnestr/.project new file mode 100644 index 0000000..f785e5b --- /dev/null +++ b/labW3barnestr/.project @@ -0,0 +1,32 @@ + + + labW3barnestr + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/labW3barnestr/.settings/language.settings.xml b/labW3barnestr/.settings/language.settings.xml new file mode 100644 index 0000000..dd1350d --- /dev/null +++ b/labW3barnestr/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/labW3barnestr/Debug/.gitignore b/labW3barnestr/Debug/.gitignore new file mode 100644 index 0000000..ffd9cbe --- /dev/null +++ b/labW3barnestr/Debug/.gitignore @@ -0,0 +1,6 @@ +/Src/ +/Startup/ +/makefile +/objects.list +/objects.mk +/sources.mk diff --git a/labW3barnestr/Debug/labW3barnestr.bin b/labW3barnestr/Debug/labW3barnestr.bin new file mode 100644 index 0000000..c677baf Binary files /dev/null and b/labW3barnestr/Debug/labW3barnestr.bin differ diff --git a/labW3barnestr/Debug/labW3barnestr.list b/labW3barnestr/Debug/labW3barnestr.list new file mode 100644 index 0000000..bbf0ad3 --- /dev/null +++ b/labW3barnestr/Debug/labW3barnestr.list @@ -0,0 +1,2547 @@ + +labW3barnestr.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001c4 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00001344 080001d0 080001d0 000101d0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 00000070 08001514 08001514 00011514 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 08001584 08001584 00020094 2**0 + CONTENTS + 4 .ARM 00000000 08001584 08001584 00020094 2**0 + CONTENTS + 5 .preinit_array 00000000 08001584 08001584 00020094 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 08001584 08001584 00011584 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 08001588 08001588 00011588 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 00000094 20000000 0800158c 00020000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000040 20000094 08001620 00020094 2**2 + ALLOC + 10 ._user_heap_stack 00000604 200000d4 08001620 000200d4 2**0 + ALLOC + 11 .ARM.attributes 00000030 00000000 00000000 00020094 2**0 + CONTENTS, READONLY + 12 .debug_info 00001785 00000000 00000000 000200c4 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 00000560 00000000 00000000 00021849 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 00000110 00000000 00000000 00021db0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_ranges 000000c8 00000000 00000000 00021ec0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 000029d0 00000000 00000000 00021f88 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 000018fb 00000000 00000000 00024958 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 000094a2 00000000 00000000 00026253 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000053 00000000 00000000 0002f6f5 2**0 + CONTENTS, READONLY + 20 .debug_frame 000006bc 00000000 00000000 0002f748 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + +Disassembly of section .text: + +080001d0 <__do_global_dtors_aux>: + 80001d0: b510 push {r4, lr} + 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) + 80001d4: 7823 ldrb r3, [r4, #0] + 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> + 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) + 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> + 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) + 80001de: f3af 8000 nop.w + 80001e2: 2301 movs r3, #1 + 80001e4: 7023 strb r3, [r4, #0] + 80001e6: bd10 pop {r4, pc} + 80001e8: 20000094 .word 0x20000094 + 80001ec: 00000000 .word 0x00000000 + 80001f0: 080014fc .word 0x080014fc + +080001f4 : + 80001f4: b508 push {r3, lr} + 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) + 80001f8: b11b cbz r3, 8000202 + 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) + 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) + 80001fe: f3af 8000 nop.w + 8000202: bd08 pop {r3, pc} + 8000204: 00000000 .word 0x00000000 + 8000208: 20000098 .word 0x20000098 + 800020c: 080014fc .word 0x080014fc + +08000210 : + 8000210: f001 01ff and.w r1, r1, #255 ; 0xff + 8000214: 2a10 cmp r2, #16 + 8000216: db2b blt.n 8000270 + 8000218: f010 0f07 tst.w r0, #7 + 800021c: d008 beq.n 8000230 + 800021e: f810 3b01 ldrb.w r3, [r0], #1 + 8000222: 3a01 subs r2, #1 + 8000224: 428b cmp r3, r1 + 8000226: d02d beq.n 8000284 + 8000228: f010 0f07 tst.w r0, #7 + 800022c: b342 cbz r2, 8000280 + 800022e: d1f6 bne.n 800021e + 8000230: b4f0 push {r4, r5, r6, r7} + 8000232: ea41 2101 orr.w r1, r1, r1, lsl #8 + 8000236: ea41 4101 orr.w r1, r1, r1, lsl #16 + 800023a: f022 0407 bic.w r4, r2, #7 + 800023e: f07f 0700 mvns.w r7, #0 + 8000242: 2300 movs r3, #0 + 8000244: e8f0 5602 ldrd r5, r6, [r0], #8 + 8000248: 3c08 subs r4, #8 + 800024a: ea85 0501 eor.w r5, r5, r1 + 800024e: ea86 0601 eor.w r6, r6, r1 + 8000252: fa85 f547 uadd8 r5, r5, r7 + 8000256: faa3 f587 sel r5, r3, r7 + 800025a: fa86 f647 uadd8 r6, r6, r7 + 800025e: faa5 f687 sel r6, r5, r7 + 8000262: b98e cbnz r6, 8000288 + 8000264: d1ee bne.n 8000244 + 8000266: bcf0 pop {r4, r5, r6, r7} + 8000268: f001 01ff and.w r1, r1, #255 ; 0xff + 800026c: f002 0207 and.w r2, r2, #7 + 8000270: b132 cbz r2, 8000280 + 8000272: f810 3b01 ldrb.w r3, [r0], #1 + 8000276: 3a01 subs r2, #1 + 8000278: ea83 0301 eor.w r3, r3, r1 + 800027c: b113 cbz r3, 8000284 + 800027e: d1f8 bne.n 8000272 + 8000280: 2000 movs r0, #0 + 8000282: 4770 bx lr + 8000284: 3801 subs r0, #1 + 8000286: 4770 bx lr + 8000288: 2d00 cmp r5, #0 + 800028a: bf06 itte eq + 800028c: 4635 moveq r5, r6 + 800028e: 3803 subeq r0, #3 + 8000290: 3807 subne r0, #7 + 8000292: f015 0f01 tst.w r5, #1 + 8000296: d107 bne.n 80002a8 + 8000298: 3001 adds r0, #1 + 800029a: f415 7f80 tst.w r5, #256 ; 0x100 + 800029e: bf02 ittt eq + 80002a0: 3001 addeq r0, #1 + 80002a2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000 + 80002a6: 3001 addeq r0, #1 + 80002a8: bcf0 pop {r4, r5, r6, r7} + 80002aa: 3801 subs r0, #1 + 80002ac: 4770 bx lr + 80002ae: bf00 nop + +080002b0 : + */ + +#include +#include "delay.h" //include declaration header file + +void delay_ms(uint32_t n){ + 80002b0: b480 push {r7} + 80002b2: b085 sub sp, #20 + 80002b4: af00 add r7, sp, #0 + 80002b6: 6078 str r0, [r7, #4] + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + 80002b8: 687b ldr r3, [r7, #4] + 80002ba: 60fb str r3, [r7, #12] + 80002bc: e01e b.n 80002fc + // Clear value register + *STK_VAL = 0x0000; + 80002be: 4b14 ldr r3, [pc, #80] ; (8000310 ) + 80002c0: 2200 movs r2, #0 + 80002c2: 601a str r2, [r3, #0] + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + 80002c4: 4b13 ldr r3, [pc, #76] ; (8000314 ) + 80002c6: f44f 527a mov.w r2, #16000 ; 0x3e80 + 80002ca: 601a str r2, [r3, #0] + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + 80002cc: 4b12 ldr r3, [pc, #72] ; (8000318 ) + 80002ce: 681b ldr r3, [r3, #0] + 80002d0: 4a11 ldr r2, [pc, #68] ; (8000318 ) + 80002d2: f043 0304 orr.w r3, r3, #4 + 80002d6: 6013 str r3, [r2, #0] + *STK_CTRL |= EN; + 80002d8: 4b0f ldr r3, [pc, #60] ; (8000318 ) + 80002da: 681b ldr r3, [r3, #0] + 80002dc: 4a0e ldr r2, [pc, #56] ; (8000318 ) + 80002de: f043 0301 orr.w r3, r3, #1 + 80002e2: 6013 str r3, [r2, #0] + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + 80002e4: 4b0c ldr r3, [pc, #48] ; (8000318 ) + 80002e6: 681b ldr r3, [r3, #0] + 80002e8: 0c1b lsrs r3, r3, #16 + 80002ea: f003 0301 and.w r3, r3, #1 + 80002ee: 60bb str r3, [r7, #8] + } while (flag != 1); + 80002f0: 68bb ldr r3, [r7, #8] + 80002f2: 2b01 cmp r3, #1 + 80002f4: d1f6 bne.n 80002e4 + for (int i = n ; i > 0 ; i--) { + 80002f6: 68fb ldr r3, [r7, #12] + 80002f8: 3b01 subs r3, #1 + 80002fa: 60fb str r3, [r7, #12] + 80002fc: 68fb ldr r3, [r7, #12] + 80002fe: 2b00 cmp r3, #0 + 8000300: dcdd bgt.n 80002be + } + +} + 8000302: bf00 nop + 8000304: bf00 nop + 8000306: 3714 adds r7, #20 + 8000308: 46bd mov sp, r7 + 800030a: f85d 7b04 ldr.w r7, [sp], #4 + 800030e: 4770 bx lr + 8000310: e000e018 .word 0xe000e018 + 8000314: e000e014 .word 0xe000e014 + 8000318: e000e010 .word 0xe000e010 + +0800031c : + +void delay_us(uint32_t n) { + 800031c: b480 push {r7} + 800031e: b085 sub sp, #20 + 8000320: af00 add r7, sp, #0 + 8000322: 6078 str r0, [r7, #4] + // 1us = 16 ticks + for (int i = n ; i > 0 ; i--) { + 8000324: 687b ldr r3, [r7, #4] + 8000326: 60fb str r3, [r7, #12] + 8000328: e01d b.n 8000366 + // Clear value register + *STK_VAL = 0x0000; + 800032a: 4b14 ldr r3, [pc, #80] ; (800037c ) + 800032c: 2200 movs r2, #0 + 800032e: 601a str r2, [r3, #0] + // Store 16 in STK_LOAD + *STK_LOAD = 16; + 8000330: 4b13 ldr r3, [pc, #76] ; (8000380 ) + 8000332: 2210 movs r2, #16 + 8000334: 601a str r2, [r3, #0] + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + 8000336: 4b13 ldr r3, [pc, #76] ; (8000384 ) + 8000338: 681b ldr r3, [r3, #0] + 800033a: 4a12 ldr r2, [pc, #72] ; (8000384 ) + 800033c: f043 0304 orr.w r3, r3, #4 + 8000340: 6013 str r3, [r2, #0] + *STK_CTRL |= EN; + 8000342: 4b10 ldr r3, [pc, #64] ; (8000384 ) + 8000344: 681b ldr r3, [r3, #0] + 8000346: 4a0f ldr r2, [pc, #60] ; (8000384 ) + 8000348: f043 0301 orr.w r3, r3, #1 + 800034c: 6013 str r3, [r2, #0] + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + 800034e: 4b0d ldr r3, [pc, #52] ; (8000384 ) + 8000350: 681b ldr r3, [r3, #0] + 8000352: 0c1b lsrs r3, r3, #16 + 8000354: f003 0301 and.w r3, r3, #1 + 8000358: 60bb str r3, [r7, #8] + } while (flag != 1); + 800035a: 68bb ldr r3, [r7, #8] + 800035c: 2b01 cmp r3, #1 + 800035e: d1f6 bne.n 800034e + for (int i = n ; i > 0 ; i--) { + 8000360: 68fb ldr r3, [r7, #12] + 8000362: 3b01 subs r3, #1 + 8000364: 60fb str r3, [r7, #12] + 8000366: 68fb ldr r3, [r7, #12] + 8000368: 2b00 cmp r3, #0 + 800036a: dcde bgt.n 800032a + } +} + 800036c: bf00 nop + 800036e: bf00 nop + 8000370: 3714 adds r7, #20 + 8000372: 46bd mov sp, r7 + 8000374: f85d 7b04 ldr.w r7, [sp], #4 + 8000378: 4770 bx lr + 800037a: bf00 nop + 800037c: e000e018 .word 0xe000e018 + 8000380: e000e014 .word 0xe000e014 + 8000384: e000e010 .word 0xe000e010 + +08000388 : + +#include "keypad.h" +#include "delay.h" + + +void keypad_init(){ + 8000388: b480 push {r7} + 800038a: af00 add r7, sp, #0 + //Enables the port + *RCC_AHB1ENR |= (1<) + 800038e: 681b ldr r3, [r3, #0] + 8000390: 4a0b ldr r2, [pc, #44] ; (80003c0 ) + 8000392: f043 0304 orr.w r3, r3, #4 + 8000396: 6013 str r3, [r2, #0] + + //Sets KEY0 - KEY7 as Pull-Ups + *GPIOC_PUPDR &= ~(0xFFFF); + 8000398: 4b0a ldr r3, [pc, #40] ; (80003c4 ) + 800039a: 681b ldr r3, [r3, #0] + 800039c: 4a09 ldr r2, [pc, #36] ; (80003c4 ) + 800039e: 0c1b lsrs r3, r3, #16 + 80003a0: 041b lsls r3, r3, #16 + 80003a2: 6013 str r3, [r2, #0] + *GPIOC_PUPDR |= 0x5555; + 80003a4: 4b07 ldr r3, [pc, #28] ; (80003c4 ) + 80003a6: 681b ldr r3, [r3, #0] + 80003a8: 4a06 ldr r2, [pc, #24] ; (80003c4 ) + 80003aa: f443 43aa orr.w r3, r3, #21760 ; 0x5500 + 80003ae: f043 0355 orr.w r3, r3, #85 ; 0x55 + 80003b2: 6013 str r3, [r2, #0] +} + 80003b4: bf00 nop + 80003b6: 46bd mov sp, r7 + 80003b8: f85d 7b04 ldr.w r7, [sp], #4 + 80003bc: 4770 bx lr + 80003be: bf00 nop + 80003c0: 40023830 .word 0x40023830 + 80003c4: 4002080c .word 0x4002080c + +080003c8 : + +uint8_t keypad_getKeyNoBlock(){ + 80003c8: b580 push {r7, lr} + 80003ca: b082 sub sp, #8 + 80003cc: af00 add r7, sp, #0 + + uint8_t value = 0; + 80003ce: 2300 movs r3, #0 + 80003d0: 71bb strb r3, [r7, #6] + uint8_t keycode = 0; + 80003d2: 2300 movs r3, #0 + 80003d4: 71fb strb r3, [r7, #7] + + //COLS to Inputs and ROWS to Outputs + *GPIOC_MODER &= ~(0xFFFF); + 80003d6: 4bba ldr r3, [pc, #744] ; (80006c0 ) + 80003d8: 681b ldr r3, [r3, #0] + 80003da: 4ab9 ldr r2, [pc, #740] ; (80006c0 ) + 80003dc: 0c1b lsrs r3, r3, #16 + 80003de: 041b lsls r3, r3, #16 + 80003e0: 6013 str r3, [r2, #0] + *GPIOC_MODER |= 0x5500; + 80003e2: 4bb7 ldr r3, [pc, #732] ; (80006c0 ) + 80003e4: 681b ldr r3, [r3, #0] + 80003e6: 4ab6 ldr r2, [pc, #728] ; (80006c0 ) + 80003e8: f443 43aa orr.w r3, r3, #21760 ; 0x5500 + 80003ec: 6013 str r3, [r2, #0] + + //Clears Rows in ODR + *GPIOC_ODR &= ~0xFF; + 80003ee: 4bb5 ldr r3, [pc, #724] ; (80006c4 ) + 80003f0: 681b ldr r3, [r3, #0] + 80003f2: 4ab4 ldr r2, [pc, #720] ; (80006c4 ) + 80003f4: f023 03ff bic.w r3, r3, #255 ; 0xff + 80003f8: 6013 str r3, [r2, #0] + //Reads COLS in IDR + value = (*GPIOC_IDR & 0xF); + 80003fa: 4bb3 ldr r3, [pc, #716] ; (80006c8 ) + 80003fc: 681b ldr r3, [r3, #0] + 80003fe: b2db uxtb r3, r3 + 8000400: f003 030f and.w r3, r3, #15 + 8000404: 71bb strb r3, [r7, #6] + + //if a button is pressed decode the key + if (value != 0xF){ + 8000406: 79bb ldrb r3, [r7, #6] + 8000408: 2b0f cmp r3, #15 + 800040a: f000 8152 beq.w 80006b2 + //Copy COLS pattern from IDR to ODR + *GPIOC_ODR &= ~0xFF; + 800040e: 4bad ldr r3, [pc, #692] ; (80006c4 ) + 8000410: 681b ldr r3, [r3, #0] + 8000412: 4aac ldr r2, [pc, #688] ; (80006c4 ) + 8000414: f023 03ff bic.w r3, r3, #255 ; 0xff + 8000418: 6013 str r3, [r2, #0] + *GPIOC_ODR |= (*GPIOC_IDR & 0xF); + 800041a: 4bab ldr r3, [pc, #684] ; (80006c8 ) + 800041c: 681b ldr r3, [r3, #0] + 800041e: f003 020f and.w r2, r3, #15 + 8000422: 4ba8 ldr r3, [pc, #672] ; (80006c4 ) + 8000424: 681b ldr r3, [r3, #0] + 8000426: 49a7 ldr r1, [pc, #668] ; (80006c4 ) + 8000428: 4313 orrs r3, r2 + 800042a: 600b str r3, [r1, #0] + + //COLS to Output and ROWS to Inputs + *GPIOC_MODER &= ~(0xFFFF); + 800042c: 4ba4 ldr r3, [pc, #656] ; (80006c0 ) + 800042e: 681b ldr r3, [r3, #0] + 8000430: 4aa3 ldr r2, [pc, #652] ; (80006c0 ) + 8000432: 0c1b lsrs r3, r3, #16 + 8000434: 041b lsls r3, r3, #16 + 8000436: 6013 str r3, [r2, #0] + *GPIOC_MODER |= 0x0055; + 8000438: 4ba1 ldr r3, [pc, #644] ; (80006c0 ) + 800043a: 681b ldr r3, [r3, #0] + 800043c: 4aa0 ldr r2, [pc, #640] ; (80006c0 ) + 800043e: f043 0355 orr.w r3, r3, #85 ; 0x55 + 8000442: 6013 str r3, [r2, #0] + + //Small delay (ensure you have this function) + delay_us(5); + 8000444: 2005 movs r0, #5 + 8000446: f7ff ff69 bl 800031c + + //Read ROWS from IDR + value |= *GPIOC_IDR & 0xF0; + 800044a: 4b9f ldr r3, [pc, #636] ; (80006c8 ) + 800044c: 681b ldr r3, [r3, #0] + 800044e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 8000452: b2da uxtb r2, r3 + 8000454: 79bb ldrb r3, [r7, #6] + 8000456: 4313 orrs r3, r2 + 8000458: 71bb strb r3, [r7, #6] + + //Decode Key + switch (value){ + 800045a: 79bb ldrb r3, [r7, #6] + 800045c: 3b77 subs r3, #119 ; 0x77 + 800045e: 2b77 cmp r3, #119 ; 0x77 + 8000460: f200 8124 bhi.w 80006ac + 8000464: a201 add r2, pc, #4 ; (adr r2, 800046c ) + 8000466: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800046a: bf00 nop + 800046c: 080006a7 .word 0x080006a7 + 8000470: 080006ad .word 0x080006ad + 8000474: 080006ad .word 0x080006ad + 8000478: 080006ad .word 0x080006ad + 800047c: 080006a1 .word 0x080006a1 + 8000480: 080006ad .word 0x080006ad + 8000484: 0800069b .word 0x0800069b + 8000488: 08000695 .word 0x08000695 + 800048c: 080006ad .word 0x080006ad + 8000490: 080006ad .word 0x080006ad + 8000494: 080006ad .word 0x080006ad + 8000498: 080006ad .word 0x080006ad + 800049c: 080006ad .word 0x080006ad + 80004a0: 080006ad .word 0x080006ad + 80004a4: 080006ad .word 0x080006ad + 80004a8: 080006ad .word 0x080006ad + 80004ac: 080006ad .word 0x080006ad + 80004b0: 080006ad .word 0x080006ad + 80004b4: 080006ad .word 0x080006ad + 80004b8: 080006ad .word 0x080006ad + 80004bc: 080006ad .word 0x080006ad + 80004c0: 080006ad .word 0x080006ad + 80004c4: 080006ad .word 0x080006ad + 80004c8: 080006ad .word 0x080006ad + 80004cc: 080006ad .word 0x080006ad + 80004d0: 080006ad .word 0x080006ad + 80004d4: 080006ad .word 0x080006ad + 80004d8: 080006ad .word 0x080006ad + 80004dc: 080006ad .word 0x080006ad + 80004e0: 080006ad .word 0x080006ad + 80004e4: 080006ad .word 0x080006ad + 80004e8: 080006ad .word 0x080006ad + 80004ec: 080006ad .word 0x080006ad + 80004f0: 080006ad .word 0x080006ad + 80004f4: 080006ad .word 0x080006ad + 80004f8: 080006ad .word 0x080006ad + 80004fc: 080006ad .word 0x080006ad + 8000500: 080006ad .word 0x080006ad + 8000504: 080006ad .word 0x080006ad + 8000508: 080006ad .word 0x080006ad + 800050c: 080006ad .word 0x080006ad + 8000510: 080006ad .word 0x080006ad + 8000514: 080006ad .word 0x080006ad + 8000518: 080006ad .word 0x080006ad + 800051c: 080006ad .word 0x080006ad + 8000520: 080006ad .word 0x080006ad + 8000524: 080006ad .word 0x080006ad + 8000528: 080006ad .word 0x080006ad + 800052c: 080006ad .word 0x080006ad + 8000530: 080006ad .word 0x080006ad + 8000534: 080006ad .word 0x080006ad + 8000538: 080006ad .word 0x080006ad + 800053c: 080006ad .word 0x080006ad + 8000540: 080006ad .word 0x080006ad + 8000544: 080006ad .word 0x080006ad + 8000548: 080006ad .word 0x080006ad + 800054c: 080006ad .word 0x080006ad + 8000550: 080006ad .word 0x080006ad + 8000554: 080006ad .word 0x080006ad + 8000558: 080006ad .word 0x080006ad + 800055c: 080006ad .word 0x080006ad + 8000560: 080006ad .word 0x080006ad + 8000564: 080006ad .word 0x080006ad + 8000568: 080006ad .word 0x080006ad + 800056c: 0800068f .word 0x0800068f + 8000570: 080006ad .word 0x080006ad + 8000574: 080006ad .word 0x080006ad + 8000578: 080006ad .word 0x080006ad + 800057c: 08000689 .word 0x08000689 + 8000580: 080006ad .word 0x080006ad + 8000584: 08000683 .word 0x08000683 + 8000588: 0800067d .word 0x0800067d + 800058c: 080006ad .word 0x080006ad + 8000590: 080006ad .word 0x080006ad + 8000594: 080006ad .word 0x080006ad + 8000598: 080006ad .word 0x080006ad + 800059c: 080006ad .word 0x080006ad + 80005a0: 080006ad .word 0x080006ad + 80005a4: 080006ad .word 0x080006ad + 80005a8: 080006ad .word 0x080006ad + 80005ac: 080006ad .word 0x080006ad + 80005b0: 080006ad .word 0x080006ad + 80005b4: 080006ad .word 0x080006ad + 80005b8: 080006ad .word 0x080006ad + 80005bc: 080006ad .word 0x080006ad + 80005c0: 080006ad .word 0x080006ad + 80005c4: 080006ad .word 0x080006ad + 80005c8: 080006ad .word 0x080006ad + 80005cc: 080006ad .word 0x080006ad + 80005d0: 080006ad .word 0x080006ad + 80005d4: 080006ad .word 0x080006ad + 80005d8: 080006ad .word 0x080006ad + 80005dc: 080006ad .word 0x080006ad + 80005e0: 080006ad .word 0x080006ad + 80005e4: 080006ad .word 0x080006ad + 80005e8: 080006ad .word 0x080006ad + 80005ec: 08000677 .word 0x08000677 + 80005f0: 080006ad .word 0x080006ad + 80005f4: 080006ad .word 0x080006ad + 80005f8: 080006ad .word 0x080006ad + 80005fc: 08000671 .word 0x08000671 + 8000600: 080006ad .word 0x080006ad + 8000604: 0800066b .word 0x0800066b + 8000608: 08000665 .word 0x08000665 + 800060c: 080006ad .word 0x080006ad + 8000610: 080006ad .word 0x080006ad + 8000614: 080006ad .word 0x080006ad + 8000618: 080006ad .word 0x080006ad + 800061c: 080006ad .word 0x080006ad + 8000620: 080006ad .word 0x080006ad + 8000624: 080006ad .word 0x080006ad + 8000628: 080006ad .word 0x080006ad + 800062c: 0800065f .word 0x0800065f + 8000630: 080006ad .word 0x080006ad + 8000634: 080006ad .word 0x080006ad + 8000638: 080006ad .word 0x080006ad + 800063c: 08000659 .word 0x08000659 + 8000640: 080006ad .word 0x080006ad + 8000644: 08000653 .word 0x08000653 + 8000648: 0800064d .word 0x0800064d + case 0b11101110 : keycode = 1; break; + 800064c: 2301 movs r3, #1 + 800064e: 71fb strb r3, [r7, #7] + 8000650: e030 b.n 80006b4 + case 0b11101101 : keycode = 2; break; + 8000652: 2302 movs r3, #2 + 8000654: 71fb strb r3, [r7, #7] + 8000656: e02d b.n 80006b4 + case 0b11101011 : keycode = 3; break; + 8000658: 2303 movs r3, #3 + 800065a: 71fb strb r3, [r7, #7] + 800065c: e02a b.n 80006b4 + case 0b11100111 : keycode = 4; break; + 800065e: 2304 movs r3, #4 + 8000660: 71fb strb r3, [r7, #7] + 8000662: e027 b.n 80006b4 + + case 0b11011110 : keycode = 5; break; + 8000664: 2305 movs r3, #5 + 8000666: 71fb strb r3, [r7, #7] + 8000668: e024 b.n 80006b4 + case 0b11011101 : keycode = 6; break; + 800066a: 2306 movs r3, #6 + 800066c: 71fb strb r3, [r7, #7] + 800066e: e021 b.n 80006b4 + case 0b11011011 : keycode = 7; break; + 8000670: 2307 movs r3, #7 + 8000672: 71fb strb r3, [r7, #7] + 8000674: e01e b.n 80006b4 + case 0b11010111 : keycode = 8; break; + 8000676: 2308 movs r3, #8 + 8000678: 71fb strb r3, [r7, #7] + 800067a: e01b b.n 80006b4 + + case 0b10111110 : keycode = 9; break; + 800067c: 2309 movs r3, #9 + 800067e: 71fb strb r3, [r7, #7] + 8000680: e018 b.n 80006b4 + case 0b10111101 : keycode = 10; break; + 8000682: 230a movs r3, #10 + 8000684: 71fb strb r3, [r7, #7] + 8000686: e015 b.n 80006b4 + case 0b10111011 : keycode = 11; break; + 8000688: 230b movs r3, #11 + 800068a: 71fb strb r3, [r7, #7] + 800068c: e012 b.n 80006b4 + case 0b10110111 : keycode = 12; break; + 800068e: 230c movs r3, #12 + 8000690: 71fb strb r3, [r7, #7] + 8000692: e00f b.n 80006b4 + + case 0b01111110 : keycode = 13; break; + 8000694: 230d movs r3, #13 + 8000696: 71fb strb r3, [r7, #7] + 8000698: e00c b.n 80006b4 + case 0b01111101 : keycode = 14; break; + 800069a: 230e movs r3, #14 + 800069c: 71fb strb r3, [r7, #7] + 800069e: e009 b.n 80006b4 + case 0b01111011 : keycode = 15; break; + 80006a0: 230f movs r3, #15 + 80006a2: 71fb strb r3, [r7, #7] + 80006a4: e006 b.n 80006b4 + case 0b01110111 : keycode = 16; break; + 80006a6: 2310 movs r3, #16 + 80006a8: 71fb strb r3, [r7, #7] + 80006aa: e003 b.n 80006b4 + + default: keycode = 255; + 80006ac: 23ff movs r3, #255 ; 0xff + 80006ae: 71fb strb r3, [r7, #7] + 80006b0: e000 b.n 80006b4 + } + } + 80006b2: bf00 nop + + return keycode; + 80006b4: 79fb ldrb r3, [r7, #7] +} + 80006b6: 4618 mov r0, r3 + 80006b8: 3708 adds r7, #8 + 80006ba: 46bd mov sp, r7 + 80006bc: bd80 pop {r7, pc} + 80006be: bf00 nop + 80006c0: 40020800 .word 0x40020800 + 80006c4: 40020814 .word 0x40020814 + 80006c8: 40020810 .word 0x40020810 + +080006cc : + + +uint8_t keypad_getKey(){ + 80006cc: b580 push {r7, lr} + 80006ce: b082 sub sp, #8 + 80006d0: af00 add r7, sp, #0 + + uint8_t key, keycode; + + keycode = 0; + 80006d2: 2300 movs r3, #0 + 80006d4: 71bb strb r3, [r7, #6] + + while (keycode == 0){ + 80006d6: e010 b.n 80006fa + //Check status of keypad + key = keypad_getKeyNoBlock(); + 80006d8: f7ff fe76 bl 80003c8 + 80006dc: 4603 mov r3, r0 + 80006de: 71fb strb r3, [r7, #7] + if (key != 0) { + 80006e0: 79fb ldrb r3, [r7, #7] + 80006e2: 2b00 cmp r3, #0 + 80006e4: d009 beq.n 80006fa + //if key is pressed save which key + keycode = key; + 80006e6: 79fb ldrb r3, [r7, #7] + 80006e8: 71bb strb r3, [r7, #6] + //wait for the release of the key + while (key != 0){ + 80006ea: e003 b.n 80006f4 + key = keypad_getKeyNoBlock(); + 80006ec: f7ff fe6c bl 80003c8 + 80006f0: 4603 mov r3, r0 + 80006f2: 71fb strb r3, [r7, #7] + while (key != 0){ + 80006f4: 79fb ldrb r3, [r7, #7] + 80006f6: 2b00 cmp r3, #0 + 80006f8: d1f8 bne.n 80006ec + while (keycode == 0){ + 80006fa: 79bb ldrb r3, [r7, #6] + 80006fc: 2b00 cmp r3, #0 + 80006fe: d0eb beq.n 80006d8 + } + } + } + return keycode; + 8000700: 79bb ldrb r3, [r7, #6] +} + 8000702: 4618 mov r0, r3 + 8000704: 3708 adds r7, #8 + 8000706: 46bd mov sp, r7 + 8000708: bd80 pop {r7, pc} + ... + +0800070c : +#include +#include + + + +void writeInstruction(uint8_t inst) { + 800070c: b580 push {r7, lr} + 800070e: b082 sub sp, #8 + 8000710: af00 add r7, sp, #0 + 8000712: 4603 mov r3, r0 + 8000714: 71fb strb r3, [r7, #7] + // Reset RS, RW, E + *GPIOC_ODR &= ~(RS); + 8000716: 4b19 ldr r3, [pc, #100] ; (800077c ) + 8000718: 681b ldr r3, [r3, #0] + 800071a: 4a18 ldr r2, [pc, #96] ; (800077c ) + 800071c: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8000720: 6013 str r3, [r2, #0] + *GPIOC_ODR &= ~(RW); + 8000722: 4b16 ldr r3, [pc, #88] ; (800077c ) + 8000724: 681b ldr r3, [r3, #0] + 8000726: 4a15 ldr r2, [pc, #84] ; (800077c ) + 8000728: f423 7300 bic.w r3, r3, #512 ; 0x200 + 800072c: 6013 str r3, [r2, #0] + *GPIOC_ODR &= ~(E); + 800072e: 4b13 ldr r3, [pc, #76] ; (800077c ) + 8000730: 681b ldr r3, [r3, #0] + 8000732: 4a12 ldr r2, [pc, #72] ; (800077c ) + 8000734: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 8000738: 6013 str r3, [r2, #0] + // Set E + *GPIOC_ODR |= (E); + 800073a: 4b10 ldr r3, [pc, #64] ; (800077c ) + 800073c: 681b ldr r3, [r3, #0] + 800073e: 4a0f ldr r2, [pc, #60] ; (800077c ) + 8000740: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 8000744: 6013 str r3, [r2, #0] + // Clear databus + *GPIOA_ODR &= ~(0xFF<<4); + 8000746: 4b0e ldr r3, [pc, #56] ; (8000780 ) + 8000748: 681b ldr r3, [r3, #0] + 800074a: 4a0d ldr r2, [pc, #52] ; (8000780 ) + 800074c: f423 637f bic.w r3, r3, #4080 ; 0xff0 + 8000750: 6013 str r3, [r2, #0] + // Set databus to passed in instruction value + *GPIOA_ODR |= (inst<<4); + 8000752: 4b0b ldr r3, [pc, #44] ; (8000780 ) + 8000754: 681b ldr r3, [r3, #0] + 8000756: 79fa ldrb r2, [r7, #7] + 8000758: 0112 lsls r2, r2, #4 + 800075a: 4611 mov r1, r2 + 800075c: 4a08 ldr r2, [pc, #32] ; (8000780 ) + 800075e: 430b orrs r3, r1 + 8000760: 6013 str r3, [r2, #0] + // Reset E + *GPIOC_ODR &= ~(E); + 8000762: 4b06 ldr r3, [pc, #24] ; (800077c ) + 8000764: 681b ldr r3, [r3, #0] + 8000766: 4a05 ldr r2, [pc, #20] ; (800077c ) + 8000768: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 800076c: 6013 str r3, [r2, #0] + delay_us(37); + 800076e: 2025 movs r0, #37 ; 0x25 + 8000770: f7ff fdd4 bl 800031c +} + 8000774: bf00 nop + 8000776: 3708 adds r7, #8 + 8000778: 46bd mov sp, r7 + 800077a: bd80 pop {r7, pc} + 800077c: 40020814 .word 0x40020814 + 8000780: 40020014 .word 0x40020014 + +08000784 : + +void writeData(uint8_t inst) { + 8000784: b580 push {r7, lr} + 8000786: b082 sub sp, #8 + 8000788: af00 add r7, sp, #0 + 800078a: 4603 mov r3, r0 + 800078c: 71fb strb r3, [r7, #7] + // Reset RW, E + *GPIOC_ODR &= ~(RW); + 800078e: 4b19 ldr r3, [pc, #100] ; (80007f4 ) + 8000790: 681b ldr r3, [r3, #0] + 8000792: 4a18 ldr r2, [pc, #96] ; (80007f4 ) + 8000794: f423 7300 bic.w r3, r3, #512 ; 0x200 + 8000798: 6013 str r3, [r2, #0] + *GPIOC_ODR &= ~(E); + 800079a: 4b16 ldr r3, [pc, #88] ; (80007f4 ) + 800079c: 681b ldr r3, [r3, #0] + 800079e: 4a15 ldr r2, [pc, #84] ; (80007f4 ) + 80007a0: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 80007a4: 6013 str r3, [r2, #0] + // Set RS + *GPIOC_ODR |= (RS); + 80007a6: 4b13 ldr r3, [pc, #76] ; (80007f4 ) + 80007a8: 681b ldr r3, [r3, #0] + 80007aa: 4a12 ldr r2, [pc, #72] ; (80007f4 ) + 80007ac: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80007b0: 6013 str r3, [r2, #0] + // Set E + *GPIOC_ODR |= (E); + 80007b2: 4b10 ldr r3, [pc, #64] ; (80007f4 ) + 80007b4: 681b ldr r3, [r3, #0] + 80007b6: 4a0f ldr r2, [pc, #60] ; (80007f4 ) + 80007b8: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 80007bc: 6013 str r3, [r2, #0] + // Clear databus + *GPIOA_ODR &= ~(0xFF<<4); + 80007be: 4b0e ldr r3, [pc, #56] ; (80007f8 ) + 80007c0: 681b ldr r3, [r3, #0] + 80007c2: 4a0d ldr r2, [pc, #52] ; (80007f8 ) + 80007c4: f423 637f bic.w r3, r3, #4080 ; 0xff0 + 80007c8: 6013 str r3, [r2, #0] + // Set databus to passed in instruction value + *GPIOA_ODR |= (inst<<4); + 80007ca: 4b0b ldr r3, [pc, #44] ; (80007f8 ) + 80007cc: 681b ldr r3, [r3, #0] + 80007ce: 79fa ldrb r2, [r7, #7] + 80007d0: 0112 lsls r2, r2, #4 + 80007d2: 4611 mov r1, r2 + 80007d4: 4a08 ldr r2, [pc, #32] ; (80007f8 ) + 80007d6: 430b orrs r3, r1 + 80007d8: 6013 str r3, [r2, #0] + // Reset E + *GPIOC_ODR &= ~(E); + 80007da: 4b06 ldr r3, [pc, #24] ; (80007f4 ) + 80007dc: 681b ldr r3, [r3, #0] + 80007de: 4a05 ldr r2, [pc, #20] ; (80007f4 ) + 80007e0: f423 6380 bic.w r3, r3, #1024 ; 0x400 + 80007e4: 6013 str r3, [r2, #0] + delay_us(37); + 80007e6: 2025 movs r0, #37 ; 0x25 + 80007e8: f7ff fd98 bl 800031c +} + 80007ec: bf00 nop + 80007ee: 3708 adds r7, #8 + 80007f0: 46bd mov sp, r7 + 80007f2: bd80 pop {r7, pc} + 80007f4: 40020814 .word 0x40020814 + 80007f8: 40020014 .word 0x40020014 + +080007fc : + +void lcd_init(){ + 80007fc: b580 push {r7, lr} + 80007fe: af00 add r7, sp, #0 + +// Port Setup + // Enable GPIO A and C in RCC + *RCC_AHB1ENR |= (GPIOAEN||GPIOCEN); + 8000800: 4b22 ldr r3, [pc, #136] ; (800088c ) + 8000802: 681b ldr r3, [r3, #0] + 8000804: 4a21 ldr r2, [pc, #132] ; (800088c ) + 8000806: f043 0301 orr.w r3, r3, #1 + 800080a: 6013 str r3, [r2, #0] + // Set DB pins to outputs + *GPIOA_MODER &= ~(0xFFFF<<8); + 800080c: 4b20 ldr r3, [pc, #128] ; (8000890 ) + 800080e: 681b ldr r3, [r3, #0] + 8000810: 4a1f ldr r2, [pc, #124] ; (8000890 ) + 8000812: f423 037f bic.w r3, r3, #16711680 ; 0xff0000 + 8000816: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 800081a: 6013 str r3, [r2, #0] + *GPIOA_MODER |= (0x5555<<8); + 800081c: 4b1c ldr r3, [pc, #112] ; (8000890 ) + 800081e: 681b ldr r3, [r3, #0] + 8000820: 4a1b ldr r2, [pc, #108] ; (8000890 ) + 8000822: f443 03aa orr.w r3, r3, #5570560 ; 0x550000 + 8000826: f443 43aa orr.w r3, r3, #21760 ; 0x5500 + 800082a: 6013 str r3, [r2, #0] + // Set RS, RW, and E pins to outputs + *GPIOC_MODER &= ~(0x3F<<16); + 800082c: 4b19 ldr r3, [pc, #100] ; (8000894 ) + 800082e: 681b ldr r3, [r3, #0] + 8000830: 4a18 ldr r2, [pc, #96] ; (8000894 ) + 8000832: f423 137c bic.w r3, r3, #4128768 ; 0x3f0000 + 8000836: 6013 str r3, [r2, #0] + *GPIOC_MODER |= (0x15<<16); + 8000838: 4b16 ldr r3, [pc, #88] ; (8000894 ) + 800083a: 681b ldr r3, [r3, #0] + 800083c: 4a15 ldr r2, [pc, #84] ; (8000894 ) + 800083e: f443 13a8 orr.w r3, r3, #1376256 ; 0x150000 + 8000842: 6013 str r3, [r2, #0] + // Delay for 40 ms + delay_ms(40); + 8000844: 2028 movs r0, #40 ; 0x28 + 8000846: f7ff fd33 bl 80002b0 + +// Display Setup + // Write Function Set + writeInstruction(FUNCTION_SET); + 800084a: 2038 movs r0, #56 ; 0x38 + 800084c: f7ff ff5e bl 800070c + delay_us(37); + 8000850: 2025 movs r0, #37 ; 0x25 + 8000852: f7ff fd63 bl 800031c + // Write Function Set + writeInstruction(FUNCTION_SET); + 8000856: 2038 movs r0, #56 ; 0x38 + 8000858: f7ff ff58 bl 800070c + delay_us(37); + 800085c: 2025 movs r0, #37 ; 0x25 + 800085e: f7ff fd5d bl 800031c + // Write Display On + writeInstruction(DISPLAY_TOGGLE); + 8000862: 200f movs r0, #15 + 8000864: f7ff ff52 bl 800070c + delay_us(37); + 8000868: 2025 movs r0, #37 ; 0x25 + 800086a: f7ff fd57 bl 800031c + // Write Display Clear + writeInstruction(DISPLAY_CLEAR); + 800086e: 2001 movs r0, #1 + 8000870: f7ff ff4c bl 800070c + delay_ms(2); + 8000874: 2002 movs r0, #2 + 8000876: f7ff fd1b bl 80002b0 + // Write Entry Mode Set + writeInstruction(ENTRY_MODE_SET); + 800087a: 2006 movs r0, #6 + 800087c: f7ff ff46 bl 800070c + delay_us(37); + 8000880: 2025 movs r0, #37 ; 0x25 + 8000882: f7ff fd4b bl 800031c + +} + 8000886: bf00 nop + 8000888: bd80 pop {r7, pc} + 800088a: bf00 nop + 800088c: 40023830 .word 0x40023830 + 8000890: 40020000 .word 0x40020000 + 8000894: 40020800 .word 0x40020800 + +08000898 : + +void lcd_clear(){ + 8000898: b580 push {r7, lr} + 800089a: af00 add r7, sp, #0 + writeInstruction(DISPLAY_CLEAR); + 800089c: 2001 movs r0, #1 + 800089e: f7ff ff35 bl 800070c + delay_ms(2); + 80008a2: 2002 movs r0, #2 + 80008a4: f7ff fd04 bl 80002b0 +} + 80008a8: bf00 nop + 80008aa: bd80 pop {r7, pc} + +080008ac : +void lcd_home() { + writeInstruction(0x80); + delay_ms(2); +} + +void lcd_set_position(uint8_t posIndex) { + 80008ac: b580 push {r7, lr} + 80008ae: b084 sub sp, #16 + 80008b0: af00 add r7, sp, #0 + 80008b2: 4603 mov r3, r0 + 80008b4: 71fb strb r3, [r7, #7] + posIndex--; + 80008b6: 79fb ldrb r3, [r7, #7] + 80008b8: 3b01 subs r3, #1 + 80008ba: 71fb strb r3, [r7, #7] + int inst = 0x80; + 80008bc: 2380 movs r3, #128 ; 0x80 + 80008be: 60fb str r3, [r7, #12] + if (posIndex > 15) { + 80008c0: 79fb ldrb r3, [r7, #7] + 80008c2: 2b0f cmp r3, #15 + 80008c4: d906 bls.n 80008d4 + inst |= (1<<6); + 80008c6: 68fb ldr r3, [r7, #12] + 80008c8: f043 0340 orr.w r3, r3, #64 ; 0x40 + 80008cc: 60fb str r3, [r7, #12] + posIndex -= 16; + 80008ce: 79fb ldrb r3, [r7, #7] + 80008d0: 3b10 subs r3, #16 + 80008d2: 71fb strb r3, [r7, #7] + } + inst |= posIndex; + 80008d4: 79fb ldrb r3, [r7, #7] + 80008d6: 68fa ldr r2, [r7, #12] + 80008d8: 4313 orrs r3, r2 + 80008da: 60fb str r3, [r7, #12] + writeInstruction(inst); + 80008dc: 68fb ldr r3, [r7, #12] + 80008de: b2db uxtb r3, r3 + 80008e0: 4618 mov r0, r3 + 80008e2: f7ff ff13 bl 800070c +} + 80008e6: bf00 nop + 80008e8: 3710 adds r7, #16 + 80008ea: 46bd mov sp, r7 + 80008ec: bd80 pop {r7, pc} + +080008ee : + +int lcd_print_string(char* str) { + 80008ee: b580 push {r7, lr} + 80008f0: b084 sub sp, #16 + 80008f2: af00 add r7, sp, #0 + 80008f4: 6078 str r0, [r7, #4] + int index = 0; + 80008f6: 2300 movs r3, #0 + 80008f8: 60fb str r3, [r7, #12] + while (str[index] != 0x00) { + 80008fa: e009 b.n 8000910 + writeData(str[index]); + 80008fc: 68fb ldr r3, [r7, #12] + 80008fe: 687a ldr r2, [r7, #4] + 8000900: 4413 add r3, r2 + 8000902: 781b ldrb r3, [r3, #0] + 8000904: 4618 mov r0, r3 + 8000906: f7ff ff3d bl 8000784 + index++; + 800090a: 68fb ldr r3, [r7, #12] + 800090c: 3301 adds r3, #1 + 800090e: 60fb str r3, [r7, #12] + while (str[index] != 0x00) { + 8000910: 68fb ldr r3, [r7, #12] + 8000912: 687a ldr r2, [r7, #4] + 8000914: 4413 add r3, r2 + 8000916: 781b ldrb r3, [r3, #0] + 8000918: 2b00 cmp r3, #0 + 800091a: d1ef bne.n 80008fc + } + return index; + 800091c: 68fb ldr r3, [r7, #12] +} + 800091e: 4618 mov r0, r3 + 8000920: 3710 adds r7, #16 + 8000922: 46bd mov sp, r7 + 8000924: bd80 pop {r7, pc} + +08000926 : + +void lcd_print_char(char c) { + 8000926: b580 push {r7, lr} + 8000928: b082 sub sp, #8 + 800092a: af00 add r7, sp, #0 + 800092c: 4603 mov r3, r0 + 800092e: 71fb strb r3, [r7, #7] + writeData(c); + 8000930: 79fb ldrb r3, [r7, #7] + 8000932: 4618 mov r0, r3 + 8000934: f7ff ff26 bl 8000784 +} + 8000938: bf00 nop + 800093a: 3708 adds r7, #8 + 800093c: 46bd mov sp, r7 + 800093e: bd80 pop {r7, pc} + +08000940 : + + +int lcd_print_num(int i){ + 8000940: b580 push {r7, lr} + 8000942: b088 sub sp, #32 + 8000944: af00 add r7, sp, #0 + 8000946: 6078 str r0, [r7, #4] + char numString[17]; + sprintf(numString, "%d", i); + 8000948: f107 030c add.w r3, r7, #12 + 800094c: 687a ldr r2, [r7, #4] + 800094e: 4907 ldr r1, [pc, #28] ; (800096c ) + 8000950: 4618 mov r0, r3 + 8000952: f000 f997 bl 8000c84 + return lcd_print_string(numString); + 8000956: f107 030c add.w r3, r7, #12 + 800095a: 4618 mov r0, r3 + 800095c: f7ff ffc7 bl 80008ee + 8000960: 4603 mov r3, r0 +} + 8000962: 4618 mov r0, r3 + 8000964: 3720 adds r7, #32 + 8000966: 46bd mov sp, r7 + 8000968: bd80 pop {r7, pc} + 800096a: bf00 nop + 800096c: 08001514 .word 0x08001514 + +08000970 : +char mathKeys[] = {'1','2','3','+','4','5','6','-','7','8','9','x','*','0','=','/'}; +char mathNums[] = {'1','2','3','_','4','5','6','_','7','8','9','_','_','0','_','_'}; +char mathOper[] = {'_','_','_','+','_','_','_','-','_','_','_','x','*','_','_','/'}; +char calculation[5]; + +void calculate(int operand1, int operand2, char operation) { + 8000970: b5b0 push {r4, r5, r7, lr} + 8000972: b08a sub sp, #40 ; 0x28 + 8000974: af00 add r7, sp, #0 + 8000976: 60f8 str r0, [r7, #12] + 8000978: 60b9 str r1, [r7, #8] + 800097a: 4613 mov r3, r2 + 800097c: 71fb strb r3, [r7, #7] + int result; + switch (operation) { + 800097e: 79fb ldrb r3, [r7, #7] + 8000980: 2b78 cmp r3, #120 ; 0x78 + 8000982: d010 beq.n 80009a6 + 8000984: 2b78 cmp r3, #120 ; 0x78 + 8000986: dc14 bgt.n 80009b2 + 8000988: 2b2b cmp r3, #43 ; 0x2b + 800098a: d002 beq.n 8000992 + 800098c: 2b2d cmp r3, #45 ; 0x2d + 800098e: d005 beq.n 800099c + 8000990: e00f b.n 80009b2 + case '+': + result = operand1 + operand2; + 8000992: 68fa ldr r2, [r7, #12] + 8000994: 68bb ldr r3, [r7, #8] + 8000996: 4413 add r3, r2 + 8000998: 627b str r3, [r7, #36] ; 0x24 + break; + 800099a: e022 b.n 80009e2 + case '-': + result = operand1 - operand2; + 800099c: 68fa ldr r2, [r7, #12] + 800099e: 68bb ldr r3, [r7, #8] + 80009a0: 1ad3 subs r3, r2, r3 + 80009a2: 627b str r3, [r7, #36] ; 0x24 + break; + 80009a4: e01d b.n 80009e2 + case 'x': + result = operand1 * operand2; + 80009a6: 68fb ldr r3, [r7, #12] + 80009a8: 68ba ldr r2, [r7, #8] + 80009aa: fb02 f303 mul.w r3, r2, r3 + 80009ae: 627b str r3, [r7, #36] ; 0x24 + break; + 80009b0: e017 b.n 80009e2 + default: + if (operand2 == 0) { + 80009b2: 68bb ldr r3, [r7, #8] + 80009b4: 2b00 cmp r3, #0 + 80009b6: d10f bne.n 80009d8 + lcd_clear(); + 80009b8: f7ff ff6e bl 8000898 + char divError[] = " Err: Undefined "; + 80009bc: 4b0c ldr r3, [pc, #48] ; (80009f0 ) + 80009be: f107 0410 add.w r4, r7, #16 + 80009c2: 461d mov r5, r3 + 80009c4: cd0f ldmia r5!, {r0, r1, r2, r3} + 80009c6: c40f stmia r4!, {r0, r1, r2, r3} + 80009c8: 682b ldr r3, [r5, #0] + 80009ca: 7023 strb r3, [r4, #0] + lcd_print_string(divError); + 80009cc: f107 0310 add.w r3, r7, #16 + 80009d0: 4618 mov r0, r3 + 80009d2: f7ff ff8c bl 80008ee + 80009d6: e007 b.n 80009e8 + return; + } else { + result = operand1 / operand2; + 80009d8: 68fa ldr r2, [r7, #12] + 80009da: 68bb ldr r3, [r7, #8] + 80009dc: fb92 f3f3 sdiv r3, r2, r3 + 80009e0: 627b str r3, [r7, #36] ; 0x24 + } + } + lcd_print_num(result); + 80009e2: 6a78 ldr r0, [r7, #36] ; 0x24 + 80009e4: f7ff ffac bl 8000940 +} + 80009e8: 3728 adds r7, #40 ; 0x28 + 80009ea: 46bd mov sp, r7 + 80009ec: bdb0 pop {r4, r5, r7, pc} + 80009ee: bf00 nop + 80009f0: 08001518 .word 0x08001518 + +080009f4 : + +void inputSequence() { + 80009f4: b580 push {r7, lr} + 80009f6: b082 sub sp, #8 + 80009f8: af00 add r7, sp, #0 + int currentKeyIndex; + lcd_clear(); + 80009fa: f7ff ff4d bl 8000898 + int seqIndex = 0; + 80009fe: 2300 movs r3, #0 + 8000a00: 607b str r3, [r7, #4] + + // While key != number, getKey + do { + currentKeyIndex = keypad_getKey()-1; + 8000a02: f7ff fe63 bl 80006cc + 8000a06: 4603 mov r3, r0 + 8000a08: 3b01 subs r3, #1 + 8000a0a: 603b str r3, [r7, #0] + if (mathKeys[currentKeyIndex] == '*') { + 8000a0c: 4a5c ldr r2, [pc, #368] ; (8000b80 ) + 8000a0e: 683b ldr r3, [r7, #0] + 8000a10: 4413 add r3, r2 + 8000a12: 781b ldrb r3, [r3, #0] + 8000a14: 2b2a cmp r3, #42 ; 0x2a + 8000a16: f000 80a9 beq.w 8000b6c + return; + } + } while (mathKeys[currentKeyIndex] != mathNums[currentKeyIndex]); + 8000a1a: 4a59 ldr r2, [pc, #356] ; (8000b80 ) + 8000a1c: 683b ldr r3, [r7, #0] + 8000a1e: 4413 add r3, r2 + 8000a20: 781a ldrb r2, [r3, #0] + 8000a22: 4958 ldr r1, [pc, #352] ; (8000b84 ) + 8000a24: 683b ldr r3, [r7, #0] + 8000a26: 440b add r3, r1 + 8000a28: 781b ldrb r3, [r3, #0] + 8000a2a: 429a cmp r2, r3 + 8000a2c: d1e9 bne.n 8000a02 + calculation[seqIndex] = mathKeys[currentKeyIndex]; + 8000a2e: 4a54 ldr r2, [pc, #336] ; (8000b80 ) + 8000a30: 683b ldr r3, [r7, #0] + 8000a32: 4413 add r3, r2 + 8000a34: 7819 ldrb r1, [r3, #0] + 8000a36: 4a54 ldr r2, [pc, #336] ; (8000b88 ) + 8000a38: 687b ldr r3, [r7, #4] + 8000a3a: 4413 add r3, r2 + 8000a3c: 460a mov r2, r1 + 8000a3e: 701a strb r2, [r3, #0] + lcd_print_char(mathKeys[currentKeyIndex]); + 8000a40: 4a4f ldr r2, [pc, #316] ; (8000b80 ) + 8000a42: 683b ldr r3, [r7, #0] + 8000a44: 4413 add r3, r2 + 8000a46: 781b ldrb r3, [r3, #0] + 8000a48: 4618 mov r0, r3 + 8000a4a: f7ff ff6c bl 8000926 + seqIndex++; + 8000a4e: 687b ldr r3, [r7, #4] + 8000a50: 3301 adds r3, #1 + 8000a52: 607b str r3, [r7, #4] + + // While key != operation, getKey + do { + currentKeyIndex = keypad_getKey()-1; + 8000a54: f7ff fe3a bl 80006cc + 8000a58: 4603 mov r3, r0 + 8000a5a: 3b01 subs r3, #1 + 8000a5c: 603b str r3, [r7, #0] + if(mathKeys[currentKeyIndex] == '*') { + 8000a5e: 4a48 ldr r2, [pc, #288] ; (8000b80 ) + 8000a60: 683b ldr r3, [r7, #0] + 8000a62: 4413 add r3, r2 + 8000a64: 781b ldrb r3, [r3, #0] + 8000a66: 2b2a cmp r3, #42 ; 0x2a + 8000a68: f000 8082 beq.w 8000b70 + return; + } + } while (mathKeys[currentKeyIndex] != mathOper[currentKeyIndex]); + 8000a6c: 4a44 ldr r2, [pc, #272] ; (8000b80 ) + 8000a6e: 683b ldr r3, [r7, #0] + 8000a70: 4413 add r3, r2 + 8000a72: 781a ldrb r2, [r3, #0] + 8000a74: 4945 ldr r1, [pc, #276] ; (8000b8c ) + 8000a76: 683b ldr r3, [r7, #0] + 8000a78: 440b add r3, r1 + 8000a7a: 781b ldrb r3, [r3, #0] + 8000a7c: 429a cmp r2, r3 + 8000a7e: d1e9 bne.n 8000a54 + calculation[seqIndex] = mathKeys[currentKeyIndex]; + 8000a80: 4a3f ldr r2, [pc, #252] ; (8000b80 ) + 8000a82: 683b ldr r3, [r7, #0] + 8000a84: 4413 add r3, r2 + 8000a86: 7819 ldrb r1, [r3, #0] + 8000a88: 4a3f ldr r2, [pc, #252] ; (8000b88 ) + 8000a8a: 687b ldr r3, [r7, #4] + 8000a8c: 4413 add r3, r2 + 8000a8e: 460a mov r2, r1 + 8000a90: 701a strb r2, [r3, #0] + lcd_print_char(mathKeys[currentKeyIndex]); + 8000a92: 4a3b ldr r2, [pc, #236] ; (8000b80 ) + 8000a94: 683b ldr r3, [r7, #0] + 8000a96: 4413 add r3, r2 + 8000a98: 781b ldrb r3, [r3, #0] + 8000a9a: 4618 mov r0, r3 + 8000a9c: f7ff ff43 bl 8000926 + seqIndex++; + 8000aa0: 687b ldr r3, [r7, #4] + 8000aa2: 3301 adds r3, #1 + 8000aa4: 607b str r3, [r7, #4] + + // While key != number, getKey + do { + currentKeyIndex = keypad_getKey()-1; + 8000aa6: f7ff fe11 bl 80006cc + 8000aaa: 4603 mov r3, r0 + 8000aac: 3b01 subs r3, #1 + 8000aae: 603b str r3, [r7, #0] + if(mathKeys[currentKeyIndex] == '*') { + 8000ab0: 4a33 ldr r2, [pc, #204] ; (8000b80 ) + 8000ab2: 683b ldr r3, [r7, #0] + 8000ab4: 4413 add r3, r2 + 8000ab6: 781b ldrb r3, [r3, #0] + 8000ab8: 2b2a cmp r3, #42 ; 0x2a + 8000aba: d05b beq.n 8000b74 + return; + } + } while (mathKeys[currentKeyIndex] != mathNums[currentKeyIndex]); + 8000abc: 4a30 ldr r2, [pc, #192] ; (8000b80 ) + 8000abe: 683b ldr r3, [r7, #0] + 8000ac0: 4413 add r3, r2 + 8000ac2: 781a ldrb r2, [r3, #0] + 8000ac4: 492f ldr r1, [pc, #188] ; (8000b84 ) + 8000ac6: 683b ldr r3, [r7, #0] + 8000ac8: 440b add r3, r1 + 8000aca: 781b ldrb r3, [r3, #0] + 8000acc: 429a cmp r2, r3 + 8000ace: d1ea bne.n 8000aa6 + calculation[seqIndex] = mathKeys[currentKeyIndex]; + 8000ad0: 4a2b ldr r2, [pc, #172] ; (8000b80 ) + 8000ad2: 683b ldr r3, [r7, #0] + 8000ad4: 4413 add r3, r2 + 8000ad6: 7819 ldrb r1, [r3, #0] + 8000ad8: 4a2b ldr r2, [pc, #172] ; (8000b88 ) + 8000ada: 687b ldr r3, [r7, #4] + 8000adc: 4413 add r3, r2 + 8000ade: 460a mov r2, r1 + 8000ae0: 701a strb r2, [r3, #0] + lcd_print_char(mathKeys[currentKeyIndex]); + 8000ae2: 4a27 ldr r2, [pc, #156] ; (8000b80 ) + 8000ae4: 683b ldr r3, [r7, #0] + 8000ae6: 4413 add r3, r2 + 8000ae8: 781b ldrb r3, [r3, #0] + 8000aea: 4618 mov r0, r3 + 8000aec: f7ff ff1b bl 8000926 + seqIndex++; + 8000af0: 687b ldr r3, [r7, #4] + 8000af2: 3301 adds r3, #1 + 8000af4: 607b str r3, [r7, #4] + + // While key != '=' + do { + currentKeyIndex = keypad_getKey()-1; + 8000af6: f7ff fde9 bl 80006cc + 8000afa: 4603 mov r3, r0 + 8000afc: 3b01 subs r3, #1 + 8000afe: 603b str r3, [r7, #0] + if(mathKeys[currentKeyIndex] == '*') { + 8000b00: 4a1f ldr r2, [pc, #124] ; (8000b80 ) + 8000b02: 683b ldr r3, [r7, #0] + 8000b04: 4413 add r3, r2 + 8000b06: 781b ldrb r3, [r3, #0] + 8000b08: 2b2a cmp r3, #42 ; 0x2a + 8000b0a: d035 beq.n 8000b78 + return; + } + } while (mathKeys[currentKeyIndex] != '='); + 8000b0c: 4a1c ldr r2, [pc, #112] ; (8000b80 ) + 8000b0e: 683b ldr r3, [r7, #0] + 8000b10: 4413 add r3, r2 + 8000b12: 781b ldrb r3, [r3, #0] + 8000b14: 2b3d cmp r3, #61 ; 0x3d + 8000b16: d1ee bne.n 8000af6 + lcd_print_char(mathKeys[currentKeyIndex]); + 8000b18: 4a19 ldr r2, [pc, #100] ; (8000b80 ) + 8000b1a: 683b ldr r3, [r7, #0] + 8000b1c: 4413 add r3, r2 + 8000b1e: 781b ldrb r3, [r3, #0] + 8000b20: 4618 mov r0, r3 + 8000b22: f7ff ff00 bl 8000926 + // Calculate + calculate(calculation[0] -= '0', calculation[2] -= '0', calculation[1]); + 8000b26: 4b18 ldr r3, [pc, #96] ; (8000b88 ) + 8000b28: 781b ldrb r3, [r3, #0] + 8000b2a: 3b30 subs r3, #48 ; 0x30 + 8000b2c: b2da uxtb r2, r3 + 8000b2e: 4b16 ldr r3, [pc, #88] ; (8000b88 ) + 8000b30: 701a strb r2, [r3, #0] + 8000b32: 4b15 ldr r3, [pc, #84] ; (8000b88 ) + 8000b34: 781b ldrb r3, [r3, #0] + 8000b36: 4618 mov r0, r3 + 8000b38: 4b13 ldr r3, [pc, #76] ; (8000b88 ) + 8000b3a: 789b ldrb r3, [r3, #2] + 8000b3c: 3b30 subs r3, #48 ; 0x30 + 8000b3e: b2da uxtb r2, r3 + 8000b40: 4b11 ldr r3, [pc, #68] ; (8000b88 ) + 8000b42: 709a strb r2, [r3, #2] + 8000b44: 4b10 ldr r3, [pc, #64] ; (8000b88 ) + 8000b46: 789b ldrb r3, [r3, #2] + 8000b48: 4619 mov r1, r3 + 8000b4a: 4b0f ldr r3, [pc, #60] ; (8000b88 ) + 8000b4c: 785b ldrb r3, [r3, #1] + 8000b4e: 461a mov r2, r3 + 8000b50: f7ff ff0e bl 8000970 + do { + currentKeyIndex = keypad_getKey()-1; + 8000b54: f7ff fdba bl 80006cc + 8000b58: 4603 mov r3, r0 + 8000b5a: 3b01 subs r3, #1 + 8000b5c: 603b str r3, [r7, #0] + } while (mathKeys[currentKeyIndex] != '*'); + 8000b5e: 4a08 ldr r2, [pc, #32] ; (8000b80 ) + 8000b60: 683b ldr r3, [r7, #0] + 8000b62: 4413 add r3, r2 + 8000b64: 781b ldrb r3, [r3, #0] + 8000b66: 2b2a cmp r3, #42 ; 0x2a + 8000b68: d1f4 bne.n 8000b54 + 8000b6a: e006 b.n 8000b7a + return; + 8000b6c: bf00 nop + 8000b6e: e004 b.n 8000b7a + return; + 8000b70: bf00 nop + 8000b72: e002 b.n 8000b7a + return; + 8000b74: bf00 nop + 8000b76: e000 b.n 8000b7a + return; + 8000b78: bf00 nop +} + 8000b7a: 3708 adds r7, #8 + 8000b7c: 46bd mov sp, r7 + 8000b7e: bd80 pop {r7, pc} + 8000b80: 20000000 .word 0x20000000 + 8000b84: 20000010 .word 0x20000010 + 8000b88: 200000bc .word 0x200000bc + 8000b8c: 20000020 .word 0x20000020 + +08000b90
: + +// main +int main(){ + 8000b90: b5b0 push {r4, r5, r7, lr} + 8000b92: b08a sub sp, #40 ; 0x28 + 8000b94: af00 add r7, sp, #0 + + // Initialize Components + keypad_init(); + 8000b96: f7ff fbf7 bl 8000388 + lcd_init(); + 8000b9a: f7ff fe2f bl 80007fc + + // Prompt Message + char prompt1[]= "+- Calculator x/"; + 8000b9e: 4b10 ldr r3, [pc, #64] ; (8000be0 ) + 8000ba0: f107 0414 add.w r4, r7, #20 + 8000ba4: 461d mov r5, r3 + 8000ba6: cd0f ldmia r5!, {r0, r1, r2, r3} + 8000ba8: c40f stmia r4!, {r0, r1, r2, r3} + 8000baa: 682b ldr r3, [r5, #0] + 8000bac: 7023 strb r3, [r4, #0] + char prompt2[]= " Push any key "; + 8000bae: 4b0d ldr r3, [pc, #52] ; (8000be4 ) + 8000bb0: 463c mov r4, r7 + 8000bb2: 461d mov r5, r3 + 8000bb4: cd0f ldmia r5!, {r0, r1, r2, r3} + 8000bb6: c40f stmia r4!, {r0, r1, r2, r3} + 8000bb8: 682b ldr r3, [r5, #0] + 8000bba: 7023 strb r3, [r4, #0] + lcd_print_string(prompt1); + 8000bbc: f107 0314 add.w r3, r7, #20 + 8000bc0: 4618 mov r0, r3 + 8000bc2: f7ff fe94 bl 80008ee + lcd_set_position(17); + 8000bc6: 2011 movs r0, #17 + 8000bc8: f7ff fe70 bl 80008ac + lcd_print_string(prompt2); + 8000bcc: 463b mov r3, r7 + 8000bce: 4618 mov r0, r3 + 8000bd0: f7ff fe8d bl 80008ee + keypad_getKey(); + 8000bd4: f7ff fd7a bl 80006cc + + while(1) { + inputSequence(); + 8000bd8: f7ff ff0c bl 80009f4 + 8000bdc: e7fc b.n 8000bd8 + 8000bde: bf00 nop + 8000be0: 0800152c .word 0x0800152c + 8000be4: 08001540 .word 0x08001540 + +08000be8 : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 8000be8: 480d ldr r0, [pc, #52] ; (8000c20 ) + mov sp, r0 /* set stack pointer */ + 8000bea: 4685 mov sp, r0 + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8000bec: 480d ldr r0, [pc, #52] ; (8000c24 ) + ldr r1, =_edata + 8000bee: 490e ldr r1, [pc, #56] ; (8000c28 ) + ldr r2, =_sidata + 8000bf0: 4a0e ldr r2, [pc, #56] ; (8000c2c ) + movs r3, #0 + 8000bf2: 2300 movs r3, #0 + b LoopCopyDataInit + 8000bf4: e002 b.n 8000bfc + +08000bf6 : + +CopyDataInit: + ldr r4, [r2, r3] + 8000bf6: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8000bf8: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8000bfa: 3304 adds r3, #4 + +08000bfc : + +LoopCopyDataInit: + adds r4, r0, r3 + 8000bfc: 18c4 adds r4, r0, r3 + cmp r4, r1 + 8000bfe: 428c cmp r4, r1 + bcc CopyDataInit + 8000c00: d3f9 bcc.n 8000bf6 + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 8000c02: 4a0b ldr r2, [pc, #44] ; (8000c30 ) + ldr r4, =_ebss + 8000c04: 4c0b ldr r4, [pc, #44] ; (8000c34 ) + movs r3, #0 + 8000c06: 2300 movs r3, #0 + b LoopFillZerobss + 8000c08: e001 b.n 8000c0e + +08000c0a : + +FillZerobss: + str r3, [r2] + 8000c0a: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8000c0c: 3204 adds r2, #4 + +08000c0e : + +LoopFillZerobss: + cmp r2, r4 + 8000c0e: 42a2 cmp r2, r4 + bcc FillZerobss + 8000c10: d3fb bcc.n 8000c0a + +/* Call the clock system intitialization function.*/ + bl SystemInit + 8000c12: f3af 8000 nop.w +/* Call static constructors */ + bl __libc_init_array + 8000c16: f000 f811 bl 8000c3c <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8000c1a: f7ff ffb9 bl 8000b90
+ +08000c1e : + +LoopForever: + b LoopForever + 8000c1e: e7fe b.n 8000c1e + ldr r0, =_estack + 8000c20: 20020000 .word 0x20020000 + ldr r0, =_sdata + 8000c24: 20000000 .word 0x20000000 + ldr r1, =_edata + 8000c28: 20000094 .word 0x20000094 + ldr r2, =_sidata + 8000c2c: 0800158c .word 0x0800158c + ldr r2, =_sbss + 8000c30: 20000094 .word 0x20000094 + ldr r4, =_ebss + 8000c34: 200000d4 .word 0x200000d4 + +08000c38 : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8000c38: e7fe b.n 8000c38 + ... + +08000c3c <__libc_init_array>: + 8000c3c: b570 push {r4, r5, r6, lr} + 8000c3e: 4d0d ldr r5, [pc, #52] ; (8000c74 <__libc_init_array+0x38>) + 8000c40: 4c0d ldr r4, [pc, #52] ; (8000c78 <__libc_init_array+0x3c>) + 8000c42: 1b64 subs r4, r4, r5 + 8000c44: 10a4 asrs r4, r4, #2 + 8000c46: 2600 movs r6, #0 + 8000c48: 42a6 cmp r6, r4 + 8000c4a: d109 bne.n 8000c60 <__libc_init_array+0x24> + 8000c4c: 4d0b ldr r5, [pc, #44] ; (8000c7c <__libc_init_array+0x40>) + 8000c4e: 4c0c ldr r4, [pc, #48] ; (8000c80 <__libc_init_array+0x44>) + 8000c50: f000 fc54 bl 80014fc <_init> + 8000c54: 1b64 subs r4, r4, r5 + 8000c56: 10a4 asrs r4, r4, #2 + 8000c58: 2600 movs r6, #0 + 8000c5a: 42a6 cmp r6, r4 + 8000c5c: d105 bne.n 8000c6a <__libc_init_array+0x2e> + 8000c5e: bd70 pop {r4, r5, r6, pc} + 8000c60: f855 3b04 ldr.w r3, [r5], #4 + 8000c64: 4798 blx r3 + 8000c66: 3601 adds r6, #1 + 8000c68: e7ee b.n 8000c48 <__libc_init_array+0xc> + 8000c6a: f855 3b04 ldr.w r3, [r5], #4 + 8000c6e: 4798 blx r3 + 8000c70: 3601 adds r6, #1 + 8000c72: e7f2 b.n 8000c5a <__libc_init_array+0x1e> + 8000c74: 08001584 .word 0x08001584 + 8000c78: 08001584 .word 0x08001584 + 8000c7c: 08001584 .word 0x08001584 + 8000c80: 08001588 .word 0x08001588 + +08000c84 : + 8000c84: b40e push {r1, r2, r3} + 8000c86: b500 push {lr} + 8000c88: b09c sub sp, #112 ; 0x70 + 8000c8a: ab1d add r3, sp, #116 ; 0x74 + 8000c8c: 9002 str r0, [sp, #8] + 8000c8e: 9006 str r0, [sp, #24] + 8000c90: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8000c94: 4809 ldr r0, [pc, #36] ; (8000cbc ) + 8000c96: 9107 str r1, [sp, #28] + 8000c98: 9104 str r1, [sp, #16] + 8000c9a: 4909 ldr r1, [pc, #36] ; (8000cc0 ) + 8000c9c: f853 2b04 ldr.w r2, [r3], #4 + 8000ca0: 9105 str r1, [sp, #20] + 8000ca2: 6800 ldr r0, [r0, #0] + 8000ca4: 9301 str r3, [sp, #4] + 8000ca6: a902 add r1, sp, #8 + 8000ca8: f000 f868 bl 8000d7c <_svfiprintf_r> + 8000cac: 9b02 ldr r3, [sp, #8] + 8000cae: 2200 movs r2, #0 + 8000cb0: 701a strb r2, [r3, #0] + 8000cb2: b01c add sp, #112 ; 0x70 + 8000cb4: f85d eb04 ldr.w lr, [sp], #4 + 8000cb8: b003 add sp, #12 + 8000cba: 4770 bx lr + 8000cbc: 20000030 .word 0x20000030 + 8000cc0: ffff0208 .word 0xffff0208 + +08000cc4 <__ssputs_r>: + 8000cc4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8000cc8: 688e ldr r6, [r1, #8] + 8000cca: 429e cmp r6, r3 + 8000ccc: 4682 mov sl, r0 + 8000cce: 460c mov r4, r1 + 8000cd0: 4690 mov r8, r2 + 8000cd2: 461f mov r7, r3 + 8000cd4: d838 bhi.n 8000d48 <__ssputs_r+0x84> + 8000cd6: 898a ldrh r2, [r1, #12] + 8000cd8: f412 6f90 tst.w r2, #1152 ; 0x480 + 8000cdc: d032 beq.n 8000d44 <__ssputs_r+0x80> + 8000cde: 6825 ldr r5, [r4, #0] + 8000ce0: 6909 ldr r1, [r1, #16] + 8000ce2: eba5 0901 sub.w r9, r5, r1 + 8000ce6: 6965 ldr r5, [r4, #20] + 8000ce8: eb05 0545 add.w r5, r5, r5, lsl #1 + 8000cec: eb05 75d5 add.w r5, r5, r5, lsr #31 + 8000cf0: 3301 adds r3, #1 + 8000cf2: 444b add r3, r9 + 8000cf4: 106d asrs r5, r5, #1 + 8000cf6: 429d cmp r5, r3 + 8000cf8: bf38 it cc + 8000cfa: 461d movcc r5, r3 + 8000cfc: 0553 lsls r3, r2, #21 + 8000cfe: d531 bpl.n 8000d64 <__ssputs_r+0xa0> + 8000d00: 4629 mov r1, r5 + 8000d02: f000 fb47 bl 8001394 <_malloc_r> + 8000d06: 4606 mov r6, r0 + 8000d08: b950 cbnz r0, 8000d20 <__ssputs_r+0x5c> + 8000d0a: 230c movs r3, #12 + 8000d0c: f8ca 3000 str.w r3, [sl] + 8000d10: 89a3 ldrh r3, [r4, #12] + 8000d12: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8000d16: 81a3 strh r3, [r4, #12] + 8000d18: f04f 30ff mov.w r0, #4294967295 + 8000d1c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000d20: 6921 ldr r1, [r4, #16] + 8000d22: 464a mov r2, r9 + 8000d24: f000 fabe bl 80012a4 + 8000d28: 89a3 ldrh r3, [r4, #12] + 8000d2a: f423 6390 bic.w r3, r3, #1152 ; 0x480 + 8000d2e: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8000d32: 81a3 strh r3, [r4, #12] + 8000d34: 6126 str r6, [r4, #16] + 8000d36: 6165 str r5, [r4, #20] + 8000d38: 444e add r6, r9 + 8000d3a: eba5 0509 sub.w r5, r5, r9 + 8000d3e: 6026 str r6, [r4, #0] + 8000d40: 60a5 str r5, [r4, #8] + 8000d42: 463e mov r6, r7 + 8000d44: 42be cmp r6, r7 + 8000d46: d900 bls.n 8000d4a <__ssputs_r+0x86> + 8000d48: 463e mov r6, r7 + 8000d4a: 4632 mov r2, r6 + 8000d4c: 6820 ldr r0, [r4, #0] + 8000d4e: 4641 mov r1, r8 + 8000d50: f000 fab6 bl 80012c0 + 8000d54: 68a3 ldr r3, [r4, #8] + 8000d56: 6822 ldr r2, [r4, #0] + 8000d58: 1b9b subs r3, r3, r6 + 8000d5a: 4432 add r2, r6 + 8000d5c: 60a3 str r3, [r4, #8] + 8000d5e: 6022 str r2, [r4, #0] + 8000d60: 2000 movs r0, #0 + 8000d62: e7db b.n 8000d1c <__ssputs_r+0x58> + 8000d64: 462a mov r2, r5 + 8000d66: f000 fb6f bl 8001448 <_realloc_r> + 8000d6a: 4606 mov r6, r0 + 8000d6c: 2800 cmp r0, #0 + 8000d6e: d1e1 bne.n 8000d34 <__ssputs_r+0x70> + 8000d70: 6921 ldr r1, [r4, #16] + 8000d72: 4650 mov r0, sl + 8000d74: f000 fabe bl 80012f4 <_free_r> + 8000d78: e7c7 b.n 8000d0a <__ssputs_r+0x46> + ... + +08000d7c <_svfiprintf_r>: + 8000d7c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8000d80: 4698 mov r8, r3 + 8000d82: 898b ldrh r3, [r1, #12] + 8000d84: 061b lsls r3, r3, #24 + 8000d86: b09d sub sp, #116 ; 0x74 + 8000d88: 4607 mov r7, r0 + 8000d8a: 460d mov r5, r1 + 8000d8c: 4614 mov r4, r2 + 8000d8e: d50e bpl.n 8000dae <_svfiprintf_r+0x32> + 8000d90: 690b ldr r3, [r1, #16] + 8000d92: b963 cbnz r3, 8000dae <_svfiprintf_r+0x32> + 8000d94: 2140 movs r1, #64 ; 0x40 + 8000d96: f000 fafd bl 8001394 <_malloc_r> + 8000d9a: 6028 str r0, [r5, #0] + 8000d9c: 6128 str r0, [r5, #16] + 8000d9e: b920 cbnz r0, 8000daa <_svfiprintf_r+0x2e> + 8000da0: 230c movs r3, #12 + 8000da2: 603b str r3, [r7, #0] + 8000da4: f04f 30ff mov.w r0, #4294967295 + 8000da8: e0d1 b.n 8000f4e <_svfiprintf_r+0x1d2> + 8000daa: 2340 movs r3, #64 ; 0x40 + 8000dac: 616b str r3, [r5, #20] + 8000dae: 2300 movs r3, #0 + 8000db0: 9309 str r3, [sp, #36] ; 0x24 + 8000db2: 2320 movs r3, #32 + 8000db4: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 8000db8: f8cd 800c str.w r8, [sp, #12] + 8000dbc: 2330 movs r3, #48 ; 0x30 + 8000dbe: f8df 81a8 ldr.w r8, [pc, #424] ; 8000f68 <_svfiprintf_r+0x1ec> + 8000dc2: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 8000dc6: f04f 0901 mov.w r9, #1 + 8000dca: 4623 mov r3, r4 + 8000dcc: 469a mov sl, r3 + 8000dce: f813 2b01 ldrb.w r2, [r3], #1 + 8000dd2: b10a cbz r2, 8000dd8 <_svfiprintf_r+0x5c> + 8000dd4: 2a25 cmp r2, #37 ; 0x25 + 8000dd6: d1f9 bne.n 8000dcc <_svfiprintf_r+0x50> + 8000dd8: ebba 0b04 subs.w fp, sl, r4 + 8000ddc: d00b beq.n 8000df6 <_svfiprintf_r+0x7a> + 8000dde: 465b mov r3, fp + 8000de0: 4622 mov r2, r4 + 8000de2: 4629 mov r1, r5 + 8000de4: 4638 mov r0, r7 + 8000de6: f7ff ff6d bl 8000cc4 <__ssputs_r> + 8000dea: 3001 adds r0, #1 + 8000dec: f000 80aa beq.w 8000f44 <_svfiprintf_r+0x1c8> + 8000df0: 9a09 ldr r2, [sp, #36] ; 0x24 + 8000df2: 445a add r2, fp + 8000df4: 9209 str r2, [sp, #36] ; 0x24 + 8000df6: f89a 3000 ldrb.w r3, [sl] + 8000dfa: 2b00 cmp r3, #0 + 8000dfc: f000 80a2 beq.w 8000f44 <_svfiprintf_r+0x1c8> + 8000e00: 2300 movs r3, #0 + 8000e02: f04f 32ff mov.w r2, #4294967295 + 8000e06: e9cd 2305 strd r2, r3, [sp, #20] + 8000e0a: f10a 0a01 add.w sl, sl, #1 + 8000e0e: 9304 str r3, [sp, #16] + 8000e10: 9307 str r3, [sp, #28] + 8000e12: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 8000e16: 931a str r3, [sp, #104] ; 0x68 + 8000e18: 4654 mov r4, sl + 8000e1a: 2205 movs r2, #5 + 8000e1c: f814 1b01 ldrb.w r1, [r4], #1 + 8000e20: 4851 ldr r0, [pc, #324] ; (8000f68 <_svfiprintf_r+0x1ec>) + 8000e22: f7ff f9f5 bl 8000210 + 8000e26: 9a04 ldr r2, [sp, #16] + 8000e28: b9d8 cbnz r0, 8000e62 <_svfiprintf_r+0xe6> + 8000e2a: 06d0 lsls r0, r2, #27 + 8000e2c: bf44 itt mi + 8000e2e: 2320 movmi r3, #32 + 8000e30: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8000e34: 0711 lsls r1, r2, #28 + 8000e36: bf44 itt mi + 8000e38: 232b movmi r3, #43 ; 0x2b + 8000e3a: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8000e3e: f89a 3000 ldrb.w r3, [sl] + 8000e42: 2b2a cmp r3, #42 ; 0x2a + 8000e44: d015 beq.n 8000e72 <_svfiprintf_r+0xf6> + 8000e46: 9a07 ldr r2, [sp, #28] + 8000e48: 4654 mov r4, sl + 8000e4a: 2000 movs r0, #0 + 8000e4c: f04f 0c0a mov.w ip, #10 + 8000e50: 4621 mov r1, r4 + 8000e52: f811 3b01 ldrb.w r3, [r1], #1 + 8000e56: 3b30 subs r3, #48 ; 0x30 + 8000e58: 2b09 cmp r3, #9 + 8000e5a: d94e bls.n 8000efa <_svfiprintf_r+0x17e> + 8000e5c: b1b0 cbz r0, 8000e8c <_svfiprintf_r+0x110> + 8000e5e: 9207 str r2, [sp, #28] + 8000e60: e014 b.n 8000e8c <_svfiprintf_r+0x110> + 8000e62: eba0 0308 sub.w r3, r0, r8 + 8000e66: fa09 f303 lsl.w r3, r9, r3 + 8000e6a: 4313 orrs r3, r2 + 8000e6c: 9304 str r3, [sp, #16] + 8000e6e: 46a2 mov sl, r4 + 8000e70: e7d2 b.n 8000e18 <_svfiprintf_r+0x9c> + 8000e72: 9b03 ldr r3, [sp, #12] + 8000e74: 1d19 adds r1, r3, #4 + 8000e76: 681b ldr r3, [r3, #0] + 8000e78: 9103 str r1, [sp, #12] + 8000e7a: 2b00 cmp r3, #0 + 8000e7c: bfbb ittet lt + 8000e7e: 425b neglt r3, r3 + 8000e80: f042 0202 orrlt.w r2, r2, #2 + 8000e84: 9307 strge r3, [sp, #28] + 8000e86: 9307 strlt r3, [sp, #28] + 8000e88: bfb8 it lt + 8000e8a: 9204 strlt r2, [sp, #16] + 8000e8c: 7823 ldrb r3, [r4, #0] + 8000e8e: 2b2e cmp r3, #46 ; 0x2e + 8000e90: d10c bne.n 8000eac <_svfiprintf_r+0x130> + 8000e92: 7863 ldrb r3, [r4, #1] + 8000e94: 2b2a cmp r3, #42 ; 0x2a + 8000e96: d135 bne.n 8000f04 <_svfiprintf_r+0x188> + 8000e98: 9b03 ldr r3, [sp, #12] + 8000e9a: 1d1a adds r2, r3, #4 + 8000e9c: 681b ldr r3, [r3, #0] + 8000e9e: 9203 str r2, [sp, #12] + 8000ea0: 2b00 cmp r3, #0 + 8000ea2: bfb8 it lt + 8000ea4: f04f 33ff movlt.w r3, #4294967295 + 8000ea8: 3402 adds r4, #2 + 8000eaa: 9305 str r3, [sp, #20] + 8000eac: f8df a0c8 ldr.w sl, [pc, #200] ; 8000f78 <_svfiprintf_r+0x1fc> + 8000eb0: 7821 ldrb r1, [r4, #0] + 8000eb2: 2203 movs r2, #3 + 8000eb4: 4650 mov r0, sl + 8000eb6: f7ff f9ab bl 8000210 + 8000eba: b140 cbz r0, 8000ece <_svfiprintf_r+0x152> + 8000ebc: 2340 movs r3, #64 ; 0x40 + 8000ebe: eba0 000a sub.w r0, r0, sl + 8000ec2: fa03 f000 lsl.w r0, r3, r0 + 8000ec6: 9b04 ldr r3, [sp, #16] + 8000ec8: 4303 orrs r3, r0 + 8000eca: 3401 adds r4, #1 + 8000ecc: 9304 str r3, [sp, #16] + 8000ece: f814 1b01 ldrb.w r1, [r4], #1 + 8000ed2: 4826 ldr r0, [pc, #152] ; (8000f6c <_svfiprintf_r+0x1f0>) + 8000ed4: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 8000ed8: 2206 movs r2, #6 + 8000eda: f7ff f999 bl 8000210 + 8000ede: 2800 cmp r0, #0 + 8000ee0: d038 beq.n 8000f54 <_svfiprintf_r+0x1d8> + 8000ee2: 4b23 ldr r3, [pc, #140] ; (8000f70 <_svfiprintf_r+0x1f4>) + 8000ee4: bb1b cbnz r3, 8000f2e <_svfiprintf_r+0x1b2> + 8000ee6: 9b03 ldr r3, [sp, #12] + 8000ee8: 3307 adds r3, #7 + 8000eea: f023 0307 bic.w r3, r3, #7 + 8000eee: 3308 adds r3, #8 + 8000ef0: 9303 str r3, [sp, #12] + 8000ef2: 9b09 ldr r3, [sp, #36] ; 0x24 + 8000ef4: 4433 add r3, r6 + 8000ef6: 9309 str r3, [sp, #36] ; 0x24 + 8000ef8: e767 b.n 8000dca <_svfiprintf_r+0x4e> + 8000efa: fb0c 3202 mla r2, ip, r2, r3 + 8000efe: 460c mov r4, r1 + 8000f00: 2001 movs r0, #1 + 8000f02: e7a5 b.n 8000e50 <_svfiprintf_r+0xd4> + 8000f04: 2300 movs r3, #0 + 8000f06: 3401 adds r4, #1 + 8000f08: 9305 str r3, [sp, #20] + 8000f0a: 4619 mov r1, r3 + 8000f0c: f04f 0c0a mov.w ip, #10 + 8000f10: 4620 mov r0, r4 + 8000f12: f810 2b01 ldrb.w r2, [r0], #1 + 8000f16: 3a30 subs r2, #48 ; 0x30 + 8000f18: 2a09 cmp r2, #9 + 8000f1a: d903 bls.n 8000f24 <_svfiprintf_r+0x1a8> + 8000f1c: 2b00 cmp r3, #0 + 8000f1e: d0c5 beq.n 8000eac <_svfiprintf_r+0x130> + 8000f20: 9105 str r1, [sp, #20] + 8000f22: e7c3 b.n 8000eac <_svfiprintf_r+0x130> + 8000f24: fb0c 2101 mla r1, ip, r1, r2 + 8000f28: 4604 mov r4, r0 + 8000f2a: 2301 movs r3, #1 + 8000f2c: e7f0 b.n 8000f10 <_svfiprintf_r+0x194> + 8000f2e: ab03 add r3, sp, #12 + 8000f30: 9300 str r3, [sp, #0] + 8000f32: 462a mov r2, r5 + 8000f34: 4b0f ldr r3, [pc, #60] ; (8000f74 <_svfiprintf_r+0x1f8>) + 8000f36: a904 add r1, sp, #16 + 8000f38: 4638 mov r0, r7 + 8000f3a: f3af 8000 nop.w + 8000f3e: 1c42 adds r2, r0, #1 + 8000f40: 4606 mov r6, r0 + 8000f42: d1d6 bne.n 8000ef2 <_svfiprintf_r+0x176> + 8000f44: 89ab ldrh r3, [r5, #12] + 8000f46: 065b lsls r3, r3, #25 + 8000f48: f53f af2c bmi.w 8000da4 <_svfiprintf_r+0x28> + 8000f4c: 9809 ldr r0, [sp, #36] ; 0x24 + 8000f4e: b01d add sp, #116 ; 0x74 + 8000f50: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8000f54: ab03 add r3, sp, #12 + 8000f56: 9300 str r3, [sp, #0] + 8000f58: 462a mov r2, r5 + 8000f5a: 4b06 ldr r3, [pc, #24] ; (8000f74 <_svfiprintf_r+0x1f8>) + 8000f5c: a904 add r1, sp, #16 + 8000f5e: 4638 mov r0, r7 + 8000f60: f000 f87a bl 8001058 <_printf_i> + 8000f64: e7eb b.n 8000f3e <_svfiprintf_r+0x1c2> + 8000f66: bf00 nop + 8000f68: 08001551 .word 0x08001551 + 8000f6c: 0800155b .word 0x0800155b + 8000f70: 00000000 .word 0x00000000 + 8000f74: 08000cc5 .word 0x08000cc5 + 8000f78: 08001557 .word 0x08001557 + +08000f7c <_printf_common>: + 8000f7c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8000f80: 4616 mov r6, r2 + 8000f82: 4699 mov r9, r3 + 8000f84: 688a ldr r2, [r1, #8] + 8000f86: 690b ldr r3, [r1, #16] + 8000f88: f8dd 8020 ldr.w r8, [sp, #32] + 8000f8c: 4293 cmp r3, r2 + 8000f8e: bfb8 it lt + 8000f90: 4613 movlt r3, r2 + 8000f92: 6033 str r3, [r6, #0] + 8000f94: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 8000f98: 4607 mov r7, r0 + 8000f9a: 460c mov r4, r1 + 8000f9c: b10a cbz r2, 8000fa2 <_printf_common+0x26> + 8000f9e: 3301 adds r3, #1 + 8000fa0: 6033 str r3, [r6, #0] + 8000fa2: 6823 ldr r3, [r4, #0] + 8000fa4: 0699 lsls r1, r3, #26 + 8000fa6: bf42 ittt mi + 8000fa8: 6833 ldrmi r3, [r6, #0] + 8000faa: 3302 addmi r3, #2 + 8000fac: 6033 strmi r3, [r6, #0] + 8000fae: 6825 ldr r5, [r4, #0] + 8000fb0: f015 0506 ands.w r5, r5, #6 + 8000fb4: d106 bne.n 8000fc4 <_printf_common+0x48> + 8000fb6: f104 0a19 add.w sl, r4, #25 + 8000fba: 68e3 ldr r3, [r4, #12] + 8000fbc: 6832 ldr r2, [r6, #0] + 8000fbe: 1a9b subs r3, r3, r2 + 8000fc0: 42ab cmp r3, r5 + 8000fc2: dc26 bgt.n 8001012 <_printf_common+0x96> + 8000fc4: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 8000fc8: 1e13 subs r3, r2, #0 + 8000fca: 6822 ldr r2, [r4, #0] + 8000fcc: bf18 it ne + 8000fce: 2301 movne r3, #1 + 8000fd0: 0692 lsls r2, r2, #26 + 8000fd2: d42b bmi.n 800102c <_printf_common+0xb0> + 8000fd4: f104 0243 add.w r2, r4, #67 ; 0x43 + 8000fd8: 4649 mov r1, r9 + 8000fda: 4638 mov r0, r7 + 8000fdc: 47c0 blx r8 + 8000fde: 3001 adds r0, #1 + 8000fe0: d01e beq.n 8001020 <_printf_common+0xa4> + 8000fe2: 6823 ldr r3, [r4, #0] + 8000fe4: 68e5 ldr r5, [r4, #12] + 8000fe6: 6832 ldr r2, [r6, #0] + 8000fe8: f003 0306 and.w r3, r3, #6 + 8000fec: 2b04 cmp r3, #4 + 8000fee: bf08 it eq + 8000ff0: 1aad subeq r5, r5, r2 + 8000ff2: 68a3 ldr r3, [r4, #8] + 8000ff4: 6922 ldr r2, [r4, #16] + 8000ff6: bf0c ite eq + 8000ff8: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 8000ffc: 2500 movne r5, #0 + 8000ffe: 4293 cmp r3, r2 + 8001000: bfc4 itt gt + 8001002: 1a9b subgt r3, r3, r2 + 8001004: 18ed addgt r5, r5, r3 + 8001006: 2600 movs r6, #0 + 8001008: 341a adds r4, #26 + 800100a: 42b5 cmp r5, r6 + 800100c: d11a bne.n 8001044 <_printf_common+0xc8> + 800100e: 2000 movs r0, #0 + 8001010: e008 b.n 8001024 <_printf_common+0xa8> + 8001012: 2301 movs r3, #1 + 8001014: 4652 mov r2, sl + 8001016: 4649 mov r1, r9 + 8001018: 4638 mov r0, r7 + 800101a: 47c0 blx r8 + 800101c: 3001 adds r0, #1 + 800101e: d103 bne.n 8001028 <_printf_common+0xac> + 8001020: f04f 30ff mov.w r0, #4294967295 + 8001024: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001028: 3501 adds r5, #1 + 800102a: e7c6 b.n 8000fba <_printf_common+0x3e> + 800102c: 18e1 adds r1, r4, r3 + 800102e: 1c5a adds r2, r3, #1 + 8001030: 2030 movs r0, #48 ; 0x30 + 8001032: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 8001036: 4422 add r2, r4 + 8001038: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 800103c: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 8001040: 3302 adds r3, #2 + 8001042: e7c7 b.n 8000fd4 <_printf_common+0x58> + 8001044: 2301 movs r3, #1 + 8001046: 4622 mov r2, r4 + 8001048: 4649 mov r1, r9 + 800104a: 4638 mov r0, r7 + 800104c: 47c0 blx r8 + 800104e: 3001 adds r0, #1 + 8001050: d0e6 beq.n 8001020 <_printf_common+0xa4> + 8001052: 3601 adds r6, #1 + 8001054: e7d9 b.n 800100a <_printf_common+0x8e> + ... + +08001058 <_printf_i>: + 8001058: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 800105c: 460c mov r4, r1 + 800105e: 4691 mov r9, r2 + 8001060: 7e27 ldrb r7, [r4, #24] + 8001062: 990c ldr r1, [sp, #48] ; 0x30 + 8001064: 2f78 cmp r7, #120 ; 0x78 + 8001066: 4680 mov r8, r0 + 8001068: 469a mov sl, r3 + 800106a: f104 0243 add.w r2, r4, #67 ; 0x43 + 800106e: d807 bhi.n 8001080 <_printf_i+0x28> + 8001070: 2f62 cmp r7, #98 ; 0x62 + 8001072: d80a bhi.n 800108a <_printf_i+0x32> + 8001074: 2f00 cmp r7, #0 + 8001076: f000 80d8 beq.w 800122a <_printf_i+0x1d2> + 800107a: 2f58 cmp r7, #88 ; 0x58 + 800107c: f000 80a3 beq.w 80011c6 <_printf_i+0x16e> + 8001080: f104 0642 add.w r6, r4, #66 ; 0x42 + 8001084: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 8001088: e03a b.n 8001100 <_printf_i+0xa8> + 800108a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 800108e: 2b15 cmp r3, #21 + 8001090: d8f6 bhi.n 8001080 <_printf_i+0x28> + 8001092: a001 add r0, pc, #4 ; (adr r0, 8001098 <_printf_i+0x40>) + 8001094: f850 f023 ldr.w pc, [r0, r3, lsl #2] + 8001098: 080010f1 .word 0x080010f1 + 800109c: 08001105 .word 0x08001105 + 80010a0: 08001081 .word 0x08001081 + 80010a4: 08001081 .word 0x08001081 + 80010a8: 08001081 .word 0x08001081 + 80010ac: 08001081 .word 0x08001081 + 80010b0: 08001105 .word 0x08001105 + 80010b4: 08001081 .word 0x08001081 + 80010b8: 08001081 .word 0x08001081 + 80010bc: 08001081 .word 0x08001081 + 80010c0: 08001081 .word 0x08001081 + 80010c4: 08001211 .word 0x08001211 + 80010c8: 08001135 .word 0x08001135 + 80010cc: 080011f3 .word 0x080011f3 + 80010d0: 08001081 .word 0x08001081 + 80010d4: 08001081 .word 0x08001081 + 80010d8: 08001233 .word 0x08001233 + 80010dc: 08001081 .word 0x08001081 + 80010e0: 08001135 .word 0x08001135 + 80010e4: 08001081 .word 0x08001081 + 80010e8: 08001081 .word 0x08001081 + 80010ec: 080011fb .word 0x080011fb + 80010f0: 680b ldr r3, [r1, #0] + 80010f2: 1d1a adds r2, r3, #4 + 80010f4: 681b ldr r3, [r3, #0] + 80010f6: 600a str r2, [r1, #0] + 80010f8: f104 0642 add.w r6, r4, #66 ; 0x42 + 80010fc: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 8001100: 2301 movs r3, #1 + 8001102: e0a3 b.n 800124c <_printf_i+0x1f4> + 8001104: 6825 ldr r5, [r4, #0] + 8001106: 6808 ldr r0, [r1, #0] + 8001108: 062e lsls r6, r5, #24 + 800110a: f100 0304 add.w r3, r0, #4 + 800110e: d50a bpl.n 8001126 <_printf_i+0xce> + 8001110: 6805 ldr r5, [r0, #0] + 8001112: 600b str r3, [r1, #0] + 8001114: 2d00 cmp r5, #0 + 8001116: da03 bge.n 8001120 <_printf_i+0xc8> + 8001118: 232d movs r3, #45 ; 0x2d + 800111a: 426d negs r5, r5 + 800111c: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001120: 485e ldr r0, [pc, #376] ; (800129c <_printf_i+0x244>) + 8001122: 230a movs r3, #10 + 8001124: e019 b.n 800115a <_printf_i+0x102> + 8001126: f015 0f40 tst.w r5, #64 ; 0x40 + 800112a: 6805 ldr r5, [r0, #0] + 800112c: 600b str r3, [r1, #0] + 800112e: bf18 it ne + 8001130: b22d sxthne r5, r5 + 8001132: e7ef b.n 8001114 <_printf_i+0xbc> + 8001134: 680b ldr r3, [r1, #0] + 8001136: 6825 ldr r5, [r4, #0] + 8001138: 1d18 adds r0, r3, #4 + 800113a: 6008 str r0, [r1, #0] + 800113c: 0628 lsls r0, r5, #24 + 800113e: d501 bpl.n 8001144 <_printf_i+0xec> + 8001140: 681d ldr r5, [r3, #0] + 8001142: e002 b.n 800114a <_printf_i+0xf2> + 8001144: 0669 lsls r1, r5, #25 + 8001146: d5fb bpl.n 8001140 <_printf_i+0xe8> + 8001148: 881d ldrh r5, [r3, #0] + 800114a: 4854 ldr r0, [pc, #336] ; (800129c <_printf_i+0x244>) + 800114c: 2f6f cmp r7, #111 ; 0x6f + 800114e: bf0c ite eq + 8001150: 2308 moveq r3, #8 + 8001152: 230a movne r3, #10 + 8001154: 2100 movs r1, #0 + 8001156: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 800115a: 6866 ldr r6, [r4, #4] + 800115c: 60a6 str r6, [r4, #8] + 800115e: 2e00 cmp r6, #0 + 8001160: bfa2 ittt ge + 8001162: 6821 ldrge r1, [r4, #0] + 8001164: f021 0104 bicge.w r1, r1, #4 + 8001168: 6021 strge r1, [r4, #0] + 800116a: b90d cbnz r5, 8001170 <_printf_i+0x118> + 800116c: 2e00 cmp r6, #0 + 800116e: d04d beq.n 800120c <_printf_i+0x1b4> + 8001170: 4616 mov r6, r2 + 8001172: fbb5 f1f3 udiv r1, r5, r3 + 8001176: fb03 5711 mls r7, r3, r1, r5 + 800117a: 5dc7 ldrb r7, [r0, r7] + 800117c: f806 7d01 strb.w r7, [r6, #-1]! + 8001180: 462f mov r7, r5 + 8001182: 42bb cmp r3, r7 + 8001184: 460d mov r5, r1 + 8001186: d9f4 bls.n 8001172 <_printf_i+0x11a> + 8001188: 2b08 cmp r3, #8 + 800118a: d10b bne.n 80011a4 <_printf_i+0x14c> + 800118c: 6823 ldr r3, [r4, #0] + 800118e: 07df lsls r7, r3, #31 + 8001190: d508 bpl.n 80011a4 <_printf_i+0x14c> + 8001192: 6923 ldr r3, [r4, #16] + 8001194: 6861 ldr r1, [r4, #4] + 8001196: 4299 cmp r1, r3 + 8001198: bfde ittt le + 800119a: 2330 movle r3, #48 ; 0x30 + 800119c: f806 3c01 strble.w r3, [r6, #-1] + 80011a0: f106 36ff addle.w r6, r6, #4294967295 + 80011a4: 1b92 subs r2, r2, r6 + 80011a6: 6122 str r2, [r4, #16] + 80011a8: f8cd a000 str.w sl, [sp] + 80011ac: 464b mov r3, r9 + 80011ae: aa03 add r2, sp, #12 + 80011b0: 4621 mov r1, r4 + 80011b2: 4640 mov r0, r8 + 80011b4: f7ff fee2 bl 8000f7c <_printf_common> + 80011b8: 3001 adds r0, #1 + 80011ba: d14c bne.n 8001256 <_printf_i+0x1fe> + 80011bc: f04f 30ff mov.w r0, #4294967295 + 80011c0: b004 add sp, #16 + 80011c2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80011c6: 4835 ldr r0, [pc, #212] ; (800129c <_printf_i+0x244>) + 80011c8: f884 7045 strb.w r7, [r4, #69] ; 0x45 + 80011cc: 6823 ldr r3, [r4, #0] + 80011ce: 680e ldr r6, [r1, #0] + 80011d0: 061f lsls r7, r3, #24 + 80011d2: f856 5b04 ldr.w r5, [r6], #4 + 80011d6: 600e str r6, [r1, #0] + 80011d8: d514 bpl.n 8001204 <_printf_i+0x1ac> + 80011da: 07d9 lsls r1, r3, #31 + 80011dc: bf44 itt mi + 80011de: f043 0320 orrmi.w r3, r3, #32 + 80011e2: 6023 strmi r3, [r4, #0] + 80011e4: b91d cbnz r5, 80011ee <_printf_i+0x196> + 80011e6: 6823 ldr r3, [r4, #0] + 80011e8: f023 0320 bic.w r3, r3, #32 + 80011ec: 6023 str r3, [r4, #0] + 80011ee: 2310 movs r3, #16 + 80011f0: e7b0 b.n 8001154 <_printf_i+0xfc> + 80011f2: 6823 ldr r3, [r4, #0] + 80011f4: f043 0320 orr.w r3, r3, #32 + 80011f8: 6023 str r3, [r4, #0] + 80011fa: 2378 movs r3, #120 ; 0x78 + 80011fc: 4828 ldr r0, [pc, #160] ; (80012a0 <_printf_i+0x248>) + 80011fe: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 8001202: e7e3 b.n 80011cc <_printf_i+0x174> + 8001204: 065e lsls r6, r3, #25 + 8001206: bf48 it mi + 8001208: b2ad uxthmi r5, r5 + 800120a: e7e6 b.n 80011da <_printf_i+0x182> + 800120c: 4616 mov r6, r2 + 800120e: e7bb b.n 8001188 <_printf_i+0x130> + 8001210: 680b ldr r3, [r1, #0] + 8001212: 6826 ldr r6, [r4, #0] + 8001214: 6960 ldr r0, [r4, #20] + 8001216: 1d1d adds r5, r3, #4 + 8001218: 600d str r5, [r1, #0] + 800121a: 0635 lsls r5, r6, #24 + 800121c: 681b ldr r3, [r3, #0] + 800121e: d501 bpl.n 8001224 <_printf_i+0x1cc> + 8001220: 6018 str r0, [r3, #0] + 8001222: e002 b.n 800122a <_printf_i+0x1d2> + 8001224: 0671 lsls r1, r6, #25 + 8001226: d5fb bpl.n 8001220 <_printf_i+0x1c8> + 8001228: 8018 strh r0, [r3, #0] + 800122a: 2300 movs r3, #0 + 800122c: 6123 str r3, [r4, #16] + 800122e: 4616 mov r6, r2 + 8001230: e7ba b.n 80011a8 <_printf_i+0x150> + 8001232: 680b ldr r3, [r1, #0] + 8001234: 1d1a adds r2, r3, #4 + 8001236: 600a str r2, [r1, #0] + 8001238: 681e ldr r6, [r3, #0] + 800123a: 6862 ldr r2, [r4, #4] + 800123c: 2100 movs r1, #0 + 800123e: 4630 mov r0, r6 + 8001240: f7fe ffe6 bl 8000210 + 8001244: b108 cbz r0, 800124a <_printf_i+0x1f2> + 8001246: 1b80 subs r0, r0, r6 + 8001248: 6060 str r0, [r4, #4] + 800124a: 6863 ldr r3, [r4, #4] + 800124c: 6123 str r3, [r4, #16] + 800124e: 2300 movs r3, #0 + 8001250: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001254: e7a8 b.n 80011a8 <_printf_i+0x150> + 8001256: 6923 ldr r3, [r4, #16] + 8001258: 4632 mov r2, r6 + 800125a: 4649 mov r1, r9 + 800125c: 4640 mov r0, r8 + 800125e: 47d0 blx sl + 8001260: 3001 adds r0, #1 + 8001262: d0ab beq.n 80011bc <_printf_i+0x164> + 8001264: 6823 ldr r3, [r4, #0] + 8001266: 079b lsls r3, r3, #30 + 8001268: d413 bmi.n 8001292 <_printf_i+0x23a> + 800126a: 68e0 ldr r0, [r4, #12] + 800126c: 9b03 ldr r3, [sp, #12] + 800126e: 4298 cmp r0, r3 + 8001270: bfb8 it lt + 8001272: 4618 movlt r0, r3 + 8001274: e7a4 b.n 80011c0 <_printf_i+0x168> + 8001276: 2301 movs r3, #1 + 8001278: 4632 mov r2, r6 + 800127a: 4649 mov r1, r9 + 800127c: 4640 mov r0, r8 + 800127e: 47d0 blx sl + 8001280: 3001 adds r0, #1 + 8001282: d09b beq.n 80011bc <_printf_i+0x164> + 8001284: 3501 adds r5, #1 + 8001286: 68e3 ldr r3, [r4, #12] + 8001288: 9903 ldr r1, [sp, #12] + 800128a: 1a5b subs r3, r3, r1 + 800128c: 42ab cmp r3, r5 + 800128e: dcf2 bgt.n 8001276 <_printf_i+0x21e> + 8001290: e7eb b.n 800126a <_printf_i+0x212> + 8001292: 2500 movs r5, #0 + 8001294: f104 0619 add.w r6, r4, #25 + 8001298: e7f5 b.n 8001286 <_printf_i+0x22e> + 800129a: bf00 nop + 800129c: 08001562 .word 0x08001562 + 80012a0: 08001573 .word 0x08001573 + +080012a4 : + 80012a4: 440a add r2, r1 + 80012a6: 4291 cmp r1, r2 + 80012a8: f100 33ff add.w r3, r0, #4294967295 + 80012ac: d100 bne.n 80012b0 + 80012ae: 4770 bx lr + 80012b0: b510 push {r4, lr} + 80012b2: f811 4b01 ldrb.w r4, [r1], #1 + 80012b6: f803 4f01 strb.w r4, [r3, #1]! + 80012ba: 4291 cmp r1, r2 + 80012bc: d1f9 bne.n 80012b2 + 80012be: bd10 pop {r4, pc} + +080012c0 : + 80012c0: 4288 cmp r0, r1 + 80012c2: b510 push {r4, lr} + 80012c4: eb01 0402 add.w r4, r1, r2 + 80012c8: d902 bls.n 80012d0 + 80012ca: 4284 cmp r4, r0 + 80012cc: 4623 mov r3, r4 + 80012ce: d807 bhi.n 80012e0 + 80012d0: 1e43 subs r3, r0, #1 + 80012d2: 42a1 cmp r1, r4 + 80012d4: d008 beq.n 80012e8 + 80012d6: f811 2b01 ldrb.w r2, [r1], #1 + 80012da: f803 2f01 strb.w r2, [r3, #1]! + 80012de: e7f8 b.n 80012d2 + 80012e0: 4402 add r2, r0 + 80012e2: 4601 mov r1, r0 + 80012e4: 428a cmp r2, r1 + 80012e6: d100 bne.n 80012ea + 80012e8: bd10 pop {r4, pc} + 80012ea: f813 4d01 ldrb.w r4, [r3, #-1]! + 80012ee: f802 4d01 strb.w r4, [r2, #-1]! + 80012f2: e7f7 b.n 80012e4 + +080012f4 <_free_r>: + 80012f4: b537 push {r0, r1, r2, r4, r5, lr} + 80012f6: 2900 cmp r1, #0 + 80012f8: d048 beq.n 800138c <_free_r+0x98> + 80012fa: f851 3c04 ldr.w r3, [r1, #-4] + 80012fe: 9001 str r0, [sp, #4] + 8001300: 2b00 cmp r3, #0 + 8001302: f1a1 0404 sub.w r4, r1, #4 + 8001306: bfb8 it lt + 8001308: 18e4 addlt r4, r4, r3 + 800130a: f000 f8d3 bl 80014b4 <__malloc_lock> + 800130e: 4a20 ldr r2, [pc, #128] ; (8001390 <_free_r+0x9c>) + 8001310: 9801 ldr r0, [sp, #4] + 8001312: 6813 ldr r3, [r2, #0] + 8001314: 4615 mov r5, r2 + 8001316: b933 cbnz r3, 8001326 <_free_r+0x32> + 8001318: 6063 str r3, [r4, #4] + 800131a: 6014 str r4, [r2, #0] + 800131c: b003 add sp, #12 + 800131e: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 8001322: f000 b8cd b.w 80014c0 <__malloc_unlock> + 8001326: 42a3 cmp r3, r4 + 8001328: d90b bls.n 8001342 <_free_r+0x4e> + 800132a: 6821 ldr r1, [r4, #0] + 800132c: 1862 adds r2, r4, r1 + 800132e: 4293 cmp r3, r2 + 8001330: bf04 itt eq + 8001332: 681a ldreq r2, [r3, #0] + 8001334: 685b ldreq r3, [r3, #4] + 8001336: 6063 str r3, [r4, #4] + 8001338: bf04 itt eq + 800133a: 1852 addeq r2, r2, r1 + 800133c: 6022 streq r2, [r4, #0] + 800133e: 602c str r4, [r5, #0] + 8001340: e7ec b.n 800131c <_free_r+0x28> + 8001342: 461a mov r2, r3 + 8001344: 685b ldr r3, [r3, #4] + 8001346: b10b cbz r3, 800134c <_free_r+0x58> + 8001348: 42a3 cmp r3, r4 + 800134a: d9fa bls.n 8001342 <_free_r+0x4e> + 800134c: 6811 ldr r1, [r2, #0] + 800134e: 1855 adds r5, r2, r1 + 8001350: 42a5 cmp r5, r4 + 8001352: d10b bne.n 800136c <_free_r+0x78> + 8001354: 6824 ldr r4, [r4, #0] + 8001356: 4421 add r1, r4 + 8001358: 1854 adds r4, r2, r1 + 800135a: 42a3 cmp r3, r4 + 800135c: 6011 str r1, [r2, #0] + 800135e: d1dd bne.n 800131c <_free_r+0x28> + 8001360: 681c ldr r4, [r3, #0] + 8001362: 685b ldr r3, [r3, #4] + 8001364: 6053 str r3, [r2, #4] + 8001366: 4421 add r1, r4 + 8001368: 6011 str r1, [r2, #0] + 800136a: e7d7 b.n 800131c <_free_r+0x28> + 800136c: d902 bls.n 8001374 <_free_r+0x80> + 800136e: 230c movs r3, #12 + 8001370: 6003 str r3, [r0, #0] + 8001372: e7d3 b.n 800131c <_free_r+0x28> + 8001374: 6825 ldr r5, [r4, #0] + 8001376: 1961 adds r1, r4, r5 + 8001378: 428b cmp r3, r1 + 800137a: bf04 itt eq + 800137c: 6819 ldreq r1, [r3, #0] + 800137e: 685b ldreq r3, [r3, #4] + 8001380: 6063 str r3, [r4, #4] + 8001382: bf04 itt eq + 8001384: 1949 addeq r1, r1, r5 + 8001386: 6021 streq r1, [r4, #0] + 8001388: 6054 str r4, [r2, #4] + 800138a: e7c7 b.n 800131c <_free_r+0x28> + 800138c: b003 add sp, #12 + 800138e: bd30 pop {r4, r5, pc} + 8001390: 200000b0 .word 0x200000b0 + +08001394 <_malloc_r>: + 8001394: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001396: 1ccd adds r5, r1, #3 + 8001398: f025 0503 bic.w r5, r5, #3 + 800139c: 3508 adds r5, #8 + 800139e: 2d0c cmp r5, #12 + 80013a0: bf38 it cc + 80013a2: 250c movcc r5, #12 + 80013a4: 2d00 cmp r5, #0 + 80013a6: 4606 mov r6, r0 + 80013a8: db01 blt.n 80013ae <_malloc_r+0x1a> + 80013aa: 42a9 cmp r1, r5 + 80013ac: d903 bls.n 80013b6 <_malloc_r+0x22> + 80013ae: 230c movs r3, #12 + 80013b0: 6033 str r3, [r6, #0] + 80013b2: 2000 movs r0, #0 + 80013b4: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80013b6: f000 f87d bl 80014b4 <__malloc_lock> + 80013ba: 4921 ldr r1, [pc, #132] ; (8001440 <_malloc_r+0xac>) + 80013bc: 680a ldr r2, [r1, #0] + 80013be: 4614 mov r4, r2 + 80013c0: b99c cbnz r4, 80013ea <_malloc_r+0x56> + 80013c2: 4f20 ldr r7, [pc, #128] ; (8001444 <_malloc_r+0xb0>) + 80013c4: 683b ldr r3, [r7, #0] + 80013c6: b923 cbnz r3, 80013d2 <_malloc_r+0x3e> + 80013c8: 4621 mov r1, r4 + 80013ca: 4630 mov r0, r6 + 80013cc: f000 f862 bl 8001494 <_sbrk_r> + 80013d0: 6038 str r0, [r7, #0] + 80013d2: 4629 mov r1, r5 + 80013d4: 4630 mov r0, r6 + 80013d6: f000 f85d bl 8001494 <_sbrk_r> + 80013da: 1c43 adds r3, r0, #1 + 80013dc: d123 bne.n 8001426 <_malloc_r+0x92> + 80013de: 230c movs r3, #12 + 80013e0: 6033 str r3, [r6, #0] + 80013e2: 4630 mov r0, r6 + 80013e4: f000 f86c bl 80014c0 <__malloc_unlock> + 80013e8: e7e3 b.n 80013b2 <_malloc_r+0x1e> + 80013ea: 6823 ldr r3, [r4, #0] + 80013ec: 1b5b subs r3, r3, r5 + 80013ee: d417 bmi.n 8001420 <_malloc_r+0x8c> + 80013f0: 2b0b cmp r3, #11 + 80013f2: d903 bls.n 80013fc <_malloc_r+0x68> + 80013f4: 6023 str r3, [r4, #0] + 80013f6: 441c add r4, r3 + 80013f8: 6025 str r5, [r4, #0] + 80013fa: e004 b.n 8001406 <_malloc_r+0x72> + 80013fc: 6863 ldr r3, [r4, #4] + 80013fe: 42a2 cmp r2, r4 + 8001400: bf0c ite eq + 8001402: 600b streq r3, [r1, #0] + 8001404: 6053 strne r3, [r2, #4] + 8001406: 4630 mov r0, r6 + 8001408: f000 f85a bl 80014c0 <__malloc_unlock> + 800140c: f104 000b add.w r0, r4, #11 + 8001410: 1d23 adds r3, r4, #4 + 8001412: f020 0007 bic.w r0, r0, #7 + 8001416: 1ac2 subs r2, r0, r3 + 8001418: d0cc beq.n 80013b4 <_malloc_r+0x20> + 800141a: 1a1b subs r3, r3, r0 + 800141c: 50a3 str r3, [r4, r2] + 800141e: e7c9 b.n 80013b4 <_malloc_r+0x20> + 8001420: 4622 mov r2, r4 + 8001422: 6864 ldr r4, [r4, #4] + 8001424: e7cc b.n 80013c0 <_malloc_r+0x2c> + 8001426: 1cc4 adds r4, r0, #3 + 8001428: f024 0403 bic.w r4, r4, #3 + 800142c: 42a0 cmp r0, r4 + 800142e: d0e3 beq.n 80013f8 <_malloc_r+0x64> + 8001430: 1a21 subs r1, r4, r0 + 8001432: 4630 mov r0, r6 + 8001434: f000 f82e bl 8001494 <_sbrk_r> + 8001438: 3001 adds r0, #1 + 800143a: d1dd bne.n 80013f8 <_malloc_r+0x64> + 800143c: e7cf b.n 80013de <_malloc_r+0x4a> + 800143e: bf00 nop + 8001440: 200000b0 .word 0x200000b0 + 8001444: 200000b4 .word 0x200000b4 + +08001448 <_realloc_r>: + 8001448: b5f8 push {r3, r4, r5, r6, r7, lr} + 800144a: 4607 mov r7, r0 + 800144c: 4614 mov r4, r2 + 800144e: 460e mov r6, r1 + 8001450: b921 cbnz r1, 800145c <_realloc_r+0x14> + 8001452: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 8001456: 4611 mov r1, r2 + 8001458: f7ff bf9c b.w 8001394 <_malloc_r> + 800145c: b922 cbnz r2, 8001468 <_realloc_r+0x20> + 800145e: f7ff ff49 bl 80012f4 <_free_r> + 8001462: 4625 mov r5, r4 + 8001464: 4628 mov r0, r5 + 8001466: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8001468: f000 f830 bl 80014cc <_malloc_usable_size_r> + 800146c: 42a0 cmp r0, r4 + 800146e: d20f bcs.n 8001490 <_realloc_r+0x48> + 8001470: 4621 mov r1, r4 + 8001472: 4638 mov r0, r7 + 8001474: f7ff ff8e bl 8001394 <_malloc_r> + 8001478: 4605 mov r5, r0 + 800147a: 2800 cmp r0, #0 + 800147c: d0f2 beq.n 8001464 <_realloc_r+0x1c> + 800147e: 4631 mov r1, r6 + 8001480: 4622 mov r2, r4 + 8001482: f7ff ff0f bl 80012a4 + 8001486: 4631 mov r1, r6 + 8001488: 4638 mov r0, r7 + 800148a: f7ff ff33 bl 80012f4 <_free_r> + 800148e: e7e9 b.n 8001464 <_realloc_r+0x1c> + 8001490: 4635 mov r5, r6 + 8001492: e7e7 b.n 8001464 <_realloc_r+0x1c> + +08001494 <_sbrk_r>: + 8001494: b538 push {r3, r4, r5, lr} + 8001496: 4d06 ldr r5, [pc, #24] ; (80014b0 <_sbrk_r+0x1c>) + 8001498: 2300 movs r3, #0 + 800149a: 4604 mov r4, r0 + 800149c: 4608 mov r0, r1 + 800149e: 602b str r3, [r5, #0] + 80014a0: f000 f81e bl 80014e0 <_sbrk> + 80014a4: 1c43 adds r3, r0, #1 + 80014a6: d102 bne.n 80014ae <_sbrk_r+0x1a> + 80014a8: 682b ldr r3, [r5, #0] + 80014aa: b103 cbz r3, 80014ae <_sbrk_r+0x1a> + 80014ac: 6023 str r3, [r4, #0] + 80014ae: bd38 pop {r3, r4, r5, pc} + 80014b0: 200000c4 .word 0x200000c4 + +080014b4 <__malloc_lock>: + 80014b4: 4801 ldr r0, [pc, #4] ; (80014bc <__malloc_lock+0x8>) + 80014b6: f000 b811 b.w 80014dc <__retarget_lock_acquire_recursive> + 80014ba: bf00 nop + 80014bc: 200000cc .word 0x200000cc + +080014c0 <__malloc_unlock>: + 80014c0: 4801 ldr r0, [pc, #4] ; (80014c8 <__malloc_unlock+0x8>) + 80014c2: f000 b80c b.w 80014de <__retarget_lock_release_recursive> + 80014c6: bf00 nop + 80014c8: 200000cc .word 0x200000cc + +080014cc <_malloc_usable_size_r>: + 80014cc: f851 3c04 ldr.w r3, [r1, #-4] + 80014d0: 1f18 subs r0, r3, #4 + 80014d2: 2b00 cmp r3, #0 + 80014d4: bfbc itt lt + 80014d6: 580b ldrlt r3, [r1, r0] + 80014d8: 18c0 addlt r0, r0, r3 + 80014da: 4770 bx lr + +080014dc <__retarget_lock_acquire_recursive>: + 80014dc: 4770 bx lr + +080014de <__retarget_lock_release_recursive>: + 80014de: 4770 bx lr + +080014e0 <_sbrk>: + 80014e0: 4b04 ldr r3, [pc, #16] ; (80014f4 <_sbrk+0x14>) + 80014e2: 6819 ldr r1, [r3, #0] + 80014e4: 4602 mov r2, r0 + 80014e6: b909 cbnz r1, 80014ec <_sbrk+0xc> + 80014e8: 4903 ldr r1, [pc, #12] ; (80014f8 <_sbrk+0x18>) + 80014ea: 6019 str r1, [r3, #0] + 80014ec: 6818 ldr r0, [r3, #0] + 80014ee: 4402 add r2, r0 + 80014f0: 601a str r2, [r3, #0] + 80014f2: 4770 bx lr + 80014f4: 200000b8 .word 0x200000b8 + 80014f8: 200000d8 .word 0x200000d8 + +080014fc <_init>: + 80014fc: b5f8 push {r3, r4, r5, r6, r7, lr} + 80014fe: bf00 nop + 8001500: bcf8 pop {r3, r4, r5, r6, r7} + 8001502: bc08 pop {r3} + 8001504: 469e mov lr, r3 + 8001506: 4770 bx lr + +08001508 <_fini>: + 8001508: b5f8 push {r3, r4, r5, r6, r7, lr} + 800150a: bf00 nop + 800150c: bcf8 pop {r3, r4, r5, r6, r7} + 800150e: bc08 pop {r3} + 8001510: 469e mov lr, r3 + 8001512: 4770 bx lr diff --git a/labW3barnestr/Inc/delay.h b/labW3barnestr/Inc/delay.h new file mode 100644 index 0000000..2674f76 --- /dev/null +++ b/labW3barnestr/Inc/delay.h @@ -0,0 +1,44 @@ +/* + * delay.h + * + * Author: Trevor Barnes + */ + +//include guards +#ifndef DELAY_H_ +#define DELAY_H_ + +#define STK_CTRL (volatile uint32_t*) 0xE000E010 +#define STK_LOAD (volatile uint32_t*) 0xE000E014 +#define STK_VAL (volatile uint32_t*) 0xE000E018 + +#define EN 1 +#define TICKINT (1<<1) +#define CLKSOURCE (1<<2) +#define COUNTFLAG (1<<16) + +/* + * delay_ms + * Busy wait for n ms + * + * For n iterations + * load number of cycles for 1 ms + * set one to enable and clock source + * + * wait for countflag to be set + */ +void delay_ms(uint32_t n); + +/* + * delay_ms + * Busy wait for n us + * + * For n iterations + * load number of cycles for 1 us + * set one to enable and clock source + * + * wait for countflag to be set + */ +void delay_us(uint32_t n); + +#endif /* DELAY_H_ */ diff --git a/labW3barnestr/Inc/keypad.h b/labW3barnestr/Inc/keypad.h new file mode 100644 index 0000000..04144f7 --- /dev/null +++ b/labW3barnestr/Inc/keypad.h @@ -0,0 +1,51 @@ +/* + * keypad.h + * + * Created on: Dec 17, 2021 + * Author: Trevor Barnes + */ + +#ifndef KEYPAD_H_ +#define KEYPAD_H_ + +#include + + +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 +#define GPIOCEN 2 +#define GPIOC_MODER (volatile uint32_t*) 0x40020800 +#define GPIOC_PUPDR (volatile uint32_t*) 0x4002080C +#define GPIOC_IDR (volatile uint32_t*) 0x40020810 +#define GPIOC_ODR (volatile uint32_t*) 0x40020814 +#define GPIOC_BSRR (volatile uint32_t*) 0x40020818 + +extern void keypad_init(); + +//Returns the code for the current key pressed +// 0 - No key +// 1 2 3 4 +// +// 5 6 7 8 +// +// 9 10 11 12 +// +// 13 14 15 16 +// 255 - Error +// This function does not block the flow of the program +extern uint8_t keypad_getKeyNoBlock(); + +//Returns the code for the next pressed +// 0 - No key +// 1 2 3 4 +// +// 5 6 7 8 +// +// 9 10 11 12 +// +// 13 14 15 16 +// 255 - Error +// This function will block the flow of the program until a +// key is pressed. +extern uint8_t keypad_getKey(); + +#endif /* KEYPAD_H_ */ diff --git a/labW3barnestr/Inc/lcd.h b/labW3barnestr/Inc/lcd.h new file mode 100644 index 0000000..9d1de50 --- /dev/null +++ b/labW3barnestr/Inc/lcd.h @@ -0,0 +1,84 @@ +/* + * LCD.H + * + * Created on: Dec 17, 2020 + * Author: Trevor Barnes + */ + +//Include Guards +#ifndef LCD_H_ +#define LCD_H_ + +#include + +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 + +// GPIO A Addresses and Values +#define GPIOA_MODER (volatile uint32_t*) 0x40020000 +#define GPIOA_IDR (volatile uint32_t*) 0x40020010 +#define GPIOA_ODR (volatile uint32_t*) 0x40020014 +#define GPIOA_BSRR (volatile uint32_t*) 0x40020018 +#define GPIOAEN (1<<0) + +// GPIO C Addresses and Values +#define GPIOC_MODER (volatile uint32_t*) 0x40020800 +#define GPIOC_IDR (volatile uint32_t*) 0x40020810 +#define GPIOC_ODR (volatile uint32_t*) 0x40020814 +#define GPIOC_BSRR (volatile uint32_t*) 0x40020818 +#define GPIOCEN 2 + +#define RS (1<<8) +#define RW (1<<9) +#define E (1<<10) + +#define FUNCTION_SET 0x38 +#define DISPLAY_TOGGLE 0x0F +#define DISPLAY_CLEAR 0x01 +#define ENTRY_MODE_SET 0x06 + + +/* + * lcdInit() + * Initializes the lcd by: + * - Setting DB and Control Ports to Outputs + * - Turns on clears the display + */ +void lcd_init(); + +/* + * lcdClear() + * Clears the lcd + */ +void lcd_clear(); + +/* + * lcdHome() + * Sets the cursor to the home position + */ +void lcd_home(); + +/* + * lcdSetPosition() + * Sets the cursor to the index passed in (1-32) + */ +void lcd_set_position(uint8_t posIndex); + +/* + * lcdPrintString() + * + */ +int lcd_print_string(char* str); + +/* + * lcdPrintChar() + * + */ +void lcd_print_char(char c); + +/* + * lcdPrintNum() + * + */ +int lcd_print_num(int i); + +#endif /* LCD_H */ diff --git a/labW3barnestr/STM32F446RETX_FLASH.ld b/labW3barnestr/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..2749aec --- /dev/null +++ b/labW3barnestr/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW3barnestr/STM32F446RETX_RAM.ld b/labW3barnestr/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..5b11a04 --- /dev/null +++ b/labW3barnestr/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2020 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW3barnestr/Src/delay.c b/labW3barnestr/Src/delay.c new file mode 100644 index 0000000..fb349d1 --- /dev/null +++ b/labW3barnestr/Src/delay.c @@ -0,0 +1,45 @@ +/* + * delay.c + * + */ + +#include +#include "delay.h" //include declaration header file + +void delay_ms(uint32_t n){ + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + // Clear value register + *STK_VAL = 0x0000; + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + *STK_CTRL |= EN; + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + } while (flag != 1); + } + +} + +void delay_us(uint32_t n) { + // 1us = 16 ticks + for (int i = n ; i > 0 ; i--) { + // Clear value register + *STK_VAL = 0x0000; + // Store 16 in STK_LOAD + *STK_LOAD = 16; + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + *STK_CTRL |= EN; + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + } while (flag != 1); + } +} diff --git a/labW3barnestr/Src/keypad.c b/labW3barnestr/Src/keypad.c new file mode 100644 index 0000000..74d9500 --- /dev/null +++ b/labW3barnestr/Src/keypad.c @@ -0,0 +1,99 @@ +/* + * keypad.c + * + */ + +#include "keypad.h" +#include "delay.h" + + +void keypad_init(){ + //Enables the port + *RCC_AHB1ENR |= (1< +#include + + + +void writeInstruction(uint8_t inst) { + // Reset RS, RW, E + *GPIOC_ODR &= ~(RS); + *GPIOC_ODR &= ~(RW); + *GPIOC_ODR &= ~(E); + // Set E + *GPIOC_ODR |= (E); + // Clear databus + *GPIOA_ODR &= ~(0xFF<<4); + // Set databus to passed in instruction value + *GPIOA_ODR |= (inst<<4); + // Reset E + *GPIOC_ODR &= ~(E); + delay_us(37); +} + +void writeData(uint8_t inst) { + // Reset RW, E + *GPIOC_ODR &= ~(RW); + *GPIOC_ODR &= ~(E); + // Set RS + *GPIOC_ODR |= (RS); + // Set E + *GPIOC_ODR |= (E); + // Clear databus + *GPIOA_ODR &= ~(0xFF<<4); + // Set databus to passed in instruction value + *GPIOA_ODR |= (inst<<4); + // Reset E + *GPIOC_ODR &= ~(E); + delay_us(37); +} + +void lcd_init(){ + +// Port Setup + // Enable GPIO A and C in RCC + *RCC_AHB1ENR |= (GPIOAEN||GPIOCEN); + // Set DB pins to outputs + *GPIOA_MODER &= ~(0xFFFF<<8); + *GPIOA_MODER |= (0x5555<<8); + // Set RS, RW, and E pins to outputs + *GPIOC_MODER &= ~(0x3F<<16); + *GPIOC_MODER |= (0x15<<16); + // Delay for 40 ms + delay_ms(40); + +// Display Setup + // Write Function Set + writeInstruction(FUNCTION_SET); + delay_us(37); + // Write Function Set + writeInstruction(FUNCTION_SET); + delay_us(37); + // Write Display On + writeInstruction(DISPLAY_TOGGLE); + delay_us(37); + // Write Display Clear + writeInstruction(DISPLAY_CLEAR); + delay_ms(2); + // Write Entry Mode Set + writeInstruction(ENTRY_MODE_SET); + delay_us(37); + +} + +void lcd_clear(){ + writeInstruction(DISPLAY_CLEAR); + delay_ms(2); +} + +void lcd_home() { + writeInstruction(0x80); + delay_ms(2); +} + +void lcd_set_position(uint8_t posIndex) { + posIndex--; + int inst = 0x80; + if (posIndex > 15) { + inst |= (1<<6); + posIndex -= 16; + } + inst |= posIndex; + writeInstruction(inst); +} + +int lcd_print_string(char* str) { + int index = 0; + while (str[index] != 0x00) { + writeData(str[index]); + index++; + } + return index; +} + +void lcd_print_char(char c) { + writeData(c); +} + + +int lcd_print_num(int i){ + char numString[17]; + sprintf(numString, "%d", i); + return lcd_print_string(numString); +} diff --git a/labW3barnestr/Src/main.c b/labW3barnestr/Src/main.c new file mode 100644 index 0000000..1dc2f0d --- /dev/null +++ b/labW3barnestr/Src/main.c @@ -0,0 +1,119 @@ +/* + * main.c + * + * Created on: Dec 17, 2021 + * Author: Trevor Barnes + * A driver file to demonstrate the implemented functionality of the LCD and keypad. This file + * contains functionality for a simple 4-operation calculator with two operands. + */ +#include +#include +#include "lcd.h" +#include "keypad.h" + +char mathKeys[] = {'1','2','3','+','4','5','6','-','7','8','9','x','*','0','=','/'}; +char mathNums[] = {'1','2','3','_','4','5','6','_','7','8','9','_','_','0','_','_'}; +char mathOper[] = {'_','_','_','+','_','_','_','-','_','_','_','x','*','_','_','/'}; +char calculation[5]; + +void calculate(int operand1, int operand2, char operation) { + int result; + switch (operation) { + case '+': + result = operand1 + operand2; + break; + case '-': + result = operand1 - operand2; + break; + case 'x': + result = operand1 * operand2; + break; + default: + if (operand2 == 0) { + lcd_clear(); + char divError[] = " Err: Undefined "; + lcd_print_string(divError); + return; + } else { + result = operand1 / operand2; + } + } + lcd_print_num(result); +} + +void inputSequence() { + int currentKeyIndex; + lcd_clear(); + int seqIndex = 0; + + // While key != number, getKey + do { + currentKeyIndex = keypad_getKey()-1; + if (mathKeys[currentKeyIndex] == '*') { + return; + } + } while (mathKeys[currentKeyIndex] != mathNums[currentKeyIndex]); + calculation[seqIndex] = mathKeys[currentKeyIndex]; + lcd_print_char(mathKeys[currentKeyIndex]); + seqIndex++; + + // While key != operation, getKey + do { + currentKeyIndex = keypad_getKey()-1; + if(mathKeys[currentKeyIndex] == '*') { + return; + } + } while (mathKeys[currentKeyIndex] != mathOper[currentKeyIndex]); + calculation[seqIndex] = mathKeys[currentKeyIndex]; + lcd_print_char(mathKeys[currentKeyIndex]); + seqIndex++; + + // While key != number, getKey + do { + currentKeyIndex = keypad_getKey()-1; + if(mathKeys[currentKeyIndex] == '*') { + return; + } + } while (mathKeys[currentKeyIndex] != mathNums[currentKeyIndex]); + calculation[seqIndex] = mathKeys[currentKeyIndex]; + lcd_print_char(mathKeys[currentKeyIndex]); + seqIndex++; + + // While key != '=' + do { + currentKeyIndex = keypad_getKey()-1; + if(mathKeys[currentKeyIndex] == '*') { + return; + } + } while (mathKeys[currentKeyIndex] != '='); + lcd_print_char(mathKeys[currentKeyIndex]); + // Calculate + calculate(calculation[0] -= '0', calculation[2] -= '0', calculation[1]); + do { + currentKeyIndex = keypad_getKey()-1; + } while (mathKeys[currentKeyIndex] != '*'); +} + +// main +int main(){ + + // Initialize Components + keypad_init(); + lcd_init(); + + // Prompt Message + char prompt1[]= "+- Calculator x/"; + char prompt2[]= " Push any key "; + lcd_print_string(prompt1); + lcd_set_position(17); + lcd_print_string(prompt2); + keypad_getKey(); + + while(1) { + inputSequence(); + } + return 0; +} + + + diff --git a/labW3barnestr/Startup/startup_stm32f446retx.s b/labW3barnestr/Startup/startup_stm32f446retx.s new file mode 100644 index 0000000..80d13e5 --- /dev/null +++ b/labW3barnestr/Startup/startup_stm32f446retx.s @@ -0,0 +1,525 @@ +/** + ****************************************************************************** + * @file startup_stm32f446retx.s + * @author Auto-generated by STM32CubeIDE + * @Abstract : Startup script for STM32F446RETx Device + * @version V1.0.0 + * @date 2020-12-17 + ****************************************************************************** + */ + +.syntax unified +.cpu cortex-m4 +.fpu softvfp +.thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + .size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The STM32F446RETx vector table. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window Watchdog interrupt */ + .word PVD_IRQHandler /* PVD through EXTI line detection interrupt */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamp interrupts through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup interrupt through the EXTI line */ + .word FLASH_IRQHandler /* Flash global interrupt */ + .word RCC_IRQHandler /* RCC global interrupt */ + .word EXTI0_IRQHandler /* EXTI Line0 interrupt */ + .word EXTI1_IRQHandler /* EXTI Line1 interrupt */ + .word EXTI2_IRQHandler /* EXTI Line2 interrupt */ + .word EXTI3_IRQHandler /* EXTI Line3 interrupt */ + .word EXTI4_IRQHandler /* EXTI Line4 interrupt */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream0 global interrupt */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream1 global interrupt */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream2 global interrupt */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream3 global interrupt */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream4 global interrupt */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream5 global interrupt */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream6 global interrupt */ + .word ADC_IRQHandler /* ADC1 global interrupt */ + .word CAN1_TX_IRQHandler /* CAN1 TX interrupts */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 interrupts */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 interrupts */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE interrupt */ + .word EXTI9_5_IRQHandler /* EXTI Line[9:5] interrupts */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break interrupt and TIM9 global interrupt */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update interrupt and TIM10 global interrupt */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation interrupts and TIM11 global interrupt */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare interrupt */ + .word TIM2_IRQHandler /* TIM2 global interrupt */ + .word TIM3_IRQHandler /* TIM3 global interrupt */ + .word TIM4_IRQHandler /* TIM4 global interrupt */ + .word I2C1_EV_IRQHandler /* I2C1 event interrupt */ + .word I2C1_ER_IRQHandler /* I2C1 error interrupt */ + .word I2C2_EV_IRQHandler /* I2C2 event interrupt */ + .word I2C2_ER_IRQHandler /* I2C2 error interrupt */ + .word SPI1_IRQHandler /* SPI1 global interrupt */ + .word SPI2_IRQHandler /* SPI2 global interrupt */ + .word USART1_IRQHandler /* USART1 global interrupt */ + .word USART2_IRQHandler /* USART2 global interrupt */ + .word USART3_IRQHandler /* USART3 global interrupt */ + .word EXTI15_10_IRQHandler /* EXTI Line[15:10] interrupts */ + .word RTC_Alarm_IRQHandler /* RTC Alarms (A and B) through EXTI line interrupt */ + .word OTG_FS_WKUP_IRQHandler /* USB On-The-Go FS Wakeup through EXTI line interrupt */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break interrupt and TIM12 global interrupt */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update interrupt and TIM13 global interrupt */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation interrupts and TIM14 global interrupt */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare interrupt */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 global interrupt */ + .word FMC_IRQHandler /* FMC global interrupt */ + .word SDIO_IRQHandler /* SDIO global interrupt */ + .word TIM5_IRQHandler /* TIM5 global interrupt */ + .word SPI3_IRQHandler /* SPI3 global interrupt */ + .word UART4_IRQHandler /* UART4 global interrupt */ + .word UART5_IRQHandler /* UART5 global interrupt */ + .word TIM6_DAC_IRQHandler /* TIM6 global interrupt, DAC1 and DAC2 underrun error interrupt */ + .word TIM7_IRQHandler /* TIM7 global interrupt */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream0 global interrupt */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream1 global interrupt */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream2 global interrupt */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream3 global interrupt */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word CAN2_TX_IRQHandler /* CAN2 TX interrupts */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 interrupts */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 interrupts */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE interrupt */ + .word OTG_FS_IRQHandler /* USB On The Go FS global interrupt */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream5 global interrupt */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream6 global interrupt */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream7 global interrupt */ + .word USART6_IRQHandler /* USART6 global interrupt */ + .word I2C3_EV_IRQHandler /* I2C3 event interrupt */ + .word I2C3_ER_IRQHandler /* I2C3 error interrupt */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB On The Go HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB On The Go HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB On The Go HS Wakeup */ + .word OTG_HS_IRQHandler /* USB On The Go HS global interrupt */ + .word DCMI_IRQHandler /* DCMI global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FPU_IRQHandler /* Floating point unit interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI 4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SAI1_IRQHandler /* SAI1 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SAI2_IRQHandler /* SAI2 global interrupt */ + .word QuadSPI_IRQHandler /* QuadSPI global interrupt */ + .word HDMI_CEC_IRQHandler /* HDMI-CEC global interrupt */ + .word SPDIF_Rx_IRQHandler /* SPDIF-Rx global interrupt */ + .word FMPI2C1_IRQHandler /* FMPI2C1 event interrupt */ + .word FMPI2C1_error_IRQHandler /* FMPI2C1 error interrupt */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QuadSPI_IRQHandler + .thumb_set QuadSPI_IRQHandler,Default_Handler + + .weak HDMI_CEC_IRQHandler + .thumb_set HDMI_CEC_IRQHandler,Default_Handler + + .weak SPDIF_Rx_IRQHandler + .thumb_set SPDIF_Rx_IRQHandler,Default_Handler + + .weak FMPI2C1_IRQHandler + .thumb_set FMPI2C1_IRQHandler,Default_Handler + + .weak FMPI2C1_error_IRQHandler + .thumb_set FMPI2C1_error_IRQHandler,Default_Handler + + .weak SystemInit + +/************************ (C) COPYRIGHT STMicroelectonics *****END OF FILE****/ diff --git a/labW3barnestr/labW3barnestr Debug.launch b/labW3barnestr/labW3barnestr Debug.launch new file mode 100644 index 0000000..1d75858 --- /dev/null +++ b/labW3barnestr/labW3barnestr Debug.launch @@ -0,0 +1,64 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW4barnestr/.cproject b/labW4barnestr/.cproject new file mode 100644 index 0000000..5be7784 --- /dev/null +++ b/labW4barnestr/.cproject @@ -0,0 +1,172 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW4barnestr/.project b/labW4barnestr/.project new file mode 100644 index 0000000..da764e7 --- /dev/null +++ b/labW4barnestr/.project @@ -0,0 +1,32 @@ + + + labW4barnestr + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/labW4barnestr/.settings/language.settings.xml b/labW4barnestr/.settings/language.settings.xml new file mode 100644 index 0000000..efd9022 --- /dev/null +++ b/labW4barnestr/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/labW4barnestr/Debug/Src/subdir.mk b/labW4barnestr/Debug/Src/subdir.mk new file mode 100644 index 0000000..60c5275 --- /dev/null +++ b/labW4barnestr/Debug/Src/subdir.mk @@ -0,0 +1,36 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Src/delay.c \ +../Src/led.c \ +../Src/main.c \ +../Src/uart_driver.c + +OBJS += \ +./Src/delay.o \ +./Src/led.o \ +./Src/main.o \ +./Src/uart_driver.o + +C_DEPS += \ +./Src/delay.d \ +./Src/led.d \ +./Src/main.d \ +./Src/uart_driver.d + + +# Each subdirectory must supply rules for building sources it contributes +Src/%.o: ../Src/%.c Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DSTM32 -DSTM32F4 -DSTM32F446RETx -DDEBUG -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Src + +clean-Src: + -$(RM) ./Src/delay.d ./Src/delay.o ./Src/led.d ./Src/led.o ./Src/main.d ./Src/main.o ./Src/uart_driver.d ./Src/uart_driver.o + +.PHONY: clean-Src + diff --git a/labW4barnestr/Debug/Startup/subdir.mk b/labW4barnestr/Debug/Startup/subdir.mk new file mode 100644 index 0000000..ed2bf5d --- /dev/null +++ b/labW4barnestr/Debug/Startup/subdir.mk @@ -0,0 +1,27 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +S_SRCS += \ +../Startup/startup_stm32f446retx.s + +OBJS += \ +./Startup/startup_stm32f446retx.o + +S_DEPS += \ +./Startup/startup_stm32f446retx.d + + +# Each subdirectory must supply rules for building sources it contributes +Startup/%.o: ../Startup/%.s Startup/subdir.mk + arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + +clean: clean-Startup + +clean-Startup: + -$(RM) ./Startup/startup_stm32f446retx.d ./Startup/startup_stm32f446retx.o + +.PHONY: clean-Startup + diff --git a/labW4barnestr/Debug/labW4barnestr.bin b/labW4barnestr/Debug/labW4barnestr.bin new file mode 100644 index 0000000..8fd9e2d Binary files /dev/null and b/labW4barnestr/Debug/labW4barnestr.bin differ diff --git a/labW4barnestr/Debug/labW4barnestr.list b/labW4barnestr/Debug/labW4barnestr.list new file mode 100644 index 0000000..60811f3 --- /dev/null +++ b/labW4barnestr/Debug/labW4barnestr.list @@ -0,0 +1,4188 @@ + +labW4barnestr.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001c4 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00002330 080001d0 080001d0 000101d0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 000003b0 08002500 08002500 00012500 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 080028b0 080028b0 00020064 2**0 + CONTENTS + 4 .ARM 00000000 080028b0 080028b0 00020064 2**0 + CONTENTS + 5 .preinit_array 00000000 080028b0 080028b0 00020064 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 080028b0 080028b0 000128b0 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 080028b4 080028b4 000128b4 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 00000064 20000000 080028b8 00020000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000038 20000064 0800291c 00020064 2**2 + ALLOC + 10 ._user_heap_stack 00000604 2000009c 0800291c 0002009c 2**0 + ALLOC + 11 .ARM.attributes 00000030 00000000 00000000 00020064 2**0 + CONTENTS, READONLY + 12 .debug_info 0000200e 00000000 00000000 00020094 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 000006b9 00000000 00000000 000220a2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 00000118 00000000 00000000 00022760 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_ranges 000000e0 00000000 00000000 00022878 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 000015b7 00000000 00000000 00022958 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 000015e3 00000000 00000000 00023f0f 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 00009565 00000000 00000000 000254f2 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000053 00000000 00000000 0002ea57 2**0 + CONTENTS, READONLY + 20 .debug_frame 00000fe0 00000000 00000000 0002eaac 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + 21 .stab 0000006c 00000000 00000000 0002fa8c 2**2 + CONTENTS, READONLY, DEBUGGING + 22 .stabstr 000000e3 00000000 00000000 0002faf8 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +080001d0 <__do_global_dtors_aux>: + 80001d0: b510 push {r4, lr} + 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) + 80001d4: 7823 ldrb r3, [r4, #0] + 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> + 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) + 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> + 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) + 80001de: f3af 8000 nop.w + 80001e2: 2301 movs r3, #1 + 80001e4: 7023 strb r3, [r4, #0] + 80001e6: bd10 pop {r4, pc} + 80001e8: 20000064 .word 0x20000064 + 80001ec: 00000000 .word 0x00000000 + 80001f0: 080024e8 .word 0x080024e8 + +080001f4 : + 80001f4: b508 push {r3, lr} + 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) + 80001f8: b11b cbz r3, 8000202 + 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) + 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) + 80001fe: f3af 8000 nop.w + 8000202: bd08 pop {r3, pc} + 8000204: 00000000 .word 0x00000000 + 8000208: 20000068 .word 0x20000068 + 800020c: 080024e8 .word 0x080024e8 + +08000210 : + 8000210: f001 01ff and.w r1, r1, #255 ; 0xff + 8000214: 2a10 cmp r2, #16 + 8000216: db2b blt.n 8000270 + 8000218: f010 0f07 tst.w r0, #7 + 800021c: d008 beq.n 8000230 + 800021e: f810 3b01 ldrb.w r3, [r0], #1 + 8000222: 3a01 subs r2, #1 + 8000224: 428b cmp r3, r1 + 8000226: d02d beq.n 8000284 + 8000228: f010 0f07 tst.w r0, #7 + 800022c: b342 cbz r2, 8000280 + 800022e: d1f6 bne.n 800021e + 8000230: b4f0 push {r4, r5, r6, r7} + 8000232: ea41 2101 orr.w r1, r1, r1, lsl #8 + 8000236: ea41 4101 orr.w r1, r1, r1, lsl #16 + 800023a: f022 0407 bic.w r4, r2, #7 + 800023e: f07f 0700 mvns.w r7, #0 + 8000242: 2300 movs r3, #0 + 8000244: e8f0 5602 ldrd r5, r6, [r0], #8 + 8000248: 3c08 subs r4, #8 + 800024a: ea85 0501 eor.w r5, r5, r1 + 800024e: ea86 0601 eor.w r6, r6, r1 + 8000252: fa85 f547 uadd8 r5, r5, r7 + 8000256: faa3 f587 sel r5, r3, r7 + 800025a: fa86 f647 uadd8 r6, r6, r7 + 800025e: faa5 f687 sel r6, r5, r7 + 8000262: b98e cbnz r6, 8000288 + 8000264: d1ee bne.n 8000244 + 8000266: bcf0 pop {r4, r5, r6, r7} + 8000268: f001 01ff and.w r1, r1, #255 ; 0xff + 800026c: f002 0207 and.w r2, r2, #7 + 8000270: b132 cbz r2, 8000280 + 8000272: f810 3b01 ldrb.w r3, [r0], #1 + 8000276: 3a01 subs r2, #1 + 8000278: ea83 0301 eor.w r3, r3, r1 + 800027c: b113 cbz r3, 8000284 + 800027e: d1f8 bne.n 8000272 + 8000280: 2000 movs r0, #0 + 8000282: 4770 bx lr + 8000284: 3801 subs r0, #1 + 8000286: 4770 bx lr + 8000288: 2d00 cmp r5, #0 + 800028a: bf06 itte eq + 800028c: 4635 moveq r5, r6 + 800028e: 3803 subeq r0, #3 + 8000290: 3807 subne r0, #7 + 8000292: f015 0f01 tst.w r5, #1 + 8000296: d107 bne.n 80002a8 + 8000298: 3001 adds r0, #1 + 800029a: f415 7f80 tst.w r5, #256 ; 0x100 + 800029e: bf02 ittt eq + 80002a0: 3001 addeq r0, #1 + 80002a2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000 + 80002a6: 3001 addeq r0, #1 + 80002a8: bcf0 pop {r4, r5, r6, r7} + 80002aa: 3801 subs r0, #1 + 80002ac: 4770 bx lr + 80002ae: bf00 nop + +080002b0 : + 80002b0: f810 2b01 ldrb.w r2, [r0], #1 + 80002b4: f811 3b01 ldrb.w r3, [r1], #1 + 80002b8: 2a01 cmp r2, #1 + 80002ba: bf28 it cs + 80002bc: 429a cmpcs r2, r3 + 80002be: d0f7 beq.n 80002b0 + 80002c0: 1ad0 subs r0, r2, r3 + 80002c2: 4770 bx lr + +080002c4 : + 80002c4: 4603 mov r3, r0 + 80002c6: f813 2b01 ldrb.w r2, [r3], #1 + 80002ca: 2a00 cmp r2, #0 + 80002cc: d1fb bne.n 80002c6 + 80002ce: 1a18 subs r0, r3, r0 + 80002d0: 3801 subs r0, #1 + 80002d2: 4770 bx lr + +080002d4 : +#include +#include + +int ledSpeed = 5; + +void led_init(){ + 80002d4: b480 push {r7} + 80002d6: af00 add r7, sp, #0 + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<) + 80002da: 681b ldr r3, [r3, #0] + 80002dc: 4a12 ldr r2, [pc, #72] ; (8000328 ) + 80002de: f043 0302 orr.w r3, r3, #2 + 80002e2: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0x3FFF<<10); + 80002e4: 4b11 ldr r3, [pc, #68] ; (800032c ) + 80002e6: 681b ldr r3, [r3, #0] + 80002e8: 4a10 ldr r2, [pc, #64] ; (800032c ) + 80002ea: f423 037f bic.w r3, r3, #16711680 ; 0xff0000 + 80002ee: f423 437c bic.w r3, r3, #64512 ; 0xfc00 + 80002f2: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x555<<10); + 80002f4: 4b0d ldr r3, [pc, #52] ; (800032c ) + 80002f6: 681b ldr r3, [r3, #0] + 80002f8: 4a0c ldr r2, [pc, #48] ; (800032c ) + 80002fa: f443 13aa orr.w r3, r3, #1392640 ; 0x154000 + 80002fe: f443 53a0 orr.w r3, r3, #5120 ; 0x1400 + 8000302: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0xFF<<24); + 8000304: 4b09 ldr r3, [pc, #36] ; (800032c ) + 8000306: 681b ldr r3, [r3, #0] + 8000308: 4a08 ldr r2, [pc, #32] ; (800032c ) + 800030a: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 + 800030e: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x55<<24); + 8000310: 4b06 ldr r3, [pc, #24] ; (800032c ) + 8000312: 681b ldr r3, [r3, #0] + 8000314: 4a05 ldr r2, [pc, #20] ; (800032c ) + 8000316: f043 43aa orr.w r3, r3, #1426063360 ; 0x55000000 + 800031a: 6013 str r3, [r2, #0] +} + 800031c: bf00 nop + 800031e: 46bd mov sp, r7 + 8000320: f85d 7b04 ldr.w r7, [sp], #4 + 8000324: 4770 bx lr + 8000326: bf00 nop + 8000328: 40023830 .word 0x40023830 + 800032c: 40020400 .word 0x40020400 + +08000330 : +#define F_CPU 16000000UL + +/** + * Reads and prints the memory value at address provided: "addr" + */ +void readMem(uint32_t addr) { + 8000330: b580 push {r7, lr} + 8000332: b084 sub sp, #16 + 8000334: af00 add r7, sp, #0 + 8000336: 6078 str r0, [r7, #4] + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + 8000338: 687b ldr r3, [r7, #4] + 800033a: 60fb str r3, [r7, #12] + // Formatted print with both hex and decimal values + printf("Memory Value at %#08x\n\r" + 800033c: 68fb ldr r3, [r7, #12] + 800033e: 681a ldr r2, [r3, #0] + 8000340: 68fb ldr r3, [r7, #12] + 8000342: 681b ldr r3, [r3, #0] + 8000344: 6879 ldr r1, [r7, #4] + 8000346: 4803 ldr r0, [pc, #12] ; (8000354 ) + 8000348: f000 fc30 bl 8000bac + "Hex: %#08x\n\r" + "Decimal: %d\n\r", addr, *memPtr, *memPtr); + return; + 800034c: bf00 nop +} + 800034e: 3710 adds r7, #16 + 8000350: 46bd mov sp, r7 + 8000352: bd80 pop {r7, pc} + 8000354: 08002500 .word 0x08002500 + +08000358 : +/** + * Writes the provided "data" value as an unsigned 32-bit word at the provided address: "addr" + */ +void writeMem(uint32_t addr, uint32_t data) { + 8000358: b580 push {r7, lr} + 800035a: b084 sub sp, #16 + 800035c: af00 add r7, sp, #0 + 800035e: 6078 str r0, [r7, #4] + 8000360: 6039 str r1, [r7, #0] + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + 8000362: 687b ldr r3, [r7, #4] + 8000364: 60fb str r3, [r7, #12] + // Write data + *memPtr = data; + 8000366: 68fb ldr r3, [r7, #12] + 8000368: 683a ldr r2, [r7, #0] + 800036a: 601a str r2, [r3, #0] + // Confirmation printout showing the new value and address + printf("Value written at %#08x: %u \n\r", addr, data); + 800036c: 683a ldr r2, [r7, #0] + 800036e: 6879 ldr r1, [r7, #4] + 8000370: 4803 ldr r0, [pc, #12] ; (8000380 ) + 8000372: f000 fc1b bl 8000bac + return; + 8000376: bf00 nop +} + 8000378: 3710 adds r7, #16 + 800037a: 46bd mov sp, r7 + 800037c: bd80 pop {r7, pc} + 800037e: bf00 nop + 8000380: 08002534 .word 0x08002534 + +08000384 : + +/** + * Prints out formatted, hexadecimal memory values in "byte-sized" chunks starting at the provided + * memory address: "addr". The length of the memory dump is provided by "length". + */ +void dumpMem(uint32_t addr, int length) { + 8000384: b580 push {r7, lr} + 8000386: b084 sub sp, #16 + 8000388: af00 add r7, sp, #0 + 800038a: 6078 str r0, [r7, #4] + 800038c: 6039 str r1, [r7, #0] + // Set length to default value if length is negative + // (No limit or protection for large, overflow values yet) + if(length <= 0) { + 800038e: 683b ldr r3, [r7, #0] + 8000390: 2b00 cmp r3, #0 + 8000392: dc04 bgt.n 800039e + length = 16; + 8000394: 2310 movs r3, #16 + 8000396: 603b str r3, [r7, #0] + printf("Length set to default! (16)\n\r"); + 8000398: 4813 ldr r0, [pc, #76] ; (80003e8 ) + 800039a: f000 fc07 bl 8000bac + } + // Assign and casts a new int pointer the value of addr + uint8_t * memPtr = (uint8_t *)addr; + 800039e: 687b ldr r3, [r7, #4] + 80003a0: 60fb str r3, [r7, #12] + // Loop that executes each read and print operation + for(int i=0 ; i < length ; i++) { + 80003a2: 2300 movs r3, #0 + 80003a4: 60bb str r3, [r7, #8] + 80003a6: e014 b.n 80003d2 + // Print newline and memory location every 16 bytes + if((i % 16) == 0) { + 80003a8: 68bb ldr r3, [r7, #8] + 80003aa: f003 030f and.w r3, r3, #15 + 80003ae: 2b00 cmp r3, #0 + 80003b0: d103 bne.n 80003ba + printf("\n\r%p:", memPtr); + 80003b2: 68f9 ldr r1, [r7, #12] + 80003b4: 480d ldr r0, [pc, #52] ; (80003ec ) + 80003b6: f000 fbf9 bl 8000bac + } + // Print each byte + printf(" %02X", *memPtr); + 80003ba: 68fb ldr r3, [r7, #12] + 80003bc: 781b ldrb r3, [r3, #0] + 80003be: 4619 mov r1, r3 + 80003c0: 480b ldr r0, [pc, #44] ; (80003f0 ) + 80003c2: f000 fbf3 bl 8000bac + // Iterate pointer to next byte + memPtr++; + 80003c6: 68fb ldr r3, [r7, #12] + 80003c8: 3301 adds r3, #1 + 80003ca: 60fb str r3, [r7, #12] + for(int i=0 ; i < length ; i++) { + 80003cc: 68bb ldr r3, [r7, #8] + 80003ce: 3301 adds r3, #1 + 80003d0: 60bb str r3, [r7, #8] + 80003d2: 68ba ldr r2, [r7, #8] + 80003d4: 683b ldr r3, [r7, #0] + 80003d6: 429a cmp r2, r3 + 80003d8: dbe6 blt.n 80003a8 + } + printf("\n\r"); + 80003da: 4806 ldr r0, [pc, #24] ; (80003f4 ) + 80003dc: f000 fbe6 bl 8000bac + return; + 80003e0: bf00 nop +} + 80003e2: 3710 adds r7, #16 + 80003e4: 46bd mov sp, r7 + 80003e6: bd80 pop {r7, pc} + 80003e8: 08002554 .word 0x08002554 + 80003ec: 08002574 .word 0x08002574 + 80003f0: 0800257c .word 0x0800257c + 80003f4: 08002584 .word 0x08002584 + +080003f8 : + +/** + * Prints a help dialog that provides the user the list of available commands + */ +void printHelp() { + 80003f8: b580 push {r7, lr} + 80003fa: af00 add r7, sp, #0 + printf("*Commands*\n\r"); + 80003fc: 4806 ldr r0, [pc, #24] ; (8000418 ) + 80003fe: f000 fbd5 bl 8000bac + printf("'rmw {hex address}' - Reads mem at a given address\n\r"); + 8000402: 4806 ldr r0, [pc, #24] ; (800041c ) + 8000404: f000 fbd2 bl 8000bac + printf("'wmw {hex address} {value}' - Writes the given value as a word to the given address\n\r"); + 8000408: 4805 ldr r0, [pc, #20] ; (8000420 ) + 800040a: f000 fbcf bl 8000bac + printf("'dm {hex address} {length}' - Dumps the memory at a given address. Defaults to 16 B if no " + 800040e: 4805 ldr r0, [pc, #20] ; (8000424 ) + 8000410: f000 fbcc bl 8000bac + "length is given\n\r"); +} + 8000414: bf00 nop + 8000416: bd80 pop {r7, pc} + 8000418: 08002588 .word 0x08002588 + 800041c: 08002598 .word 0x08002598 + 8000420: 080025d0 .word 0x080025d0 + 8000424: 08002628 .word 0x08002628 + +08000428
: + +/** + * Main function that handles usart/led initialization and command input/parsing from the user + */ +int main(void) { + 8000428: b580 push {r7, lr} + 800042a: b096 sub sp, #88 ; 0x58 + 800042c: af02 add r7, sp, #8 + init_usart2(57600,F_CPU); + 800042e: 493c ldr r1, [pc, #240] ; (8000520 ) + 8000430: f44f 4061 mov.w r0, #57600 ; 0xe100 + 8000434: f000 f90a bl 800064c + led_init(); + 8000438: f7ff ff4c bl 80002d4 + uint32_t address; + uint32_t data; + int length; + for(;;) { + // Get command from user + fgets(line, 100, stdin); + 800043c: 4b39 ldr r3, [pc, #228] ; (8000524 ) + 800043e: 681b ldr r3, [r3, #0] + 8000440: 685a ldr r2, [r3, #4] + 8000442: f107 031c add.w r3, r7, #28 + 8000446: 2164 movs r1, #100 ; 0x64 + 8000448: 4618 mov r0, r3 + 800044a: f000 f9fb bl 8000844 + // Parse only the command for strcmp + sscanf(line, "%s", command); + 800044e: f107 0210 add.w r2, r7, #16 + 8000452: f107 031c add.w r3, r7, #28 + 8000456: 4934 ldr r1, [pc, #208] ; (8000528 ) + 8000458: 4618 mov r0, r3 + 800045a: f000 fd29 bl 8000eb0 + if (!strcmp(command, "help")) { + 800045e: f107 0310 add.w r3, r7, #16 + 8000462: 4932 ldr r1, [pc, #200] ; (800052c ) + 8000464: 4618 mov r0, r3 + 8000466: f7ff ff23 bl 80002b0 + 800046a: 4603 mov r3, r0 + 800046c: 2b00 cmp r3, #0 + 800046e: d102 bne.n 8000476 + printHelp(); + 8000470: f7ff ffc2 bl 80003f8 + 8000474: e7e2 b.n 800043c + } else if (!strcmp(command,"rmw")) { + 8000476: f107 0310 add.w r3, r7, #16 + 800047a: 492d ldr r1, [pc, #180] ; (8000530 ) + 800047c: 4618 mov r0, r3 + 800047e: f7ff ff17 bl 80002b0 + 8000482: 4603 mov r3, r0 + 8000484: 2b00 cmp r3, #0 + 8000486: d10d bne.n 80004a4 + // Parse line again with expected format and values + sscanf(line, "%s %X", command, &address); + 8000488: f107 030c add.w r3, r7, #12 + 800048c: f107 0210 add.w r2, r7, #16 + 8000490: f107 001c add.w r0, r7, #28 + 8000494: 4927 ldr r1, [pc, #156] ; (8000534 ) + 8000496: f000 fd0b bl 8000eb0 + //printf("Command: %s Address: %x\n\r", command, address); + readMem(address); + 800049a: 68fb ldr r3, [r7, #12] + 800049c: 4618 mov r0, r3 + 800049e: f7ff ff47 bl 8000330 + 80004a2: e7cb b.n 800043c + } else if (!strcmp(command, "wmw")) { + 80004a4: f107 0310 add.w r3, r7, #16 + 80004a8: 4923 ldr r1, [pc, #140] ; (8000538 ) + 80004aa: 4618 mov r0, r3 + 80004ac: f7ff ff00 bl 80002b0 + 80004b0: 4603 mov r3, r0 + 80004b2: 2b00 cmp r3, #0 + 80004b4: d113 bne.n 80004de + // Parse line again with expected format and values + sscanf(line, "%s %X %u", command, &address, &data); + 80004b6: f107 010c add.w r1, r7, #12 + 80004ba: f107 0210 add.w r2, r7, #16 + 80004be: f107 001c add.w r0, r7, #28 + 80004c2: f107 0308 add.w r3, r7, #8 + 80004c6: 9300 str r3, [sp, #0] + 80004c8: 460b mov r3, r1 + 80004ca: 491c ldr r1, [pc, #112] ; (800053c ) + 80004cc: f000 fcf0 bl 8000eb0 + //printf("Command: %s Address: %x Data: %u\n\r", command, address, data); + writeMem(address, data); + 80004d0: 68fb ldr r3, [r7, #12] + 80004d2: 68ba ldr r2, [r7, #8] + 80004d4: 4611 mov r1, r2 + 80004d6: 4618 mov r0, r3 + 80004d8: f7ff ff3e bl 8000358 + 80004dc: e7ae b.n 800043c + } else if (!strcmp(command, "dm")) { + 80004de: f107 0310 add.w r3, r7, #16 + 80004e2: 4917 ldr r1, [pc, #92] ; (8000540 ) + 80004e4: 4618 mov r0, r3 + 80004e6: f7ff fee3 bl 80002b0 + 80004ea: 4603 mov r3, r0 + 80004ec: 2b00 cmp r3, #0 + 80004ee: d112 bne.n 8000516 + // Parse line again with expected format and values + sscanf(line, "%s %X %u", command, &address, &length); + 80004f0: f107 010c add.w r1, r7, #12 + 80004f4: f107 0210 add.w r2, r7, #16 + 80004f8: f107 001c add.w r0, r7, #28 + 80004fc: 1d3b adds r3, r7, #4 + 80004fe: 9300 str r3, [sp, #0] + 8000500: 460b mov r3, r1 + 8000502: 490e ldr r1, [pc, #56] ; (800053c ) + 8000504: f000 fcd4 bl 8000eb0 + //printf("Command: %s Address: %x Length: %d\n\r", command, address, length); + dumpMem(address, length); + 8000508: 68fb ldr r3, [r7, #12] + 800050a: 687a ldr r2, [r7, #4] + 800050c: 4611 mov r1, r2 + 800050e: 4618 mov r0, r3 + 8000510: f7ff ff38 bl 8000384 + 8000514: e792 b.n 800043c + } else { + printf("Invalid input, type 'help' for instructions\n\r"); + 8000516: 480b ldr r0, [pc, #44] ; (8000544 ) + 8000518: f000 fb48 bl 8000bac + fgets(line, 100, stdin); + 800051c: e78e b.n 800043c + 800051e: bf00 nop + 8000520: 00f42400 .word 0x00f42400 + 8000524: 20000000 .word 0x20000000 + 8000528: 08002694 .word 0x08002694 + 800052c: 08002698 .word 0x08002698 + 8000530: 080026a0 .word 0x080026a0 + 8000534: 080026a4 .word 0x080026a4 + 8000538: 080026ac .word 0x080026ac + 800053c: 080026b0 .word 0x080026b0 + 8000540: 080026bc .word 0x080026bc + 8000544: 080026c0 .word 0x080026c0 + +08000548 <_read>: + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + 8000548: b580 push {r7, lr} + 800054a: b086 sub sp, #24 + 800054c: af00 add r7, sp, #0 + 800054e: 60f8 str r0, [r7, #12] + 8000550: 60b9 str r1, [r7, #8] + 8000552: 607a str r2, [r7, #4] + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + 8000554: 2300 movs r3, #0 + 8000556: 613b str r3, [r7, #16] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8000558: 2300 movs r3, #0 + 800055a: 617b str r3, [r7, #20] + 800055c: e012 b.n 8000584 <_read+0x3c> + { + //*ptr++ = __io_getchar(); + byteCnt++; + 800055e: 693b ldr r3, [r7, #16] + 8000560: 3301 adds r3, #1 + 8000562: 613b str r3, [r7, #16] + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + 8000564: f000 f836 bl 80005d4 + 8000568: 4603 mov r3, r0 + 800056a: 461a mov r2, r3 + 800056c: 68bb ldr r3, [r7, #8] + 800056e: 701a strb r2, [r3, #0] + if(*ptr == '\n') break; + 8000570: 68bb ldr r3, [r7, #8] + 8000572: 781b ldrb r3, [r3, #0] + 8000574: 2b0a cmp r3, #10 + 8000576: d00a beq.n 800058e <_read+0x46> + ptr++; + 8000578: 68bb ldr r3, [r7, #8] + 800057a: 3301 adds r3, #1 + 800057c: 60bb str r3, [r7, #8] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 800057e: 697b ldr r3, [r7, #20] + 8000580: 3301 adds r3, #1 + 8000582: 617b str r3, [r7, #20] + 8000584: 697a ldr r2, [r7, #20] + 8000586: 687b ldr r3, [r7, #4] + 8000588: 429a cmp r2, r3 + 800058a: dbe8 blt.n 800055e <_read+0x16> + 800058c: e000 b.n 8000590 <_read+0x48> + if(*ptr == '\n') break; + 800058e: bf00 nop + } + + //return len; + return byteCnt; // Return byte count + 8000590: 693b ldr r3, [r7, #16] +} + 8000592: 4618 mov r0, r3 + 8000594: 3718 adds r7, #24 + 8000596: 46bd mov sp, r7 + 8000598: bd80 pop {r7, pc} + +0800059a <_write>: + +int _write(int file, char *ptr, int len) +{ + 800059a: b580 push {r7, lr} + 800059c: b086 sub sp, #24 + 800059e: af00 add r7, sp, #0 + 80005a0: 60f8 str r0, [r7, #12] + 80005a2: 60b9 str r1, [r7, #8] + 80005a4: 607a str r2, [r7, #4] + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + 80005a6: 2300 movs r3, #0 + 80005a8: 617b str r3, [r7, #20] + 80005aa: e009 b.n 80005c0 <_write+0x26> + { + usart2_putch(*ptr++); + 80005ac: 68bb ldr r3, [r7, #8] + 80005ae: 1c5a adds r2, r3, #1 + 80005b0: 60ba str r2, [r7, #8] + 80005b2: 781b ldrb r3, [r3, #0] + 80005b4: 4618 mov r0, r3 + 80005b6: f000 f82f bl 8000618 + for (DataIdx = 0; DataIdx < len; DataIdx++) + 80005ba: 697b ldr r3, [r7, #20] + 80005bc: 3301 adds r3, #1 + 80005be: 617b str r3, [r7, #20] + 80005c0: 697a ldr r2, [r7, #20] + 80005c2: 687b ldr r3, [r7, #4] + 80005c4: 429a cmp r2, r3 + 80005c6: dbf1 blt.n 80005ac <_write+0x12> + } + return len; + 80005c8: 687b ldr r3, [r7, #4] +} + 80005ca: 4618 mov r0, r3 + 80005cc: 3718 adds r7, #24 + 80005ce: 46bd mov sp, r7 + 80005d0: bd80 pop {r7, pc} + ... + +080005d4 : + + + +char usart2_getch(){ + 80005d4: b580 push {r7, lr} + 80005d6: b082 sub sp, #8 + 80005d8: af00 add r7, sp, #0 + char c; + while((*(USART_SR)&(1<) + 80005de: 681b ldr r3, [r3, #0] + 80005e0: f003 0320 and.w r3, r3, #32 + 80005e4: 2b20 cmp r3, #32 + 80005e6: d1f9 bne.n 80005dc + c = ((char) *USART_DR); // Read character from usart + 80005e8: 4b0a ldr r3, [pc, #40] ; (8000614 ) + 80005ea: 681b ldr r3, [r3, #0] + 80005ec: 71fb strb r3, [r7, #7] + usart2_putch(c); // Echo back + 80005ee: 79fb ldrb r3, [r7, #7] + 80005f0: 4618 mov r0, r3 + 80005f2: f000 f811 bl 8000618 + + if (c == '\r'){ // If character is CR + 80005f6: 79fb ldrb r3, [r7, #7] + 80005f8: 2b0d cmp r3, #13 + 80005fa: d104 bne.n 8000606 + usart2_putch('\n'); // send it + 80005fc: 200a movs r0, #10 + 80005fe: f000 f80b bl 8000618 + c = '\n'; // Return LF. fgets is terminated by LF + 8000602: 230a movs r3, #10 + 8000604: 71fb strb r3, [r7, #7] + } + + return c; + 8000606: 79fb ldrb r3, [r7, #7] +} + 8000608: 4618 mov r0, r3 + 800060a: 3708 adds r7, #8 + 800060c: 46bd mov sp, r7 + 800060e: bd80 pop {r7, pc} + 8000610: 40004400 .word 0x40004400 + 8000614: 40004404 .word 0x40004404 + +08000618 : + +void usart2_putch(char c){ + 8000618: b480 push {r7} + 800061a: b083 sub sp, #12 + 800061c: af00 add r7, sp, #0 + 800061e: 4603 mov r3, r0 + 8000620: 71fb strb r3, [r7, #7] + while((*(USART_SR)&(1<) + 8000626: 681b ldr r3, [r3, #0] + 8000628: f003 0380 and.w r3, r3, #128 ; 0x80 + 800062c: 2b80 cmp r3, #128 ; 0x80 + 800062e: d1f9 bne.n 8000624 + *(USART_DR) = c; + 8000630: 4a05 ldr r2, [pc, #20] ; (8000648 ) + 8000632: 79fb ldrb r3, [r7, #7] + 8000634: 6013 str r3, [r2, #0] +} + 8000636: bf00 nop + 8000638: 370c adds r7, #12 + 800063a: 46bd mov sp, r7 + 800063c: f85d 7b04 ldr.w r7, [sp], #4 + 8000640: 4770 bx lr + 8000642: bf00 nop + 8000644: 40004400 .word 0x40004400 + 8000648: 40004404 .word 0x40004404 + +0800064c : + +void init_usart2(uint32_t baud, uint32_t sysclk){ + 800064c: b580 push {r7, lr} + 800064e: b082 sub sp, #8 + 8000650: af00 add r7, sp, #0 + 8000652: 6078 str r0, [r7, #4] + 8000654: 6039 str r1, [r7, #0] + // Enable clocks for GPIOA and USART2 + *(RCC_AHB1ENR) |= (1<) + 8000658: 681b ldr r3, [r3, #0] + 800065a: 4a1f ldr r2, [pc, #124] ; (80006d8 ) + 800065c: f043 0301 orr.w r3, r3, #1 + 8000660: 6013 str r3, [r2, #0] + *(RCC_APB1ENR) |= (1<) + 8000664: 681b ldr r3, [r3, #0] + 8000666: 4a1d ldr r2, [pc, #116] ; (80006dc ) + 8000668: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 800066c: 6013 str r3, [r2, #0] + + // Function 7 of PORTA pins is USART + *(GPIOA_AFRL) &= (0xFFFF00FF); // Clear the bits associated with PA3 and PA2 + 800066e: 4b1c ldr r3, [pc, #112] ; (80006e0 ) + 8000670: 681b ldr r3, [r3, #0] + 8000672: 4a1b ldr r2, [pc, #108] ; (80006e0 ) + 8000674: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 8000678: 6013 str r3, [r2, #0] + *(GPIOA_AFRL) |= (0b01110111<<8); // Choose function 7 for both PA3 and PA2 + 800067a: 4b19 ldr r3, [pc, #100] ; (80006e0 ) + 800067c: 681b ldr r3, [r3, #0] + 800067e: 4a18 ldr r2, [pc, #96] ; (80006e0 ) + 8000680: f443 43ee orr.w r3, r3, #30464 ; 0x7700 + 8000684: 6013 str r3, [r2, #0] + *(GPIOA_MODER) &= (0xFFFFFF0F); // Clear mode bits for PA3 and PA2 + 8000686: 4b17 ldr r3, [pc, #92] ; (80006e4 ) + 8000688: 681b ldr r3, [r3, #0] + 800068a: 4a16 ldr r2, [pc, #88] ; (80006e4 ) + 800068c: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 8000690: 6013 str r3, [r2, #0] + *(GPIOA_MODER) |= (0b1010<<4); // Both PA3 and PA2 in alt function mode + 8000692: 4b14 ldr r3, [pc, #80] ; (80006e4 ) + 8000694: 681b ldr r3, [r3, #0] + 8000696: 4a13 ldr r2, [pc, #76] ; (80006e4 ) + 8000698: f043 03a0 orr.w r3, r3, #160 ; 0xa0 + 800069c: 6013 str r3, [r2, #0] + //USART2_init(); //8n1 no flow control + // over8 = 0..oversample by 16 + // M = 0..1 start bit, data size is 8, 1 stop bit + // PCE= 0..Parity check not enabled + // no interrupts... using polling + *(USART_CR1) = (1<) + 80006a0: f242 020c movw r2, #8204 ; 0x200c + 80006a4: 601a str r2, [r3, #0] + *(USART_CR2) = 0; // This is the default, but do it anyway + 80006a6: 4b11 ldr r3, [pc, #68] ; (80006ec ) + 80006a8: 2200 movs r2, #0 + 80006aa: 601a str r2, [r3, #0] + *(USART_CR3) = 0; // This is the default, but do it anyway + 80006ac: 4b10 ldr r3, [pc, #64] ; (80006f0 ) + 80006ae: 2200 movs r2, #0 + 80006b0: 601a str r2, [r3, #0] + *(USART_BRR) = sysclk/baud; + 80006b2: 4910 ldr r1, [pc, #64] ; (80006f4 ) + 80006b4: 683a ldr r2, [r7, #0] + 80006b6: 687b ldr r3, [r7, #4] + 80006b8: fbb2 f3f3 udiv r3, r2, r3 + 80006bc: 600b str r3, [r1, #0] + + /* I'm not sure if this is needed for standard IO*/ + //setvbuf(stderr, NULL, _IONBF, 0); + //setvbuf(stdin, NULL, _IONBF, 0); + setvbuf(stdout, NULL, _IONBF, 0); + 80006be: 4b0e ldr r3, [pc, #56] ; (80006f8 ) + 80006c0: 681b ldr r3, [r3, #0] + 80006c2: 6898 ldr r0, [r3, #8] + 80006c4: 2300 movs r3, #0 + 80006c6: 2202 movs r2, #2 + 80006c8: 2100 movs r1, #0 + 80006ca: f000 fb2b bl 8000d24 +} + 80006ce: bf00 nop + 80006d0: 3708 adds r7, #8 + 80006d2: 46bd mov sp, r7 + 80006d4: bd80 pop {r7, pc} + 80006d6: bf00 nop + 80006d8: 40023830 .word 0x40023830 + 80006dc: 40023840 .word 0x40023840 + 80006e0: 40020020 .word 0x40020020 + 80006e4: 40020000 .word 0x40020000 + 80006e8: 4000440c .word 0x4000440c + 80006ec: 40004410 .word 0x40004410 + 80006f0: 40004414 .word 0x40004414 + 80006f4: 40004408 .word 0x40004408 + 80006f8: 20000000 .word 0x20000000 + +080006fc : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 80006fc: 480d ldr r0, [pc, #52] ; (8000734 ) + mov sp, r0 /* set stack pointer */ + 80006fe: 4685 mov sp, r0 + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8000700: 480d ldr r0, [pc, #52] ; (8000738 ) + ldr r1, =_edata + 8000702: 490e ldr r1, [pc, #56] ; (800073c ) + ldr r2, =_sidata + 8000704: 4a0e ldr r2, [pc, #56] ; (8000740 ) + movs r3, #0 + 8000706: 2300 movs r3, #0 + b LoopCopyDataInit + 8000708: e002 b.n 8000710 + +0800070a : + +CopyDataInit: + ldr r4, [r2, r3] + 800070a: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 800070c: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 800070e: 3304 adds r3, #4 + +08000710 : + +LoopCopyDataInit: + adds r4, r0, r3 + 8000710: 18c4 adds r4, r0, r3 + cmp r4, r1 + 8000712: 428c cmp r4, r1 + bcc CopyDataInit + 8000714: d3f9 bcc.n 800070a + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 8000716: 4a0b ldr r2, [pc, #44] ; (8000744 ) + ldr r4, =_ebss + 8000718: 4c0b ldr r4, [pc, #44] ; (8000748 ) + movs r3, #0 + 800071a: 2300 movs r3, #0 + b LoopFillZerobss + 800071c: e001 b.n 8000722 + +0800071e : + +FillZerobss: + str r3, [r2] + 800071e: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8000720: 3204 adds r2, #4 + +08000722 : + +LoopFillZerobss: + cmp r2, r4 + 8000722: 42a2 cmp r2, r4 + bcc FillZerobss + 8000724: d3fb bcc.n 800071e + +/* Call the clock system intitialization function.*/ + bl SystemInit + 8000726: f3af 8000 nop.w +/* Call static constructors */ + bl __libc_init_array + 800072a: f000 f9a7 bl 8000a7c <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 800072e: f7ff fe7b bl 8000428
+ +08000732 : + +LoopForever: + b LoopForever + 8000732: e7fe b.n 8000732 + ldr r0, =_estack + 8000734: 20020000 .word 0x20020000 + ldr r0, =_sdata + 8000738: 20000000 .word 0x20000000 + ldr r1, =_edata + 800073c: 20000064 .word 0x20000064 + ldr r2, =_sidata + 8000740: 080028b8 .word 0x080028b8 + ldr r2, =_sbss + 8000744: 20000064 .word 0x20000064 + ldr r4, =_ebss + 8000748: 2000009c .word 0x2000009c + +0800074c : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 800074c: e7fe b.n 800074c + ... + +08000750 <_fgets_r>: + 8000750: 2a01 cmp r2, #1 + 8000752: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8000756: 4680 mov r8, r0 + 8000758: 460d mov r5, r1 + 800075a: 4617 mov r7, r2 + 800075c: 461c mov r4, r3 + 800075e: dc03 bgt.n 8000768 <_fgets_r+0x18> + 8000760: 2500 movs r5, #0 + 8000762: 4628 mov r0, r5 + 8000764: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000768: b118 cbz r0, 8000772 <_fgets_r+0x22> + 800076a: 6983 ldr r3, [r0, #24] + 800076c: b90b cbnz r3, 8000772 <_fgets_r+0x22> + 800076e: f000 f8cb bl 8000908 <__sinit> + 8000772: 4b31 ldr r3, [pc, #196] ; (8000838 <_fgets_r+0xe8>) + 8000774: 429c cmp r4, r3 + 8000776: d120 bne.n 80007ba <_fgets_r+0x6a> + 8000778: f8d8 4004 ldr.w r4, [r8, #4] + 800077c: 6e63 ldr r3, [r4, #100] ; 0x64 + 800077e: 07de lsls r6, r3, #31 + 8000780: d405 bmi.n 800078e <_fgets_r+0x3e> + 8000782: 89a3 ldrh r3, [r4, #12] + 8000784: 0598 lsls r0, r3, #22 + 8000786: d402 bmi.n 800078e <_fgets_r+0x3e> + 8000788: 6da0 ldr r0, [r4, #88] ; 0x58 + 800078a: f000 f99c bl 8000ac6 <__retarget_lock_acquire_recursive> + 800078e: 3f01 subs r7, #1 + 8000790: 46a9 mov r9, r5 + 8000792: 6866 ldr r6, [r4, #4] + 8000794: b9f6 cbnz r6, 80007d4 <_fgets_r+0x84> + 8000796: 4621 mov r1, r4 + 8000798: 4640 mov r0, r8 + 800079a: f000 fa29 bl 8000bf0 <__srefill_r> + 800079e: b1c0 cbz r0, 80007d2 <_fgets_r+0x82> + 80007a0: 45a9 cmp r9, r5 + 80007a2: d145 bne.n 8000830 <_fgets_r+0xe0> + 80007a4: 6e63 ldr r3, [r4, #100] ; 0x64 + 80007a6: 07d9 lsls r1, r3, #31 + 80007a8: d4da bmi.n 8000760 <_fgets_r+0x10> + 80007aa: 89a5 ldrh r5, [r4, #12] + 80007ac: f415 7500 ands.w r5, r5, #512 ; 0x200 + 80007b0: d1d6 bne.n 8000760 <_fgets_r+0x10> + 80007b2: 6da0 ldr r0, [r4, #88] ; 0x58 + 80007b4: f000 f988 bl 8000ac8 <__retarget_lock_release_recursive> + 80007b8: e7d3 b.n 8000762 <_fgets_r+0x12> + 80007ba: 4b20 ldr r3, [pc, #128] ; (800083c <_fgets_r+0xec>) + 80007bc: 429c cmp r4, r3 + 80007be: d102 bne.n 80007c6 <_fgets_r+0x76> + 80007c0: f8d8 4008 ldr.w r4, [r8, #8] + 80007c4: e7da b.n 800077c <_fgets_r+0x2c> + 80007c6: 4b1e ldr r3, [pc, #120] ; (8000840 <_fgets_r+0xf0>) + 80007c8: 429c cmp r4, r3 + 80007ca: bf08 it eq + 80007cc: f8d8 400c ldreq.w r4, [r8, #12] + 80007d0: e7d4 b.n 800077c <_fgets_r+0x2c> + 80007d2: 6866 ldr r6, [r4, #4] + 80007d4: f8d4 a000 ldr.w sl, [r4] + 80007d8: 42be cmp r6, r7 + 80007da: bf28 it cs + 80007dc: 463e movcs r6, r7 + 80007de: 4632 mov r2, r6 + 80007e0: 210a movs r1, #10 + 80007e2: 4650 mov r0, sl + 80007e4: f7ff fd14 bl 8000210 + 80007e8: 6863 ldr r3, [r4, #4] + 80007ea: b1a0 cbz r0, 8000816 <_fgets_r+0xc6> + 80007ec: 3001 adds r0, #1 + 80007ee: eba0 060a sub.w r6, r0, sl + 80007f2: 1b9b subs r3, r3, r6 + 80007f4: e9c4 0300 strd r0, r3, [r4] + 80007f8: 4632 mov r2, r6 + 80007fa: 4651 mov r1, sl + 80007fc: 4648 mov r0, r9 + 80007fe: f000 f964 bl 8000aca + 8000802: 2300 movs r3, #0 + 8000804: f809 3006 strb.w r3, [r9, r6] + 8000808: 6e63 ldr r3, [r4, #100] ; 0x64 + 800080a: 07da lsls r2, r3, #31 + 800080c: d4a9 bmi.n 8000762 <_fgets_r+0x12> + 800080e: 89a3 ldrh r3, [r4, #12] + 8000810: 059b lsls r3, r3, #22 + 8000812: d4a6 bmi.n 8000762 <_fgets_r+0x12> + 8000814: e7cd b.n 80007b2 <_fgets_r+0x62> + 8000816: 1b9b subs r3, r3, r6 + 8000818: 6063 str r3, [r4, #4] + 800081a: 6823 ldr r3, [r4, #0] + 800081c: 4433 add r3, r6 + 800081e: 4648 mov r0, r9 + 8000820: 6023 str r3, [r4, #0] + 8000822: 4632 mov r2, r6 + 8000824: 4651 mov r1, sl + 8000826: f000 f950 bl 8000aca + 800082a: 1bbf subs r7, r7, r6 + 800082c: 44b1 add r9, r6 + 800082e: d1b0 bne.n 8000792 <_fgets_r+0x42> + 8000830: 2300 movs r3, #0 + 8000832: f889 3000 strb.w r3, [r9] + 8000836: e7e7 b.n 8000808 <_fgets_r+0xb8> + 8000838: 0800271c .word 0x0800271c + 800083c: 0800273c .word 0x0800273c + 8000840: 080026fc .word 0x080026fc + +08000844 : + 8000844: 4613 mov r3, r2 + 8000846: 460a mov r2, r1 + 8000848: 4601 mov r1, r0 + 800084a: 4802 ldr r0, [pc, #8] ; (8000854 ) + 800084c: 6800 ldr r0, [r0, #0] + 800084e: f7ff bf7f b.w 8000750 <_fgets_r> + 8000852: bf00 nop + 8000854: 20000000 .word 0x20000000 + +08000858 : + 8000858: 2300 movs r3, #0 + 800085a: b510 push {r4, lr} + 800085c: 4604 mov r4, r0 + 800085e: e9c0 3300 strd r3, r3, [r0] + 8000862: e9c0 3304 strd r3, r3, [r0, #16] + 8000866: 6083 str r3, [r0, #8] + 8000868: 8181 strh r1, [r0, #12] + 800086a: 6643 str r3, [r0, #100] ; 0x64 + 800086c: 81c2 strh r2, [r0, #14] + 800086e: 6183 str r3, [r0, #24] + 8000870: 4619 mov r1, r3 + 8000872: 2208 movs r2, #8 + 8000874: 305c adds r0, #92 ; 0x5c + 8000876: f000 f936 bl 8000ae6 + 800087a: 4b05 ldr r3, [pc, #20] ; (8000890 ) + 800087c: 6263 str r3, [r4, #36] ; 0x24 + 800087e: 4b05 ldr r3, [pc, #20] ; (8000894 ) + 8000880: 62a3 str r3, [r4, #40] ; 0x28 + 8000882: 4b05 ldr r3, [pc, #20] ; (8000898 ) + 8000884: 62e3 str r3, [r4, #44] ; 0x2c + 8000886: 4b05 ldr r3, [pc, #20] ; (800089c ) + 8000888: 6224 str r4, [r4, #32] + 800088a: 6323 str r3, [r4, #48] ; 0x30 + 800088c: bd10 pop {r4, pc} + 800088e: bf00 nop + 8000890: 08000f09 .word 0x08000f09 + 8000894: 08000f2f .word 0x08000f2f + 8000898: 08000f67 .word 0x08000f67 + 800089c: 08000f8b .word 0x08000f8b + +080008a0 <_cleanup_r>: + 80008a0: 4901 ldr r1, [pc, #4] ; (80008a8 <_cleanup_r+0x8>) + 80008a2: f000 b8cc b.w 8000a3e <_fwalk_reent> + 80008a6: bf00 nop + 80008a8: 080010e5 .word 0x080010e5 + +080008ac <__sfmoreglue>: + 80008ac: b570 push {r4, r5, r6, lr} + 80008ae: 1e4a subs r2, r1, #1 + 80008b0: 2568 movs r5, #104 ; 0x68 + 80008b2: 4355 muls r5, r2 + 80008b4: 460e mov r6, r1 + 80008b6: f105 0174 add.w r1, r5, #116 ; 0x74 + 80008ba: f000 f91d bl 8000af8 <_malloc_r> + 80008be: 4604 mov r4, r0 + 80008c0: b140 cbz r0, 80008d4 <__sfmoreglue+0x28> + 80008c2: 2100 movs r1, #0 + 80008c4: e9c0 1600 strd r1, r6, [r0] + 80008c8: 300c adds r0, #12 + 80008ca: 60a0 str r0, [r4, #8] + 80008cc: f105 0268 add.w r2, r5, #104 ; 0x68 + 80008d0: f000 f909 bl 8000ae6 + 80008d4: 4620 mov r0, r4 + 80008d6: bd70 pop {r4, r5, r6, pc} + +080008d8 <__sfp_lock_acquire>: + 80008d8: 4801 ldr r0, [pc, #4] ; (80008e0 <__sfp_lock_acquire+0x8>) + 80008da: f000 b8f4 b.w 8000ac6 <__retarget_lock_acquire_recursive> + 80008de: bf00 nop + 80008e0: 20000094 .word 0x20000094 + +080008e4 <__sfp_lock_release>: + 80008e4: 4801 ldr r0, [pc, #4] ; (80008ec <__sfp_lock_release+0x8>) + 80008e6: f000 b8ef b.w 8000ac8 <__retarget_lock_release_recursive> + 80008ea: bf00 nop + 80008ec: 20000094 .word 0x20000094 + +080008f0 <__sinit_lock_acquire>: + 80008f0: 4801 ldr r0, [pc, #4] ; (80008f8 <__sinit_lock_acquire+0x8>) + 80008f2: f000 b8e8 b.w 8000ac6 <__retarget_lock_acquire_recursive> + 80008f6: bf00 nop + 80008f8: 2000008f .word 0x2000008f + +080008fc <__sinit_lock_release>: + 80008fc: 4801 ldr r0, [pc, #4] ; (8000904 <__sinit_lock_release+0x8>) + 80008fe: f000 b8e3 b.w 8000ac8 <__retarget_lock_release_recursive> + 8000902: bf00 nop + 8000904: 2000008f .word 0x2000008f + +08000908 <__sinit>: + 8000908: b510 push {r4, lr} + 800090a: 4604 mov r4, r0 + 800090c: f7ff fff0 bl 80008f0 <__sinit_lock_acquire> + 8000910: 69a3 ldr r3, [r4, #24] + 8000912: b11b cbz r3, 800091c <__sinit+0x14> + 8000914: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000918: f7ff bff0 b.w 80008fc <__sinit_lock_release> + 800091c: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 8000920: 6523 str r3, [r4, #80] ; 0x50 + 8000922: 4b13 ldr r3, [pc, #76] ; (8000970 <__sinit+0x68>) + 8000924: 4a13 ldr r2, [pc, #76] ; (8000974 <__sinit+0x6c>) + 8000926: 681b ldr r3, [r3, #0] + 8000928: 62a2 str r2, [r4, #40] ; 0x28 + 800092a: 42a3 cmp r3, r4 + 800092c: bf04 itt eq + 800092e: 2301 moveq r3, #1 + 8000930: 61a3 streq r3, [r4, #24] + 8000932: 4620 mov r0, r4 + 8000934: f000 f820 bl 8000978 <__sfp> + 8000938: 6060 str r0, [r4, #4] + 800093a: 4620 mov r0, r4 + 800093c: f000 f81c bl 8000978 <__sfp> + 8000940: 60a0 str r0, [r4, #8] + 8000942: 4620 mov r0, r4 + 8000944: f000 f818 bl 8000978 <__sfp> + 8000948: 2200 movs r2, #0 + 800094a: 60e0 str r0, [r4, #12] + 800094c: 2104 movs r1, #4 + 800094e: 6860 ldr r0, [r4, #4] + 8000950: f7ff ff82 bl 8000858 + 8000954: 68a0 ldr r0, [r4, #8] + 8000956: 2201 movs r2, #1 + 8000958: 2109 movs r1, #9 + 800095a: f7ff ff7d bl 8000858 + 800095e: 68e0 ldr r0, [r4, #12] + 8000960: 2202 movs r2, #2 + 8000962: 2112 movs r1, #18 + 8000964: f7ff ff78 bl 8000858 + 8000968: 2301 movs r3, #1 + 800096a: 61a3 str r3, [r4, #24] + 800096c: e7d2 b.n 8000914 <__sinit+0xc> + 800096e: bf00 nop + 8000970: 0800275c .word 0x0800275c + 8000974: 080008a1 .word 0x080008a1 + +08000978 <__sfp>: + 8000978: b5f8 push {r3, r4, r5, r6, r7, lr} + 800097a: 4607 mov r7, r0 + 800097c: f7ff ffac bl 80008d8 <__sfp_lock_acquire> + 8000980: 4b1e ldr r3, [pc, #120] ; (80009fc <__sfp+0x84>) + 8000982: 681e ldr r6, [r3, #0] + 8000984: 69b3 ldr r3, [r6, #24] + 8000986: b913 cbnz r3, 800098e <__sfp+0x16> + 8000988: 4630 mov r0, r6 + 800098a: f7ff ffbd bl 8000908 <__sinit> + 800098e: 3648 adds r6, #72 ; 0x48 + 8000990: e9d6 3401 ldrd r3, r4, [r6, #4] + 8000994: 3b01 subs r3, #1 + 8000996: d503 bpl.n 80009a0 <__sfp+0x28> + 8000998: 6833 ldr r3, [r6, #0] + 800099a: b30b cbz r3, 80009e0 <__sfp+0x68> + 800099c: 6836 ldr r6, [r6, #0] + 800099e: e7f7 b.n 8000990 <__sfp+0x18> + 80009a0: f9b4 500c ldrsh.w r5, [r4, #12] + 80009a4: b9d5 cbnz r5, 80009dc <__sfp+0x64> + 80009a6: 4b16 ldr r3, [pc, #88] ; (8000a00 <__sfp+0x88>) + 80009a8: 60e3 str r3, [r4, #12] + 80009aa: f104 0058 add.w r0, r4, #88 ; 0x58 + 80009ae: 6665 str r5, [r4, #100] ; 0x64 + 80009b0: f000 f888 bl 8000ac4 <__retarget_lock_init_recursive> + 80009b4: f7ff ff96 bl 80008e4 <__sfp_lock_release> + 80009b8: e9c4 5501 strd r5, r5, [r4, #4] + 80009bc: e9c4 5504 strd r5, r5, [r4, #16] + 80009c0: 6025 str r5, [r4, #0] + 80009c2: 61a5 str r5, [r4, #24] + 80009c4: 2208 movs r2, #8 + 80009c6: 4629 mov r1, r5 + 80009c8: f104 005c add.w r0, r4, #92 ; 0x5c + 80009cc: f000 f88b bl 8000ae6 + 80009d0: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 80009d4: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 80009d8: 4620 mov r0, r4 + 80009da: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80009dc: 3468 adds r4, #104 ; 0x68 + 80009de: e7d9 b.n 8000994 <__sfp+0x1c> + 80009e0: 2104 movs r1, #4 + 80009e2: 4638 mov r0, r7 + 80009e4: f7ff ff62 bl 80008ac <__sfmoreglue> + 80009e8: 4604 mov r4, r0 + 80009ea: 6030 str r0, [r6, #0] + 80009ec: 2800 cmp r0, #0 + 80009ee: d1d5 bne.n 800099c <__sfp+0x24> + 80009f0: f7ff ff78 bl 80008e4 <__sfp_lock_release> + 80009f4: 230c movs r3, #12 + 80009f6: 603b str r3, [r7, #0] + 80009f8: e7ee b.n 80009d8 <__sfp+0x60> + 80009fa: bf00 nop + 80009fc: 0800275c .word 0x0800275c + 8000a00: ffff0001 .word 0xffff0001 + +08000a04 <_fwalk>: + 8000a04: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000a08: 460f mov r7, r1 + 8000a0a: f100 0448 add.w r4, r0, #72 ; 0x48 + 8000a0e: 2600 movs r6, #0 + 8000a10: e9d4 8501 ldrd r8, r5, [r4, #4] + 8000a14: f1b8 0801 subs.w r8, r8, #1 + 8000a18: d505 bpl.n 8000a26 <_fwalk+0x22> + 8000a1a: 6824 ldr r4, [r4, #0] + 8000a1c: 2c00 cmp r4, #0 + 8000a1e: d1f7 bne.n 8000a10 <_fwalk+0xc> + 8000a20: 4630 mov r0, r6 + 8000a22: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8000a26: 89ab ldrh r3, [r5, #12] + 8000a28: 2b01 cmp r3, #1 + 8000a2a: d906 bls.n 8000a3a <_fwalk+0x36> + 8000a2c: f9b5 300e ldrsh.w r3, [r5, #14] + 8000a30: 3301 adds r3, #1 + 8000a32: d002 beq.n 8000a3a <_fwalk+0x36> + 8000a34: 4628 mov r0, r5 + 8000a36: 47b8 blx r7 + 8000a38: 4306 orrs r6, r0 + 8000a3a: 3568 adds r5, #104 ; 0x68 + 8000a3c: e7ea b.n 8000a14 <_fwalk+0x10> + +08000a3e <_fwalk_reent>: + 8000a3e: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8000a42: 4606 mov r6, r0 + 8000a44: 4688 mov r8, r1 + 8000a46: f100 0448 add.w r4, r0, #72 ; 0x48 + 8000a4a: 2700 movs r7, #0 + 8000a4c: e9d4 9501 ldrd r9, r5, [r4, #4] + 8000a50: f1b9 0901 subs.w r9, r9, #1 + 8000a54: d505 bpl.n 8000a62 <_fwalk_reent+0x24> + 8000a56: 6824 ldr r4, [r4, #0] + 8000a58: 2c00 cmp r4, #0 + 8000a5a: d1f7 bne.n 8000a4c <_fwalk_reent+0xe> + 8000a5c: 4638 mov r0, r7 + 8000a5e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8000a62: 89ab ldrh r3, [r5, #12] + 8000a64: 2b01 cmp r3, #1 + 8000a66: d907 bls.n 8000a78 <_fwalk_reent+0x3a> + 8000a68: f9b5 300e ldrsh.w r3, [r5, #14] + 8000a6c: 3301 adds r3, #1 + 8000a6e: d003 beq.n 8000a78 <_fwalk_reent+0x3a> + 8000a70: 4629 mov r1, r5 + 8000a72: 4630 mov r0, r6 + 8000a74: 47c0 blx r8 + 8000a76: 4307 orrs r7, r0 + 8000a78: 3568 adds r5, #104 ; 0x68 + 8000a7a: e7e9 b.n 8000a50 <_fwalk_reent+0x12> + +08000a7c <__libc_init_array>: + 8000a7c: b570 push {r4, r5, r6, lr} + 8000a7e: 4d0d ldr r5, [pc, #52] ; (8000ab4 <__libc_init_array+0x38>) + 8000a80: 4c0d ldr r4, [pc, #52] ; (8000ab8 <__libc_init_array+0x3c>) + 8000a82: 1b64 subs r4, r4, r5 + 8000a84: 10a4 asrs r4, r4, #2 + 8000a86: 2600 movs r6, #0 + 8000a88: 42a6 cmp r6, r4 + 8000a8a: d109 bne.n 8000aa0 <__libc_init_array+0x24> + 8000a8c: 4d0b ldr r5, [pc, #44] ; (8000abc <__libc_init_array+0x40>) + 8000a8e: 4c0c ldr r4, [pc, #48] ; (8000ac0 <__libc_init_array+0x44>) + 8000a90: f001 fd2a bl 80024e8 <_init> + 8000a94: 1b64 subs r4, r4, r5 + 8000a96: 10a4 asrs r4, r4, #2 + 8000a98: 2600 movs r6, #0 + 8000a9a: 42a6 cmp r6, r4 + 8000a9c: d105 bne.n 8000aaa <__libc_init_array+0x2e> + 8000a9e: bd70 pop {r4, r5, r6, pc} + 8000aa0: f855 3b04 ldr.w r3, [r5], #4 + 8000aa4: 4798 blx r3 + 8000aa6: 3601 adds r6, #1 + 8000aa8: e7ee b.n 8000a88 <__libc_init_array+0xc> + 8000aaa: f855 3b04 ldr.w r3, [r5], #4 + 8000aae: 4798 blx r3 + 8000ab0: 3601 adds r6, #1 + 8000ab2: e7f2 b.n 8000a9a <__libc_init_array+0x1e> + 8000ab4: 080028b0 .word 0x080028b0 + 8000ab8: 080028b0 .word 0x080028b0 + 8000abc: 080028b0 .word 0x080028b0 + 8000ac0: 080028b4 .word 0x080028b4 + +08000ac4 <__retarget_lock_init_recursive>: + 8000ac4: 4770 bx lr + +08000ac6 <__retarget_lock_acquire_recursive>: + 8000ac6: 4770 bx lr + +08000ac8 <__retarget_lock_release_recursive>: + 8000ac8: 4770 bx lr + +08000aca : + 8000aca: 440a add r2, r1 + 8000acc: 4291 cmp r1, r2 + 8000ace: f100 33ff add.w r3, r0, #4294967295 + 8000ad2: d100 bne.n 8000ad6 + 8000ad4: 4770 bx lr + 8000ad6: b510 push {r4, lr} + 8000ad8: f811 4b01 ldrb.w r4, [r1], #1 + 8000adc: f803 4f01 strb.w r4, [r3, #1]! + 8000ae0: 4291 cmp r1, r2 + 8000ae2: d1f9 bne.n 8000ad8 + 8000ae4: bd10 pop {r4, pc} + +08000ae6 : + 8000ae6: 4402 add r2, r0 + 8000ae8: 4603 mov r3, r0 + 8000aea: 4293 cmp r3, r2 + 8000aec: d100 bne.n 8000af0 + 8000aee: 4770 bx lr + 8000af0: f803 1b01 strb.w r1, [r3], #1 + 8000af4: e7f9 b.n 8000aea + ... + +08000af8 <_malloc_r>: + 8000af8: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000afa: 1ccd adds r5, r1, #3 + 8000afc: f025 0503 bic.w r5, r5, #3 + 8000b00: 3508 adds r5, #8 + 8000b02: 2d0c cmp r5, #12 + 8000b04: bf38 it cc + 8000b06: 250c movcc r5, #12 + 8000b08: 2d00 cmp r5, #0 + 8000b0a: 4606 mov r6, r0 + 8000b0c: db01 blt.n 8000b12 <_malloc_r+0x1a> + 8000b0e: 42a9 cmp r1, r5 + 8000b10: d903 bls.n 8000b1a <_malloc_r+0x22> + 8000b12: 230c movs r3, #12 + 8000b14: 6033 str r3, [r6, #0] + 8000b16: 2000 movs r0, #0 + 8000b18: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000b1a: f000 fbaf bl 800127c <__malloc_lock> + 8000b1e: 4921 ldr r1, [pc, #132] ; (8000ba4 <_malloc_r+0xac>) + 8000b20: 680a ldr r2, [r1, #0] + 8000b22: 4614 mov r4, r2 + 8000b24: b99c cbnz r4, 8000b4e <_malloc_r+0x56> + 8000b26: 4f20 ldr r7, [pc, #128] ; (8000ba8 <_malloc_r+0xb0>) + 8000b28: 683b ldr r3, [r7, #0] + 8000b2a: b923 cbnz r3, 8000b36 <_malloc_r+0x3e> + 8000b2c: 4621 mov r1, r4 + 8000b2e: 4630 mov r0, r6 + 8000b30: f000 f8e8 bl 8000d04 <_sbrk_r> + 8000b34: 6038 str r0, [r7, #0] + 8000b36: 4629 mov r1, r5 + 8000b38: 4630 mov r0, r6 + 8000b3a: f000 f8e3 bl 8000d04 <_sbrk_r> + 8000b3e: 1c43 adds r3, r0, #1 + 8000b40: d123 bne.n 8000b8a <_malloc_r+0x92> + 8000b42: 230c movs r3, #12 + 8000b44: 6033 str r3, [r6, #0] + 8000b46: 4630 mov r0, r6 + 8000b48: f000 fb9e bl 8001288 <__malloc_unlock> + 8000b4c: e7e3 b.n 8000b16 <_malloc_r+0x1e> + 8000b4e: 6823 ldr r3, [r4, #0] + 8000b50: 1b5b subs r3, r3, r5 + 8000b52: d417 bmi.n 8000b84 <_malloc_r+0x8c> + 8000b54: 2b0b cmp r3, #11 + 8000b56: d903 bls.n 8000b60 <_malloc_r+0x68> + 8000b58: 6023 str r3, [r4, #0] + 8000b5a: 441c add r4, r3 + 8000b5c: 6025 str r5, [r4, #0] + 8000b5e: e004 b.n 8000b6a <_malloc_r+0x72> + 8000b60: 6863 ldr r3, [r4, #4] + 8000b62: 42a2 cmp r2, r4 + 8000b64: bf0c ite eq + 8000b66: 600b streq r3, [r1, #0] + 8000b68: 6053 strne r3, [r2, #4] + 8000b6a: 4630 mov r0, r6 + 8000b6c: f000 fb8c bl 8001288 <__malloc_unlock> + 8000b70: f104 000b add.w r0, r4, #11 + 8000b74: 1d23 adds r3, r4, #4 + 8000b76: f020 0007 bic.w r0, r0, #7 + 8000b7a: 1ac2 subs r2, r0, r3 + 8000b7c: d0cc beq.n 8000b18 <_malloc_r+0x20> + 8000b7e: 1a1b subs r3, r3, r0 + 8000b80: 50a3 str r3, [r4, r2] + 8000b82: e7c9 b.n 8000b18 <_malloc_r+0x20> + 8000b84: 4622 mov r2, r4 + 8000b86: 6864 ldr r4, [r4, #4] + 8000b88: e7cc b.n 8000b24 <_malloc_r+0x2c> + 8000b8a: 1cc4 adds r4, r0, #3 + 8000b8c: f024 0403 bic.w r4, r4, #3 + 8000b90: 42a0 cmp r0, r4 + 8000b92: d0e3 beq.n 8000b5c <_malloc_r+0x64> + 8000b94: 1a21 subs r1, r4, r0 + 8000b96: 4630 mov r0, r6 + 8000b98: f000 f8b4 bl 8000d04 <_sbrk_r> + 8000b9c: 3001 adds r0, #1 + 8000b9e: d1dd bne.n 8000b5c <_malloc_r+0x64> + 8000ba0: e7cf b.n 8000b42 <_malloc_r+0x4a> + 8000ba2: bf00 nop + 8000ba4: 20000080 .word 0x20000080 + 8000ba8: 20000084 .word 0x20000084 + +08000bac : + 8000bac: b40f push {r0, r1, r2, r3} + 8000bae: 4b0a ldr r3, [pc, #40] ; (8000bd8 ) + 8000bb0: b513 push {r0, r1, r4, lr} + 8000bb2: 681c ldr r4, [r3, #0] + 8000bb4: b124 cbz r4, 8000bc0 + 8000bb6: 69a3 ldr r3, [r4, #24] + 8000bb8: b913 cbnz r3, 8000bc0 + 8000bba: 4620 mov r0, r4 + 8000bbc: f7ff fea4 bl 8000908 <__sinit> + 8000bc0: ab05 add r3, sp, #20 + 8000bc2: 9a04 ldr r2, [sp, #16] + 8000bc4: 68a1 ldr r1, [r4, #8] + 8000bc6: 9301 str r3, [sp, #4] + 8000bc8: 4620 mov r0, r4 + 8000bca: f000 fdaf bl 800172c <_vfiprintf_r> + 8000bce: b002 add sp, #8 + 8000bd0: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000bd4: b004 add sp, #16 + 8000bd6: 4770 bx lr + 8000bd8: 20000000 .word 0x20000000 + +08000bdc : + 8000bdc: 8983 ldrh r3, [r0, #12] + 8000bde: f003 0309 and.w r3, r3, #9 + 8000be2: 2b09 cmp r3, #9 + 8000be4: d101 bne.n 8000bea + 8000be6: f000 bab9 b.w 800115c + 8000bea: 2000 movs r0, #0 + 8000bec: 4770 bx lr + ... + +08000bf0 <__srefill_r>: + 8000bf0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000bf2: 460c mov r4, r1 + 8000bf4: 4605 mov r5, r0 + 8000bf6: b118 cbz r0, 8000c00 <__srefill_r+0x10> + 8000bf8: 6983 ldr r3, [r0, #24] + 8000bfa: b90b cbnz r3, 8000c00 <__srefill_r+0x10> + 8000bfc: f7ff fe84 bl 8000908 <__sinit> + 8000c00: 4b3b ldr r3, [pc, #236] ; (8000cf0 <__srefill_r+0x100>) + 8000c02: 429c cmp r4, r3 + 8000c04: d10a bne.n 8000c1c <__srefill_r+0x2c> + 8000c06: 686c ldr r4, [r5, #4] + 8000c08: f9b4 200c ldrsh.w r2, [r4, #12] + 8000c0c: 2300 movs r3, #0 + 8000c0e: 6063 str r3, [r4, #4] + 8000c10: 89a3 ldrh r3, [r4, #12] + 8000c12: 069e lsls r6, r3, #26 + 8000c14: d50c bpl.n 8000c30 <__srefill_r+0x40> + 8000c16: f04f 30ff mov.w r0, #4294967295 + 8000c1a: e066 b.n 8000cea <__srefill_r+0xfa> + 8000c1c: 4b35 ldr r3, [pc, #212] ; (8000cf4 <__srefill_r+0x104>) + 8000c1e: 429c cmp r4, r3 + 8000c20: d101 bne.n 8000c26 <__srefill_r+0x36> + 8000c22: 68ac ldr r4, [r5, #8] + 8000c24: e7f0 b.n 8000c08 <__srefill_r+0x18> + 8000c26: 4b34 ldr r3, [pc, #208] ; (8000cf8 <__srefill_r+0x108>) + 8000c28: 429c cmp r4, r3 + 8000c2a: bf08 it eq + 8000c2c: 68ec ldreq r4, [r5, #12] + 8000c2e: e7eb b.n 8000c08 <__srefill_r+0x18> + 8000c30: 0758 lsls r0, r3, #29 + 8000c32: d448 bmi.n 8000cc6 <__srefill_r+0xd6> + 8000c34: 06d9 lsls r1, r3, #27 + 8000c36: d405 bmi.n 8000c44 <__srefill_r+0x54> + 8000c38: 2309 movs r3, #9 + 8000c3a: 602b str r3, [r5, #0] + 8000c3c: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8000c40: 81a3 strh r3, [r4, #12] + 8000c42: e7e8 b.n 8000c16 <__srefill_r+0x26> + 8000c44: 071a lsls r2, r3, #28 + 8000c46: d50b bpl.n 8000c60 <__srefill_r+0x70> + 8000c48: 4621 mov r1, r4 + 8000c4a: 4628 mov r0, r5 + 8000c4c: f000 fa4a bl 80010e4 <_fflush_r> + 8000c50: 2800 cmp r0, #0 + 8000c52: d1e0 bne.n 8000c16 <__srefill_r+0x26> + 8000c54: 89a3 ldrh r3, [r4, #12] + 8000c56: 60a0 str r0, [r4, #8] + 8000c58: f023 0308 bic.w r3, r3, #8 + 8000c5c: 81a3 strh r3, [r4, #12] + 8000c5e: 61a0 str r0, [r4, #24] + 8000c60: 89a3 ldrh r3, [r4, #12] + 8000c62: f043 0304 orr.w r3, r3, #4 + 8000c66: 81a3 strh r3, [r4, #12] + 8000c68: 6923 ldr r3, [r4, #16] + 8000c6a: b91b cbnz r3, 8000c74 <__srefill_r+0x84> + 8000c6c: 4621 mov r1, r4 + 8000c6e: 4628 mov r0, r5 + 8000c70: f000 fabc bl 80011ec <__smakebuf_r> + 8000c74: 89a6 ldrh r6, [r4, #12] + 8000c76: f9b4 700c ldrsh.w r7, [r4, #12] + 8000c7a: 07b3 lsls r3, r6, #30 + 8000c7c: d00f beq.n 8000c9e <__srefill_r+0xae> + 8000c7e: 2301 movs r3, #1 + 8000c80: 81a3 strh r3, [r4, #12] + 8000c82: 4b1e ldr r3, [pc, #120] ; (8000cfc <__srefill_r+0x10c>) + 8000c84: 491e ldr r1, [pc, #120] ; (8000d00 <__srefill_r+0x110>) + 8000c86: 6818 ldr r0, [r3, #0] + 8000c88: f006 0609 and.w r6, r6, #9 + 8000c8c: f7ff feba bl 8000a04 <_fwalk> + 8000c90: 2e09 cmp r6, #9 + 8000c92: 81a7 strh r7, [r4, #12] + 8000c94: d103 bne.n 8000c9e <__srefill_r+0xae> + 8000c96: 4621 mov r1, r4 + 8000c98: 4628 mov r0, r5 + 8000c9a: f000 f99d bl 8000fd8 <__sflush_r> + 8000c9e: 6922 ldr r2, [r4, #16] + 8000ca0: 6a66 ldr r6, [r4, #36] ; 0x24 + 8000ca2: 6963 ldr r3, [r4, #20] + 8000ca4: 6a21 ldr r1, [r4, #32] + 8000ca6: 6022 str r2, [r4, #0] + 8000ca8: 4628 mov r0, r5 + 8000caa: 47b0 blx r6 + 8000cac: 2800 cmp r0, #0 + 8000cae: 6060 str r0, [r4, #4] + 8000cb0: dc1c bgt.n 8000cec <__srefill_r+0xfc> + 8000cb2: f9b4 300c ldrsh.w r3, [r4, #12] + 8000cb6: bf17 itett ne + 8000cb8: 2200 movne r2, #0 + 8000cba: f043 0320 orreq.w r3, r3, #32 + 8000cbe: 6062 strne r2, [r4, #4] + 8000cc0: f043 0340 orrne.w r3, r3, #64 ; 0x40 + 8000cc4: e7bc b.n 8000c40 <__srefill_r+0x50> + 8000cc6: 6b61 ldr r1, [r4, #52] ; 0x34 + 8000cc8: 2900 cmp r1, #0 + 8000cca: d0cd beq.n 8000c68 <__srefill_r+0x78> + 8000ccc: f104 0344 add.w r3, r4, #68 ; 0x44 + 8000cd0: 4299 cmp r1, r3 + 8000cd2: d002 beq.n 8000cda <__srefill_r+0xea> + 8000cd4: 4628 mov r0, r5 + 8000cd6: f000 fadd bl 8001294 <_free_r> + 8000cda: 6c23 ldr r3, [r4, #64] ; 0x40 + 8000cdc: 6063 str r3, [r4, #4] + 8000cde: 2000 movs r0, #0 + 8000ce0: 6360 str r0, [r4, #52] ; 0x34 + 8000ce2: 2b00 cmp r3, #0 + 8000ce4: d0c0 beq.n 8000c68 <__srefill_r+0x78> + 8000ce6: 6be3 ldr r3, [r4, #60] ; 0x3c + 8000ce8: 6023 str r3, [r4, #0] + 8000cea: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000cec: 2000 movs r0, #0 + 8000cee: e7fc b.n 8000cea <__srefill_r+0xfa> + 8000cf0: 0800271c .word 0x0800271c + 8000cf4: 0800273c .word 0x0800273c + 8000cf8: 080026fc .word 0x080026fc + 8000cfc: 0800275c .word 0x0800275c + 8000d00: 08000bdd .word 0x08000bdd + +08000d04 <_sbrk_r>: + 8000d04: b538 push {r3, r4, r5, lr} + 8000d06: 4d06 ldr r5, [pc, #24] ; (8000d20 <_sbrk_r+0x1c>) + 8000d08: 2300 movs r3, #0 + 8000d0a: 4604 mov r4, r0 + 8000d0c: 4608 mov r0, r1 + 8000d0e: 602b str r3, [r5, #0] + 8000d10: f001 fbdc bl 80024cc <_sbrk> + 8000d14: 1c43 adds r3, r0, #1 + 8000d16: d102 bne.n 8000d1e <_sbrk_r+0x1a> + 8000d18: 682b ldr r3, [r5, #0] + 8000d1a: b103 cbz r3, 8000d1e <_sbrk_r+0x1a> + 8000d1c: 6023 str r3, [r4, #0] + 8000d1e: bd38 pop {r3, r4, r5, pc} + 8000d20: 20000098 .word 0x20000098 + +08000d24 : + 8000d24: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + 8000d28: 461d mov r5, r3 + 8000d2a: 4b5d ldr r3, [pc, #372] ; (8000ea0 ) + 8000d2c: 681f ldr r7, [r3, #0] + 8000d2e: 4604 mov r4, r0 + 8000d30: 460e mov r6, r1 + 8000d32: 4690 mov r8, r2 + 8000d34: b127 cbz r7, 8000d40 + 8000d36: 69bb ldr r3, [r7, #24] + 8000d38: b913 cbnz r3, 8000d40 + 8000d3a: 4638 mov r0, r7 + 8000d3c: f7ff fde4 bl 8000908 <__sinit> + 8000d40: 4b58 ldr r3, [pc, #352] ; (8000ea4 ) + 8000d42: 429c cmp r4, r3 + 8000d44: d167 bne.n 8000e16 + 8000d46: 687c ldr r4, [r7, #4] + 8000d48: f1b8 0f02 cmp.w r8, #2 + 8000d4c: d006 beq.n 8000d5c + 8000d4e: f1b8 0f01 cmp.w r8, #1 + 8000d52: f200 809f bhi.w 8000e94 + 8000d56: 2d00 cmp r5, #0 + 8000d58: f2c0 809c blt.w 8000e94 + 8000d5c: 6e63 ldr r3, [r4, #100] ; 0x64 + 8000d5e: 07db lsls r3, r3, #31 + 8000d60: d405 bmi.n 8000d6e + 8000d62: 89a3 ldrh r3, [r4, #12] + 8000d64: 0598 lsls r0, r3, #22 + 8000d66: d402 bmi.n 8000d6e + 8000d68: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000d6a: f7ff feac bl 8000ac6 <__retarget_lock_acquire_recursive> + 8000d6e: 4621 mov r1, r4 + 8000d70: 4638 mov r0, r7 + 8000d72: f000 f9b7 bl 80010e4 <_fflush_r> + 8000d76: 6b61 ldr r1, [r4, #52] ; 0x34 + 8000d78: b141 cbz r1, 8000d8c + 8000d7a: f104 0344 add.w r3, r4, #68 ; 0x44 + 8000d7e: 4299 cmp r1, r3 + 8000d80: d002 beq.n 8000d88 + 8000d82: 4638 mov r0, r7 + 8000d84: f000 fa86 bl 8001294 <_free_r> + 8000d88: 2300 movs r3, #0 + 8000d8a: 6363 str r3, [r4, #52] ; 0x34 + 8000d8c: 2300 movs r3, #0 + 8000d8e: 61a3 str r3, [r4, #24] + 8000d90: 6063 str r3, [r4, #4] + 8000d92: 89a3 ldrh r3, [r4, #12] + 8000d94: 0619 lsls r1, r3, #24 + 8000d96: d503 bpl.n 8000da0 + 8000d98: 6921 ldr r1, [r4, #16] + 8000d9a: 4638 mov r0, r7 + 8000d9c: f000 fa7a bl 8001294 <_free_r> + 8000da0: 89a3 ldrh r3, [r4, #12] + 8000da2: f423 634a bic.w r3, r3, #3232 ; 0xca0 + 8000da6: f023 0303 bic.w r3, r3, #3 + 8000daa: f1b8 0f02 cmp.w r8, #2 + 8000dae: 81a3 strh r3, [r4, #12] + 8000db0: d06c beq.n 8000e8c + 8000db2: ab01 add r3, sp, #4 + 8000db4: 466a mov r2, sp + 8000db6: 4621 mov r1, r4 + 8000db8: 4638 mov r0, r7 + 8000dba: f000 f9f3 bl 80011a4 <__swhatbuf_r> + 8000dbe: 89a3 ldrh r3, [r4, #12] + 8000dc0: 4318 orrs r0, r3 + 8000dc2: 81a0 strh r0, [r4, #12] + 8000dc4: 2d00 cmp r5, #0 + 8000dc6: d130 bne.n 8000e2a + 8000dc8: 9d00 ldr r5, [sp, #0] + 8000dca: 4628 mov r0, r5 + 8000dcc: f000 fa4e bl 800126c + 8000dd0: 4606 mov r6, r0 + 8000dd2: 2800 cmp r0, #0 + 8000dd4: d155 bne.n 8000e82 + 8000dd6: f8dd 9000 ldr.w r9, [sp] + 8000dda: 45a9 cmp r9, r5 + 8000ddc: d14a bne.n 8000e74 + 8000dde: f04f 35ff mov.w r5, #4294967295 + 8000de2: 2200 movs r2, #0 + 8000de4: 60a2 str r2, [r4, #8] + 8000de6: f104 0247 add.w r2, r4, #71 ; 0x47 + 8000dea: 6022 str r2, [r4, #0] + 8000dec: 6122 str r2, [r4, #16] + 8000dee: 2201 movs r2, #1 + 8000df0: f9b4 300c ldrsh.w r3, [r4, #12] + 8000df4: 6162 str r2, [r4, #20] + 8000df6: 6e62 ldr r2, [r4, #100] ; 0x64 + 8000df8: f043 0302 orr.w r3, r3, #2 + 8000dfc: 07d2 lsls r2, r2, #31 + 8000dfe: 81a3 strh r3, [r4, #12] + 8000e00: d405 bmi.n 8000e0e + 8000e02: f413 7f00 tst.w r3, #512 ; 0x200 + 8000e06: d102 bne.n 8000e0e + 8000e08: 6da0 ldr r0, [r4, #88] ; 0x58 + 8000e0a: f7ff fe5d bl 8000ac8 <__retarget_lock_release_recursive> + 8000e0e: 4628 mov r0, r5 + 8000e10: b003 add sp, #12 + 8000e12: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8000e16: 4b24 ldr r3, [pc, #144] ; (8000ea8 ) + 8000e18: 429c cmp r4, r3 + 8000e1a: d101 bne.n 8000e20 + 8000e1c: 68bc ldr r4, [r7, #8] + 8000e1e: e793 b.n 8000d48 + 8000e20: 4b22 ldr r3, [pc, #136] ; (8000eac ) + 8000e22: 429c cmp r4, r3 + 8000e24: bf08 it eq + 8000e26: 68fc ldreq r4, [r7, #12] + 8000e28: e78e b.n 8000d48 + 8000e2a: 2e00 cmp r6, #0 + 8000e2c: d0cd beq.n 8000dca + 8000e2e: 69bb ldr r3, [r7, #24] + 8000e30: b913 cbnz r3, 8000e38 + 8000e32: 4638 mov r0, r7 + 8000e34: f7ff fd68 bl 8000908 <__sinit> + 8000e38: f1b8 0f01 cmp.w r8, #1 + 8000e3c: bf08 it eq + 8000e3e: 89a3 ldrheq r3, [r4, #12] + 8000e40: 6026 str r6, [r4, #0] + 8000e42: bf04 itt eq + 8000e44: f043 0301 orreq.w r3, r3, #1 + 8000e48: 81a3 strheq r3, [r4, #12] + 8000e4a: 89a2 ldrh r2, [r4, #12] + 8000e4c: f012 0308 ands.w r3, r2, #8 + 8000e50: e9c4 6504 strd r6, r5, [r4, #16] + 8000e54: d01c beq.n 8000e90 + 8000e56: 07d3 lsls r3, r2, #31 + 8000e58: bf41 itttt mi + 8000e5a: 2300 movmi r3, #0 + 8000e5c: 426d negmi r5, r5 + 8000e5e: 60a3 strmi r3, [r4, #8] + 8000e60: 61a5 strmi r5, [r4, #24] + 8000e62: bf58 it pl + 8000e64: 60a5 strpl r5, [r4, #8] + 8000e66: 6e65 ldr r5, [r4, #100] ; 0x64 + 8000e68: f015 0501 ands.w r5, r5, #1 + 8000e6c: d115 bne.n 8000e9a + 8000e6e: f412 7f00 tst.w r2, #512 ; 0x200 + 8000e72: e7c8 b.n 8000e06 + 8000e74: 4648 mov r0, r9 + 8000e76: f000 f9f9 bl 800126c + 8000e7a: 4606 mov r6, r0 + 8000e7c: 2800 cmp r0, #0 + 8000e7e: d0ae beq.n 8000dde + 8000e80: 464d mov r5, r9 + 8000e82: 89a3 ldrh r3, [r4, #12] + 8000e84: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8000e88: 81a3 strh r3, [r4, #12] + 8000e8a: e7d0 b.n 8000e2e + 8000e8c: 2500 movs r5, #0 + 8000e8e: e7a8 b.n 8000de2 + 8000e90: 60a3 str r3, [r4, #8] + 8000e92: e7e8 b.n 8000e66 + 8000e94: f04f 35ff mov.w r5, #4294967295 + 8000e98: e7b9 b.n 8000e0e + 8000e9a: 2500 movs r5, #0 + 8000e9c: e7b7 b.n 8000e0e + 8000e9e: bf00 nop + 8000ea0: 20000000 .word 0x20000000 + 8000ea4: 0800271c .word 0x0800271c + 8000ea8: 0800273c .word 0x0800273c + 8000eac: 080026fc .word 0x080026fc + +08000eb0 : + 8000eb0: b40e push {r1, r2, r3} + 8000eb2: b510 push {r4, lr} + 8000eb4: b09f sub sp, #124 ; 0x7c + 8000eb6: ac21 add r4, sp, #132 ; 0x84 + 8000eb8: f44f 7101 mov.w r1, #516 ; 0x204 + 8000ebc: f854 2b04 ldr.w r2, [r4], #4 + 8000ec0: 9201 str r2, [sp, #4] + 8000ec2: f8ad 101c strh.w r1, [sp, #28] + 8000ec6: 9004 str r0, [sp, #16] + 8000ec8: 9008 str r0, [sp, #32] + 8000eca: f7ff f9fb bl 80002c4 + 8000ece: 4b0c ldr r3, [pc, #48] ; (8000f00 ) + 8000ed0: 9005 str r0, [sp, #20] + 8000ed2: 9009 str r0, [sp, #36] ; 0x24 + 8000ed4: 930d str r3, [sp, #52] ; 0x34 + 8000ed6: 480b ldr r0, [pc, #44] ; (8000f04 ) + 8000ed8: 9a01 ldr r2, [sp, #4] + 8000eda: 6800 ldr r0, [r0, #0] + 8000edc: 9403 str r4, [sp, #12] + 8000ede: 2300 movs r3, #0 + 8000ee0: 9311 str r3, [sp, #68] ; 0x44 + 8000ee2: 9316 str r3, [sp, #88] ; 0x58 + 8000ee4: f64f 73ff movw r3, #65535 ; 0xffff + 8000ee8: f8ad 301e strh.w r3, [sp, #30] + 8000eec: a904 add r1, sp, #16 + 8000eee: 4623 mov r3, r4 + 8000ef0: f000 fa7a bl 80013e8 <__ssvfiscanf_r> + 8000ef4: b01f add sp, #124 ; 0x7c + 8000ef6: e8bd 4010 ldmia.w sp!, {r4, lr} + 8000efa: b003 add sp, #12 + 8000efc: 4770 bx lr + 8000efe: bf00 nop + 8000f00: 08000f2b .word 0x08000f2b + 8000f04: 20000000 .word 0x20000000 + +08000f08 <__sread>: + 8000f08: b510 push {r4, lr} + 8000f0a: 460c mov r4, r1 + 8000f0c: f9b1 100e ldrsh.w r1, [r1, #14] + 8000f10: f001 f81c bl 8001f4c <_read_r> + 8000f14: 2800 cmp r0, #0 + 8000f16: bfab itete ge + 8000f18: 6d63 ldrge r3, [r4, #84] ; 0x54 + 8000f1a: 89a3 ldrhlt r3, [r4, #12] + 8000f1c: 181b addge r3, r3, r0 + 8000f1e: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 8000f22: bfac ite ge + 8000f24: 6563 strge r3, [r4, #84] ; 0x54 + 8000f26: 81a3 strhlt r3, [r4, #12] + 8000f28: bd10 pop {r4, pc} + +08000f2a <__seofread>: + 8000f2a: 2000 movs r0, #0 + 8000f2c: 4770 bx lr + +08000f2e <__swrite>: + 8000f2e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000f32: 461f mov r7, r3 + 8000f34: 898b ldrh r3, [r1, #12] + 8000f36: 05db lsls r3, r3, #23 + 8000f38: 4605 mov r5, r0 + 8000f3a: 460c mov r4, r1 + 8000f3c: 4616 mov r6, r2 + 8000f3e: d505 bpl.n 8000f4c <__swrite+0x1e> + 8000f40: f9b1 100e ldrsh.w r1, [r1, #14] + 8000f44: 2302 movs r3, #2 + 8000f46: 2200 movs r2, #0 + 8000f48: f000 f91a bl 8001180 <_lseek_r> + 8000f4c: 89a3 ldrh r3, [r4, #12] + 8000f4e: f9b4 100e ldrsh.w r1, [r4, #14] + 8000f52: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 8000f56: 81a3 strh r3, [r4, #12] + 8000f58: 4632 mov r2, r6 + 8000f5a: 463b mov r3, r7 + 8000f5c: 4628 mov r0, r5 + 8000f5e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 8000f62: f000 b817 b.w 8000f94 <_write_r> + +08000f66 <__sseek>: + 8000f66: b510 push {r4, lr} + 8000f68: 460c mov r4, r1 + 8000f6a: f9b1 100e ldrsh.w r1, [r1, #14] + 8000f6e: f000 f907 bl 8001180 <_lseek_r> + 8000f72: 1c43 adds r3, r0, #1 + 8000f74: 89a3 ldrh r3, [r4, #12] + 8000f76: bf15 itete ne + 8000f78: 6560 strne r0, [r4, #84] ; 0x54 + 8000f7a: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 8000f7e: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 8000f82: 81a3 strheq r3, [r4, #12] + 8000f84: bf18 it ne + 8000f86: 81a3 strhne r3, [r4, #12] + 8000f88: bd10 pop {r4, pc} + +08000f8a <__sclose>: + 8000f8a: f9b1 100e ldrsh.w r1, [r1, #14] + 8000f8e: f000 b813 b.w 8000fb8 <_close_r> + ... + +08000f94 <_write_r>: + 8000f94: b538 push {r3, r4, r5, lr} + 8000f96: 4d07 ldr r5, [pc, #28] ; (8000fb4 <_write_r+0x20>) + 8000f98: 4604 mov r4, r0 + 8000f9a: 4608 mov r0, r1 + 8000f9c: 4611 mov r1, r2 + 8000f9e: 2200 movs r2, #0 + 8000fa0: 602a str r2, [r5, #0] + 8000fa2: 461a mov r2, r3 + 8000fa4: f7ff faf9 bl 800059a <_write> + 8000fa8: 1c43 adds r3, r0, #1 + 8000faa: d102 bne.n 8000fb2 <_write_r+0x1e> + 8000fac: 682b ldr r3, [r5, #0] + 8000fae: b103 cbz r3, 8000fb2 <_write_r+0x1e> + 8000fb0: 6023 str r3, [r4, #0] + 8000fb2: bd38 pop {r3, r4, r5, pc} + 8000fb4: 20000098 .word 0x20000098 + +08000fb8 <_close_r>: + 8000fb8: b538 push {r3, r4, r5, lr} + 8000fba: 4d06 ldr r5, [pc, #24] ; (8000fd4 <_close_r+0x1c>) + 8000fbc: 2300 movs r3, #0 + 8000fbe: 4604 mov r4, r0 + 8000fc0: 4608 mov r0, r1 + 8000fc2: 602b str r3, [r5, #0] + 8000fc4: f001 fa62 bl 800248c <_close> + 8000fc8: 1c43 adds r3, r0, #1 + 8000fca: d102 bne.n 8000fd2 <_close_r+0x1a> + 8000fcc: 682b ldr r3, [r5, #0] + 8000fce: b103 cbz r3, 8000fd2 <_close_r+0x1a> + 8000fd0: 6023 str r3, [r4, #0] + 8000fd2: bd38 pop {r3, r4, r5, pc} + 8000fd4: 20000098 .word 0x20000098 + +08000fd8 <__sflush_r>: + 8000fd8: 898a ldrh r2, [r1, #12] + 8000fda: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8000fde: 4605 mov r5, r0 + 8000fe0: 0710 lsls r0, r2, #28 + 8000fe2: 460c mov r4, r1 + 8000fe4: d458 bmi.n 8001098 <__sflush_r+0xc0> + 8000fe6: 684b ldr r3, [r1, #4] + 8000fe8: 2b00 cmp r3, #0 + 8000fea: dc05 bgt.n 8000ff8 <__sflush_r+0x20> + 8000fec: 6c0b ldr r3, [r1, #64] ; 0x40 + 8000fee: 2b00 cmp r3, #0 + 8000ff0: dc02 bgt.n 8000ff8 <__sflush_r+0x20> + 8000ff2: 2000 movs r0, #0 + 8000ff4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8000ff8: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8000ffa: 2e00 cmp r6, #0 + 8000ffc: d0f9 beq.n 8000ff2 <__sflush_r+0x1a> + 8000ffe: 2300 movs r3, #0 + 8001000: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 8001004: 682f ldr r7, [r5, #0] + 8001006: 602b str r3, [r5, #0] + 8001008: d032 beq.n 8001070 <__sflush_r+0x98> + 800100a: 6d60 ldr r0, [r4, #84] ; 0x54 + 800100c: 89a3 ldrh r3, [r4, #12] + 800100e: 075a lsls r2, r3, #29 + 8001010: d505 bpl.n 800101e <__sflush_r+0x46> + 8001012: 6863 ldr r3, [r4, #4] + 8001014: 1ac0 subs r0, r0, r3 + 8001016: 6b63 ldr r3, [r4, #52] ; 0x34 + 8001018: b10b cbz r3, 800101e <__sflush_r+0x46> + 800101a: 6c23 ldr r3, [r4, #64] ; 0x40 + 800101c: 1ac0 subs r0, r0, r3 + 800101e: 2300 movs r3, #0 + 8001020: 4602 mov r2, r0 + 8001022: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8001024: 6a21 ldr r1, [r4, #32] + 8001026: 4628 mov r0, r5 + 8001028: 47b0 blx r6 + 800102a: 1c43 adds r3, r0, #1 + 800102c: 89a3 ldrh r3, [r4, #12] + 800102e: d106 bne.n 800103e <__sflush_r+0x66> + 8001030: 6829 ldr r1, [r5, #0] + 8001032: 291d cmp r1, #29 + 8001034: d82c bhi.n 8001090 <__sflush_r+0xb8> + 8001036: 4a2a ldr r2, [pc, #168] ; (80010e0 <__sflush_r+0x108>) + 8001038: 40ca lsrs r2, r1 + 800103a: 07d6 lsls r6, r2, #31 + 800103c: d528 bpl.n 8001090 <__sflush_r+0xb8> + 800103e: 2200 movs r2, #0 + 8001040: 6062 str r2, [r4, #4] + 8001042: 04d9 lsls r1, r3, #19 + 8001044: 6922 ldr r2, [r4, #16] + 8001046: 6022 str r2, [r4, #0] + 8001048: d504 bpl.n 8001054 <__sflush_r+0x7c> + 800104a: 1c42 adds r2, r0, #1 + 800104c: d101 bne.n 8001052 <__sflush_r+0x7a> + 800104e: 682b ldr r3, [r5, #0] + 8001050: b903 cbnz r3, 8001054 <__sflush_r+0x7c> + 8001052: 6560 str r0, [r4, #84] ; 0x54 + 8001054: 6b61 ldr r1, [r4, #52] ; 0x34 + 8001056: 602f str r7, [r5, #0] + 8001058: 2900 cmp r1, #0 + 800105a: d0ca beq.n 8000ff2 <__sflush_r+0x1a> + 800105c: f104 0344 add.w r3, r4, #68 ; 0x44 + 8001060: 4299 cmp r1, r3 + 8001062: d002 beq.n 800106a <__sflush_r+0x92> + 8001064: 4628 mov r0, r5 + 8001066: f000 f915 bl 8001294 <_free_r> + 800106a: 2000 movs r0, #0 + 800106c: 6360 str r0, [r4, #52] ; 0x34 + 800106e: e7c1 b.n 8000ff4 <__sflush_r+0x1c> + 8001070: 6a21 ldr r1, [r4, #32] + 8001072: 2301 movs r3, #1 + 8001074: 4628 mov r0, r5 + 8001076: 47b0 blx r6 + 8001078: 1c41 adds r1, r0, #1 + 800107a: d1c7 bne.n 800100c <__sflush_r+0x34> + 800107c: 682b ldr r3, [r5, #0] + 800107e: 2b00 cmp r3, #0 + 8001080: d0c4 beq.n 800100c <__sflush_r+0x34> + 8001082: 2b1d cmp r3, #29 + 8001084: d001 beq.n 800108a <__sflush_r+0xb2> + 8001086: 2b16 cmp r3, #22 + 8001088: d101 bne.n 800108e <__sflush_r+0xb6> + 800108a: 602f str r7, [r5, #0] + 800108c: e7b1 b.n 8000ff2 <__sflush_r+0x1a> + 800108e: 89a3 ldrh r3, [r4, #12] + 8001090: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8001094: 81a3 strh r3, [r4, #12] + 8001096: e7ad b.n 8000ff4 <__sflush_r+0x1c> + 8001098: 690f ldr r7, [r1, #16] + 800109a: 2f00 cmp r7, #0 + 800109c: d0a9 beq.n 8000ff2 <__sflush_r+0x1a> + 800109e: 0793 lsls r3, r2, #30 + 80010a0: 680e ldr r6, [r1, #0] + 80010a2: bf08 it eq + 80010a4: 694b ldreq r3, [r1, #20] + 80010a6: 600f str r7, [r1, #0] + 80010a8: bf18 it ne + 80010aa: 2300 movne r3, #0 + 80010ac: eba6 0807 sub.w r8, r6, r7 + 80010b0: 608b str r3, [r1, #8] + 80010b2: f1b8 0f00 cmp.w r8, #0 + 80010b6: dd9c ble.n 8000ff2 <__sflush_r+0x1a> + 80010b8: 6a21 ldr r1, [r4, #32] + 80010ba: 6aa6 ldr r6, [r4, #40] ; 0x28 + 80010bc: 4643 mov r3, r8 + 80010be: 463a mov r2, r7 + 80010c0: 4628 mov r0, r5 + 80010c2: 47b0 blx r6 + 80010c4: 2800 cmp r0, #0 + 80010c6: dc06 bgt.n 80010d6 <__sflush_r+0xfe> + 80010c8: 89a3 ldrh r3, [r4, #12] + 80010ca: f043 0340 orr.w r3, r3, #64 ; 0x40 + 80010ce: 81a3 strh r3, [r4, #12] + 80010d0: f04f 30ff mov.w r0, #4294967295 + 80010d4: e78e b.n 8000ff4 <__sflush_r+0x1c> + 80010d6: 4407 add r7, r0 + 80010d8: eba8 0800 sub.w r8, r8, r0 + 80010dc: e7e9 b.n 80010b2 <__sflush_r+0xda> + 80010de: bf00 nop + 80010e0: 20400001 .word 0x20400001 + +080010e4 <_fflush_r>: + 80010e4: b538 push {r3, r4, r5, lr} + 80010e6: 690b ldr r3, [r1, #16] + 80010e8: 4605 mov r5, r0 + 80010ea: 460c mov r4, r1 + 80010ec: b913 cbnz r3, 80010f4 <_fflush_r+0x10> + 80010ee: 2500 movs r5, #0 + 80010f0: 4628 mov r0, r5 + 80010f2: bd38 pop {r3, r4, r5, pc} + 80010f4: b118 cbz r0, 80010fe <_fflush_r+0x1a> + 80010f6: 6983 ldr r3, [r0, #24] + 80010f8: b90b cbnz r3, 80010fe <_fflush_r+0x1a> + 80010fa: f7ff fc05 bl 8000908 <__sinit> + 80010fe: 4b14 ldr r3, [pc, #80] ; (8001150 <_fflush_r+0x6c>) + 8001100: 429c cmp r4, r3 + 8001102: d11b bne.n 800113c <_fflush_r+0x58> + 8001104: 686c ldr r4, [r5, #4] + 8001106: f9b4 300c ldrsh.w r3, [r4, #12] + 800110a: 2b00 cmp r3, #0 + 800110c: d0ef beq.n 80010ee <_fflush_r+0xa> + 800110e: 6e62 ldr r2, [r4, #100] ; 0x64 + 8001110: 07d0 lsls r0, r2, #31 + 8001112: d404 bmi.n 800111e <_fflush_r+0x3a> + 8001114: 0599 lsls r1, r3, #22 + 8001116: d402 bmi.n 800111e <_fflush_r+0x3a> + 8001118: 6da0 ldr r0, [r4, #88] ; 0x58 + 800111a: f7ff fcd4 bl 8000ac6 <__retarget_lock_acquire_recursive> + 800111e: 4628 mov r0, r5 + 8001120: 4621 mov r1, r4 + 8001122: f7ff ff59 bl 8000fd8 <__sflush_r> + 8001126: 6e63 ldr r3, [r4, #100] ; 0x64 + 8001128: 07da lsls r2, r3, #31 + 800112a: 4605 mov r5, r0 + 800112c: d4e0 bmi.n 80010f0 <_fflush_r+0xc> + 800112e: 89a3 ldrh r3, [r4, #12] + 8001130: 059b lsls r3, r3, #22 + 8001132: d4dd bmi.n 80010f0 <_fflush_r+0xc> + 8001134: 6da0 ldr r0, [r4, #88] ; 0x58 + 8001136: f7ff fcc7 bl 8000ac8 <__retarget_lock_release_recursive> + 800113a: e7d9 b.n 80010f0 <_fflush_r+0xc> + 800113c: 4b05 ldr r3, [pc, #20] ; (8001154 <_fflush_r+0x70>) + 800113e: 429c cmp r4, r3 + 8001140: d101 bne.n 8001146 <_fflush_r+0x62> + 8001142: 68ac ldr r4, [r5, #8] + 8001144: e7df b.n 8001106 <_fflush_r+0x22> + 8001146: 4b04 ldr r3, [pc, #16] ; (8001158 <_fflush_r+0x74>) + 8001148: 429c cmp r4, r3 + 800114a: bf08 it eq + 800114c: 68ec ldreq r4, [r5, #12] + 800114e: e7da b.n 8001106 <_fflush_r+0x22> + 8001150: 0800271c .word 0x0800271c + 8001154: 0800273c .word 0x0800273c + 8001158: 080026fc .word 0x080026fc + +0800115c : + 800115c: 4601 mov r1, r0 + 800115e: b920 cbnz r0, 800116a + 8001160: 4b04 ldr r3, [pc, #16] ; (8001174 ) + 8001162: 4905 ldr r1, [pc, #20] ; (8001178 ) + 8001164: 6818 ldr r0, [r3, #0] + 8001166: f7ff bc6a b.w 8000a3e <_fwalk_reent> + 800116a: 4b04 ldr r3, [pc, #16] ; (800117c ) + 800116c: 6818 ldr r0, [r3, #0] + 800116e: f7ff bfb9 b.w 80010e4 <_fflush_r> + 8001172: bf00 nop + 8001174: 0800275c .word 0x0800275c + 8001178: 080010e5 .word 0x080010e5 + 800117c: 20000000 .word 0x20000000 + +08001180 <_lseek_r>: + 8001180: b538 push {r3, r4, r5, lr} + 8001182: 4d07 ldr r5, [pc, #28] ; (80011a0 <_lseek_r+0x20>) + 8001184: 4604 mov r4, r0 + 8001186: 4608 mov r0, r1 + 8001188: 4611 mov r1, r2 + 800118a: 2200 movs r2, #0 + 800118c: 602a str r2, [r5, #0] + 800118e: 461a mov r2, r3 + 8001190: f001 f994 bl 80024bc <_lseek> + 8001194: 1c43 adds r3, r0, #1 + 8001196: d102 bne.n 800119e <_lseek_r+0x1e> + 8001198: 682b ldr r3, [r5, #0] + 800119a: b103 cbz r3, 800119e <_lseek_r+0x1e> + 800119c: 6023 str r3, [r4, #0] + 800119e: bd38 pop {r3, r4, r5, pc} + 80011a0: 20000098 .word 0x20000098 + +080011a4 <__swhatbuf_r>: + 80011a4: b570 push {r4, r5, r6, lr} + 80011a6: 460e mov r6, r1 + 80011a8: f9b1 100e ldrsh.w r1, [r1, #14] + 80011ac: 2900 cmp r1, #0 + 80011ae: b096 sub sp, #88 ; 0x58 + 80011b0: 4614 mov r4, r2 + 80011b2: 461d mov r5, r3 + 80011b4: da07 bge.n 80011c6 <__swhatbuf_r+0x22> + 80011b6: 2300 movs r3, #0 + 80011b8: 602b str r3, [r5, #0] + 80011ba: 89b3 ldrh r3, [r6, #12] + 80011bc: 061a lsls r2, r3, #24 + 80011be: d410 bmi.n 80011e2 <__swhatbuf_r+0x3e> + 80011c0: f44f 6380 mov.w r3, #1024 ; 0x400 + 80011c4: e00e b.n 80011e4 <__swhatbuf_r+0x40> + 80011c6: 466a mov r2, sp + 80011c8: f001 f910 bl 80023ec <_fstat_r> + 80011cc: 2800 cmp r0, #0 + 80011ce: dbf2 blt.n 80011b6 <__swhatbuf_r+0x12> + 80011d0: 9a01 ldr r2, [sp, #4] + 80011d2: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 80011d6: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 80011da: 425a negs r2, r3 + 80011dc: 415a adcs r2, r3 + 80011de: 602a str r2, [r5, #0] + 80011e0: e7ee b.n 80011c0 <__swhatbuf_r+0x1c> + 80011e2: 2340 movs r3, #64 ; 0x40 + 80011e4: 2000 movs r0, #0 + 80011e6: 6023 str r3, [r4, #0] + 80011e8: b016 add sp, #88 ; 0x58 + 80011ea: bd70 pop {r4, r5, r6, pc} + +080011ec <__smakebuf_r>: + 80011ec: 898b ldrh r3, [r1, #12] + 80011ee: b573 push {r0, r1, r4, r5, r6, lr} + 80011f0: 079d lsls r5, r3, #30 + 80011f2: 4606 mov r6, r0 + 80011f4: 460c mov r4, r1 + 80011f6: d507 bpl.n 8001208 <__smakebuf_r+0x1c> + 80011f8: f104 0347 add.w r3, r4, #71 ; 0x47 + 80011fc: 6023 str r3, [r4, #0] + 80011fe: 6123 str r3, [r4, #16] + 8001200: 2301 movs r3, #1 + 8001202: 6163 str r3, [r4, #20] + 8001204: b002 add sp, #8 + 8001206: bd70 pop {r4, r5, r6, pc} + 8001208: ab01 add r3, sp, #4 + 800120a: 466a mov r2, sp + 800120c: f7ff ffca bl 80011a4 <__swhatbuf_r> + 8001210: 9900 ldr r1, [sp, #0] + 8001212: 4605 mov r5, r0 + 8001214: 4630 mov r0, r6 + 8001216: f7ff fc6f bl 8000af8 <_malloc_r> + 800121a: b948 cbnz r0, 8001230 <__smakebuf_r+0x44> + 800121c: f9b4 300c ldrsh.w r3, [r4, #12] + 8001220: 059a lsls r2, r3, #22 + 8001222: d4ef bmi.n 8001204 <__smakebuf_r+0x18> + 8001224: f023 0303 bic.w r3, r3, #3 + 8001228: f043 0302 orr.w r3, r3, #2 + 800122c: 81a3 strh r3, [r4, #12] + 800122e: e7e3 b.n 80011f8 <__smakebuf_r+0xc> + 8001230: 4b0d ldr r3, [pc, #52] ; (8001268 <__smakebuf_r+0x7c>) + 8001232: 62b3 str r3, [r6, #40] ; 0x28 + 8001234: 89a3 ldrh r3, [r4, #12] + 8001236: 6020 str r0, [r4, #0] + 8001238: f043 0380 orr.w r3, r3, #128 ; 0x80 + 800123c: 81a3 strh r3, [r4, #12] + 800123e: 9b00 ldr r3, [sp, #0] + 8001240: 6163 str r3, [r4, #20] + 8001242: 9b01 ldr r3, [sp, #4] + 8001244: 6120 str r0, [r4, #16] + 8001246: b15b cbz r3, 8001260 <__smakebuf_r+0x74> + 8001248: f9b4 100e ldrsh.w r1, [r4, #14] + 800124c: 4630 mov r0, r6 + 800124e: f001 f8df bl 8002410 <_isatty_r> + 8001252: b128 cbz r0, 8001260 <__smakebuf_r+0x74> + 8001254: 89a3 ldrh r3, [r4, #12] + 8001256: f023 0303 bic.w r3, r3, #3 + 800125a: f043 0301 orr.w r3, r3, #1 + 800125e: 81a3 strh r3, [r4, #12] + 8001260: 89a0 ldrh r0, [r4, #12] + 8001262: 4305 orrs r5, r0 + 8001264: 81a5 strh r5, [r4, #12] + 8001266: e7cd b.n 8001204 <__smakebuf_r+0x18> + 8001268: 080008a1 .word 0x080008a1 + +0800126c : + 800126c: 4b02 ldr r3, [pc, #8] ; (8001278 ) + 800126e: 4601 mov r1, r0 + 8001270: 6818 ldr r0, [r3, #0] + 8001272: f7ff bc41 b.w 8000af8 <_malloc_r> + 8001276: bf00 nop + 8001278: 20000000 .word 0x20000000 + +0800127c <__malloc_lock>: + 800127c: 4801 ldr r0, [pc, #4] ; (8001284 <__malloc_lock+0x8>) + 800127e: f7ff bc22 b.w 8000ac6 <__retarget_lock_acquire_recursive> + 8001282: bf00 nop + 8001284: 20000090 .word 0x20000090 + +08001288 <__malloc_unlock>: + 8001288: 4801 ldr r0, [pc, #4] ; (8001290 <__malloc_unlock+0x8>) + 800128a: f7ff bc1d b.w 8000ac8 <__retarget_lock_release_recursive> + 800128e: bf00 nop + 8001290: 20000090 .word 0x20000090 + +08001294 <_free_r>: + 8001294: b537 push {r0, r1, r2, r4, r5, lr} + 8001296: 2900 cmp r1, #0 + 8001298: d048 beq.n 800132c <_free_r+0x98> + 800129a: f851 3c04 ldr.w r3, [r1, #-4] + 800129e: 9001 str r0, [sp, #4] + 80012a0: 2b00 cmp r3, #0 + 80012a2: f1a1 0404 sub.w r4, r1, #4 + 80012a6: bfb8 it lt + 80012a8: 18e4 addlt r4, r4, r3 + 80012aa: f7ff ffe7 bl 800127c <__malloc_lock> + 80012ae: 4a20 ldr r2, [pc, #128] ; (8001330 <_free_r+0x9c>) + 80012b0: 9801 ldr r0, [sp, #4] + 80012b2: 6813 ldr r3, [r2, #0] + 80012b4: 4615 mov r5, r2 + 80012b6: b933 cbnz r3, 80012c6 <_free_r+0x32> + 80012b8: 6063 str r3, [r4, #4] + 80012ba: 6014 str r4, [r2, #0] + 80012bc: b003 add sp, #12 + 80012be: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 80012c2: f7ff bfe1 b.w 8001288 <__malloc_unlock> + 80012c6: 42a3 cmp r3, r4 + 80012c8: d90b bls.n 80012e2 <_free_r+0x4e> + 80012ca: 6821 ldr r1, [r4, #0] + 80012cc: 1862 adds r2, r4, r1 + 80012ce: 4293 cmp r3, r2 + 80012d0: bf04 itt eq + 80012d2: 681a ldreq r2, [r3, #0] + 80012d4: 685b ldreq r3, [r3, #4] + 80012d6: 6063 str r3, [r4, #4] + 80012d8: bf04 itt eq + 80012da: 1852 addeq r2, r2, r1 + 80012dc: 6022 streq r2, [r4, #0] + 80012de: 602c str r4, [r5, #0] + 80012e0: e7ec b.n 80012bc <_free_r+0x28> + 80012e2: 461a mov r2, r3 + 80012e4: 685b ldr r3, [r3, #4] + 80012e6: b10b cbz r3, 80012ec <_free_r+0x58> + 80012e8: 42a3 cmp r3, r4 + 80012ea: d9fa bls.n 80012e2 <_free_r+0x4e> + 80012ec: 6811 ldr r1, [r2, #0] + 80012ee: 1855 adds r5, r2, r1 + 80012f0: 42a5 cmp r5, r4 + 80012f2: d10b bne.n 800130c <_free_r+0x78> + 80012f4: 6824 ldr r4, [r4, #0] + 80012f6: 4421 add r1, r4 + 80012f8: 1854 adds r4, r2, r1 + 80012fa: 42a3 cmp r3, r4 + 80012fc: 6011 str r1, [r2, #0] + 80012fe: d1dd bne.n 80012bc <_free_r+0x28> + 8001300: 681c ldr r4, [r3, #0] + 8001302: 685b ldr r3, [r3, #4] + 8001304: 6053 str r3, [r2, #4] + 8001306: 4421 add r1, r4 + 8001308: 6011 str r1, [r2, #0] + 800130a: e7d7 b.n 80012bc <_free_r+0x28> + 800130c: d902 bls.n 8001314 <_free_r+0x80> + 800130e: 230c movs r3, #12 + 8001310: 6003 str r3, [r0, #0] + 8001312: e7d3 b.n 80012bc <_free_r+0x28> + 8001314: 6825 ldr r5, [r4, #0] + 8001316: 1961 adds r1, r4, r5 + 8001318: 428b cmp r3, r1 + 800131a: bf04 itt eq + 800131c: 6819 ldreq r1, [r3, #0] + 800131e: 685b ldreq r3, [r3, #4] + 8001320: 6063 str r3, [r4, #4] + 8001322: bf04 itt eq + 8001324: 1949 addeq r1, r1, r5 + 8001326: 6021 streq r1, [r4, #0] + 8001328: 6054 str r4, [r2, #4] + 800132a: e7c7 b.n 80012bc <_free_r+0x28> + 800132c: b003 add sp, #12 + 800132e: bd30 pop {r4, r5, pc} + 8001330: 20000080 .word 0x20000080 + +08001334 <_sungetc_r>: + 8001334: b538 push {r3, r4, r5, lr} + 8001336: 1c4b adds r3, r1, #1 + 8001338: 4614 mov r4, r2 + 800133a: d103 bne.n 8001344 <_sungetc_r+0x10> + 800133c: f04f 35ff mov.w r5, #4294967295 + 8001340: 4628 mov r0, r5 + 8001342: bd38 pop {r3, r4, r5, pc} + 8001344: 8993 ldrh r3, [r2, #12] + 8001346: f023 0320 bic.w r3, r3, #32 + 800134a: 8193 strh r3, [r2, #12] + 800134c: 6b63 ldr r3, [r4, #52] ; 0x34 + 800134e: 6852 ldr r2, [r2, #4] + 8001350: b2cd uxtb r5, r1 + 8001352: b18b cbz r3, 8001378 <_sungetc_r+0x44> + 8001354: 6ba3 ldr r3, [r4, #56] ; 0x38 + 8001356: 4293 cmp r3, r2 + 8001358: dd08 ble.n 800136c <_sungetc_r+0x38> + 800135a: 6823 ldr r3, [r4, #0] + 800135c: 1e5a subs r2, r3, #1 + 800135e: 6022 str r2, [r4, #0] + 8001360: f803 5c01 strb.w r5, [r3, #-1] + 8001364: 6863 ldr r3, [r4, #4] + 8001366: 3301 adds r3, #1 + 8001368: 6063 str r3, [r4, #4] + 800136a: e7e9 b.n 8001340 <_sungetc_r+0xc> + 800136c: 4621 mov r1, r4 + 800136e: f000 ff3d bl 80021ec <__submore> + 8001372: 2800 cmp r0, #0 + 8001374: d0f1 beq.n 800135a <_sungetc_r+0x26> + 8001376: e7e1 b.n 800133c <_sungetc_r+0x8> + 8001378: 6921 ldr r1, [r4, #16] + 800137a: 6823 ldr r3, [r4, #0] + 800137c: b151 cbz r1, 8001394 <_sungetc_r+0x60> + 800137e: 4299 cmp r1, r3 + 8001380: d208 bcs.n 8001394 <_sungetc_r+0x60> + 8001382: f813 1c01 ldrb.w r1, [r3, #-1] + 8001386: 42a9 cmp r1, r5 + 8001388: d104 bne.n 8001394 <_sungetc_r+0x60> + 800138a: 3b01 subs r3, #1 + 800138c: 3201 adds r2, #1 + 800138e: 6023 str r3, [r4, #0] + 8001390: 6062 str r2, [r4, #4] + 8001392: e7d5 b.n 8001340 <_sungetc_r+0xc> + 8001394: e9c4 320f strd r3, r2, [r4, #60] ; 0x3c + 8001398: f104 0344 add.w r3, r4, #68 ; 0x44 + 800139c: 6363 str r3, [r4, #52] ; 0x34 + 800139e: 2303 movs r3, #3 + 80013a0: 63a3 str r3, [r4, #56] ; 0x38 + 80013a2: 4623 mov r3, r4 + 80013a4: f803 5f46 strb.w r5, [r3, #70]! + 80013a8: 6023 str r3, [r4, #0] + 80013aa: 2301 movs r3, #1 + 80013ac: e7dc b.n 8001368 <_sungetc_r+0x34> + +080013ae <__ssrefill_r>: + 80013ae: b510 push {r4, lr} + 80013b0: 460c mov r4, r1 + 80013b2: 6b49 ldr r1, [r1, #52] ; 0x34 + 80013b4: b169 cbz r1, 80013d2 <__ssrefill_r+0x24> + 80013b6: f104 0344 add.w r3, r4, #68 ; 0x44 + 80013ba: 4299 cmp r1, r3 + 80013bc: d001 beq.n 80013c2 <__ssrefill_r+0x14> + 80013be: f7ff ff69 bl 8001294 <_free_r> + 80013c2: 6c23 ldr r3, [r4, #64] ; 0x40 + 80013c4: 6063 str r3, [r4, #4] + 80013c6: 2000 movs r0, #0 + 80013c8: 6360 str r0, [r4, #52] ; 0x34 + 80013ca: b113 cbz r3, 80013d2 <__ssrefill_r+0x24> + 80013cc: 6be3 ldr r3, [r4, #60] ; 0x3c + 80013ce: 6023 str r3, [r4, #0] + 80013d0: bd10 pop {r4, pc} + 80013d2: 6923 ldr r3, [r4, #16] + 80013d4: 6023 str r3, [r4, #0] + 80013d6: 2300 movs r3, #0 + 80013d8: 6063 str r3, [r4, #4] + 80013da: 89a3 ldrh r3, [r4, #12] + 80013dc: f043 0320 orr.w r3, r3, #32 + 80013e0: 81a3 strh r3, [r4, #12] + 80013e2: f04f 30ff mov.w r0, #4294967295 + 80013e6: e7f3 b.n 80013d0 <__ssrefill_r+0x22> + +080013e8 <__ssvfiscanf_r>: + 80013e8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80013ec: 460c mov r4, r1 + 80013ee: f5ad 7d23 sub.w sp, sp, #652 ; 0x28c + 80013f2: 2100 movs r1, #0 + 80013f4: e9cd 1144 strd r1, r1, [sp, #272] ; 0x110 + 80013f8: 49b2 ldr r1, [pc, #712] ; (80016c4 <__ssvfiscanf_r+0x2dc>) + 80013fa: 91a0 str r1, [sp, #640] ; 0x280 + 80013fc: f10d 0804 add.w r8, sp, #4 + 8001400: 49b1 ldr r1, [pc, #708] ; (80016c8 <__ssvfiscanf_r+0x2e0>) + 8001402: 4fb2 ldr r7, [pc, #712] ; (80016cc <__ssvfiscanf_r+0x2e4>) + 8001404: f8df 92c8 ldr.w r9, [pc, #712] ; 80016d0 <__ssvfiscanf_r+0x2e8> + 8001408: f8cd 8118 str.w r8, [sp, #280] ; 0x118 + 800140c: 4606 mov r6, r0 + 800140e: 91a1 str r1, [sp, #644] ; 0x284 + 8001410: 9300 str r3, [sp, #0] + 8001412: f892 a000 ldrb.w sl, [r2] + 8001416: f1ba 0f00 cmp.w sl, #0 + 800141a: f000 8151 beq.w 80016c0 <__ssvfiscanf_r+0x2d8> + 800141e: f81a 3007 ldrb.w r3, [sl, r7] + 8001422: f013 0308 ands.w r3, r3, #8 + 8001426: f102 0501 add.w r5, r2, #1 + 800142a: d019 beq.n 8001460 <__ssvfiscanf_r+0x78> + 800142c: 6863 ldr r3, [r4, #4] + 800142e: 2b00 cmp r3, #0 + 8001430: dd0f ble.n 8001452 <__ssvfiscanf_r+0x6a> + 8001432: 6823 ldr r3, [r4, #0] + 8001434: 781a ldrb r2, [r3, #0] + 8001436: 5cba ldrb r2, [r7, r2] + 8001438: 0712 lsls r2, r2, #28 + 800143a: d401 bmi.n 8001440 <__ssvfiscanf_r+0x58> + 800143c: 462a mov r2, r5 + 800143e: e7e8 b.n 8001412 <__ssvfiscanf_r+0x2a> + 8001440: 9a45 ldr r2, [sp, #276] ; 0x114 + 8001442: 3201 adds r2, #1 + 8001444: 9245 str r2, [sp, #276] ; 0x114 + 8001446: 6862 ldr r2, [r4, #4] + 8001448: 3301 adds r3, #1 + 800144a: 3a01 subs r2, #1 + 800144c: 6062 str r2, [r4, #4] + 800144e: 6023 str r3, [r4, #0] + 8001450: e7ec b.n 800142c <__ssvfiscanf_r+0x44> + 8001452: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8001454: 4621 mov r1, r4 + 8001456: 4630 mov r0, r6 + 8001458: 4798 blx r3 + 800145a: 2800 cmp r0, #0 + 800145c: d0e9 beq.n 8001432 <__ssvfiscanf_r+0x4a> + 800145e: e7ed b.n 800143c <__ssvfiscanf_r+0x54> + 8001460: f1ba 0f25 cmp.w sl, #37 ; 0x25 + 8001464: f040 8083 bne.w 800156e <__ssvfiscanf_r+0x186> + 8001468: 9341 str r3, [sp, #260] ; 0x104 + 800146a: 9343 str r3, [sp, #268] ; 0x10c + 800146c: 7853 ldrb r3, [r2, #1] + 800146e: 2b2a cmp r3, #42 ; 0x2a + 8001470: bf02 ittt eq + 8001472: 2310 moveq r3, #16 + 8001474: 1c95 addeq r5, r2, #2 + 8001476: 9341 streq r3, [sp, #260] ; 0x104 + 8001478: 220a movs r2, #10 + 800147a: 46ab mov fp, r5 + 800147c: f81b 1b01 ldrb.w r1, [fp], #1 + 8001480: f1a1 0330 sub.w r3, r1, #48 ; 0x30 + 8001484: 2b09 cmp r3, #9 + 8001486: d91d bls.n 80014c4 <__ssvfiscanf_r+0xdc> + 8001488: 4891 ldr r0, [pc, #580] ; (80016d0 <__ssvfiscanf_r+0x2e8>) + 800148a: 2203 movs r2, #3 + 800148c: f7fe fec0 bl 8000210 + 8001490: b140 cbz r0, 80014a4 <__ssvfiscanf_r+0xbc> + 8001492: 2301 movs r3, #1 + 8001494: eba0 0009 sub.w r0, r0, r9 + 8001498: fa03 f000 lsl.w r0, r3, r0 + 800149c: 9b41 ldr r3, [sp, #260] ; 0x104 + 800149e: 4318 orrs r0, r3 + 80014a0: 9041 str r0, [sp, #260] ; 0x104 + 80014a2: 465d mov r5, fp + 80014a4: f815 3b01 ldrb.w r3, [r5], #1 + 80014a8: 2b78 cmp r3, #120 ; 0x78 + 80014aa: d806 bhi.n 80014ba <__ssvfiscanf_r+0xd2> + 80014ac: 2b57 cmp r3, #87 ; 0x57 + 80014ae: d810 bhi.n 80014d2 <__ssvfiscanf_r+0xea> + 80014b0: 2b25 cmp r3, #37 ; 0x25 + 80014b2: d05c beq.n 800156e <__ssvfiscanf_r+0x186> + 80014b4: d856 bhi.n 8001564 <__ssvfiscanf_r+0x17c> + 80014b6: 2b00 cmp r3, #0 + 80014b8: d074 beq.n 80015a4 <__ssvfiscanf_r+0x1bc> + 80014ba: 2303 movs r3, #3 + 80014bc: 9347 str r3, [sp, #284] ; 0x11c + 80014be: 230a movs r3, #10 + 80014c0: 9342 str r3, [sp, #264] ; 0x108 + 80014c2: e081 b.n 80015c8 <__ssvfiscanf_r+0x1e0> + 80014c4: 9b43 ldr r3, [sp, #268] ; 0x10c + 80014c6: fb02 1303 mla r3, r2, r3, r1 + 80014ca: 3b30 subs r3, #48 ; 0x30 + 80014cc: 9343 str r3, [sp, #268] ; 0x10c + 80014ce: 465d mov r5, fp + 80014d0: e7d3 b.n 800147a <__ssvfiscanf_r+0x92> + 80014d2: f1a3 0258 sub.w r2, r3, #88 ; 0x58 + 80014d6: 2a20 cmp r2, #32 + 80014d8: d8ef bhi.n 80014ba <__ssvfiscanf_r+0xd2> + 80014da: a101 add r1, pc, #4 ; (adr r1, 80014e0 <__ssvfiscanf_r+0xf8>) + 80014dc: f851 f022 ldr.w pc, [r1, r2, lsl #2] + 80014e0: 080015b3 .word 0x080015b3 + 80014e4: 080014bb .word 0x080014bb + 80014e8: 080014bb .word 0x080014bb + 80014ec: 08001611 .word 0x08001611 + 80014f0: 080014bb .word 0x080014bb + 80014f4: 080014bb .word 0x080014bb + 80014f8: 080014bb .word 0x080014bb + 80014fc: 080014bb .word 0x080014bb + 8001500: 080014bb .word 0x080014bb + 8001504: 080014bb .word 0x080014bb + 8001508: 080014bb .word 0x080014bb + 800150c: 08001627 .word 0x08001627 + 8001510: 080015fd .word 0x080015fd + 8001514: 0800156b .word 0x0800156b + 8001518: 0800156b .word 0x0800156b + 800151c: 0800156b .word 0x0800156b + 8001520: 080014bb .word 0x080014bb + 8001524: 08001601 .word 0x08001601 + 8001528: 080014bb .word 0x080014bb + 800152c: 080014bb .word 0x080014bb + 8001530: 080014bb .word 0x080014bb + 8001534: 080014bb .word 0x080014bb + 8001538: 08001637 .word 0x08001637 + 800153c: 08001609 .word 0x08001609 + 8001540: 080015ab .word 0x080015ab + 8001544: 080014bb .word 0x080014bb + 8001548: 080014bb .word 0x080014bb + 800154c: 08001633 .word 0x08001633 + 8001550: 080014bb .word 0x080014bb + 8001554: 080015fd .word 0x080015fd + 8001558: 080014bb .word 0x080014bb + 800155c: 080014bb .word 0x080014bb + 8001560: 080015b3 .word 0x080015b3 + 8001564: 3b45 subs r3, #69 ; 0x45 + 8001566: 2b02 cmp r3, #2 + 8001568: d8a7 bhi.n 80014ba <__ssvfiscanf_r+0xd2> + 800156a: 2305 movs r3, #5 + 800156c: e02b b.n 80015c6 <__ssvfiscanf_r+0x1de> + 800156e: 6863 ldr r3, [r4, #4] + 8001570: 2b00 cmp r3, #0 + 8001572: dd0d ble.n 8001590 <__ssvfiscanf_r+0x1a8> + 8001574: 6823 ldr r3, [r4, #0] + 8001576: 781a ldrb r2, [r3, #0] + 8001578: 4552 cmp r2, sl + 800157a: f040 80a1 bne.w 80016c0 <__ssvfiscanf_r+0x2d8> + 800157e: 3301 adds r3, #1 + 8001580: 6862 ldr r2, [r4, #4] + 8001582: 6023 str r3, [r4, #0] + 8001584: 9b45 ldr r3, [sp, #276] ; 0x114 + 8001586: 3a01 subs r2, #1 + 8001588: 3301 adds r3, #1 + 800158a: 6062 str r2, [r4, #4] + 800158c: 9345 str r3, [sp, #276] ; 0x114 + 800158e: e755 b.n 800143c <__ssvfiscanf_r+0x54> + 8001590: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8001592: 4621 mov r1, r4 + 8001594: 4630 mov r0, r6 + 8001596: 4798 blx r3 + 8001598: 2800 cmp r0, #0 + 800159a: d0eb beq.n 8001574 <__ssvfiscanf_r+0x18c> + 800159c: 9844 ldr r0, [sp, #272] ; 0x110 + 800159e: 2800 cmp r0, #0 + 80015a0: f040 8084 bne.w 80016ac <__ssvfiscanf_r+0x2c4> + 80015a4: f04f 30ff mov.w r0, #4294967295 + 80015a8: e086 b.n 80016b8 <__ssvfiscanf_r+0x2d0> + 80015aa: 9a41 ldr r2, [sp, #260] ; 0x104 + 80015ac: f042 0220 orr.w r2, r2, #32 + 80015b0: 9241 str r2, [sp, #260] ; 0x104 + 80015b2: 9a41 ldr r2, [sp, #260] ; 0x104 + 80015b4: f442 7200 orr.w r2, r2, #512 ; 0x200 + 80015b8: 9241 str r2, [sp, #260] ; 0x104 + 80015ba: 2210 movs r2, #16 + 80015bc: 2b6f cmp r3, #111 ; 0x6f + 80015be: 9242 str r2, [sp, #264] ; 0x108 + 80015c0: bf34 ite cc + 80015c2: 2303 movcc r3, #3 + 80015c4: 2304 movcs r3, #4 + 80015c6: 9347 str r3, [sp, #284] ; 0x11c + 80015c8: 6863 ldr r3, [r4, #4] + 80015ca: 2b00 cmp r3, #0 + 80015cc: dd41 ble.n 8001652 <__ssvfiscanf_r+0x26a> + 80015ce: 9b41 ldr r3, [sp, #260] ; 0x104 + 80015d0: 0659 lsls r1, r3, #25 + 80015d2: d404 bmi.n 80015de <__ssvfiscanf_r+0x1f6> + 80015d4: 6823 ldr r3, [r4, #0] + 80015d6: 781a ldrb r2, [r3, #0] + 80015d8: 5cba ldrb r2, [r7, r2] + 80015da: 0712 lsls r2, r2, #28 + 80015dc: d440 bmi.n 8001660 <__ssvfiscanf_r+0x278> + 80015de: 9b47 ldr r3, [sp, #284] ; 0x11c + 80015e0: 2b02 cmp r3, #2 + 80015e2: dc4f bgt.n 8001684 <__ssvfiscanf_r+0x29c> + 80015e4: 466b mov r3, sp + 80015e6: 4622 mov r2, r4 + 80015e8: a941 add r1, sp, #260 ; 0x104 + 80015ea: 4630 mov r0, r6 + 80015ec: f000 fb62 bl 8001cb4 <_scanf_chars> + 80015f0: 2801 cmp r0, #1 + 80015f2: d065 beq.n 80016c0 <__ssvfiscanf_r+0x2d8> + 80015f4: 2802 cmp r0, #2 + 80015f6: f47f af21 bne.w 800143c <__ssvfiscanf_r+0x54> + 80015fa: e7cf b.n 800159c <__ssvfiscanf_r+0x1b4> + 80015fc: 220a movs r2, #10 + 80015fe: e7dd b.n 80015bc <__ssvfiscanf_r+0x1d4> + 8001600: 2300 movs r3, #0 + 8001602: 9342 str r3, [sp, #264] ; 0x108 + 8001604: 2303 movs r3, #3 + 8001606: e7de b.n 80015c6 <__ssvfiscanf_r+0x1de> + 8001608: 2308 movs r3, #8 + 800160a: 9342 str r3, [sp, #264] ; 0x108 + 800160c: 2304 movs r3, #4 + 800160e: e7da b.n 80015c6 <__ssvfiscanf_r+0x1de> + 8001610: 4629 mov r1, r5 + 8001612: 4640 mov r0, r8 + 8001614: f000 fcac bl 8001f70 <__sccl> + 8001618: 9b41 ldr r3, [sp, #260] ; 0x104 + 800161a: f043 0340 orr.w r3, r3, #64 ; 0x40 + 800161e: 9341 str r3, [sp, #260] ; 0x104 + 8001620: 4605 mov r5, r0 + 8001622: 2301 movs r3, #1 + 8001624: e7cf b.n 80015c6 <__ssvfiscanf_r+0x1de> + 8001626: 9b41 ldr r3, [sp, #260] ; 0x104 + 8001628: f043 0340 orr.w r3, r3, #64 ; 0x40 + 800162c: 9341 str r3, [sp, #260] ; 0x104 + 800162e: 2300 movs r3, #0 + 8001630: e7c9 b.n 80015c6 <__ssvfiscanf_r+0x1de> + 8001632: 2302 movs r3, #2 + 8001634: e7c7 b.n 80015c6 <__ssvfiscanf_r+0x1de> + 8001636: 9841 ldr r0, [sp, #260] ; 0x104 + 8001638: 06c3 lsls r3, r0, #27 + 800163a: f53f aeff bmi.w 800143c <__ssvfiscanf_r+0x54> + 800163e: 9b00 ldr r3, [sp, #0] + 8001640: 9a45 ldr r2, [sp, #276] ; 0x114 + 8001642: 1d19 adds r1, r3, #4 + 8001644: 9100 str r1, [sp, #0] + 8001646: 681b ldr r3, [r3, #0] + 8001648: 07c0 lsls r0, r0, #31 + 800164a: bf4c ite mi + 800164c: 801a strhmi r2, [r3, #0] + 800164e: 601a strpl r2, [r3, #0] + 8001650: e6f4 b.n 800143c <__ssvfiscanf_r+0x54> + 8001652: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8001654: 4621 mov r1, r4 + 8001656: 4630 mov r0, r6 + 8001658: 4798 blx r3 + 800165a: 2800 cmp r0, #0 + 800165c: d0b7 beq.n 80015ce <__ssvfiscanf_r+0x1e6> + 800165e: e79d b.n 800159c <__ssvfiscanf_r+0x1b4> + 8001660: 9a45 ldr r2, [sp, #276] ; 0x114 + 8001662: 3201 adds r2, #1 + 8001664: 9245 str r2, [sp, #276] ; 0x114 + 8001666: 6862 ldr r2, [r4, #4] + 8001668: 3a01 subs r2, #1 + 800166a: 2a00 cmp r2, #0 + 800166c: 6062 str r2, [r4, #4] + 800166e: dd02 ble.n 8001676 <__ssvfiscanf_r+0x28e> + 8001670: 3301 adds r3, #1 + 8001672: 6023 str r3, [r4, #0] + 8001674: e7ae b.n 80015d4 <__ssvfiscanf_r+0x1ec> + 8001676: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8001678: 4621 mov r1, r4 + 800167a: 4630 mov r0, r6 + 800167c: 4798 blx r3 + 800167e: 2800 cmp r0, #0 + 8001680: d0a8 beq.n 80015d4 <__ssvfiscanf_r+0x1ec> + 8001682: e78b b.n 800159c <__ssvfiscanf_r+0x1b4> + 8001684: 2b04 cmp r3, #4 + 8001686: dc06 bgt.n 8001696 <__ssvfiscanf_r+0x2ae> + 8001688: 466b mov r3, sp + 800168a: 4622 mov r2, r4 + 800168c: a941 add r1, sp, #260 ; 0x104 + 800168e: 4630 mov r0, r6 + 8001690: f000 fb68 bl 8001d64 <_scanf_i> + 8001694: e7ac b.n 80015f0 <__ssvfiscanf_r+0x208> + 8001696: 4b0f ldr r3, [pc, #60] ; (80016d4 <__ssvfiscanf_r+0x2ec>) + 8001698: 2b00 cmp r3, #0 + 800169a: f43f aecf beq.w 800143c <__ssvfiscanf_r+0x54> + 800169e: 466b mov r3, sp + 80016a0: 4622 mov r2, r4 + 80016a2: a941 add r1, sp, #260 ; 0x104 + 80016a4: 4630 mov r0, r6 + 80016a6: f3af 8000 nop.w + 80016aa: e7a1 b.n 80015f0 <__ssvfiscanf_r+0x208> + 80016ac: 89a3 ldrh r3, [r4, #12] + 80016ae: f013 0f40 tst.w r3, #64 ; 0x40 + 80016b2: bf18 it ne + 80016b4: f04f 30ff movne.w r0, #4294967295 + 80016b8: f50d 7d23 add.w sp, sp, #652 ; 0x28c + 80016bc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80016c0: 9844 ldr r0, [sp, #272] ; 0x110 + 80016c2: e7f9 b.n 80016b8 <__ssvfiscanf_r+0x2d0> + 80016c4: 08001335 .word 0x08001335 + 80016c8: 080013af .word 0x080013af + 80016cc: 080027af .word 0x080027af + 80016d0: 08002760 .word 0x08002760 + 80016d4: 00000000 .word 0x00000000 + +080016d8 <__sfputc_r>: + 80016d8: 6893 ldr r3, [r2, #8] + 80016da: 3b01 subs r3, #1 + 80016dc: 2b00 cmp r3, #0 + 80016de: b410 push {r4} + 80016e0: 6093 str r3, [r2, #8] + 80016e2: da08 bge.n 80016f6 <__sfputc_r+0x1e> + 80016e4: 6994 ldr r4, [r2, #24] + 80016e6: 42a3 cmp r3, r4 + 80016e8: db01 blt.n 80016ee <__sfputc_r+0x16> + 80016ea: 290a cmp r1, #10 + 80016ec: d103 bne.n 80016f6 <__sfputc_r+0x1e> + 80016ee: f85d 4b04 ldr.w r4, [sp], #4 + 80016f2: f000 bdb5 b.w 8002260 <__swbuf_r> + 80016f6: 6813 ldr r3, [r2, #0] + 80016f8: 1c58 adds r0, r3, #1 + 80016fa: 6010 str r0, [r2, #0] + 80016fc: 7019 strb r1, [r3, #0] + 80016fe: 4608 mov r0, r1 + 8001700: f85d 4b04 ldr.w r4, [sp], #4 + 8001704: 4770 bx lr + +08001706 <__sfputs_r>: + 8001706: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001708: 4606 mov r6, r0 + 800170a: 460f mov r7, r1 + 800170c: 4614 mov r4, r2 + 800170e: 18d5 adds r5, r2, r3 + 8001710: 42ac cmp r4, r5 + 8001712: d101 bne.n 8001718 <__sfputs_r+0x12> + 8001714: 2000 movs r0, #0 + 8001716: e007 b.n 8001728 <__sfputs_r+0x22> + 8001718: f814 1b01 ldrb.w r1, [r4], #1 + 800171c: 463a mov r2, r7 + 800171e: 4630 mov r0, r6 + 8001720: f7ff ffda bl 80016d8 <__sfputc_r> + 8001724: 1c43 adds r3, r0, #1 + 8001726: d1f3 bne.n 8001710 <__sfputs_r+0xa> + 8001728: bdf8 pop {r3, r4, r5, r6, r7, pc} + ... + +0800172c <_vfiprintf_r>: + 800172c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8001730: 460d mov r5, r1 + 8001732: b09d sub sp, #116 ; 0x74 + 8001734: 4614 mov r4, r2 + 8001736: 4698 mov r8, r3 + 8001738: 4606 mov r6, r0 + 800173a: b118 cbz r0, 8001744 <_vfiprintf_r+0x18> + 800173c: 6983 ldr r3, [r0, #24] + 800173e: b90b cbnz r3, 8001744 <_vfiprintf_r+0x18> + 8001740: f7ff f8e2 bl 8000908 <__sinit> + 8001744: 4b89 ldr r3, [pc, #548] ; (800196c <_vfiprintf_r+0x240>) + 8001746: 429d cmp r5, r3 + 8001748: d11b bne.n 8001782 <_vfiprintf_r+0x56> + 800174a: 6875 ldr r5, [r6, #4] + 800174c: 6e6b ldr r3, [r5, #100] ; 0x64 + 800174e: 07d9 lsls r1, r3, #31 + 8001750: d405 bmi.n 800175e <_vfiprintf_r+0x32> + 8001752: 89ab ldrh r3, [r5, #12] + 8001754: 059a lsls r2, r3, #22 + 8001756: d402 bmi.n 800175e <_vfiprintf_r+0x32> + 8001758: 6da8 ldr r0, [r5, #88] ; 0x58 + 800175a: f7ff f9b4 bl 8000ac6 <__retarget_lock_acquire_recursive> + 800175e: 89ab ldrh r3, [r5, #12] + 8001760: 071b lsls r3, r3, #28 + 8001762: d501 bpl.n 8001768 <_vfiprintf_r+0x3c> + 8001764: 692b ldr r3, [r5, #16] + 8001766: b9eb cbnz r3, 80017a4 <_vfiprintf_r+0x78> + 8001768: 4629 mov r1, r5 + 800176a: 4630 mov r0, r6 + 800176c: f000 fdca bl 8002304 <__swsetup_r> + 8001770: b1c0 cbz r0, 80017a4 <_vfiprintf_r+0x78> + 8001772: 6e6b ldr r3, [r5, #100] ; 0x64 + 8001774: 07dc lsls r4, r3, #31 + 8001776: d50e bpl.n 8001796 <_vfiprintf_r+0x6a> + 8001778: f04f 30ff mov.w r0, #4294967295 + 800177c: b01d add sp, #116 ; 0x74 + 800177e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8001782: 4b7b ldr r3, [pc, #492] ; (8001970 <_vfiprintf_r+0x244>) + 8001784: 429d cmp r5, r3 + 8001786: d101 bne.n 800178c <_vfiprintf_r+0x60> + 8001788: 68b5 ldr r5, [r6, #8] + 800178a: e7df b.n 800174c <_vfiprintf_r+0x20> + 800178c: 4b79 ldr r3, [pc, #484] ; (8001974 <_vfiprintf_r+0x248>) + 800178e: 429d cmp r5, r3 + 8001790: bf08 it eq + 8001792: 68f5 ldreq r5, [r6, #12] + 8001794: e7da b.n 800174c <_vfiprintf_r+0x20> + 8001796: 89ab ldrh r3, [r5, #12] + 8001798: 0598 lsls r0, r3, #22 + 800179a: d4ed bmi.n 8001778 <_vfiprintf_r+0x4c> + 800179c: 6da8 ldr r0, [r5, #88] ; 0x58 + 800179e: f7ff f993 bl 8000ac8 <__retarget_lock_release_recursive> + 80017a2: e7e9 b.n 8001778 <_vfiprintf_r+0x4c> + 80017a4: 2300 movs r3, #0 + 80017a6: 9309 str r3, [sp, #36] ; 0x24 + 80017a8: 2320 movs r3, #32 + 80017aa: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 80017ae: f8cd 800c str.w r8, [sp, #12] + 80017b2: 2330 movs r3, #48 ; 0x30 + 80017b4: f8df 81c0 ldr.w r8, [pc, #448] ; 8001978 <_vfiprintf_r+0x24c> + 80017b8: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 80017bc: f04f 0901 mov.w r9, #1 + 80017c0: 4623 mov r3, r4 + 80017c2: 469a mov sl, r3 + 80017c4: f813 2b01 ldrb.w r2, [r3], #1 + 80017c8: b10a cbz r2, 80017ce <_vfiprintf_r+0xa2> + 80017ca: 2a25 cmp r2, #37 ; 0x25 + 80017cc: d1f9 bne.n 80017c2 <_vfiprintf_r+0x96> + 80017ce: ebba 0b04 subs.w fp, sl, r4 + 80017d2: d00b beq.n 80017ec <_vfiprintf_r+0xc0> + 80017d4: 465b mov r3, fp + 80017d6: 4622 mov r2, r4 + 80017d8: 4629 mov r1, r5 + 80017da: 4630 mov r0, r6 + 80017dc: f7ff ff93 bl 8001706 <__sfputs_r> + 80017e0: 3001 adds r0, #1 + 80017e2: f000 80aa beq.w 800193a <_vfiprintf_r+0x20e> + 80017e6: 9a09 ldr r2, [sp, #36] ; 0x24 + 80017e8: 445a add r2, fp + 80017ea: 9209 str r2, [sp, #36] ; 0x24 + 80017ec: f89a 3000 ldrb.w r3, [sl] + 80017f0: 2b00 cmp r3, #0 + 80017f2: f000 80a2 beq.w 800193a <_vfiprintf_r+0x20e> + 80017f6: 2300 movs r3, #0 + 80017f8: f04f 32ff mov.w r2, #4294967295 + 80017fc: e9cd 2305 strd r2, r3, [sp, #20] + 8001800: f10a 0a01 add.w sl, sl, #1 + 8001804: 9304 str r3, [sp, #16] + 8001806: 9307 str r3, [sp, #28] + 8001808: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 800180c: 931a str r3, [sp, #104] ; 0x68 + 800180e: 4654 mov r4, sl + 8001810: 2205 movs r2, #5 + 8001812: f814 1b01 ldrb.w r1, [r4], #1 + 8001816: 4858 ldr r0, [pc, #352] ; (8001978 <_vfiprintf_r+0x24c>) + 8001818: f7fe fcfa bl 8000210 + 800181c: 9a04 ldr r2, [sp, #16] + 800181e: b9d8 cbnz r0, 8001858 <_vfiprintf_r+0x12c> + 8001820: 06d1 lsls r1, r2, #27 + 8001822: bf44 itt mi + 8001824: 2320 movmi r3, #32 + 8001826: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 800182a: 0713 lsls r3, r2, #28 + 800182c: bf44 itt mi + 800182e: 232b movmi r3, #43 ; 0x2b + 8001830: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8001834: f89a 3000 ldrb.w r3, [sl] + 8001838: 2b2a cmp r3, #42 ; 0x2a + 800183a: d015 beq.n 8001868 <_vfiprintf_r+0x13c> + 800183c: 9a07 ldr r2, [sp, #28] + 800183e: 4654 mov r4, sl + 8001840: 2000 movs r0, #0 + 8001842: f04f 0c0a mov.w ip, #10 + 8001846: 4621 mov r1, r4 + 8001848: f811 3b01 ldrb.w r3, [r1], #1 + 800184c: 3b30 subs r3, #48 ; 0x30 + 800184e: 2b09 cmp r3, #9 + 8001850: d94e bls.n 80018f0 <_vfiprintf_r+0x1c4> + 8001852: b1b0 cbz r0, 8001882 <_vfiprintf_r+0x156> + 8001854: 9207 str r2, [sp, #28] + 8001856: e014 b.n 8001882 <_vfiprintf_r+0x156> + 8001858: eba0 0308 sub.w r3, r0, r8 + 800185c: fa09 f303 lsl.w r3, r9, r3 + 8001860: 4313 orrs r3, r2 + 8001862: 9304 str r3, [sp, #16] + 8001864: 46a2 mov sl, r4 + 8001866: e7d2 b.n 800180e <_vfiprintf_r+0xe2> + 8001868: 9b03 ldr r3, [sp, #12] + 800186a: 1d19 adds r1, r3, #4 + 800186c: 681b ldr r3, [r3, #0] + 800186e: 9103 str r1, [sp, #12] + 8001870: 2b00 cmp r3, #0 + 8001872: bfbb ittet lt + 8001874: 425b neglt r3, r3 + 8001876: f042 0202 orrlt.w r2, r2, #2 + 800187a: 9307 strge r3, [sp, #28] + 800187c: 9307 strlt r3, [sp, #28] + 800187e: bfb8 it lt + 8001880: 9204 strlt r2, [sp, #16] + 8001882: 7823 ldrb r3, [r4, #0] + 8001884: 2b2e cmp r3, #46 ; 0x2e + 8001886: d10c bne.n 80018a2 <_vfiprintf_r+0x176> + 8001888: 7863 ldrb r3, [r4, #1] + 800188a: 2b2a cmp r3, #42 ; 0x2a + 800188c: d135 bne.n 80018fa <_vfiprintf_r+0x1ce> + 800188e: 9b03 ldr r3, [sp, #12] + 8001890: 1d1a adds r2, r3, #4 + 8001892: 681b ldr r3, [r3, #0] + 8001894: 9203 str r2, [sp, #12] + 8001896: 2b00 cmp r3, #0 + 8001898: bfb8 it lt + 800189a: f04f 33ff movlt.w r3, #4294967295 + 800189e: 3402 adds r4, #2 + 80018a0: 9305 str r3, [sp, #20] + 80018a2: f8df a0e4 ldr.w sl, [pc, #228] ; 8001988 <_vfiprintf_r+0x25c> + 80018a6: 7821 ldrb r1, [r4, #0] + 80018a8: 2203 movs r2, #3 + 80018aa: 4650 mov r0, sl + 80018ac: f7fe fcb0 bl 8000210 + 80018b0: b140 cbz r0, 80018c4 <_vfiprintf_r+0x198> + 80018b2: 2340 movs r3, #64 ; 0x40 + 80018b4: eba0 000a sub.w r0, r0, sl + 80018b8: fa03 f000 lsl.w r0, r3, r0 + 80018bc: 9b04 ldr r3, [sp, #16] + 80018be: 4303 orrs r3, r0 + 80018c0: 3401 adds r4, #1 + 80018c2: 9304 str r3, [sp, #16] + 80018c4: f814 1b01 ldrb.w r1, [r4], #1 + 80018c8: 482c ldr r0, [pc, #176] ; (800197c <_vfiprintf_r+0x250>) + 80018ca: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 80018ce: 2206 movs r2, #6 + 80018d0: f7fe fc9e bl 8000210 + 80018d4: 2800 cmp r0, #0 + 80018d6: d03f beq.n 8001958 <_vfiprintf_r+0x22c> + 80018d8: 4b29 ldr r3, [pc, #164] ; (8001980 <_vfiprintf_r+0x254>) + 80018da: bb1b cbnz r3, 8001924 <_vfiprintf_r+0x1f8> + 80018dc: 9b03 ldr r3, [sp, #12] + 80018de: 3307 adds r3, #7 + 80018e0: f023 0307 bic.w r3, r3, #7 + 80018e4: 3308 adds r3, #8 + 80018e6: 9303 str r3, [sp, #12] + 80018e8: 9b09 ldr r3, [sp, #36] ; 0x24 + 80018ea: 443b add r3, r7 + 80018ec: 9309 str r3, [sp, #36] ; 0x24 + 80018ee: e767 b.n 80017c0 <_vfiprintf_r+0x94> + 80018f0: fb0c 3202 mla r2, ip, r2, r3 + 80018f4: 460c mov r4, r1 + 80018f6: 2001 movs r0, #1 + 80018f8: e7a5 b.n 8001846 <_vfiprintf_r+0x11a> + 80018fa: 2300 movs r3, #0 + 80018fc: 3401 adds r4, #1 + 80018fe: 9305 str r3, [sp, #20] + 8001900: 4619 mov r1, r3 + 8001902: f04f 0c0a mov.w ip, #10 + 8001906: 4620 mov r0, r4 + 8001908: f810 2b01 ldrb.w r2, [r0], #1 + 800190c: 3a30 subs r2, #48 ; 0x30 + 800190e: 2a09 cmp r2, #9 + 8001910: d903 bls.n 800191a <_vfiprintf_r+0x1ee> + 8001912: 2b00 cmp r3, #0 + 8001914: d0c5 beq.n 80018a2 <_vfiprintf_r+0x176> + 8001916: 9105 str r1, [sp, #20] + 8001918: e7c3 b.n 80018a2 <_vfiprintf_r+0x176> + 800191a: fb0c 2101 mla r1, ip, r1, r2 + 800191e: 4604 mov r4, r0 + 8001920: 2301 movs r3, #1 + 8001922: e7f0 b.n 8001906 <_vfiprintf_r+0x1da> + 8001924: ab03 add r3, sp, #12 + 8001926: 9300 str r3, [sp, #0] + 8001928: 462a mov r2, r5 + 800192a: 4b16 ldr r3, [pc, #88] ; (8001984 <_vfiprintf_r+0x258>) + 800192c: a904 add r1, sp, #16 + 800192e: 4630 mov r0, r6 + 8001930: f3af 8000 nop.w + 8001934: 4607 mov r7, r0 + 8001936: 1c78 adds r0, r7, #1 + 8001938: d1d6 bne.n 80018e8 <_vfiprintf_r+0x1bc> + 800193a: 6e6b ldr r3, [r5, #100] ; 0x64 + 800193c: 07d9 lsls r1, r3, #31 + 800193e: d405 bmi.n 800194c <_vfiprintf_r+0x220> + 8001940: 89ab ldrh r3, [r5, #12] + 8001942: 059a lsls r2, r3, #22 + 8001944: d402 bmi.n 800194c <_vfiprintf_r+0x220> + 8001946: 6da8 ldr r0, [r5, #88] ; 0x58 + 8001948: f7ff f8be bl 8000ac8 <__retarget_lock_release_recursive> + 800194c: 89ab ldrh r3, [r5, #12] + 800194e: 065b lsls r3, r3, #25 + 8001950: f53f af12 bmi.w 8001778 <_vfiprintf_r+0x4c> + 8001954: 9809 ldr r0, [sp, #36] ; 0x24 + 8001956: e711 b.n 800177c <_vfiprintf_r+0x50> + 8001958: ab03 add r3, sp, #12 + 800195a: 9300 str r3, [sp, #0] + 800195c: 462a mov r2, r5 + 800195e: 4b09 ldr r3, [pc, #36] ; (8001984 <_vfiprintf_r+0x258>) + 8001960: a904 add r1, sp, #16 + 8001962: 4630 mov r0, r6 + 8001964: f000 f880 bl 8001a68 <_printf_i> + 8001968: e7e4 b.n 8001934 <_vfiprintf_r+0x208> + 800196a: bf00 nop + 800196c: 0800271c .word 0x0800271c + 8001970: 0800273c .word 0x0800273c + 8001974: 080026fc .word 0x080026fc + 8001978: 08002764 .word 0x08002764 + 800197c: 0800276a .word 0x0800276a + 8001980: 00000000 .word 0x00000000 + 8001984: 08001707 .word 0x08001707 + 8001988: 08002760 .word 0x08002760 + +0800198c <_printf_common>: + 800198c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8001990: 4616 mov r6, r2 + 8001992: 4699 mov r9, r3 + 8001994: 688a ldr r2, [r1, #8] + 8001996: 690b ldr r3, [r1, #16] + 8001998: f8dd 8020 ldr.w r8, [sp, #32] + 800199c: 4293 cmp r3, r2 + 800199e: bfb8 it lt + 80019a0: 4613 movlt r3, r2 + 80019a2: 6033 str r3, [r6, #0] + 80019a4: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 80019a8: 4607 mov r7, r0 + 80019aa: 460c mov r4, r1 + 80019ac: b10a cbz r2, 80019b2 <_printf_common+0x26> + 80019ae: 3301 adds r3, #1 + 80019b0: 6033 str r3, [r6, #0] + 80019b2: 6823 ldr r3, [r4, #0] + 80019b4: 0699 lsls r1, r3, #26 + 80019b6: bf42 ittt mi + 80019b8: 6833 ldrmi r3, [r6, #0] + 80019ba: 3302 addmi r3, #2 + 80019bc: 6033 strmi r3, [r6, #0] + 80019be: 6825 ldr r5, [r4, #0] + 80019c0: f015 0506 ands.w r5, r5, #6 + 80019c4: d106 bne.n 80019d4 <_printf_common+0x48> + 80019c6: f104 0a19 add.w sl, r4, #25 + 80019ca: 68e3 ldr r3, [r4, #12] + 80019cc: 6832 ldr r2, [r6, #0] + 80019ce: 1a9b subs r3, r3, r2 + 80019d0: 42ab cmp r3, r5 + 80019d2: dc26 bgt.n 8001a22 <_printf_common+0x96> + 80019d4: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 80019d8: 1e13 subs r3, r2, #0 + 80019da: 6822 ldr r2, [r4, #0] + 80019dc: bf18 it ne + 80019de: 2301 movne r3, #1 + 80019e0: 0692 lsls r2, r2, #26 + 80019e2: d42b bmi.n 8001a3c <_printf_common+0xb0> + 80019e4: f104 0243 add.w r2, r4, #67 ; 0x43 + 80019e8: 4649 mov r1, r9 + 80019ea: 4638 mov r0, r7 + 80019ec: 47c0 blx r8 + 80019ee: 3001 adds r0, #1 + 80019f0: d01e beq.n 8001a30 <_printf_common+0xa4> + 80019f2: 6823 ldr r3, [r4, #0] + 80019f4: 68e5 ldr r5, [r4, #12] + 80019f6: 6832 ldr r2, [r6, #0] + 80019f8: f003 0306 and.w r3, r3, #6 + 80019fc: 2b04 cmp r3, #4 + 80019fe: bf08 it eq + 8001a00: 1aad subeq r5, r5, r2 + 8001a02: 68a3 ldr r3, [r4, #8] + 8001a04: 6922 ldr r2, [r4, #16] + 8001a06: bf0c ite eq + 8001a08: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 8001a0c: 2500 movne r5, #0 + 8001a0e: 4293 cmp r3, r2 + 8001a10: bfc4 itt gt + 8001a12: 1a9b subgt r3, r3, r2 + 8001a14: 18ed addgt r5, r5, r3 + 8001a16: 2600 movs r6, #0 + 8001a18: 341a adds r4, #26 + 8001a1a: 42b5 cmp r5, r6 + 8001a1c: d11a bne.n 8001a54 <_printf_common+0xc8> + 8001a1e: 2000 movs r0, #0 + 8001a20: e008 b.n 8001a34 <_printf_common+0xa8> + 8001a22: 2301 movs r3, #1 + 8001a24: 4652 mov r2, sl + 8001a26: 4649 mov r1, r9 + 8001a28: 4638 mov r0, r7 + 8001a2a: 47c0 blx r8 + 8001a2c: 3001 adds r0, #1 + 8001a2e: d103 bne.n 8001a38 <_printf_common+0xac> + 8001a30: f04f 30ff mov.w r0, #4294967295 + 8001a34: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001a38: 3501 adds r5, #1 + 8001a3a: e7c6 b.n 80019ca <_printf_common+0x3e> + 8001a3c: 18e1 adds r1, r4, r3 + 8001a3e: 1c5a adds r2, r3, #1 + 8001a40: 2030 movs r0, #48 ; 0x30 + 8001a42: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 8001a46: 4422 add r2, r4 + 8001a48: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 8001a4c: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 8001a50: 3302 adds r3, #2 + 8001a52: e7c7 b.n 80019e4 <_printf_common+0x58> + 8001a54: 2301 movs r3, #1 + 8001a56: 4622 mov r2, r4 + 8001a58: 4649 mov r1, r9 + 8001a5a: 4638 mov r0, r7 + 8001a5c: 47c0 blx r8 + 8001a5e: 3001 adds r0, #1 + 8001a60: d0e6 beq.n 8001a30 <_printf_common+0xa4> + 8001a62: 3601 adds r6, #1 + 8001a64: e7d9 b.n 8001a1a <_printf_common+0x8e> + ... + +08001a68 <_printf_i>: + 8001a68: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 8001a6c: 460c mov r4, r1 + 8001a6e: 4691 mov r9, r2 + 8001a70: 7e27 ldrb r7, [r4, #24] + 8001a72: 990c ldr r1, [sp, #48] ; 0x30 + 8001a74: 2f78 cmp r7, #120 ; 0x78 + 8001a76: 4680 mov r8, r0 + 8001a78: 469a mov sl, r3 + 8001a7a: f104 0243 add.w r2, r4, #67 ; 0x43 + 8001a7e: d807 bhi.n 8001a90 <_printf_i+0x28> + 8001a80: 2f62 cmp r7, #98 ; 0x62 + 8001a82: d80a bhi.n 8001a9a <_printf_i+0x32> + 8001a84: 2f00 cmp r7, #0 + 8001a86: f000 80d8 beq.w 8001c3a <_printf_i+0x1d2> + 8001a8a: 2f58 cmp r7, #88 ; 0x58 + 8001a8c: f000 80a3 beq.w 8001bd6 <_printf_i+0x16e> + 8001a90: f104 0642 add.w r6, r4, #66 ; 0x42 + 8001a94: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 8001a98: e03a b.n 8001b10 <_printf_i+0xa8> + 8001a9a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 8001a9e: 2b15 cmp r3, #21 + 8001aa0: d8f6 bhi.n 8001a90 <_printf_i+0x28> + 8001aa2: a001 add r0, pc, #4 ; (adr r0, 8001aa8 <_printf_i+0x40>) + 8001aa4: f850 f023 ldr.w pc, [r0, r3, lsl #2] + 8001aa8: 08001b01 .word 0x08001b01 + 8001aac: 08001b15 .word 0x08001b15 + 8001ab0: 08001a91 .word 0x08001a91 + 8001ab4: 08001a91 .word 0x08001a91 + 8001ab8: 08001a91 .word 0x08001a91 + 8001abc: 08001a91 .word 0x08001a91 + 8001ac0: 08001b15 .word 0x08001b15 + 8001ac4: 08001a91 .word 0x08001a91 + 8001ac8: 08001a91 .word 0x08001a91 + 8001acc: 08001a91 .word 0x08001a91 + 8001ad0: 08001a91 .word 0x08001a91 + 8001ad4: 08001c21 .word 0x08001c21 + 8001ad8: 08001b45 .word 0x08001b45 + 8001adc: 08001c03 .word 0x08001c03 + 8001ae0: 08001a91 .word 0x08001a91 + 8001ae4: 08001a91 .word 0x08001a91 + 8001ae8: 08001c43 .word 0x08001c43 + 8001aec: 08001a91 .word 0x08001a91 + 8001af0: 08001b45 .word 0x08001b45 + 8001af4: 08001a91 .word 0x08001a91 + 8001af8: 08001a91 .word 0x08001a91 + 8001afc: 08001c0b .word 0x08001c0b + 8001b00: 680b ldr r3, [r1, #0] + 8001b02: 1d1a adds r2, r3, #4 + 8001b04: 681b ldr r3, [r3, #0] + 8001b06: 600a str r2, [r1, #0] + 8001b08: f104 0642 add.w r6, r4, #66 ; 0x42 + 8001b0c: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 8001b10: 2301 movs r3, #1 + 8001b12: e0a3 b.n 8001c5c <_printf_i+0x1f4> + 8001b14: 6825 ldr r5, [r4, #0] + 8001b16: 6808 ldr r0, [r1, #0] + 8001b18: 062e lsls r6, r5, #24 + 8001b1a: f100 0304 add.w r3, r0, #4 + 8001b1e: d50a bpl.n 8001b36 <_printf_i+0xce> + 8001b20: 6805 ldr r5, [r0, #0] + 8001b22: 600b str r3, [r1, #0] + 8001b24: 2d00 cmp r5, #0 + 8001b26: da03 bge.n 8001b30 <_printf_i+0xc8> + 8001b28: 232d movs r3, #45 ; 0x2d + 8001b2a: 426d negs r5, r5 + 8001b2c: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001b30: 485e ldr r0, [pc, #376] ; (8001cac <_printf_i+0x244>) + 8001b32: 230a movs r3, #10 + 8001b34: e019 b.n 8001b6a <_printf_i+0x102> + 8001b36: f015 0f40 tst.w r5, #64 ; 0x40 + 8001b3a: 6805 ldr r5, [r0, #0] + 8001b3c: 600b str r3, [r1, #0] + 8001b3e: bf18 it ne + 8001b40: b22d sxthne r5, r5 + 8001b42: e7ef b.n 8001b24 <_printf_i+0xbc> + 8001b44: 680b ldr r3, [r1, #0] + 8001b46: 6825 ldr r5, [r4, #0] + 8001b48: 1d18 adds r0, r3, #4 + 8001b4a: 6008 str r0, [r1, #0] + 8001b4c: 0628 lsls r0, r5, #24 + 8001b4e: d501 bpl.n 8001b54 <_printf_i+0xec> + 8001b50: 681d ldr r5, [r3, #0] + 8001b52: e002 b.n 8001b5a <_printf_i+0xf2> + 8001b54: 0669 lsls r1, r5, #25 + 8001b56: d5fb bpl.n 8001b50 <_printf_i+0xe8> + 8001b58: 881d ldrh r5, [r3, #0] + 8001b5a: 4854 ldr r0, [pc, #336] ; (8001cac <_printf_i+0x244>) + 8001b5c: 2f6f cmp r7, #111 ; 0x6f + 8001b5e: bf0c ite eq + 8001b60: 2308 moveq r3, #8 + 8001b62: 230a movne r3, #10 + 8001b64: 2100 movs r1, #0 + 8001b66: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 8001b6a: 6866 ldr r6, [r4, #4] + 8001b6c: 60a6 str r6, [r4, #8] + 8001b6e: 2e00 cmp r6, #0 + 8001b70: bfa2 ittt ge + 8001b72: 6821 ldrge r1, [r4, #0] + 8001b74: f021 0104 bicge.w r1, r1, #4 + 8001b78: 6021 strge r1, [r4, #0] + 8001b7a: b90d cbnz r5, 8001b80 <_printf_i+0x118> + 8001b7c: 2e00 cmp r6, #0 + 8001b7e: d04d beq.n 8001c1c <_printf_i+0x1b4> + 8001b80: 4616 mov r6, r2 + 8001b82: fbb5 f1f3 udiv r1, r5, r3 + 8001b86: fb03 5711 mls r7, r3, r1, r5 + 8001b8a: 5dc7 ldrb r7, [r0, r7] + 8001b8c: f806 7d01 strb.w r7, [r6, #-1]! + 8001b90: 462f mov r7, r5 + 8001b92: 42bb cmp r3, r7 + 8001b94: 460d mov r5, r1 + 8001b96: d9f4 bls.n 8001b82 <_printf_i+0x11a> + 8001b98: 2b08 cmp r3, #8 + 8001b9a: d10b bne.n 8001bb4 <_printf_i+0x14c> + 8001b9c: 6823 ldr r3, [r4, #0] + 8001b9e: 07df lsls r7, r3, #31 + 8001ba0: d508 bpl.n 8001bb4 <_printf_i+0x14c> + 8001ba2: 6923 ldr r3, [r4, #16] + 8001ba4: 6861 ldr r1, [r4, #4] + 8001ba6: 4299 cmp r1, r3 + 8001ba8: bfde ittt le + 8001baa: 2330 movle r3, #48 ; 0x30 + 8001bac: f806 3c01 strble.w r3, [r6, #-1] + 8001bb0: f106 36ff addle.w r6, r6, #4294967295 + 8001bb4: 1b92 subs r2, r2, r6 + 8001bb6: 6122 str r2, [r4, #16] + 8001bb8: f8cd a000 str.w sl, [sp] + 8001bbc: 464b mov r3, r9 + 8001bbe: aa03 add r2, sp, #12 + 8001bc0: 4621 mov r1, r4 + 8001bc2: 4640 mov r0, r8 + 8001bc4: f7ff fee2 bl 800198c <_printf_common> + 8001bc8: 3001 adds r0, #1 + 8001bca: d14c bne.n 8001c66 <_printf_i+0x1fe> + 8001bcc: f04f 30ff mov.w r0, #4294967295 + 8001bd0: b004 add sp, #16 + 8001bd2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001bd6: 4835 ldr r0, [pc, #212] ; (8001cac <_printf_i+0x244>) + 8001bd8: f884 7045 strb.w r7, [r4, #69] ; 0x45 + 8001bdc: 6823 ldr r3, [r4, #0] + 8001bde: 680e ldr r6, [r1, #0] + 8001be0: 061f lsls r7, r3, #24 + 8001be2: f856 5b04 ldr.w r5, [r6], #4 + 8001be6: 600e str r6, [r1, #0] + 8001be8: d514 bpl.n 8001c14 <_printf_i+0x1ac> + 8001bea: 07d9 lsls r1, r3, #31 + 8001bec: bf44 itt mi + 8001bee: f043 0320 orrmi.w r3, r3, #32 + 8001bf2: 6023 strmi r3, [r4, #0] + 8001bf4: b91d cbnz r5, 8001bfe <_printf_i+0x196> + 8001bf6: 6823 ldr r3, [r4, #0] + 8001bf8: f023 0320 bic.w r3, r3, #32 + 8001bfc: 6023 str r3, [r4, #0] + 8001bfe: 2310 movs r3, #16 + 8001c00: e7b0 b.n 8001b64 <_printf_i+0xfc> + 8001c02: 6823 ldr r3, [r4, #0] + 8001c04: f043 0320 orr.w r3, r3, #32 + 8001c08: 6023 str r3, [r4, #0] + 8001c0a: 2378 movs r3, #120 ; 0x78 + 8001c0c: 4828 ldr r0, [pc, #160] ; (8001cb0 <_printf_i+0x248>) + 8001c0e: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 8001c12: e7e3 b.n 8001bdc <_printf_i+0x174> + 8001c14: 065e lsls r6, r3, #25 + 8001c16: bf48 it mi + 8001c18: b2ad uxthmi r5, r5 + 8001c1a: e7e6 b.n 8001bea <_printf_i+0x182> + 8001c1c: 4616 mov r6, r2 + 8001c1e: e7bb b.n 8001b98 <_printf_i+0x130> + 8001c20: 680b ldr r3, [r1, #0] + 8001c22: 6826 ldr r6, [r4, #0] + 8001c24: 6960 ldr r0, [r4, #20] + 8001c26: 1d1d adds r5, r3, #4 + 8001c28: 600d str r5, [r1, #0] + 8001c2a: 0635 lsls r5, r6, #24 + 8001c2c: 681b ldr r3, [r3, #0] + 8001c2e: d501 bpl.n 8001c34 <_printf_i+0x1cc> + 8001c30: 6018 str r0, [r3, #0] + 8001c32: e002 b.n 8001c3a <_printf_i+0x1d2> + 8001c34: 0671 lsls r1, r6, #25 + 8001c36: d5fb bpl.n 8001c30 <_printf_i+0x1c8> + 8001c38: 8018 strh r0, [r3, #0] + 8001c3a: 2300 movs r3, #0 + 8001c3c: 6123 str r3, [r4, #16] + 8001c3e: 4616 mov r6, r2 + 8001c40: e7ba b.n 8001bb8 <_printf_i+0x150> + 8001c42: 680b ldr r3, [r1, #0] + 8001c44: 1d1a adds r2, r3, #4 + 8001c46: 600a str r2, [r1, #0] + 8001c48: 681e ldr r6, [r3, #0] + 8001c4a: 6862 ldr r2, [r4, #4] + 8001c4c: 2100 movs r1, #0 + 8001c4e: 4630 mov r0, r6 + 8001c50: f7fe fade bl 8000210 + 8001c54: b108 cbz r0, 8001c5a <_printf_i+0x1f2> + 8001c56: 1b80 subs r0, r0, r6 + 8001c58: 6060 str r0, [r4, #4] + 8001c5a: 6863 ldr r3, [r4, #4] + 8001c5c: 6123 str r3, [r4, #16] + 8001c5e: 2300 movs r3, #0 + 8001c60: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8001c64: e7a8 b.n 8001bb8 <_printf_i+0x150> + 8001c66: 6923 ldr r3, [r4, #16] + 8001c68: 4632 mov r2, r6 + 8001c6a: 4649 mov r1, r9 + 8001c6c: 4640 mov r0, r8 + 8001c6e: 47d0 blx sl + 8001c70: 3001 adds r0, #1 + 8001c72: d0ab beq.n 8001bcc <_printf_i+0x164> + 8001c74: 6823 ldr r3, [r4, #0] + 8001c76: 079b lsls r3, r3, #30 + 8001c78: d413 bmi.n 8001ca2 <_printf_i+0x23a> + 8001c7a: 68e0 ldr r0, [r4, #12] + 8001c7c: 9b03 ldr r3, [sp, #12] + 8001c7e: 4298 cmp r0, r3 + 8001c80: bfb8 it lt + 8001c82: 4618 movlt r0, r3 + 8001c84: e7a4 b.n 8001bd0 <_printf_i+0x168> + 8001c86: 2301 movs r3, #1 + 8001c88: 4632 mov r2, r6 + 8001c8a: 4649 mov r1, r9 + 8001c8c: 4640 mov r0, r8 + 8001c8e: 47d0 blx sl + 8001c90: 3001 adds r0, #1 + 8001c92: d09b beq.n 8001bcc <_printf_i+0x164> + 8001c94: 3501 adds r5, #1 + 8001c96: 68e3 ldr r3, [r4, #12] + 8001c98: 9903 ldr r1, [sp, #12] + 8001c9a: 1a5b subs r3, r3, r1 + 8001c9c: 42ab cmp r3, r5 + 8001c9e: dcf2 bgt.n 8001c86 <_printf_i+0x21e> + 8001ca0: e7eb b.n 8001c7a <_printf_i+0x212> + 8001ca2: 2500 movs r5, #0 + 8001ca4: f104 0619 add.w r6, r4, #25 + 8001ca8: e7f5 b.n 8001c96 <_printf_i+0x22e> + 8001caa: bf00 nop + 8001cac: 08002771 .word 0x08002771 + 8001cb0: 08002782 .word 0x08002782 + +08001cb4 <_scanf_chars>: + 8001cb4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8001cb8: 4615 mov r5, r2 + 8001cba: 688a ldr r2, [r1, #8] + 8001cbc: 4680 mov r8, r0 + 8001cbe: 460c mov r4, r1 + 8001cc0: b932 cbnz r2, 8001cd0 <_scanf_chars+0x1c> + 8001cc2: 698a ldr r2, [r1, #24] + 8001cc4: 2a00 cmp r2, #0 + 8001cc6: bf0c ite eq + 8001cc8: 2201 moveq r2, #1 + 8001cca: f04f 32ff movne.w r2, #4294967295 + 8001cce: 608a str r2, [r1, #8] + 8001cd0: 6822 ldr r2, [r4, #0] + 8001cd2: f8df 908c ldr.w r9, [pc, #140] ; 8001d60 <_scanf_chars+0xac> + 8001cd6: 06d1 lsls r1, r2, #27 + 8001cd8: bf5f itttt pl + 8001cda: 681a ldrpl r2, [r3, #0] + 8001cdc: 1d11 addpl r1, r2, #4 + 8001cde: 6019 strpl r1, [r3, #0] + 8001ce0: 6816 ldrpl r6, [r2, #0] + 8001ce2: 2700 movs r7, #0 + 8001ce4: 69a0 ldr r0, [r4, #24] + 8001ce6: b188 cbz r0, 8001d0c <_scanf_chars+0x58> + 8001ce8: 2801 cmp r0, #1 + 8001cea: d107 bne.n 8001cfc <_scanf_chars+0x48> + 8001cec: 682b ldr r3, [r5, #0] + 8001cee: 781a ldrb r2, [r3, #0] + 8001cf0: 6963 ldr r3, [r4, #20] + 8001cf2: 5c9b ldrb r3, [r3, r2] + 8001cf4: b953 cbnz r3, 8001d0c <_scanf_chars+0x58> + 8001cf6: bb27 cbnz r7, 8001d42 <_scanf_chars+0x8e> + 8001cf8: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8001cfc: 2802 cmp r0, #2 + 8001cfe: d120 bne.n 8001d42 <_scanf_chars+0x8e> + 8001d00: 682b ldr r3, [r5, #0] + 8001d02: 781b ldrb r3, [r3, #0] + 8001d04: f813 3009 ldrb.w r3, [r3, r9] + 8001d08: 071b lsls r3, r3, #28 + 8001d0a: d41a bmi.n 8001d42 <_scanf_chars+0x8e> + 8001d0c: 6823 ldr r3, [r4, #0] + 8001d0e: 06da lsls r2, r3, #27 + 8001d10: bf5e ittt pl + 8001d12: 682b ldrpl r3, [r5, #0] + 8001d14: 781b ldrbpl r3, [r3, #0] + 8001d16: f806 3b01 strbpl.w r3, [r6], #1 + 8001d1a: 682a ldr r2, [r5, #0] + 8001d1c: 686b ldr r3, [r5, #4] + 8001d1e: 3201 adds r2, #1 + 8001d20: 602a str r2, [r5, #0] + 8001d22: 68a2 ldr r2, [r4, #8] + 8001d24: 3b01 subs r3, #1 + 8001d26: 3a01 subs r2, #1 + 8001d28: 606b str r3, [r5, #4] + 8001d2a: 3701 adds r7, #1 + 8001d2c: 60a2 str r2, [r4, #8] + 8001d2e: b142 cbz r2, 8001d42 <_scanf_chars+0x8e> + 8001d30: 2b00 cmp r3, #0 + 8001d32: dcd7 bgt.n 8001ce4 <_scanf_chars+0x30> + 8001d34: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180 + 8001d38: 4629 mov r1, r5 + 8001d3a: 4640 mov r0, r8 + 8001d3c: 4798 blx r3 + 8001d3e: 2800 cmp r0, #0 + 8001d40: d0d0 beq.n 8001ce4 <_scanf_chars+0x30> + 8001d42: 6823 ldr r3, [r4, #0] + 8001d44: f013 0310 ands.w r3, r3, #16 + 8001d48: d105 bne.n 8001d56 <_scanf_chars+0xa2> + 8001d4a: 68e2 ldr r2, [r4, #12] + 8001d4c: 3201 adds r2, #1 + 8001d4e: 60e2 str r2, [r4, #12] + 8001d50: 69a2 ldr r2, [r4, #24] + 8001d52: b102 cbz r2, 8001d56 <_scanf_chars+0xa2> + 8001d54: 7033 strb r3, [r6, #0] + 8001d56: 6923 ldr r3, [r4, #16] + 8001d58: 441f add r7, r3 + 8001d5a: 6127 str r7, [r4, #16] + 8001d5c: 2000 movs r0, #0 + 8001d5e: e7cb b.n 8001cf8 <_scanf_chars+0x44> + 8001d60: 080027af .word 0x080027af + +08001d64 <_scanf_i>: + 8001d64: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8001d68: 4698 mov r8, r3 + 8001d6a: 4b74 ldr r3, [pc, #464] ; (8001f3c <_scanf_i+0x1d8>) + 8001d6c: 460c mov r4, r1 + 8001d6e: 4682 mov sl, r0 + 8001d70: 4616 mov r6, r2 + 8001d72: e893 0007 ldmia.w r3, {r0, r1, r2} + 8001d76: b087 sub sp, #28 + 8001d78: ab03 add r3, sp, #12 + 8001d7a: e883 0007 stmia.w r3, {r0, r1, r2} + 8001d7e: 4b70 ldr r3, [pc, #448] ; (8001f40 <_scanf_i+0x1dc>) + 8001d80: 69a1 ldr r1, [r4, #24] + 8001d82: 4a70 ldr r2, [pc, #448] ; (8001f44 <_scanf_i+0x1e0>) + 8001d84: 2903 cmp r1, #3 + 8001d86: bf18 it ne + 8001d88: 461a movne r2, r3 + 8001d8a: 68a3 ldr r3, [r4, #8] + 8001d8c: 9201 str r2, [sp, #4] + 8001d8e: 1e5a subs r2, r3, #1 + 8001d90: f5b2 7fae cmp.w r2, #348 ; 0x15c + 8001d94: bf88 it hi + 8001d96: f46f 75ae mvnhi.w r5, #348 ; 0x15c + 8001d9a: 4627 mov r7, r4 + 8001d9c: bf82 ittt hi + 8001d9e: eb03 0905 addhi.w r9, r3, r5 + 8001da2: f240 135d movwhi r3, #349 ; 0x15d + 8001da6: 60a3 strhi r3, [r4, #8] + 8001da8: f857 3b1c ldr.w r3, [r7], #28 + 8001dac: f443 6350 orr.w r3, r3, #3328 ; 0xd00 + 8001db0: bf98 it ls + 8001db2: f04f 0900 movls.w r9, #0 + 8001db6: 6023 str r3, [r4, #0] + 8001db8: 463d mov r5, r7 + 8001dba: f04f 0b00 mov.w fp, #0 + 8001dbe: 6831 ldr r1, [r6, #0] + 8001dc0: ab03 add r3, sp, #12 + 8001dc2: 7809 ldrb r1, [r1, #0] + 8001dc4: f853 002b ldr.w r0, [r3, fp, lsl #2] + 8001dc8: 2202 movs r2, #2 + 8001dca: f7fe fa21 bl 8000210 + 8001dce: b328 cbz r0, 8001e1c <_scanf_i+0xb8> + 8001dd0: f1bb 0f01 cmp.w fp, #1 + 8001dd4: d159 bne.n 8001e8a <_scanf_i+0x126> + 8001dd6: 6862 ldr r2, [r4, #4] + 8001dd8: b92a cbnz r2, 8001de6 <_scanf_i+0x82> + 8001dda: 6822 ldr r2, [r4, #0] + 8001ddc: 2308 movs r3, #8 + 8001dde: f442 7200 orr.w r2, r2, #512 ; 0x200 + 8001de2: 6063 str r3, [r4, #4] + 8001de4: 6022 str r2, [r4, #0] + 8001de6: 6822 ldr r2, [r4, #0] + 8001de8: f422 62a0 bic.w r2, r2, #1280 ; 0x500 + 8001dec: 6022 str r2, [r4, #0] + 8001dee: 68a2 ldr r2, [r4, #8] + 8001df0: 1e51 subs r1, r2, #1 + 8001df2: 60a1 str r1, [r4, #8] + 8001df4: b192 cbz r2, 8001e1c <_scanf_i+0xb8> + 8001df6: 6832 ldr r2, [r6, #0] + 8001df8: 1c51 adds r1, r2, #1 + 8001dfa: 6031 str r1, [r6, #0] + 8001dfc: 7812 ldrb r2, [r2, #0] + 8001dfe: f805 2b01 strb.w r2, [r5], #1 + 8001e02: 6872 ldr r2, [r6, #4] + 8001e04: 3a01 subs r2, #1 + 8001e06: 2a00 cmp r2, #0 + 8001e08: 6072 str r2, [r6, #4] + 8001e0a: dc07 bgt.n 8001e1c <_scanf_i+0xb8> + 8001e0c: f8d4 2180 ldr.w r2, [r4, #384] ; 0x180 + 8001e10: 4631 mov r1, r6 + 8001e12: 4650 mov r0, sl + 8001e14: 4790 blx r2 + 8001e16: 2800 cmp r0, #0 + 8001e18: f040 8085 bne.w 8001f26 <_scanf_i+0x1c2> + 8001e1c: f10b 0b01 add.w fp, fp, #1 + 8001e20: f1bb 0f03 cmp.w fp, #3 + 8001e24: d1cb bne.n 8001dbe <_scanf_i+0x5a> + 8001e26: 6863 ldr r3, [r4, #4] + 8001e28: b90b cbnz r3, 8001e2e <_scanf_i+0xca> + 8001e2a: 230a movs r3, #10 + 8001e2c: 6063 str r3, [r4, #4] + 8001e2e: 6863 ldr r3, [r4, #4] + 8001e30: 4945 ldr r1, [pc, #276] ; (8001f48 <_scanf_i+0x1e4>) + 8001e32: 6960 ldr r0, [r4, #20] + 8001e34: 1ac9 subs r1, r1, r3 + 8001e36: f000 f89b bl 8001f70 <__sccl> + 8001e3a: f04f 0b00 mov.w fp, #0 + 8001e3e: 68a3 ldr r3, [r4, #8] + 8001e40: 6822 ldr r2, [r4, #0] + 8001e42: 2b00 cmp r3, #0 + 8001e44: d03d beq.n 8001ec2 <_scanf_i+0x15e> + 8001e46: 6831 ldr r1, [r6, #0] + 8001e48: 6960 ldr r0, [r4, #20] + 8001e4a: f891 c000 ldrb.w ip, [r1] + 8001e4e: f810 000c ldrb.w r0, [r0, ip] + 8001e52: 2800 cmp r0, #0 + 8001e54: d035 beq.n 8001ec2 <_scanf_i+0x15e> + 8001e56: f1bc 0f30 cmp.w ip, #48 ; 0x30 + 8001e5a: d124 bne.n 8001ea6 <_scanf_i+0x142> + 8001e5c: 0510 lsls r0, r2, #20 + 8001e5e: d522 bpl.n 8001ea6 <_scanf_i+0x142> + 8001e60: f10b 0b01 add.w fp, fp, #1 + 8001e64: f1b9 0f00 cmp.w r9, #0 + 8001e68: d003 beq.n 8001e72 <_scanf_i+0x10e> + 8001e6a: 3301 adds r3, #1 + 8001e6c: f109 39ff add.w r9, r9, #4294967295 + 8001e70: 60a3 str r3, [r4, #8] + 8001e72: 6873 ldr r3, [r6, #4] + 8001e74: 3b01 subs r3, #1 + 8001e76: 2b00 cmp r3, #0 + 8001e78: 6073 str r3, [r6, #4] + 8001e7a: dd1b ble.n 8001eb4 <_scanf_i+0x150> + 8001e7c: 6833 ldr r3, [r6, #0] + 8001e7e: 3301 adds r3, #1 + 8001e80: 6033 str r3, [r6, #0] + 8001e82: 68a3 ldr r3, [r4, #8] + 8001e84: 3b01 subs r3, #1 + 8001e86: 60a3 str r3, [r4, #8] + 8001e88: e7d9 b.n 8001e3e <_scanf_i+0xda> + 8001e8a: f1bb 0f02 cmp.w fp, #2 + 8001e8e: d1ae bne.n 8001dee <_scanf_i+0x8a> + 8001e90: 6822 ldr r2, [r4, #0] + 8001e92: f402 61c0 and.w r1, r2, #1536 ; 0x600 + 8001e96: f5b1 7f00 cmp.w r1, #512 ; 0x200 + 8001e9a: d1bf bne.n 8001e1c <_scanf_i+0xb8> + 8001e9c: 2310 movs r3, #16 + 8001e9e: 6063 str r3, [r4, #4] + 8001ea0: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8001ea4: e7a2 b.n 8001dec <_scanf_i+0x88> + 8001ea6: f422 6210 bic.w r2, r2, #2304 ; 0x900 + 8001eaa: 6022 str r2, [r4, #0] + 8001eac: 780b ldrb r3, [r1, #0] + 8001eae: f805 3b01 strb.w r3, [r5], #1 + 8001eb2: e7de b.n 8001e72 <_scanf_i+0x10e> + 8001eb4: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180 + 8001eb8: 4631 mov r1, r6 + 8001eba: 4650 mov r0, sl + 8001ebc: 4798 blx r3 + 8001ebe: 2800 cmp r0, #0 + 8001ec0: d0df beq.n 8001e82 <_scanf_i+0x11e> + 8001ec2: 6823 ldr r3, [r4, #0] + 8001ec4: 05d9 lsls r1, r3, #23 + 8001ec6: d50d bpl.n 8001ee4 <_scanf_i+0x180> + 8001ec8: 42bd cmp r5, r7 + 8001eca: d909 bls.n 8001ee0 <_scanf_i+0x17c> + 8001ecc: f815 1c01 ldrb.w r1, [r5, #-1] + 8001ed0: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8001ed4: 4632 mov r2, r6 + 8001ed6: 4650 mov r0, sl + 8001ed8: 4798 blx r3 + 8001eda: f105 39ff add.w r9, r5, #4294967295 + 8001ede: 464d mov r5, r9 + 8001ee0: 42bd cmp r5, r7 + 8001ee2: d028 beq.n 8001f36 <_scanf_i+0x1d2> + 8001ee4: 6822 ldr r2, [r4, #0] + 8001ee6: f012 0210 ands.w r2, r2, #16 + 8001eea: d113 bne.n 8001f14 <_scanf_i+0x1b0> + 8001eec: 702a strb r2, [r5, #0] + 8001eee: 6863 ldr r3, [r4, #4] + 8001ef0: 9e01 ldr r6, [sp, #4] + 8001ef2: 4639 mov r1, r7 + 8001ef4: 4650 mov r0, sl + 8001ef6: 47b0 blx r6 + 8001ef8: f8d8 3000 ldr.w r3, [r8] + 8001efc: 6821 ldr r1, [r4, #0] + 8001efe: 1d1a adds r2, r3, #4 + 8001f00: f8c8 2000 str.w r2, [r8] + 8001f04: f011 0f20 tst.w r1, #32 + 8001f08: 681b ldr r3, [r3, #0] + 8001f0a: d00f beq.n 8001f2c <_scanf_i+0x1c8> + 8001f0c: 6018 str r0, [r3, #0] + 8001f0e: 68e3 ldr r3, [r4, #12] + 8001f10: 3301 adds r3, #1 + 8001f12: 60e3 str r3, [r4, #12] + 8001f14: 1bed subs r5, r5, r7 + 8001f16: 44ab add fp, r5 + 8001f18: 6925 ldr r5, [r4, #16] + 8001f1a: 445d add r5, fp + 8001f1c: 6125 str r5, [r4, #16] + 8001f1e: 2000 movs r0, #0 + 8001f20: b007 add sp, #28 + 8001f22: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8001f26: f04f 0b00 mov.w fp, #0 + 8001f2a: e7ca b.n 8001ec2 <_scanf_i+0x15e> + 8001f2c: 07ca lsls r2, r1, #31 + 8001f2e: bf4c ite mi + 8001f30: 8018 strhmi r0, [r3, #0] + 8001f32: 6018 strpl r0, [r3, #0] + 8001f34: e7eb b.n 8001f0e <_scanf_i+0x1aa> + 8001f36: 2001 movs r0, #1 + 8001f38: e7f2 b.n 8001f20 <_scanf_i+0x1bc> + 8001f3a: bf00 nop + 8001f3c: 080026f0 .word 0x080026f0 + 8001f40: 080021e9 .word 0x080021e9 + 8001f44: 080020ed .word 0x080020ed + 8001f48: 080027ac .word 0x080027ac + +08001f4c <_read_r>: + 8001f4c: b538 push {r3, r4, r5, lr} + 8001f4e: 4d07 ldr r5, [pc, #28] ; (8001f6c <_read_r+0x20>) + 8001f50: 4604 mov r4, r0 + 8001f52: 4608 mov r0, r1 + 8001f54: 4611 mov r1, r2 + 8001f56: 2200 movs r2, #0 + 8001f58: 602a str r2, [r5, #0] + 8001f5a: 461a mov r2, r3 + 8001f5c: f7fe faf4 bl 8000548 <_read> + 8001f60: 1c43 adds r3, r0, #1 + 8001f62: d102 bne.n 8001f6a <_read_r+0x1e> + 8001f64: 682b ldr r3, [r5, #0] + 8001f66: b103 cbz r3, 8001f6a <_read_r+0x1e> + 8001f68: 6023 str r3, [r4, #0] + 8001f6a: bd38 pop {r3, r4, r5, pc} + 8001f6c: 20000098 .word 0x20000098 + +08001f70 <__sccl>: + 8001f70: b570 push {r4, r5, r6, lr} + 8001f72: 780b ldrb r3, [r1, #0] + 8001f74: 4604 mov r4, r0 + 8001f76: 2b5e cmp r3, #94 ; 0x5e + 8001f78: bf0b itete eq + 8001f7a: 784b ldrbeq r3, [r1, #1] + 8001f7c: 1c48 addne r0, r1, #1 + 8001f7e: 1c88 addeq r0, r1, #2 + 8001f80: 2200 movne r2, #0 + 8001f82: bf08 it eq + 8001f84: 2201 moveq r2, #1 + 8001f86: 1e61 subs r1, r4, #1 + 8001f88: f104 05ff add.w r5, r4, #255 ; 0xff + 8001f8c: f801 2f01 strb.w r2, [r1, #1]! + 8001f90: 42a9 cmp r1, r5 + 8001f92: d1fb bne.n 8001f8c <__sccl+0x1c> + 8001f94: b90b cbnz r3, 8001f9a <__sccl+0x2a> + 8001f96: 3801 subs r0, #1 + 8001f98: bd70 pop {r4, r5, r6, pc} + 8001f9a: f082 0101 eor.w r1, r2, #1 + 8001f9e: 54e1 strb r1, [r4, r3] + 8001fa0: 1c42 adds r2, r0, #1 + 8001fa2: f812 5c01 ldrb.w r5, [r2, #-1] + 8001fa6: 2d2d cmp r5, #45 ; 0x2d + 8001fa8: f102 36ff add.w r6, r2, #4294967295 + 8001fac: 4610 mov r0, r2 + 8001fae: d006 beq.n 8001fbe <__sccl+0x4e> + 8001fb0: 2d5d cmp r5, #93 ; 0x5d + 8001fb2: d0f1 beq.n 8001f98 <__sccl+0x28> + 8001fb4: b90d cbnz r5, 8001fba <__sccl+0x4a> + 8001fb6: 4630 mov r0, r6 + 8001fb8: e7ee b.n 8001f98 <__sccl+0x28> + 8001fba: 462b mov r3, r5 + 8001fbc: e7ef b.n 8001f9e <__sccl+0x2e> + 8001fbe: 7816 ldrb r6, [r2, #0] + 8001fc0: 2e5d cmp r6, #93 ; 0x5d + 8001fc2: d0fa beq.n 8001fba <__sccl+0x4a> + 8001fc4: 42b3 cmp r3, r6 + 8001fc6: dcf8 bgt.n 8001fba <__sccl+0x4a> + 8001fc8: 4618 mov r0, r3 + 8001fca: 3001 adds r0, #1 + 8001fcc: 4286 cmp r6, r0 + 8001fce: 5421 strb r1, [r4, r0] + 8001fd0: dcfb bgt.n 8001fca <__sccl+0x5a> + 8001fd2: 43d8 mvns r0, r3 + 8001fd4: 4430 add r0, r6 + 8001fd6: 1c5d adds r5, r3, #1 + 8001fd8: 42b3 cmp r3, r6 + 8001fda: bfa8 it ge + 8001fdc: 2000 movge r0, #0 + 8001fde: 182b adds r3, r5, r0 + 8001fe0: 3202 adds r2, #2 + 8001fe2: e7de b.n 8001fa2 <__sccl+0x32> + +08001fe4 <_strtol_l.isra.0>: + 8001fe4: 2b01 cmp r3, #1 + 8001fe6: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8001fea: d001 beq.n 8001ff0 <_strtol_l.isra.0+0xc> + 8001fec: 2b24 cmp r3, #36 ; 0x24 + 8001fee: d906 bls.n 8001ffe <_strtol_l.isra.0+0x1a> + 8001ff0: f000 f9f6 bl 80023e0 <__errno> + 8001ff4: 2316 movs r3, #22 + 8001ff6: 6003 str r3, [r0, #0] + 8001ff8: 2000 movs r0, #0 + 8001ffa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8001ffe: 4f3a ldr r7, [pc, #232] ; (80020e8 <_strtol_l.isra.0+0x104>) + 8002000: 468e mov lr, r1 + 8002002: 4676 mov r6, lr + 8002004: f81e 4b01 ldrb.w r4, [lr], #1 + 8002008: 5de5 ldrb r5, [r4, r7] + 800200a: f015 0508 ands.w r5, r5, #8 + 800200e: d1f8 bne.n 8002002 <_strtol_l.isra.0+0x1e> + 8002010: 2c2d cmp r4, #45 ; 0x2d + 8002012: d134 bne.n 800207e <_strtol_l.isra.0+0x9a> + 8002014: f89e 4000 ldrb.w r4, [lr] + 8002018: f04f 0801 mov.w r8, #1 + 800201c: f106 0e02 add.w lr, r6, #2 + 8002020: 2b00 cmp r3, #0 + 8002022: d05c beq.n 80020de <_strtol_l.isra.0+0xfa> + 8002024: 2b10 cmp r3, #16 + 8002026: d10c bne.n 8002042 <_strtol_l.isra.0+0x5e> + 8002028: 2c30 cmp r4, #48 ; 0x30 + 800202a: d10a bne.n 8002042 <_strtol_l.isra.0+0x5e> + 800202c: f89e 4000 ldrb.w r4, [lr] + 8002030: f004 04df and.w r4, r4, #223 ; 0xdf + 8002034: 2c58 cmp r4, #88 ; 0x58 + 8002036: d14d bne.n 80020d4 <_strtol_l.isra.0+0xf0> + 8002038: f89e 4001 ldrb.w r4, [lr, #1] + 800203c: 2310 movs r3, #16 + 800203e: f10e 0e02 add.w lr, lr, #2 + 8002042: f108 4c00 add.w ip, r8, #2147483648 ; 0x80000000 + 8002046: f10c 3cff add.w ip, ip, #4294967295 + 800204a: 2600 movs r6, #0 + 800204c: fbbc f9f3 udiv r9, ip, r3 + 8002050: 4635 mov r5, r6 + 8002052: fb03 ca19 mls sl, r3, r9, ip + 8002056: f1a4 0730 sub.w r7, r4, #48 ; 0x30 + 800205a: 2f09 cmp r7, #9 + 800205c: d818 bhi.n 8002090 <_strtol_l.isra.0+0xac> + 800205e: 463c mov r4, r7 + 8002060: 42a3 cmp r3, r4 + 8002062: dd24 ble.n 80020ae <_strtol_l.isra.0+0xca> + 8002064: 2e00 cmp r6, #0 + 8002066: db1f blt.n 80020a8 <_strtol_l.isra.0+0xc4> + 8002068: 45a9 cmp r9, r5 + 800206a: d31d bcc.n 80020a8 <_strtol_l.isra.0+0xc4> + 800206c: d101 bne.n 8002072 <_strtol_l.isra.0+0x8e> + 800206e: 45a2 cmp sl, r4 + 8002070: db1a blt.n 80020a8 <_strtol_l.isra.0+0xc4> + 8002072: fb05 4503 mla r5, r5, r3, r4 + 8002076: 2601 movs r6, #1 + 8002078: f81e 4b01 ldrb.w r4, [lr], #1 + 800207c: e7eb b.n 8002056 <_strtol_l.isra.0+0x72> + 800207e: 2c2b cmp r4, #43 ; 0x2b + 8002080: bf08 it eq + 8002082: f89e 4000 ldrbeq.w r4, [lr] + 8002086: 46a8 mov r8, r5 + 8002088: bf08 it eq + 800208a: f106 0e02 addeq.w lr, r6, #2 + 800208e: e7c7 b.n 8002020 <_strtol_l.isra.0+0x3c> + 8002090: f1a4 0741 sub.w r7, r4, #65 ; 0x41 + 8002094: 2f19 cmp r7, #25 + 8002096: d801 bhi.n 800209c <_strtol_l.isra.0+0xb8> + 8002098: 3c37 subs r4, #55 ; 0x37 + 800209a: e7e1 b.n 8002060 <_strtol_l.isra.0+0x7c> + 800209c: f1a4 0761 sub.w r7, r4, #97 ; 0x61 + 80020a0: 2f19 cmp r7, #25 + 80020a2: d804 bhi.n 80020ae <_strtol_l.isra.0+0xca> + 80020a4: 3c57 subs r4, #87 ; 0x57 + 80020a6: e7db b.n 8002060 <_strtol_l.isra.0+0x7c> + 80020a8: f04f 36ff mov.w r6, #4294967295 + 80020ac: e7e4 b.n 8002078 <_strtol_l.isra.0+0x94> + 80020ae: 2e00 cmp r6, #0 + 80020b0: da05 bge.n 80020be <_strtol_l.isra.0+0xda> + 80020b2: 2322 movs r3, #34 ; 0x22 + 80020b4: 6003 str r3, [r0, #0] + 80020b6: 4665 mov r5, ip + 80020b8: b942 cbnz r2, 80020cc <_strtol_l.isra.0+0xe8> + 80020ba: 4628 mov r0, r5 + 80020bc: e79d b.n 8001ffa <_strtol_l.isra.0+0x16> + 80020be: f1b8 0f00 cmp.w r8, #0 + 80020c2: d000 beq.n 80020c6 <_strtol_l.isra.0+0xe2> + 80020c4: 426d negs r5, r5 + 80020c6: 2a00 cmp r2, #0 + 80020c8: d0f7 beq.n 80020ba <_strtol_l.isra.0+0xd6> + 80020ca: b10e cbz r6, 80020d0 <_strtol_l.isra.0+0xec> + 80020cc: f10e 31ff add.w r1, lr, #4294967295 + 80020d0: 6011 str r1, [r2, #0] + 80020d2: e7f2 b.n 80020ba <_strtol_l.isra.0+0xd6> + 80020d4: 2430 movs r4, #48 ; 0x30 + 80020d6: 2b00 cmp r3, #0 + 80020d8: d1b3 bne.n 8002042 <_strtol_l.isra.0+0x5e> + 80020da: 2308 movs r3, #8 + 80020dc: e7b1 b.n 8002042 <_strtol_l.isra.0+0x5e> + 80020de: 2c30 cmp r4, #48 ; 0x30 + 80020e0: d0a4 beq.n 800202c <_strtol_l.isra.0+0x48> + 80020e2: 230a movs r3, #10 + 80020e4: e7ad b.n 8002042 <_strtol_l.isra.0+0x5e> + 80020e6: bf00 nop + 80020e8: 080027af .word 0x080027af + +080020ec <_strtol_r>: + 80020ec: f7ff bf7a b.w 8001fe4 <_strtol_l.isra.0> + +080020f0 <_strtoul_l.isra.0>: + 80020f0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} + 80020f4: 4e3b ldr r6, [pc, #236] ; (80021e4 <_strtoul_l.isra.0+0xf4>) + 80020f6: 4686 mov lr, r0 + 80020f8: 468c mov ip, r1 + 80020fa: 4660 mov r0, ip + 80020fc: f81c 4b01 ldrb.w r4, [ip], #1 + 8002100: 5da5 ldrb r5, [r4, r6] + 8002102: f015 0508 ands.w r5, r5, #8 + 8002106: d1f8 bne.n 80020fa <_strtoul_l.isra.0+0xa> + 8002108: 2c2d cmp r4, #45 ; 0x2d + 800210a: d134 bne.n 8002176 <_strtoul_l.isra.0+0x86> + 800210c: f89c 4000 ldrb.w r4, [ip] + 8002110: f04f 0801 mov.w r8, #1 + 8002114: f100 0c02 add.w ip, r0, #2 + 8002118: 2b00 cmp r3, #0 + 800211a: d05e beq.n 80021da <_strtoul_l.isra.0+0xea> + 800211c: 2b10 cmp r3, #16 + 800211e: d10c bne.n 800213a <_strtoul_l.isra.0+0x4a> + 8002120: 2c30 cmp r4, #48 ; 0x30 + 8002122: d10a bne.n 800213a <_strtoul_l.isra.0+0x4a> + 8002124: f89c 0000 ldrb.w r0, [ip] + 8002128: f000 00df and.w r0, r0, #223 ; 0xdf + 800212c: 2858 cmp r0, #88 ; 0x58 + 800212e: d14f bne.n 80021d0 <_strtoul_l.isra.0+0xe0> + 8002130: f89c 4001 ldrb.w r4, [ip, #1] + 8002134: 2310 movs r3, #16 + 8002136: f10c 0c02 add.w ip, ip, #2 + 800213a: f04f 37ff mov.w r7, #4294967295 + 800213e: 2500 movs r5, #0 + 8002140: fbb7 f7f3 udiv r7, r7, r3 + 8002144: fb03 f907 mul.w r9, r3, r7 + 8002148: ea6f 0909 mvn.w r9, r9 + 800214c: 4628 mov r0, r5 + 800214e: f1a4 0630 sub.w r6, r4, #48 ; 0x30 + 8002152: 2e09 cmp r6, #9 + 8002154: d818 bhi.n 8002188 <_strtoul_l.isra.0+0x98> + 8002156: 4634 mov r4, r6 + 8002158: 42a3 cmp r3, r4 + 800215a: dd24 ble.n 80021a6 <_strtoul_l.isra.0+0xb6> + 800215c: 2d00 cmp r5, #0 + 800215e: db1f blt.n 80021a0 <_strtoul_l.isra.0+0xb0> + 8002160: 4287 cmp r7, r0 + 8002162: d31d bcc.n 80021a0 <_strtoul_l.isra.0+0xb0> + 8002164: d101 bne.n 800216a <_strtoul_l.isra.0+0x7a> + 8002166: 45a1 cmp r9, r4 + 8002168: db1a blt.n 80021a0 <_strtoul_l.isra.0+0xb0> + 800216a: fb00 4003 mla r0, r0, r3, r4 + 800216e: 2501 movs r5, #1 + 8002170: f81c 4b01 ldrb.w r4, [ip], #1 + 8002174: e7eb b.n 800214e <_strtoul_l.isra.0+0x5e> + 8002176: 2c2b cmp r4, #43 ; 0x2b + 8002178: bf08 it eq + 800217a: f89c 4000 ldrbeq.w r4, [ip] + 800217e: 46a8 mov r8, r5 + 8002180: bf08 it eq + 8002182: f100 0c02 addeq.w ip, r0, #2 + 8002186: e7c7 b.n 8002118 <_strtoul_l.isra.0+0x28> + 8002188: f1a4 0641 sub.w r6, r4, #65 ; 0x41 + 800218c: 2e19 cmp r6, #25 + 800218e: d801 bhi.n 8002194 <_strtoul_l.isra.0+0xa4> + 8002190: 3c37 subs r4, #55 ; 0x37 + 8002192: e7e1 b.n 8002158 <_strtoul_l.isra.0+0x68> + 8002194: f1a4 0661 sub.w r6, r4, #97 ; 0x61 + 8002198: 2e19 cmp r6, #25 + 800219a: d804 bhi.n 80021a6 <_strtoul_l.isra.0+0xb6> + 800219c: 3c57 subs r4, #87 ; 0x57 + 800219e: e7db b.n 8002158 <_strtoul_l.isra.0+0x68> + 80021a0: f04f 35ff mov.w r5, #4294967295 + 80021a4: e7e4 b.n 8002170 <_strtoul_l.isra.0+0x80> + 80021a6: 2d00 cmp r5, #0 + 80021a8: da07 bge.n 80021ba <_strtoul_l.isra.0+0xca> + 80021aa: 2322 movs r3, #34 ; 0x22 + 80021ac: f8ce 3000 str.w r3, [lr] + 80021b0: f04f 30ff mov.w r0, #4294967295 + 80021b4: b942 cbnz r2, 80021c8 <_strtoul_l.isra.0+0xd8> + 80021b6: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 80021ba: f1b8 0f00 cmp.w r8, #0 + 80021be: d000 beq.n 80021c2 <_strtoul_l.isra.0+0xd2> + 80021c0: 4240 negs r0, r0 + 80021c2: 2a00 cmp r2, #0 + 80021c4: d0f7 beq.n 80021b6 <_strtoul_l.isra.0+0xc6> + 80021c6: b10d cbz r5, 80021cc <_strtoul_l.isra.0+0xdc> + 80021c8: f10c 31ff add.w r1, ip, #4294967295 + 80021cc: 6011 str r1, [r2, #0] + 80021ce: e7f2 b.n 80021b6 <_strtoul_l.isra.0+0xc6> + 80021d0: 2430 movs r4, #48 ; 0x30 + 80021d2: 2b00 cmp r3, #0 + 80021d4: d1b1 bne.n 800213a <_strtoul_l.isra.0+0x4a> + 80021d6: 2308 movs r3, #8 + 80021d8: e7af b.n 800213a <_strtoul_l.isra.0+0x4a> + 80021da: 2c30 cmp r4, #48 ; 0x30 + 80021dc: d0a2 beq.n 8002124 <_strtoul_l.isra.0+0x34> + 80021de: 230a movs r3, #10 + 80021e0: e7ab b.n 800213a <_strtoul_l.isra.0+0x4a> + 80021e2: bf00 nop + 80021e4: 080027af .word 0x080027af + +080021e8 <_strtoul_r>: + 80021e8: f7ff bf82 b.w 80020f0 <_strtoul_l.isra.0> + +080021ec <__submore>: + 80021ec: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80021f0: 460c mov r4, r1 + 80021f2: 6b49 ldr r1, [r1, #52] ; 0x34 + 80021f4: f104 0344 add.w r3, r4, #68 ; 0x44 + 80021f8: 4299 cmp r1, r3 + 80021fa: d11d bne.n 8002238 <__submore+0x4c> + 80021fc: f44f 6180 mov.w r1, #1024 ; 0x400 + 8002200: f7fe fc7a bl 8000af8 <_malloc_r> + 8002204: b918 cbnz r0, 800220e <__submore+0x22> + 8002206: f04f 30ff mov.w r0, #4294967295 + 800220a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 800220e: f44f 6380 mov.w r3, #1024 ; 0x400 + 8002212: 63a3 str r3, [r4, #56] ; 0x38 + 8002214: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 + 8002218: 6360 str r0, [r4, #52] ; 0x34 + 800221a: f880 33ff strb.w r3, [r0, #1023] ; 0x3ff + 800221e: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 + 8002222: f880 33fe strb.w r3, [r0, #1022] ; 0x3fe + 8002226: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 + 800222a: f880 33fd strb.w r3, [r0, #1021] ; 0x3fd + 800222e: f200 30fd addw r0, r0, #1021 ; 0x3fd + 8002232: 6020 str r0, [r4, #0] + 8002234: 2000 movs r0, #0 + 8002236: e7e8 b.n 800220a <__submore+0x1e> + 8002238: 6ba6 ldr r6, [r4, #56] ; 0x38 + 800223a: 0077 lsls r7, r6, #1 + 800223c: 463a mov r2, r7 + 800223e: f000 f8f7 bl 8002430 <_realloc_r> + 8002242: 4605 mov r5, r0 + 8002244: 2800 cmp r0, #0 + 8002246: d0de beq.n 8002206 <__submore+0x1a> + 8002248: eb00 0806 add.w r8, r0, r6 + 800224c: 4601 mov r1, r0 + 800224e: 4632 mov r2, r6 + 8002250: 4640 mov r0, r8 + 8002252: f7fe fc3a bl 8000aca + 8002256: e9c4 570d strd r5, r7, [r4, #52] ; 0x34 + 800225a: f8c4 8000 str.w r8, [r4] + 800225e: e7e9 b.n 8002234 <__submore+0x48> + +08002260 <__swbuf_r>: + 8002260: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002262: 460e mov r6, r1 + 8002264: 4614 mov r4, r2 + 8002266: 4605 mov r5, r0 + 8002268: b118 cbz r0, 8002272 <__swbuf_r+0x12> + 800226a: 6983 ldr r3, [r0, #24] + 800226c: b90b cbnz r3, 8002272 <__swbuf_r+0x12> + 800226e: f7fe fb4b bl 8000908 <__sinit> + 8002272: 4b21 ldr r3, [pc, #132] ; (80022f8 <__swbuf_r+0x98>) + 8002274: 429c cmp r4, r3 + 8002276: d12b bne.n 80022d0 <__swbuf_r+0x70> + 8002278: 686c ldr r4, [r5, #4] + 800227a: 69a3 ldr r3, [r4, #24] + 800227c: 60a3 str r3, [r4, #8] + 800227e: 89a3 ldrh r3, [r4, #12] + 8002280: 071a lsls r2, r3, #28 + 8002282: d52f bpl.n 80022e4 <__swbuf_r+0x84> + 8002284: 6923 ldr r3, [r4, #16] + 8002286: b36b cbz r3, 80022e4 <__swbuf_r+0x84> + 8002288: 6923 ldr r3, [r4, #16] + 800228a: 6820 ldr r0, [r4, #0] + 800228c: 1ac0 subs r0, r0, r3 + 800228e: 6963 ldr r3, [r4, #20] + 8002290: b2f6 uxtb r6, r6 + 8002292: 4283 cmp r3, r0 + 8002294: 4637 mov r7, r6 + 8002296: dc04 bgt.n 80022a2 <__swbuf_r+0x42> + 8002298: 4621 mov r1, r4 + 800229a: 4628 mov r0, r5 + 800229c: f7fe ff22 bl 80010e4 <_fflush_r> + 80022a0: bb30 cbnz r0, 80022f0 <__swbuf_r+0x90> + 80022a2: 68a3 ldr r3, [r4, #8] + 80022a4: 3b01 subs r3, #1 + 80022a6: 60a3 str r3, [r4, #8] + 80022a8: 6823 ldr r3, [r4, #0] + 80022aa: 1c5a adds r2, r3, #1 + 80022ac: 6022 str r2, [r4, #0] + 80022ae: 701e strb r6, [r3, #0] + 80022b0: 6963 ldr r3, [r4, #20] + 80022b2: 3001 adds r0, #1 + 80022b4: 4283 cmp r3, r0 + 80022b6: d004 beq.n 80022c2 <__swbuf_r+0x62> + 80022b8: 89a3 ldrh r3, [r4, #12] + 80022ba: 07db lsls r3, r3, #31 + 80022bc: d506 bpl.n 80022cc <__swbuf_r+0x6c> + 80022be: 2e0a cmp r6, #10 + 80022c0: d104 bne.n 80022cc <__swbuf_r+0x6c> + 80022c2: 4621 mov r1, r4 + 80022c4: 4628 mov r0, r5 + 80022c6: f7fe ff0d bl 80010e4 <_fflush_r> + 80022ca: b988 cbnz r0, 80022f0 <__swbuf_r+0x90> + 80022cc: 4638 mov r0, r7 + 80022ce: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80022d0: 4b0a ldr r3, [pc, #40] ; (80022fc <__swbuf_r+0x9c>) + 80022d2: 429c cmp r4, r3 + 80022d4: d101 bne.n 80022da <__swbuf_r+0x7a> + 80022d6: 68ac ldr r4, [r5, #8] + 80022d8: e7cf b.n 800227a <__swbuf_r+0x1a> + 80022da: 4b09 ldr r3, [pc, #36] ; (8002300 <__swbuf_r+0xa0>) + 80022dc: 429c cmp r4, r3 + 80022de: bf08 it eq + 80022e0: 68ec ldreq r4, [r5, #12] + 80022e2: e7ca b.n 800227a <__swbuf_r+0x1a> + 80022e4: 4621 mov r1, r4 + 80022e6: 4628 mov r0, r5 + 80022e8: f000 f80c bl 8002304 <__swsetup_r> + 80022ec: 2800 cmp r0, #0 + 80022ee: d0cb beq.n 8002288 <__swbuf_r+0x28> + 80022f0: f04f 37ff mov.w r7, #4294967295 + 80022f4: e7ea b.n 80022cc <__swbuf_r+0x6c> + 80022f6: bf00 nop + 80022f8: 0800271c .word 0x0800271c + 80022fc: 0800273c .word 0x0800273c + 8002300: 080026fc .word 0x080026fc + +08002304 <__swsetup_r>: + 8002304: 4b32 ldr r3, [pc, #200] ; (80023d0 <__swsetup_r+0xcc>) + 8002306: b570 push {r4, r5, r6, lr} + 8002308: 681d ldr r5, [r3, #0] + 800230a: 4606 mov r6, r0 + 800230c: 460c mov r4, r1 + 800230e: b125 cbz r5, 800231a <__swsetup_r+0x16> + 8002310: 69ab ldr r3, [r5, #24] + 8002312: b913 cbnz r3, 800231a <__swsetup_r+0x16> + 8002314: 4628 mov r0, r5 + 8002316: f7fe faf7 bl 8000908 <__sinit> + 800231a: 4b2e ldr r3, [pc, #184] ; (80023d4 <__swsetup_r+0xd0>) + 800231c: 429c cmp r4, r3 + 800231e: d10f bne.n 8002340 <__swsetup_r+0x3c> + 8002320: 686c ldr r4, [r5, #4] + 8002322: 89a3 ldrh r3, [r4, #12] + 8002324: f9b4 200c ldrsh.w r2, [r4, #12] + 8002328: 0719 lsls r1, r3, #28 + 800232a: d42c bmi.n 8002386 <__swsetup_r+0x82> + 800232c: 06dd lsls r5, r3, #27 + 800232e: d411 bmi.n 8002354 <__swsetup_r+0x50> + 8002330: 2309 movs r3, #9 + 8002332: 6033 str r3, [r6, #0] + 8002334: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8002338: 81a3 strh r3, [r4, #12] + 800233a: f04f 30ff mov.w r0, #4294967295 + 800233e: e03e b.n 80023be <__swsetup_r+0xba> + 8002340: 4b25 ldr r3, [pc, #148] ; (80023d8 <__swsetup_r+0xd4>) + 8002342: 429c cmp r4, r3 + 8002344: d101 bne.n 800234a <__swsetup_r+0x46> + 8002346: 68ac ldr r4, [r5, #8] + 8002348: e7eb b.n 8002322 <__swsetup_r+0x1e> + 800234a: 4b24 ldr r3, [pc, #144] ; (80023dc <__swsetup_r+0xd8>) + 800234c: 429c cmp r4, r3 + 800234e: bf08 it eq + 8002350: 68ec ldreq r4, [r5, #12] + 8002352: e7e6 b.n 8002322 <__swsetup_r+0x1e> + 8002354: 0758 lsls r0, r3, #29 + 8002356: d512 bpl.n 800237e <__swsetup_r+0x7a> + 8002358: 6b61 ldr r1, [r4, #52] ; 0x34 + 800235a: b141 cbz r1, 800236e <__swsetup_r+0x6a> + 800235c: f104 0344 add.w r3, r4, #68 ; 0x44 + 8002360: 4299 cmp r1, r3 + 8002362: d002 beq.n 800236a <__swsetup_r+0x66> + 8002364: 4630 mov r0, r6 + 8002366: f7fe ff95 bl 8001294 <_free_r> + 800236a: 2300 movs r3, #0 + 800236c: 6363 str r3, [r4, #52] ; 0x34 + 800236e: 89a3 ldrh r3, [r4, #12] + 8002370: f023 0324 bic.w r3, r3, #36 ; 0x24 + 8002374: 81a3 strh r3, [r4, #12] + 8002376: 2300 movs r3, #0 + 8002378: 6063 str r3, [r4, #4] + 800237a: 6923 ldr r3, [r4, #16] + 800237c: 6023 str r3, [r4, #0] + 800237e: 89a3 ldrh r3, [r4, #12] + 8002380: f043 0308 orr.w r3, r3, #8 + 8002384: 81a3 strh r3, [r4, #12] + 8002386: 6923 ldr r3, [r4, #16] + 8002388: b94b cbnz r3, 800239e <__swsetup_r+0x9a> + 800238a: 89a3 ldrh r3, [r4, #12] + 800238c: f403 7320 and.w r3, r3, #640 ; 0x280 + 8002390: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8002394: d003 beq.n 800239e <__swsetup_r+0x9a> + 8002396: 4621 mov r1, r4 + 8002398: 4630 mov r0, r6 + 800239a: f7fe ff27 bl 80011ec <__smakebuf_r> + 800239e: 89a0 ldrh r0, [r4, #12] + 80023a0: f9b4 200c ldrsh.w r2, [r4, #12] + 80023a4: f010 0301 ands.w r3, r0, #1 + 80023a8: d00a beq.n 80023c0 <__swsetup_r+0xbc> + 80023aa: 2300 movs r3, #0 + 80023ac: 60a3 str r3, [r4, #8] + 80023ae: 6963 ldr r3, [r4, #20] + 80023b0: 425b negs r3, r3 + 80023b2: 61a3 str r3, [r4, #24] + 80023b4: 6923 ldr r3, [r4, #16] + 80023b6: b943 cbnz r3, 80023ca <__swsetup_r+0xc6> + 80023b8: f010 0080 ands.w r0, r0, #128 ; 0x80 + 80023bc: d1ba bne.n 8002334 <__swsetup_r+0x30> + 80023be: bd70 pop {r4, r5, r6, pc} + 80023c0: 0781 lsls r1, r0, #30 + 80023c2: bf58 it pl + 80023c4: 6963 ldrpl r3, [r4, #20] + 80023c6: 60a3 str r3, [r4, #8] + 80023c8: e7f4 b.n 80023b4 <__swsetup_r+0xb0> + 80023ca: 2000 movs r0, #0 + 80023cc: e7f7 b.n 80023be <__swsetup_r+0xba> + 80023ce: bf00 nop + 80023d0: 20000000 .word 0x20000000 + 80023d4: 0800271c .word 0x0800271c + 80023d8: 0800273c .word 0x0800273c + 80023dc: 080026fc .word 0x080026fc + +080023e0 <__errno>: + 80023e0: 4b01 ldr r3, [pc, #4] ; (80023e8 <__errno+0x8>) + 80023e2: 6818 ldr r0, [r3, #0] + 80023e4: 4770 bx lr + 80023e6: bf00 nop + 80023e8: 20000000 .word 0x20000000 + +080023ec <_fstat_r>: + 80023ec: b538 push {r3, r4, r5, lr} + 80023ee: 4d07 ldr r5, [pc, #28] ; (800240c <_fstat_r+0x20>) + 80023f0: 2300 movs r3, #0 + 80023f2: 4604 mov r4, r0 + 80023f4: 4608 mov r0, r1 + 80023f6: 4611 mov r1, r2 + 80023f8: 602b str r3, [r5, #0] + 80023fa: f000 f84f bl 800249c <_fstat> + 80023fe: 1c43 adds r3, r0, #1 + 8002400: d102 bne.n 8002408 <_fstat_r+0x1c> + 8002402: 682b ldr r3, [r5, #0] + 8002404: b103 cbz r3, 8002408 <_fstat_r+0x1c> + 8002406: 6023 str r3, [r4, #0] + 8002408: bd38 pop {r3, r4, r5, pc} + 800240a: bf00 nop + 800240c: 20000098 .word 0x20000098 + +08002410 <_isatty_r>: + 8002410: b538 push {r3, r4, r5, lr} + 8002412: 4d06 ldr r5, [pc, #24] ; (800242c <_isatty_r+0x1c>) + 8002414: 2300 movs r3, #0 + 8002416: 4604 mov r4, r0 + 8002418: 4608 mov r0, r1 + 800241a: 602b str r3, [r5, #0] + 800241c: f000 f846 bl 80024ac <_isatty> + 8002420: 1c43 adds r3, r0, #1 + 8002422: d102 bne.n 800242a <_isatty_r+0x1a> + 8002424: 682b ldr r3, [r5, #0] + 8002426: b103 cbz r3, 800242a <_isatty_r+0x1a> + 8002428: 6023 str r3, [r4, #0] + 800242a: bd38 pop {r3, r4, r5, pc} + 800242c: 20000098 .word 0x20000098 + +08002430 <_realloc_r>: + 8002430: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002432: 4607 mov r7, r0 + 8002434: 4614 mov r4, r2 + 8002436: 460e mov r6, r1 + 8002438: b921 cbnz r1, 8002444 <_realloc_r+0x14> + 800243a: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 800243e: 4611 mov r1, r2 + 8002440: f7fe bb5a b.w 8000af8 <_malloc_r> + 8002444: b922 cbnz r2, 8002450 <_realloc_r+0x20> + 8002446: f7fe ff25 bl 8001294 <_free_r> + 800244a: 4625 mov r5, r4 + 800244c: 4628 mov r0, r5 + 800244e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8002450: f000 f814 bl 800247c <_malloc_usable_size_r> + 8002454: 42a0 cmp r0, r4 + 8002456: d20f bcs.n 8002478 <_realloc_r+0x48> + 8002458: 4621 mov r1, r4 + 800245a: 4638 mov r0, r7 + 800245c: f7fe fb4c bl 8000af8 <_malloc_r> + 8002460: 4605 mov r5, r0 + 8002462: 2800 cmp r0, #0 + 8002464: d0f2 beq.n 800244c <_realloc_r+0x1c> + 8002466: 4631 mov r1, r6 + 8002468: 4622 mov r2, r4 + 800246a: f7fe fb2e bl 8000aca + 800246e: 4631 mov r1, r6 + 8002470: 4638 mov r0, r7 + 8002472: f7fe ff0f bl 8001294 <_free_r> + 8002476: e7e9 b.n 800244c <_realloc_r+0x1c> + 8002478: 4635 mov r5, r6 + 800247a: e7e7 b.n 800244c <_realloc_r+0x1c> + +0800247c <_malloc_usable_size_r>: + 800247c: f851 3c04 ldr.w r3, [r1, #-4] + 8002480: 1f18 subs r0, r3, #4 + 8002482: 2b00 cmp r3, #0 + 8002484: bfbc itt lt + 8002486: 580b ldrlt r3, [r1, r0] + 8002488: 18c0 addlt r0, r0, r3 + 800248a: 4770 bx lr + +0800248c <_close>: + 800248c: 4b02 ldr r3, [pc, #8] ; (8002498 <_close+0xc>) + 800248e: 2258 movs r2, #88 ; 0x58 + 8002490: 601a str r2, [r3, #0] + 8002492: f04f 30ff mov.w r0, #4294967295 + 8002496: 4770 bx lr + 8002498: 20000098 .word 0x20000098 + +0800249c <_fstat>: + 800249c: 4b02 ldr r3, [pc, #8] ; (80024a8 <_fstat+0xc>) + 800249e: 2258 movs r2, #88 ; 0x58 + 80024a0: 601a str r2, [r3, #0] + 80024a2: f04f 30ff mov.w r0, #4294967295 + 80024a6: 4770 bx lr + 80024a8: 20000098 .word 0x20000098 + +080024ac <_isatty>: + 80024ac: 4b02 ldr r3, [pc, #8] ; (80024b8 <_isatty+0xc>) + 80024ae: 2258 movs r2, #88 ; 0x58 + 80024b0: 601a str r2, [r3, #0] + 80024b2: 2000 movs r0, #0 + 80024b4: 4770 bx lr + 80024b6: bf00 nop + 80024b8: 20000098 .word 0x20000098 + +080024bc <_lseek>: + 80024bc: 4b02 ldr r3, [pc, #8] ; (80024c8 <_lseek+0xc>) + 80024be: 2258 movs r2, #88 ; 0x58 + 80024c0: 601a str r2, [r3, #0] + 80024c2: f04f 30ff mov.w r0, #4294967295 + 80024c6: 4770 bx lr + 80024c8: 20000098 .word 0x20000098 + +080024cc <_sbrk>: + 80024cc: 4b04 ldr r3, [pc, #16] ; (80024e0 <_sbrk+0x14>) + 80024ce: 6819 ldr r1, [r3, #0] + 80024d0: 4602 mov r2, r0 + 80024d2: b909 cbnz r1, 80024d8 <_sbrk+0xc> + 80024d4: 4903 ldr r1, [pc, #12] ; (80024e4 <_sbrk+0x18>) + 80024d6: 6019 str r1, [r3, #0] + 80024d8: 6818 ldr r0, [r3, #0] + 80024da: 4402 add r2, r0 + 80024dc: 601a str r2, [r3, #0] + 80024de: 4770 bx lr + 80024e0: 20000088 .word 0x20000088 + 80024e4: 200000a0 .word 0x200000a0 + +080024e8 <_init>: + 80024e8: b5f8 push {r3, r4, r5, r6, r7, lr} + 80024ea: bf00 nop + 80024ec: bcf8 pop {r3, r4, r5, r6, r7} + 80024ee: bc08 pop {r3} + 80024f0: 469e mov lr, r3 + 80024f2: 4770 bx lr + +080024f4 <_fini>: + 80024f4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80024f6: bf00 nop + 80024f8: bcf8 pop {r3, r4, r5, r6, r7} + 80024fa: bc08 pop {r3} + 80024fc: 469e mov lr, r3 + 80024fe: 4770 bx lr diff --git a/labW4barnestr/Debug/makefile b/labW4barnestr/Debug/makefile new file mode 100644 index 0000000..3e200ca --- /dev/null +++ b/labW4barnestr/Debug/makefile @@ -0,0 +1,98 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +-include ../makefile.init + +RM := rm -rf + +# All of the sources participating in the build are defined here +-include sources.mk +-include Startup/subdir.mk +-include Src/subdir.mk +-include objects.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(S_DEPS)),) +-include $(S_DEPS) +endif +ifneq ($(strip $(S_UPPER_DEPS)),) +-include $(S_UPPER_DEPS) +endif +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +-include ../makefile.defs + +OPTIONAL_TOOL_DEPS := \ +$(wildcard ../makefile.defs) \ +$(wildcard ../makefile.init) \ +$(wildcard ../makefile.targets) \ + + +BUILD_ARTIFACT_NAME := labW4barnestr +BUILD_ARTIFACT_EXTENSION := elf +BUILD_ARTIFACT_PREFIX := +BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),) + +# Add inputs and outputs from these tool invocations to the build variables +EXECUTABLES += \ +labW4barnestr.elf \ + +SIZE_OUTPUT += \ +default.size.stdout \ + +OBJDUMP_LIST += \ +labW4barnestr.list \ + +OBJCOPY_BIN += \ +labW4barnestr.bin \ + + +# All Target +all: main-build + +# Main-build Target +main-build: labW4barnestr.elf secondary-outputs + +# Tool invocations +labW4barnestr.elf: $(OBJS) $(USER_OBJS) C:\Users\barnestr\Documents\CE2812-Workspace\labW4barnestr\STM32F446RETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "labW4barnestr.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\barnestr\Documents\CE2812-Workspace\labW4barnestr\STM32F446RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="labW4barnestr.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group + @echo 'Finished building target: $@' + @echo ' ' + +default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-size $(EXECUTABLES) + @echo 'Finished building: $@' + @echo ' ' + +labW4barnestr.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objdump -h -S $(EXECUTABLES) > "labW4barnestr.list" + @echo 'Finished building: $@' + @echo ' ' + +labW4barnestr.bin: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objcopy -O binary $(EXECUTABLES) "labW4barnestr.bin" + @echo 'Finished building: $@' + @echo ' ' + +# Other Targets +clean: + -$(RM) default.size.stdout labW4barnestr.bin labW4barnestr.elf labW4barnestr.list + -@echo ' ' + +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN) + +fail-specified-linker-script-missing: + @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' + @exit 2 + +warn-no-linker-script-specified: + @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' + +.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified + +-include ../makefile.targets diff --git a/labW4barnestr/Debug/objects.list b/labW4barnestr/Debug/objects.list new file mode 100644 index 0000000..2126507 --- /dev/null +++ b/labW4barnestr/Debug/objects.list @@ -0,0 +1,5 @@ +"./Src/delay.o" +"./Src/led.o" +"./Src/main.o" +"./Src/uart_driver.o" +"./Startup/startup_stm32f446retx.o" diff --git a/labW4barnestr/Debug/objects.mk b/labW4barnestr/Debug/objects.mk new file mode 100644 index 0000000..e12976d --- /dev/null +++ b/labW4barnestr/Debug/objects.mk @@ -0,0 +1,9 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +USER_OBJS := + +LIBS := + diff --git a/labW4barnestr/Debug/sources.mk b/labW4barnestr/Debug/sources.mk new file mode 100644 index 0000000..0dff210 --- /dev/null +++ b/labW4barnestr/Debug/sources.mk @@ -0,0 +1,25 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +ELF_SRCS := +OBJ_SRCS := +S_SRCS := +C_SRCS := +S_UPPER_SRCS := +O_SRCS := +SIZE_OUTPUT := +OBJDUMP_LIST := +EXECUTABLES := +OBJS := +S_DEPS := +S_UPPER_DEPS := +C_DEPS := +OBJCOPY_BIN := + +# Every subdirectory with source files must be described here +SUBDIRS := \ +Src \ +Startup \ + diff --git a/labW4barnestr/Inc/delay.h b/labW4barnestr/Inc/delay.h new file mode 100644 index 0000000..fc2a61b --- /dev/null +++ b/labW4barnestr/Inc/delay.h @@ -0,0 +1,37 @@ +/* + * delay.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +//include guards +#ifndef DELAY_H_ +#define DELAY_H_ + +#include + +#define STK_CTRL (volatile uint32_t*) 0xE000E010 +#define STK_LOAD (volatile uint32_t*) 0xE000E014 +#define STK_VAL (volatile uint32_t*) 0xE000E018 + +#define EN 1 +#define TICKINT (1<<1) +#define CLKSOURCE (1<<2) +#define COUNTFLAG (1<<16) + +/* + * delay_1ms + * Busy wait for n ms + * + * For n iterations + * load number of cycles for 1 ms + * set one to enable and clock source + * + * wait for countflag to be set + */ +void delay_1ms(uint32_t n); + + + +#endif /* DELAY_H_ */ diff --git a/labW4barnestr/Inc/led.h b/labW4barnestr/Inc/led.h new file mode 100644 index 0000000..e927468 --- /dev/null +++ b/labW4barnestr/Inc/led.h @@ -0,0 +1,101 @@ +/* + * led.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#ifndef LED_H_ +#define LED_H_ + +#include + +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 +#define GPIOBEN 1 +#define GPIOB_MODER (volatile uint32_t*) 0x40020400 +#define GPIOB_PUPDR (volatile uint32_t*) 0x4002040C +#define GPIOB_IDR (volatile uint32_t*) 0x40020410 +#define GPIOB_ODR (volatile uint32_t*) 0x40020414 +#define GPIOB_BSRR (volatile uint32_t*) 0x40020418 + +#define ALL_LEDS (0b11110111111<<5) + +/* + * led_init() + * This function should: + * 1. Enable the GPIOB in RCC_AHB1ENR + * 2. Turn on to set LED0 - LED9 to output mode ("01") + */ +void led_init(); + +/* + * led_allOn() + * 1. Turn on all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOn(); + +/* + * led_allOff() + * 1. Turn off all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOff(); + +/* + * led_on() + * Args: 0-9 to turn on specific led + * print error message is arg is out of range + */ +void led_on(uint8_t ledIndex); + +/* + * led_off() + * Args: 0-9 to turn off specific led + * print error message is arg is out of range + */ +void led_off(uint8_t ledIndex); + + +/* + * led_scan() + * Scan the light across and back at the current speed + */ +void led_scan(); + +/* + * led_flash() + * flash all of the lights 10 times at the current speed + */ +void led_flash(); + +/* + * led_setSpeed (uint8_t speed) + * arg: speed (0 slow - 9 fast) + * Args out of range should print error to console + */ +void led_setSpeed(uint8_t speed); + +/* + * led_incSpeed() + * increases the speed by one + * if maxed out leaves the speed at the max value + */ +void led_incSpeed(); + +/* + * led_decSpeed() + * decreases the speed by one + * if at zero should stay at zero + */ +void led_decSpeed(); + +/* + * getCurrentSpeed + * returns the current speed + */ +uint8_t getCurrentSpeed(); + + + +#endif diff --git a/labW4barnestr/Inc/uart_driver.h b/labW4barnestr/Inc/uart_driver.h new file mode 100644 index 0000000..a1d6427 --- /dev/null +++ b/labW4barnestr/Inc/uart_driver.h @@ -0,0 +1,49 @@ +/* + * uart_driver.h + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ + +#ifndef UART_DRIVER_H_ +#define UART_DRIVER_H_ + +#include + +// RCC registers +#define RCC_APB1ENR (volatile uint32_t*) 0x40023840 +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 + +#define GPIOAEN 0 // GPIOA Enable is bit 0 in RCC_APB1LPENR +#define USART2EN 17 // USART2 enable is bit 17 in RCC_AHB1LPENR + +// GPIOA registers +#define GPIOA_MODER (volatile uint32_t*) 0x40020000 +#define GPIOA_AFRL (volatile uint32_t*) 0x40020020 +#define USART_SR (volatile uint32_t*) 0x40004400 +#define USART_DR (volatile uint32_t*) 0x40004404 +#define USART_BRR (volatile uint32_t*) 0x40004408 +#define USART_CR1 (volatile uint32_t*) 0x4000440c +#define USART_CR2 (volatile uint32_t*) 0x40004410 +#define USART_CR3 (volatile uint32_t*) 0x40004414 + +// CR1 bits +#define UE 13 //UART enable +#define TE 3 // Transmitter enable +#define RE 2 // Receiver enable + +// Status register bits +#define TXE 7 // Transmit register empty +#define RXNE 5 // Receive register is not empty..char received + +// Function prototypes +extern void init_usart2(uint32_t baud, uint32_t sysclk); +extern char usart2_getch(); +extern void usart2_putch(char c); + +// syscalls overrides +int _read(int file, char *ptr, int len); +int _write(int file, char *ptr, int len); + + +#endif /* UART_DRIVER_H_ */ diff --git a/labW4barnestr/STM32F446RETX_FLASH.ld b/labW4barnestr/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..077ff41 --- /dev/null +++ b/labW4barnestr/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2021 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW4barnestr/STM32F446RETX_RAM.ld b/labW4barnestr/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..3e4ffc2 --- /dev/null +++ b/labW4barnestr/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2021 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW4barnestr/Src/delay.c b/labW4barnestr/Src/delay.c new file mode 100644 index 0000000..e0e9355 --- /dev/null +++ b/labW4barnestr/Src/delay.c @@ -0,0 +1,28 @@ +/* + * delay.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include +#include "delay.h" //include declaration header file + +void delay_1ms(uint32_t n){ + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + // Clear value register + *STK_VAL = 0x0000; + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + *STK_CTRL |= EN; + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + } while (flag != 1); + } +} diff --git a/labW4barnestr/Src/led.c b/labW4barnestr/Src/led.c new file mode 100644 index 0000000..69add9b --- /dev/null +++ b/labW4barnestr/Src/led.c @@ -0,0 +1,147 @@ +/* + * led.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include "led.h" +#include "delay.h" +#include +#include + +int ledSpeed = 5; + +void led_init(){ + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<= 6) { + // Add pin offset to index + *GPIOB_BSRR = (1<<(22+ledIndex)); + } else { + printf("LED index out of range\n\r"); + } +} + +void led_scan(){ + led_allOff(); + // Right to left each LED + for (int i = 0; i <= 9 ; i++) { + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + if(i != 0){ + led_off(i-1); + } + led_on(i); + } + // Left to right each LED + for (int i = 9; i >= 0; i--) { + if(i != 9){ + led_off(i+1); + } + led_on(i); + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + } + led_off(0); +} + +void led_flash(){ + // Flash LED on and off 10 times at a speed between 0-1 seconds + for (int i = 0; i < 10; i++) { + led_allOn(); + delay_1ms(100+(ledSpeed*100)); + led_allOff(); + delay_1ms(100+(ledSpeed*100)); + } +} + +void led_setSpeed(uint8_t speed){ + ledSpeed = speed; +} + +void led_incSpeed(){ + if (ledSpeed == 0){ + printf("Speed too fast\n\r"); + } else { + ledSpeed--; + } +} + +void led_decSpeed(){ + if (ledSpeed == 9){ + printf("Speed too slow\n\r"); + } else { + ledSpeed++; + } +} + +uint8_t getCurrentSpeed() +{ + return ledSpeed; +} + + diff --git a/labW4barnestr/Src/main.c b/labW4barnestr/Src/main.c new file mode 100644 index 0000000..eeeeebf --- /dev/null +++ b/labW4barnestr/Src/main.c @@ -0,0 +1,122 @@ +/* + * main.c + * CE2812 + * Created on: January 7, 2022 + * Author: Trevor Barnes + * Description: This program allows a user to interact with different memory operations through + * a terminal connected to the serial port. Different operations include: reading memory at a + * given address, writing an in value to a given address, and providing a memory dump of a certain + * byte length at a given memory address. + */ + +#include +#include +#include +#include "uart_driver.h" +#include "led.h" +#include "delay.h" + +#define F_CPU 16000000UL + +/** + * Reads and prints the memory value at address provided: "addr" + */ +void readMem(uint32_t addr) { + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + // Formatted print with both hex and decimal values + printf("Memory Value at %#08x\n\r" + "Hex: %#08x\n\r" + "Decimal: %d\n\r", addr, *memPtr, *memPtr); + return; +} +/** + * Writes the provided "data" value as an unsigned 32-bit word at the provided address: "addr" + */ +void writeMem(uint32_t addr, uint32_t data) { + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + // Write data + *memPtr = data; + // Confirmation printout showing the new value and address + printf("Value written at %#08x: %u \n\r", addr, data); + return; +} + +/** + * Prints out formatted, hexadecimal memory values in "byte-sized" chunks starting at the provided + * memory address: "addr". The length of the memory dump is provided by "length". + */ +void dumpMem(uint32_t addr, int length) { + // Set length to default value if length is negative + // (No limit or protection for large, overflow values yet) + if(length <= 0) { + length = 16; + printf("Length set to default! (16)\n\r"); + } + // Assign and casts a new int pointer the value of addr + uint8_t * memPtr = (uint8_t *)addr; + // Loop that executes each read and print operation + for(int i=0 ; i < length ; i++) { + // Print newline and memory location every 16 bytes + if((i % 16) == 0) { + printf("\n\r%p:", memPtr); + } + // Print each byte + printf(" %02X", *memPtr); + // Iterate pointer to next byte + memPtr++; + } + printf("\n\r"); + return; +} + +/** + * Prints a help dialog that provides the user the list of available commands + */ +void printHelp() { + printf("*Commands*\n\r"); + printf("'rmw {hex address}' - Reads mem at a given address\n\r"); + printf("'wmw {hex address} {value}' - Writes the given value as a word to the given address\n\r"); + printf("'dm {hex address} {length}' - Dumps the memory at a given address. Defaults to 16 B if no " + "length is given\n\r"); +} + +/** + * Main function that handles usart/led initialization and command input/parsing from the user + */ +int main(void) { + init_usart2(57600,F_CPU); + led_init(); + char line[50]; + char command[10]; + uint32_t address; + uint32_t data; + int length; + for(;;) { + // Get command from user + fgets(line, 100, stdin); + // Parse only the command for strcmp + sscanf(line, "%s", command); + if (!strcmp(command, "help")) { + printHelp(); + } else if (!strcmp(command,"rmw")) { + // Parse line again with expected format and values + sscanf(line, "%s %X", command, &address); + //printf("Command: %s Address: %x\n\r", command, address); + readMem(address); + } else if (!strcmp(command, "wmw")) { + // Parse line again with expected format and values + sscanf(line, "%s %X %u", command, &address, &data); + //printf("Command: %s Address: %x Data: %u\n\r", command, address, data); + writeMem(address, data); + } else if (!strcmp(command, "dm")) { + // Parse line again with expected format and values + sscanf(line, "%s %X %u", command, &address, &length); + //printf("Command: %s Address: %x Length: %d\n\r", command, address, length); + dumpMem(address, length); + } else { + printf("Invalid input, type 'help' for instructions\n\r"); + } + } +} diff --git a/labW4barnestr/Src/uart_driver.c b/labW4barnestr/Src/uart_driver.c new file mode 100644 index 0000000..c2707c6 --- /dev/null +++ b/labW4barnestr/Src/uart_driver.c @@ -0,0 +1,92 @@ +/* + * uart_driver.c + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ +#include "uart_driver.h" +#include +#include + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + //*ptr++ = __io_getchar(); + byteCnt++; + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + if(*ptr == '\n') break; + ptr++; + } + + //return len; + return byteCnt; // Return byte count +} + +int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + usart2_putch(*ptr++); + } + return len; +} + + + +char usart2_getch(){ + char c; + while((*(USART_SR)&(1< + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW5barnestr/.cproject b/labW5barnestr/.cproject new file mode 100644 index 0000000..c8612fd --- /dev/null +++ b/labW5barnestr/.cproject @@ -0,0 +1,172 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW5barnestr/.project b/labW5barnestr/.project new file mode 100644 index 0000000..1b34053 --- /dev/null +++ b/labW5barnestr/.project @@ -0,0 +1,32 @@ + + + labW5barnestr + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/labW5barnestr/.settings/language.settings.xml b/labW5barnestr/.settings/language.settings.xml new file mode 100644 index 0000000..9842f6f --- /dev/null +++ b/labW5barnestr/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/labW5barnestr/Debug/Src/subdir.mk b/labW5barnestr/Debug/Src/subdir.mk new file mode 100644 index 0000000..f59d668 --- /dev/null +++ b/labW5barnestr/Debug/Src/subdir.mk @@ -0,0 +1,42 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Src/delay.c \ +../Src/led.c \ +../Src/main.c \ +../Src/memory.c \ +../Src/piezoSpeaker.c \ +../Src/uart_driver.c + +OBJS += \ +./Src/delay.o \ +./Src/led.o \ +./Src/main.o \ +./Src/memory.o \ +./Src/piezoSpeaker.o \ +./Src/uart_driver.o + +C_DEPS += \ +./Src/delay.d \ +./Src/led.d \ +./Src/main.d \ +./Src/memory.d \ +./Src/piezoSpeaker.d \ +./Src/uart_driver.d + + +# Each subdirectory must supply rules for building sources it contributes +Src/%.o: ../Src/%.c Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DSTM32 -DSTM32F4 -DSTM32F446RETx -DDEBUG -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Src + +clean-Src: + -$(RM) ./Src/delay.d ./Src/delay.o ./Src/led.d ./Src/led.o ./Src/main.d ./Src/main.o ./Src/memory.d ./Src/memory.o ./Src/piezoSpeaker.d ./Src/piezoSpeaker.o ./Src/uart_driver.d ./Src/uart_driver.o + +.PHONY: clean-Src + diff --git a/labW5barnestr/Debug/Startup/subdir.mk b/labW5barnestr/Debug/Startup/subdir.mk new file mode 100644 index 0000000..ed2bf5d --- /dev/null +++ b/labW5barnestr/Debug/Startup/subdir.mk @@ -0,0 +1,27 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +S_SRCS += \ +../Startup/startup_stm32f446retx.s + +OBJS += \ +./Startup/startup_stm32f446retx.o + +S_DEPS += \ +./Startup/startup_stm32f446retx.d + + +# Each subdirectory must supply rules for building sources it contributes +Startup/%.o: ../Startup/%.s Startup/subdir.mk + arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + +clean: clean-Startup + +clean-Startup: + -$(RM) ./Startup/startup_stm32f446retx.d ./Startup/startup_stm32f446retx.o + +.PHONY: clean-Startup + diff --git a/labW5barnestr/Debug/labW5barnestr.bin b/labW5barnestr/Debug/labW5barnestr.bin new file mode 100644 index 0000000..4c86c7b Binary files /dev/null and b/labW5barnestr/Debug/labW5barnestr.bin differ diff --git a/labW5barnestr/Debug/labW5barnestr.list b/labW5barnestr/Debug/labW5barnestr.list new file mode 100644 index 0000000..def13a4 --- /dev/null +++ b/labW5barnestr/Debug/labW5barnestr.list @@ -0,0 +1,6367 @@ + +labW5barnestr.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001c4 08000000 08000000 00010000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00003bec 080001d0 080001d0 000101d0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 0000051c 08003dbc 08003dbc 00013dbc 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 080042d8 080042d8 00020cf4 2**0 + CONTENTS + 4 .ARM 00000000 080042d8 080042d8 00020cf4 2**0 + CONTENTS + 5 .preinit_array 00000000 080042d8 080042d8 00020cf4 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 080042d8 080042d8 000142d8 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .fini_array 00000004 080042dc 080042dc 000142dc 2**2 + CONTENTS, ALLOC, LOAD, DATA + 8 .data 00000cf4 20000000 080042e0 00020000 2**3 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 00000040 20000cf4 08004fd4 00020cf4 2**2 + ALLOC + 10 ._user_heap_stack 00000604 20000d34 08004fd4 00020d34 2**0 + ALLOC + 11 .ARM.attributes 00000030 00000000 00000000 00020cf4 2**0 + CONTENTS, READONLY + 12 .debug_info 00004349 00000000 00000000 00020d24 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 00000aec 00000000 00000000 0002506d 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 00000190 00000000 00000000 00025b60 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_ranges 00000128 00000000 00000000 00025cf0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 0000349b 00000000 00000000 00025e18 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 00002748 00000000 00000000 000292b3 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 0000a934 00000000 00000000 0002b9fb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000053 00000000 00000000 0003632f 2**0 + CONTENTS, READONLY + 20 .debug_frame 00001154 00000000 00000000 00036384 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + 21 .stab 0000006c 00000000 00000000 000374d8 2**2 + CONTENTS, READONLY, DEBUGGING + 22 .stabstr 000000e3 00000000 00000000 00037544 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +080001d0 <__do_global_dtors_aux>: + 80001d0: b510 push {r4, lr} + 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) + 80001d4: 7823 ldrb r3, [r4, #0] + 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> + 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) + 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> + 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) + 80001de: f3af 8000 nop.w + 80001e2: 2301 movs r3, #1 + 80001e4: 7023 strb r3, [r4, #0] + 80001e6: bd10 pop {r4, pc} + 80001e8: 20000cf4 .word 0x20000cf4 + 80001ec: 00000000 .word 0x00000000 + 80001f0: 08003da4 .word 0x08003da4 + +080001f4 : + 80001f4: b508 push {r3, lr} + 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) + 80001f8: b11b cbz r3, 8000202 + 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) + 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) + 80001fe: f3af 8000 nop.w + 8000202: bd08 pop {r3, pc} + 8000204: 00000000 .word 0x00000000 + 8000208: 20000cf8 .word 0x20000cf8 + 800020c: 08003da4 .word 0x08003da4 + +08000210 : + 8000210: f001 01ff and.w r1, r1, #255 ; 0xff + 8000214: 2a10 cmp r2, #16 + 8000216: db2b blt.n 8000270 + 8000218: f010 0f07 tst.w r0, #7 + 800021c: d008 beq.n 8000230 + 800021e: f810 3b01 ldrb.w r3, [r0], #1 + 8000222: 3a01 subs r2, #1 + 8000224: 428b cmp r3, r1 + 8000226: d02d beq.n 8000284 + 8000228: f010 0f07 tst.w r0, #7 + 800022c: b342 cbz r2, 8000280 + 800022e: d1f6 bne.n 800021e + 8000230: b4f0 push {r4, r5, r6, r7} + 8000232: ea41 2101 orr.w r1, r1, r1, lsl #8 + 8000236: ea41 4101 orr.w r1, r1, r1, lsl #16 + 800023a: f022 0407 bic.w r4, r2, #7 + 800023e: f07f 0700 mvns.w r7, #0 + 8000242: 2300 movs r3, #0 + 8000244: e8f0 5602 ldrd r5, r6, [r0], #8 + 8000248: 3c08 subs r4, #8 + 800024a: ea85 0501 eor.w r5, r5, r1 + 800024e: ea86 0601 eor.w r6, r6, r1 + 8000252: fa85 f547 uadd8 r5, r5, r7 + 8000256: faa3 f587 sel r5, r3, r7 + 800025a: fa86 f647 uadd8 r6, r6, r7 + 800025e: faa5 f687 sel r6, r5, r7 + 8000262: b98e cbnz r6, 8000288 + 8000264: d1ee bne.n 8000244 + 8000266: bcf0 pop {r4, r5, r6, r7} + 8000268: f001 01ff and.w r1, r1, #255 ; 0xff + 800026c: f002 0207 and.w r2, r2, #7 + 8000270: b132 cbz r2, 8000280 + 8000272: f810 3b01 ldrb.w r3, [r0], #1 + 8000276: 3a01 subs r2, #1 + 8000278: ea83 0301 eor.w r3, r3, r1 + 800027c: b113 cbz r3, 8000284 + 800027e: d1f8 bne.n 8000272 + 8000280: 2000 movs r0, #0 + 8000282: 4770 bx lr + 8000284: 3801 subs r0, #1 + 8000286: 4770 bx lr + 8000288: 2d00 cmp r5, #0 + 800028a: bf06 itte eq + 800028c: 4635 moveq r5, r6 + 800028e: 3803 subeq r0, #3 + 8000290: 3807 subne r0, #7 + 8000292: f015 0f01 tst.w r5, #1 + 8000296: d107 bne.n 80002a8 + 8000298: 3001 adds r0, #1 + 800029a: f415 7f80 tst.w r5, #256 ; 0x100 + 800029e: bf02 ittt eq + 80002a0: 3001 addeq r0, #1 + 80002a2: f415 3fc0 tsteq.w r5, #98304 ; 0x18000 + 80002a6: 3001 addeq r0, #1 + 80002a8: bcf0 pop {r4, r5, r6, r7} + 80002aa: 3801 subs r0, #1 + 80002ac: 4770 bx lr + 80002ae: bf00 nop + +080002b0 : + 80002b0: f810 2b01 ldrb.w r2, [r0], #1 + 80002b4: f811 3b01 ldrb.w r3, [r1], #1 + 80002b8: 2a01 cmp r2, #1 + 80002ba: bf28 it cs + 80002bc: 429a cmpcs r2, r3 + 80002be: d0f7 beq.n 80002b0 + 80002c0: 1ad0 subs r0, r2, r3 + 80002c2: 4770 bx lr + +080002c4 : + 80002c4: 4603 mov r3, r0 + 80002c6: f813 2b01 ldrb.w r2, [r3], #1 + 80002ca: 2a00 cmp r2, #0 + 80002cc: d1fb bne.n 80002c6 + 80002ce: 1a18 subs r0, r3, r0 + 80002d0: 3801 subs r0, #1 + 80002d2: 4770 bx lr + +080002d4 <__aeabi_dmul>: + 80002d4: b570 push {r4, r5, r6, lr} + 80002d6: f04f 0cff mov.w ip, #255 ; 0xff + 80002da: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 + 80002de: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 80002e2: bf1d ittte ne + 80002e4: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 80002e8: ea94 0f0c teqne r4, ip + 80002ec: ea95 0f0c teqne r5, ip + 80002f0: f000 f8de bleq 80004b0 <__aeabi_dmul+0x1dc> + 80002f4: 442c add r4, r5 + 80002f6: ea81 0603 eor.w r6, r1, r3 + 80002fa: ea21 514c bic.w r1, r1, ip, lsl #21 + 80002fe: ea23 534c bic.w r3, r3, ip, lsl #21 + 8000302: ea50 3501 orrs.w r5, r0, r1, lsl #12 + 8000306: bf18 it ne + 8000308: ea52 3503 orrsne.w r5, r2, r3, lsl #12 + 800030c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 8000310: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8000314: d038 beq.n 8000388 <__aeabi_dmul+0xb4> + 8000316: fba0 ce02 umull ip, lr, r0, r2 + 800031a: f04f 0500 mov.w r5, #0 + 800031e: fbe1 e502 umlal lr, r5, r1, r2 + 8000322: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 + 8000326: fbe0 e503 umlal lr, r5, r0, r3 + 800032a: f04f 0600 mov.w r6, #0 + 800032e: fbe1 5603 umlal r5, r6, r1, r3 + 8000332: f09c 0f00 teq ip, #0 + 8000336: bf18 it ne + 8000338: f04e 0e01 orrne.w lr, lr, #1 + 800033c: f1a4 04ff sub.w r4, r4, #255 ; 0xff + 8000340: f5b6 7f00 cmp.w r6, #512 ; 0x200 + 8000344: f564 7440 sbc.w r4, r4, #768 ; 0x300 + 8000348: d204 bcs.n 8000354 <__aeabi_dmul+0x80> + 800034a: ea5f 0e4e movs.w lr, lr, lsl #1 + 800034e: 416d adcs r5, r5 + 8000350: eb46 0606 adc.w r6, r6, r6 + 8000354: ea42 21c6 orr.w r1, r2, r6, lsl #11 + 8000358: ea41 5155 orr.w r1, r1, r5, lsr #21 + 800035c: ea4f 20c5 mov.w r0, r5, lsl #11 + 8000360: ea40 505e orr.w r0, r0, lr, lsr #21 + 8000364: ea4f 2ece mov.w lr, lr, lsl #11 + 8000368: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd + 800036c: bf88 it hi + 800036e: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 + 8000372: d81e bhi.n 80003b2 <__aeabi_dmul+0xde> + 8000374: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 + 8000378: bf08 it eq + 800037a: ea5f 0e50 movseq.w lr, r0, lsr #1 + 800037e: f150 0000 adcs.w r0, r0, #0 + 8000382: eb41 5104 adc.w r1, r1, r4, lsl #20 + 8000386: bd70 pop {r4, r5, r6, pc} + 8000388: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 + 800038c: ea46 0101 orr.w r1, r6, r1 + 8000390: ea40 0002 orr.w r0, r0, r2 + 8000394: ea81 0103 eor.w r1, r1, r3 + 8000398: ebb4 045c subs.w r4, r4, ip, lsr #1 + 800039c: bfc2 ittt gt + 800039e: ebd4 050c rsbsgt r5, r4, ip + 80003a2: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 80003a6: bd70 popgt {r4, r5, r6, pc} + 80003a8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 80003ac: f04f 0e00 mov.w lr, #0 + 80003b0: 3c01 subs r4, #1 + 80003b2: f300 80ab bgt.w 800050c <__aeabi_dmul+0x238> + 80003b6: f114 0f36 cmn.w r4, #54 ; 0x36 + 80003ba: bfde ittt le + 80003bc: 2000 movle r0, #0 + 80003be: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 + 80003c2: bd70 pople {r4, r5, r6, pc} + 80003c4: f1c4 0400 rsb r4, r4, #0 + 80003c8: 3c20 subs r4, #32 + 80003ca: da35 bge.n 8000438 <__aeabi_dmul+0x164> + 80003cc: 340c adds r4, #12 + 80003ce: dc1b bgt.n 8000408 <__aeabi_dmul+0x134> + 80003d0: f104 0414 add.w r4, r4, #20 + 80003d4: f1c4 0520 rsb r5, r4, #32 + 80003d8: fa00 f305 lsl.w r3, r0, r5 + 80003dc: fa20 f004 lsr.w r0, r0, r4 + 80003e0: fa01 f205 lsl.w r2, r1, r5 + 80003e4: ea40 0002 orr.w r0, r0, r2 + 80003e8: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 + 80003ec: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 + 80003f0: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 80003f4: fa21 f604 lsr.w r6, r1, r4 + 80003f8: eb42 0106 adc.w r1, r2, r6 + 80003fc: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000400: bf08 it eq + 8000402: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 8000406: bd70 pop {r4, r5, r6, pc} + 8000408: f1c4 040c rsb r4, r4, #12 + 800040c: f1c4 0520 rsb r5, r4, #32 + 8000410: fa00 f304 lsl.w r3, r0, r4 + 8000414: fa20 f005 lsr.w r0, r0, r5 + 8000418: fa01 f204 lsl.w r2, r1, r4 + 800041c: ea40 0002 orr.w r0, r0, r2 + 8000420: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000424: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 8000428: f141 0100 adc.w r1, r1, #0 + 800042c: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000430: bf08 it eq + 8000432: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 8000436: bd70 pop {r4, r5, r6, pc} + 8000438: f1c4 0520 rsb r5, r4, #32 + 800043c: fa00 f205 lsl.w r2, r0, r5 + 8000440: ea4e 0e02 orr.w lr, lr, r2 + 8000444: fa20 f304 lsr.w r3, r0, r4 + 8000448: fa01 f205 lsl.w r2, r1, r5 + 800044c: ea43 0302 orr.w r3, r3, r2 + 8000450: fa21 f004 lsr.w r0, r1, r4 + 8000454: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000458: fa21 f204 lsr.w r2, r1, r4 + 800045c: ea20 0002 bic.w r0, r0, r2 + 8000460: eb00 70d3 add.w r0, r0, r3, lsr #31 + 8000464: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000468: bf08 it eq + 800046a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800046e: bd70 pop {r4, r5, r6, pc} + 8000470: f094 0f00 teq r4, #0 + 8000474: d10f bne.n 8000496 <__aeabi_dmul+0x1c2> + 8000476: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 + 800047a: 0040 lsls r0, r0, #1 + 800047c: eb41 0101 adc.w r1, r1, r1 + 8000480: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 8000484: bf08 it eq + 8000486: 3c01 subeq r4, #1 + 8000488: d0f7 beq.n 800047a <__aeabi_dmul+0x1a6> + 800048a: ea41 0106 orr.w r1, r1, r6 + 800048e: f095 0f00 teq r5, #0 + 8000492: bf18 it ne + 8000494: 4770 bxne lr + 8000496: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 + 800049a: 0052 lsls r2, r2, #1 + 800049c: eb43 0303 adc.w r3, r3, r3 + 80004a0: f413 1f80 tst.w r3, #1048576 ; 0x100000 + 80004a4: bf08 it eq + 80004a6: 3d01 subeq r5, #1 + 80004a8: d0f7 beq.n 800049a <__aeabi_dmul+0x1c6> + 80004aa: ea43 0306 orr.w r3, r3, r6 + 80004ae: 4770 bx lr + 80004b0: ea94 0f0c teq r4, ip + 80004b4: ea0c 5513 and.w r5, ip, r3, lsr #20 + 80004b8: bf18 it ne + 80004ba: ea95 0f0c teqne r5, ip + 80004be: d00c beq.n 80004da <__aeabi_dmul+0x206> + 80004c0: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 80004c4: bf18 it ne + 80004c6: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 80004ca: d1d1 bne.n 8000470 <__aeabi_dmul+0x19c> + 80004cc: ea81 0103 eor.w r1, r1, r3 + 80004d0: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 80004d4: f04f 0000 mov.w r0, #0 + 80004d8: bd70 pop {r4, r5, r6, pc} + 80004da: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 80004de: bf06 itte eq + 80004e0: 4610 moveq r0, r2 + 80004e2: 4619 moveq r1, r3 + 80004e4: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 80004e8: d019 beq.n 800051e <__aeabi_dmul+0x24a> + 80004ea: ea94 0f0c teq r4, ip + 80004ee: d102 bne.n 80004f6 <__aeabi_dmul+0x222> + 80004f0: ea50 3601 orrs.w r6, r0, r1, lsl #12 + 80004f4: d113 bne.n 800051e <__aeabi_dmul+0x24a> + 80004f6: ea95 0f0c teq r5, ip + 80004fa: d105 bne.n 8000508 <__aeabi_dmul+0x234> + 80004fc: ea52 3603 orrs.w r6, r2, r3, lsl #12 + 8000500: bf1c itt ne + 8000502: 4610 movne r0, r2 + 8000504: 4619 movne r1, r3 + 8000506: d10a bne.n 800051e <__aeabi_dmul+0x24a> + 8000508: ea81 0103 eor.w r1, r1, r3 + 800050c: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 + 8000510: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 + 8000514: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 + 8000518: f04f 0000 mov.w r0, #0 + 800051c: bd70 pop {r4, r5, r6, pc} + 800051e: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 + 8000522: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 + 8000526: bd70 pop {r4, r5, r6, pc} + +08000528 <__aeabi_ddiv>: + 8000528: b570 push {r4, r5, r6, lr} + 800052a: f04f 0cff mov.w ip, #255 ; 0xff + 800052e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 + 8000532: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 8000536: bf1d ittte ne + 8000538: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 800053c: ea94 0f0c teqne r4, ip + 8000540: ea95 0f0c teqne r5, ip + 8000544: f000 f8a7 bleq 8000696 <__aeabi_ddiv+0x16e> + 8000548: eba4 0405 sub.w r4, r4, r5 + 800054c: ea81 0e03 eor.w lr, r1, r3 + 8000550: ea52 3503 orrs.w r5, r2, r3, lsl #12 + 8000554: ea4f 3101 mov.w r1, r1, lsl #12 + 8000558: f000 8088 beq.w 800066c <__aeabi_ddiv+0x144> + 800055c: ea4f 3303 mov.w r3, r3, lsl #12 + 8000560: f04f 5580 mov.w r5, #268435456 ; 0x10000000 + 8000564: ea45 1313 orr.w r3, r5, r3, lsr #4 + 8000568: ea43 6312 orr.w r3, r3, r2, lsr #24 + 800056c: ea4f 2202 mov.w r2, r2, lsl #8 + 8000570: ea45 1511 orr.w r5, r5, r1, lsr #4 + 8000574: ea45 6510 orr.w r5, r5, r0, lsr #24 + 8000578: ea4f 2600 mov.w r6, r0, lsl #8 + 800057c: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 + 8000580: 429d cmp r5, r3 + 8000582: bf08 it eq + 8000584: 4296 cmpeq r6, r2 + 8000586: f144 04fd adc.w r4, r4, #253 ; 0xfd + 800058a: f504 7440 add.w r4, r4, #768 ; 0x300 + 800058e: d202 bcs.n 8000596 <__aeabi_ddiv+0x6e> + 8000590: 085b lsrs r3, r3, #1 + 8000592: ea4f 0232 mov.w r2, r2, rrx + 8000596: 1ab6 subs r6, r6, r2 + 8000598: eb65 0503 sbc.w r5, r5, r3 + 800059c: 085b lsrs r3, r3, #1 + 800059e: ea4f 0232 mov.w r2, r2, rrx + 80005a2: f44f 1080 mov.w r0, #1048576 ; 0x100000 + 80005a6: f44f 2c00 mov.w ip, #524288 ; 0x80000 + 80005aa: ebb6 0e02 subs.w lr, r6, r2 + 80005ae: eb75 0e03 sbcs.w lr, r5, r3 + 80005b2: bf22 ittt cs + 80005b4: 1ab6 subcs r6, r6, r2 + 80005b6: 4675 movcs r5, lr + 80005b8: ea40 000c orrcs.w r0, r0, ip + 80005bc: 085b lsrs r3, r3, #1 + 80005be: ea4f 0232 mov.w r2, r2, rrx + 80005c2: ebb6 0e02 subs.w lr, r6, r2 + 80005c6: eb75 0e03 sbcs.w lr, r5, r3 + 80005ca: bf22 ittt cs + 80005cc: 1ab6 subcs r6, r6, r2 + 80005ce: 4675 movcs r5, lr + 80005d0: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 80005d4: 085b lsrs r3, r3, #1 + 80005d6: ea4f 0232 mov.w r2, r2, rrx + 80005da: ebb6 0e02 subs.w lr, r6, r2 + 80005de: eb75 0e03 sbcs.w lr, r5, r3 + 80005e2: bf22 ittt cs + 80005e4: 1ab6 subcs r6, r6, r2 + 80005e6: 4675 movcs r5, lr + 80005e8: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 80005ec: 085b lsrs r3, r3, #1 + 80005ee: ea4f 0232 mov.w r2, r2, rrx + 80005f2: ebb6 0e02 subs.w lr, r6, r2 + 80005f6: eb75 0e03 sbcs.w lr, r5, r3 + 80005fa: bf22 ittt cs + 80005fc: 1ab6 subcs r6, r6, r2 + 80005fe: 4675 movcs r5, lr + 8000600: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000604: ea55 0e06 orrs.w lr, r5, r6 + 8000608: d018 beq.n 800063c <__aeabi_ddiv+0x114> + 800060a: ea4f 1505 mov.w r5, r5, lsl #4 + 800060e: ea45 7516 orr.w r5, r5, r6, lsr #28 + 8000612: ea4f 1606 mov.w r6, r6, lsl #4 + 8000616: ea4f 03c3 mov.w r3, r3, lsl #3 + 800061a: ea43 7352 orr.w r3, r3, r2, lsr #29 + 800061e: ea4f 02c2 mov.w r2, r2, lsl #3 + 8000622: ea5f 1c1c movs.w ip, ip, lsr #4 + 8000626: d1c0 bne.n 80005aa <__aeabi_ddiv+0x82> + 8000628: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 800062c: d10b bne.n 8000646 <__aeabi_ddiv+0x11e> + 800062e: ea41 0100 orr.w r1, r1, r0 + 8000632: f04f 0000 mov.w r0, #0 + 8000636: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 + 800063a: e7b6 b.n 80005aa <__aeabi_ddiv+0x82> + 800063c: f411 1f80 tst.w r1, #1048576 ; 0x100000 + 8000640: bf04 itt eq + 8000642: 4301 orreq r1, r0 + 8000644: 2000 moveq r0, #0 + 8000646: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd + 800064a: bf88 it hi + 800064c: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 + 8000650: f63f aeaf bhi.w 80003b2 <__aeabi_dmul+0xde> + 8000654: ebb5 0c03 subs.w ip, r5, r3 + 8000658: bf04 itt eq + 800065a: ebb6 0c02 subseq.w ip, r6, r2 + 800065e: ea5f 0c50 movseq.w ip, r0, lsr #1 + 8000662: f150 0000 adcs.w r0, r0, #0 + 8000666: eb41 5104 adc.w r1, r1, r4, lsl #20 + 800066a: bd70 pop {r4, r5, r6, pc} + 800066c: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 + 8000670: ea4e 3111 orr.w r1, lr, r1, lsr #12 + 8000674: eb14 045c adds.w r4, r4, ip, lsr #1 + 8000678: bfc2 ittt gt + 800067a: ebd4 050c rsbsgt r5, r4, ip + 800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 8000682: bd70 popgt {r4, r5, r6, pc} + 8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 + 8000688: f04f 0e00 mov.w lr, #0 + 800068c: 3c01 subs r4, #1 + 800068e: e690 b.n 80003b2 <__aeabi_dmul+0xde> + 8000690: ea45 0e06 orr.w lr, r5, r6 + 8000694: e68d b.n 80003b2 <__aeabi_dmul+0xde> + 8000696: ea0c 5513 and.w r5, ip, r3, lsr #20 + 800069a: ea94 0f0c teq r4, ip + 800069e: bf08 it eq + 80006a0: ea95 0f0c teqeq r5, ip + 80006a4: f43f af3b beq.w 800051e <__aeabi_dmul+0x24a> + 80006a8: ea94 0f0c teq r4, ip + 80006ac: d10a bne.n 80006c4 <__aeabi_ddiv+0x19c> + 80006ae: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 80006b2: f47f af34 bne.w 800051e <__aeabi_dmul+0x24a> + 80006b6: ea95 0f0c teq r5, ip + 80006ba: f47f af25 bne.w 8000508 <__aeabi_dmul+0x234> + 80006be: 4610 mov r0, r2 + 80006c0: 4619 mov r1, r3 + 80006c2: e72c b.n 800051e <__aeabi_dmul+0x24a> + 80006c4: ea95 0f0c teq r5, ip + 80006c8: d106 bne.n 80006d8 <__aeabi_ddiv+0x1b0> + 80006ca: ea52 3503 orrs.w r5, r2, r3, lsl #12 + 80006ce: f43f aefd beq.w 80004cc <__aeabi_dmul+0x1f8> + 80006d2: 4610 mov r0, r2 + 80006d4: 4619 mov r1, r3 + 80006d6: e722 b.n 800051e <__aeabi_dmul+0x24a> + 80006d8: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 80006dc: bf18 it ne + 80006de: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 80006e2: f47f aec5 bne.w 8000470 <__aeabi_dmul+0x19c> + 80006e6: ea50 0441 orrs.w r4, r0, r1, lsl #1 + 80006ea: f47f af0d bne.w 8000508 <__aeabi_dmul+0x234> + 80006ee: ea52 0543 orrs.w r5, r2, r3, lsl #1 + 80006f2: f47f aeeb bne.w 80004cc <__aeabi_dmul+0x1f8> + 80006f6: e712 b.n 800051e <__aeabi_dmul+0x24a> + +080006f8 <__aeabi_d2uiz>: + 80006f8: 004a lsls r2, r1, #1 + 80006fa: d211 bcs.n 8000720 <__aeabi_d2uiz+0x28> + 80006fc: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 + 8000700: d211 bcs.n 8000726 <__aeabi_d2uiz+0x2e> + 8000702: d50d bpl.n 8000720 <__aeabi_d2uiz+0x28> + 8000704: f46f 7378 mvn.w r3, #992 ; 0x3e0 + 8000708: ebb3 5262 subs.w r2, r3, r2, asr #21 + 800070c: d40e bmi.n 800072c <__aeabi_d2uiz+0x34> + 800070e: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000712: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 + 8000716: ea43 5350 orr.w r3, r3, r0, lsr #21 + 800071a: fa23 f002 lsr.w r0, r3, r2 + 800071e: 4770 bx lr + 8000720: f04f 0000 mov.w r0, #0 + 8000724: 4770 bx lr + 8000726: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 800072a: d102 bne.n 8000732 <__aeabi_d2uiz+0x3a> + 800072c: f04f 30ff mov.w r0, #4294967295 + 8000730: 4770 bx lr + 8000732: f04f 0000 mov.w r0, #0 + 8000736: 4770 bx lr + +08000738 : + */ + +#include +#include "delay.h" //include declaration header file + +void delay_1ms(uint32_t n){ + 8000738: b480 push {r7} + 800073a: b085 sub sp, #20 + 800073c: af00 add r7, sp, #0 + 800073e: 6078 str r0, [r7, #4] + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + 8000740: 687b ldr r3, [r7, #4] + 8000742: 60fb str r3, [r7, #12] + 8000744: e01e b.n 8000784 + // Clear value register + *STK_VAL = 0x0000; + 8000746: 4b14 ldr r3, [pc, #80] ; (8000798 ) + 8000748: 2200 movs r2, #0 + 800074a: 601a str r2, [r3, #0] + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + 800074c: 4b13 ldr r3, [pc, #76] ; (800079c ) + 800074e: f44f 527a mov.w r2, #16000 ; 0x3e80 + 8000752: 601a str r2, [r3, #0] + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + 8000754: 4b12 ldr r3, [pc, #72] ; (80007a0 ) + 8000756: 681b ldr r3, [r3, #0] + 8000758: 4a11 ldr r2, [pc, #68] ; (80007a0 ) + 800075a: f043 0304 orr.w r3, r3, #4 + 800075e: 6013 str r3, [r2, #0] + *STK_CTRL |= EN; + 8000760: 4b0f ldr r3, [pc, #60] ; (80007a0 ) + 8000762: 681b ldr r3, [r3, #0] + 8000764: 4a0e ldr r2, [pc, #56] ; (80007a0 ) + 8000766: f043 0301 orr.w r3, r3, #1 + 800076a: 6013 str r3, [r2, #0] + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + 800076c: 4b0c ldr r3, [pc, #48] ; (80007a0 ) + 800076e: 681b ldr r3, [r3, #0] + 8000770: 0c1b lsrs r3, r3, #16 + 8000772: f003 0301 and.w r3, r3, #1 + 8000776: 60bb str r3, [r7, #8] + } while (flag != 1); + 8000778: 68bb ldr r3, [r7, #8] + 800077a: 2b01 cmp r3, #1 + 800077c: d1f6 bne.n 800076c + for (int i = n ; i > 0 ; i--) { + 800077e: 68fb ldr r3, [r7, #12] + 8000780: 3b01 subs r3, #1 + 8000782: 60fb str r3, [r7, #12] + 8000784: 68fb ldr r3, [r7, #12] + 8000786: 2b00 cmp r3, #0 + 8000788: dcdd bgt.n 8000746 + } +} + 800078a: bf00 nop + 800078c: bf00 nop + 800078e: 3714 adds r7, #20 + 8000790: 46bd mov sp, r7 + 8000792: f85d 7b04 ldr.w r7, [sp], #4 + 8000796: 4770 bx lr + 8000798: e000e018 .word 0xe000e018 + 800079c: e000e014 .word 0xe000e014 + 80007a0: e000e010 .word 0xe000e010 + +080007a4 : +#include +#include + +int ledSpeed = 5; + +void led_init(){ + 80007a4: b480 push {r7} + 80007a6: af00 add r7, sp, #0 + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<) + 80007aa: 681b ldr r3, [r3, #0] + 80007ac: 4a12 ldr r2, [pc, #72] ; (80007f8 ) + 80007ae: f043 0302 orr.w r3, r3, #2 + 80007b2: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0x3FFF<<10); + 80007b4: 4b11 ldr r3, [pc, #68] ; (80007fc ) + 80007b6: 681b ldr r3, [r3, #0] + 80007b8: 4a10 ldr r2, [pc, #64] ; (80007fc ) + 80007ba: f423 037f bic.w r3, r3, #16711680 ; 0xff0000 + 80007be: f423 437c bic.w r3, r3, #64512 ; 0xfc00 + 80007c2: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x555<<10); + 80007c4: 4b0d ldr r3, [pc, #52] ; (80007fc ) + 80007c6: 681b ldr r3, [r3, #0] + 80007c8: 4a0c ldr r2, [pc, #48] ; (80007fc ) + 80007ca: f443 13aa orr.w r3, r3, #1392640 ; 0x154000 + 80007ce: f443 53a0 orr.w r3, r3, #5120 ; 0x1400 + 80007d2: 6013 str r3, [r2, #0] + + *GPIOB_MODER &= ~(0xFF<<24); + 80007d4: 4b09 ldr r3, [pc, #36] ; (80007fc ) + 80007d6: 681b ldr r3, [r3, #0] + 80007d8: 4a08 ldr r2, [pc, #32] ; (80007fc ) + 80007da: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 + 80007de: 6013 str r3, [r2, #0] + *GPIOB_MODER |= (0x55<<24); + 80007e0: 4b06 ldr r3, [pc, #24] ; (80007fc ) + 80007e2: 681b ldr r3, [r3, #0] + 80007e4: 4a05 ldr r2, [pc, #20] ; (80007fc ) + 80007e6: f043 43aa orr.w r3, r3, #1426063360 ; 0x55000000 + 80007ea: 6013 str r3, [r2, #0] +} + 80007ec: bf00 nop + 80007ee: 46bd mov sp, r7 + 80007f0: f85d 7b04 ldr.w r7, [sp], #4 + 80007f4: 4770 bx lr + 80007f6: bf00 nop + 80007f8: 40023830 .word 0x40023830 + 80007fc: 40020400 .word 0x40020400 + +08000800 : + t2n31={E5, H}, t2n32={Ab3, Q}, t2n33={C4, Q}, t2n34={Eb4, Q}, t2n35={Ab4, Q}, + t2n36={C5, Q}, t2n37={Eb5, Q}, t2n38={Ab6, H}, t2n39={Eb5, H}, t2n40={Bb3, Q}, + t2n41={D4, Q}, t2n42={F4, Q}, t2n43={Bb4, Q}, t2n44={D5, Q}, t2n45={F5, Q}, + t2n61={Bb5, W}, t2n62={B5, Q}, t2n63={B5, Q}, t2n64={B5, Q}, t2n65={C6, W}; + +void printHelp() { + 8000800: b580 push {r7, lr} + 8000802: af00 add r7, sp, #0 + printf("*Commands*\n\r"); + 8000804: 4809 ldr r0, [pc, #36] ; (800082c ) + 8000806: f001 fe2f bl 8002468 + printf("'rmw {hex address}' - Reads mem at a given address\n\r"); + 800080a: 4809 ldr r0, [pc, #36] ; (8000830 ) + 800080c: f001 fe2c bl 8002468 + printf("'wmw {hex address} {value}' - Writes the given value as a word to the given address\n\r"); + 8000810: 4808 ldr r0, [pc, #32] ; (8000834 ) + 8000812: f001 fe29 bl 8002468 + printf("'dm {hex address} {length}' - Dumps the memory at a given address. Defaults to 16 B if no " + 8000816: 4808 ldr r0, [pc, #32] ; (8000838 ) + 8000818: f001 fe26 bl 8002468 + "length is given\n\r"); + printf("'ps {song choice}' - Plays a song with the given selection\n\r"); + 800081c: 4807 ldr r0, [pc, #28] ; (800083c ) + 800081e: f001 fe23 bl 8002468 + printf("'songs' - Prints info about each song selection\n\r"); + 8000822: 4807 ldr r0, [pc, #28] ; (8000840 ) + 8000824: f001 fe20 bl 8002468 +} + 8000828: bf00 nop + 800082a: bd80 pop {r7, pc} + 800082c: 08003dbc .word 0x08003dbc + 8000830: 08003dcc .word 0x08003dcc + 8000834: 08003e04 .word 0x08003e04 + 8000838: 08003e5c .word 0x08003e5c + 800083c: 08003ec8 .word 0x08003ec8 + 8000840: 08003f08 .word 0x08003f08 + +08000844 : +void songInfo() { + 8000844: b580 push {r7, lr} + 8000846: af00 add r7, sp, #0 + printf("Type 1 or 2 to play a song!\n\r"); + 8000848: 4805 ldr r0, [pc, #20] ; (8000860 ) + 800084a: f001 fe0d bl 8002468 + printf("Song 1: Imperial March\n\r"); + 800084e: 4805 ldr r0, [pc, #20] ; (8000864 ) + 8000850: f001 fe0a bl 8002468 + printf("Song 2: Super Mario Bros Flagpole Fanfare\n\r"); + 8000854: 4804 ldr r0, [pc, #16] ; (8000868 ) + 8000856: f001 fe07 bl 8002468 +} + 800085a: bf00 nop + 800085c: bd80 pop {r7, pc} + 800085e: bf00 nop + 8000860: 08003f3c .word 0x08003f3c + 8000864: 08003f5c .word 0x08003f5c + 8000868: 08003f78 .word 0x08003f78 + +0800086c
: + +int main(void) { + 800086c: b590 push {r4, r7, lr} + 800086e: f6ad 4dfc subw sp, sp, #3324 ; 0xcfc + 8000872: af02 add r7, sp, #8 + init_usart2(57600, F_CPU); + 8000874: 49d1 ldr r1, [pc, #836] ; (8000bbc ) + 8000876: f44f 4061 mov.w r0, #57600 ; 0xe100 + 800087a: f001 fb45 bl 8001f08 + piezo_init(); + 800087e: f001 f9ed bl 8001c5c + led_init(); + 8000882: f7ff ff8f bl 80007a4 + // Inititialize Imperial March Note Array + Note song1[137]={t1n1, t1n2, t1n3, t1n4, t1n5, t1n6, t1n7, t1n9, t1n10, t1n11, t1n12, t1n13, t1n14, t1n15, + 8000886: f507 638b add.w r3, r7, #1112 ; 0x458 + 800088a: 4618 mov r0, r3 + 800088c: f44f 6309 mov.w r3, #2192 ; 0x890 + 8000890: 461a mov r2, r3 + 8000892: 2100 movs r1, #0 + 8000894: f001 fd85 bl 80023a2 + 8000898: f507 638b add.w r3, r7, #1112 ; 0x458 + 800089c: 4ac8 ldr r2, [pc, #800] ; (8000bc0 ) + 800089e: 461c mov r4, r3 + 80008a0: 4613 mov r3, r2 + 80008a2: cb0f ldmia r3, {r0, r1, r2, r3} + 80008a4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80008a8: f507 638b add.w r3, r7, #1112 ; 0x458 + 80008ac: 4ac5 ldr r2, [pc, #788] ; (8000bc4 ) + 80008ae: f103 0410 add.w r4, r3, #16 + 80008b2: 4613 mov r3, r2 + 80008b4: cb0f ldmia r3, {r0, r1, r2, r3} + 80008b6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80008ba: f507 638b add.w r3, r7, #1112 ; 0x458 + 80008be: 4ac2 ldr r2, [pc, #776] ; (8000bc8 ) + 80008c0: f103 0420 add.w r4, r3, #32 + 80008c4: 4613 mov r3, r2 + 80008c6: cb0f ldmia r3, {r0, r1, r2, r3} + 80008c8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80008cc: f507 638b add.w r3, r7, #1112 ; 0x458 + 80008d0: 4abe ldr r2, [pc, #760] ; (8000bcc ) + 80008d2: f103 0430 add.w r4, r3, #48 ; 0x30 + 80008d6: 4613 mov r3, r2 + 80008d8: cb0f ldmia r3, {r0, r1, r2, r3} + 80008da: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80008de: f507 638b add.w r3, r7, #1112 ; 0x458 + 80008e2: 4abb ldr r2, [pc, #748] ; (8000bd0 ) + 80008e4: f103 0440 add.w r4, r3, #64 ; 0x40 + 80008e8: 4613 mov r3, r2 + 80008ea: cb0f ldmia r3, {r0, r1, r2, r3} + 80008ec: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80008f0: f507 638b add.w r3, r7, #1112 ; 0x458 + 80008f4: 4ab7 ldr r2, [pc, #732] ; (8000bd4 ) + 80008f6: f103 0450 add.w r4, r3, #80 ; 0x50 + 80008fa: 4613 mov r3, r2 + 80008fc: cb0f ldmia r3, {r0, r1, r2, r3} + 80008fe: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000902: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000906: 4ab4 ldr r2, [pc, #720] ; (8000bd8 ) + 8000908: f103 0460 add.w r4, r3, #96 ; 0x60 + 800090c: 4613 mov r3, r2 + 800090e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000910: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000914: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000918: 4ab0 ldr r2, [pc, #704] ; (8000bdc ) + 800091a: f103 0470 add.w r4, r3, #112 ; 0x70 + 800091e: 4613 mov r3, r2 + 8000920: cb0f ldmia r3, {r0, r1, r2, r3} + 8000922: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000926: f507 638b add.w r3, r7, #1112 ; 0x458 + 800092a: 4aad ldr r2, [pc, #692] ; (8000be0 ) + 800092c: f103 0480 add.w r4, r3, #128 ; 0x80 + 8000930: 4613 mov r3, r2 + 8000932: cb0f ldmia r3, {r0, r1, r2, r3} + 8000934: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000938: f507 638b add.w r3, r7, #1112 ; 0x458 + 800093c: 4aa9 ldr r2, [pc, #676] ; (8000be4 ) + 800093e: f103 0490 add.w r4, r3, #144 ; 0x90 + 8000942: 4613 mov r3, r2 + 8000944: cb0f ldmia r3, {r0, r1, r2, r3} + 8000946: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800094a: f507 638b add.w r3, r7, #1112 ; 0x458 + 800094e: 4aa6 ldr r2, [pc, #664] ; (8000be8 ) + 8000950: f103 04a0 add.w r4, r3, #160 ; 0xa0 + 8000954: 4613 mov r3, r2 + 8000956: cb0f ldmia r3, {r0, r1, r2, r3} + 8000958: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800095c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000960: 4aa2 ldr r2, [pc, #648] ; (8000bec ) + 8000962: f103 04b0 add.w r4, r3, #176 ; 0xb0 + 8000966: 4613 mov r3, r2 + 8000968: cb0f ldmia r3, {r0, r1, r2, r3} + 800096a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800096e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000972: 4a9f ldr r2, [pc, #636] ; (8000bf0 ) + 8000974: f103 04c0 add.w r4, r3, #192 ; 0xc0 + 8000978: 4613 mov r3, r2 + 800097a: cb0f ldmia r3, {r0, r1, r2, r3} + 800097c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000980: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000984: 4a9b ldr r2, [pc, #620] ; (8000bf4 ) + 8000986: f103 04d0 add.w r4, r3, #208 ; 0xd0 + 800098a: 4613 mov r3, r2 + 800098c: cb0f ldmia r3, {r0, r1, r2, r3} + 800098e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000992: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000996: 4a98 ldr r2, [pc, #608] ; (8000bf8 ) + 8000998: f103 04e0 add.w r4, r3, #224 ; 0xe0 + 800099c: 4613 mov r3, r2 + 800099e: cb0f ldmia r3, {r0, r1, r2, r3} + 80009a0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009a4: f507 638b add.w r3, r7, #1112 ; 0x458 + 80009a8: 4a94 ldr r2, [pc, #592] ; (8000bfc ) + 80009aa: f103 04f0 add.w r4, r3, #240 ; 0xf0 + 80009ae: 4613 mov r3, r2 + 80009b0: cb0f ldmia r3, {r0, r1, r2, r3} + 80009b2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009b6: f507 638b add.w r3, r7, #1112 ; 0x458 + 80009ba: 4a91 ldr r2, [pc, #580] ; (8000c00 ) + 80009bc: f503 7480 add.w r4, r3, #256 ; 0x100 + 80009c0: 4613 mov r3, r2 + 80009c2: cb0f ldmia r3, {r0, r1, r2, r3} + 80009c4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009c8: f507 638b add.w r3, r7, #1112 ; 0x458 + 80009cc: 4a8d ldr r2, [pc, #564] ; (8000c04 ) + 80009ce: f503 7488 add.w r4, r3, #272 ; 0x110 + 80009d2: 4613 mov r3, r2 + 80009d4: cb0f ldmia r3, {r0, r1, r2, r3} + 80009d6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009da: f507 638b add.w r3, r7, #1112 ; 0x458 + 80009de: 4a8a ldr r2, [pc, #552] ; (8000c08 ) + 80009e0: f503 7490 add.w r4, r3, #288 ; 0x120 + 80009e4: 4613 mov r3, r2 + 80009e6: cb0f ldmia r3, {r0, r1, r2, r3} + 80009e8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009ec: f507 638b add.w r3, r7, #1112 ; 0x458 + 80009f0: 4a86 ldr r2, [pc, #536] ; (8000c0c ) + 80009f2: f503 7498 add.w r4, r3, #304 ; 0x130 + 80009f6: 4613 mov r3, r2 + 80009f8: cb0f ldmia r3, {r0, r1, r2, r3} + 80009fa: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80009fe: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a02: 4a83 ldr r2, [pc, #524] ; (8000c10 ) + 8000a04: f503 74a0 add.w r4, r3, #320 ; 0x140 + 8000a08: 4613 mov r3, r2 + 8000a0a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a0c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a10: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a14: 4a7f ldr r2, [pc, #508] ; (8000c14 ) + 8000a16: f503 74a8 add.w r4, r3, #336 ; 0x150 + 8000a1a: 4613 mov r3, r2 + 8000a1c: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a1e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a22: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a26: 4a7c ldr r2, [pc, #496] ; (8000c18 ) + 8000a28: f503 74b0 add.w r4, r3, #352 ; 0x160 + 8000a2c: 4613 mov r3, r2 + 8000a2e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a30: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a34: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a38: 4a78 ldr r2, [pc, #480] ; (8000c1c ) + 8000a3a: f503 74b8 add.w r4, r3, #368 ; 0x170 + 8000a3e: 4613 mov r3, r2 + 8000a40: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a42: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a46: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a4a: 4a75 ldr r2, [pc, #468] ; (8000c20 ) + 8000a4c: f503 74c0 add.w r4, r3, #384 ; 0x180 + 8000a50: 4613 mov r3, r2 + 8000a52: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a54: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a58: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a5c: 4a71 ldr r2, [pc, #452] ; (8000c24 ) + 8000a5e: f503 74c8 add.w r4, r3, #400 ; 0x190 + 8000a62: 4613 mov r3, r2 + 8000a64: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a66: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a6a: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a6e: 4a6e ldr r2, [pc, #440] ; (8000c28 ) + 8000a70: f503 74d0 add.w r4, r3, #416 ; 0x1a0 + 8000a74: 4613 mov r3, r2 + 8000a76: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a78: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a7c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a80: 4a6a ldr r2, [pc, #424] ; (8000c2c ) + 8000a82: f503 74d8 add.w r4, r3, #432 ; 0x1b0 + 8000a86: 4613 mov r3, r2 + 8000a88: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a8a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000a8e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000a92: 4a67 ldr r2, [pc, #412] ; (8000c30 ) + 8000a94: f503 74e0 add.w r4, r3, #448 ; 0x1c0 + 8000a98: 4613 mov r3, r2 + 8000a9a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000a9c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000aa0: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000aa4: 4a63 ldr r2, [pc, #396] ; (8000c34 ) + 8000aa6: f503 74e8 add.w r4, r3, #464 ; 0x1d0 + 8000aaa: 4613 mov r3, r2 + 8000aac: cb0f ldmia r3, {r0, r1, r2, r3} + 8000aae: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ab2: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ab6: 4a60 ldr r2, [pc, #384] ; (8000c38 ) + 8000ab8: f503 74f0 add.w r4, r3, #480 ; 0x1e0 + 8000abc: 4613 mov r3, r2 + 8000abe: cb0f ldmia r3, {r0, r1, r2, r3} + 8000ac0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ac4: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ac8: 4a5c ldr r2, [pc, #368] ; (8000c3c ) + 8000aca: f503 74f8 add.w r4, r3, #496 ; 0x1f0 + 8000ace: 4613 mov r3, r2 + 8000ad0: cb0f ldmia r3, {r0, r1, r2, r3} + 8000ad2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ad6: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ada: 4a59 ldr r2, [pc, #356] ; (8000c40 ) + 8000adc: f503 7400 add.w r4, r3, #512 ; 0x200 + 8000ae0: 4613 mov r3, r2 + 8000ae2: cb0f ldmia r3, {r0, r1, r2, r3} + 8000ae4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ae8: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000aec: 4a55 ldr r2, [pc, #340] ; (8000c44 ) + 8000aee: f503 7404 add.w r4, r3, #528 ; 0x210 + 8000af2: 4613 mov r3, r2 + 8000af4: cb0f ldmia r3, {r0, r1, r2, r3} + 8000af6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000afa: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000afe: 4a52 ldr r2, [pc, #328] ; (8000c48 ) + 8000b00: f503 7408 add.w r4, r3, #544 ; 0x220 + 8000b04: 4613 mov r3, r2 + 8000b06: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b08: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b0c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b10: 4a4e ldr r2, [pc, #312] ; (8000c4c ) + 8000b12: f503 740c add.w r4, r3, #560 ; 0x230 + 8000b16: 4613 mov r3, r2 + 8000b18: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b1a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b1e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b22: 4a4b ldr r2, [pc, #300] ; (8000c50 ) + 8000b24: f503 7410 add.w r4, r3, #576 ; 0x240 + 8000b28: 4613 mov r3, r2 + 8000b2a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b2c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b30: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b34: 4a47 ldr r2, [pc, #284] ; (8000c54 ) + 8000b36: f503 7414 add.w r4, r3, #592 ; 0x250 + 8000b3a: 4613 mov r3, r2 + 8000b3c: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b3e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b42: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b46: 4a44 ldr r2, [pc, #272] ; (8000c58 ) + 8000b48: f503 7418 add.w r4, r3, #608 ; 0x260 + 8000b4c: 4613 mov r3, r2 + 8000b4e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b50: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b54: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b58: 4a40 ldr r2, [pc, #256] ; (8000c5c ) + 8000b5a: f503 741c add.w r4, r3, #624 ; 0x270 + 8000b5e: 4613 mov r3, r2 + 8000b60: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b62: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b66: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b6a: 4a3d ldr r2, [pc, #244] ; (8000c60 ) + 8000b6c: f503 7420 add.w r4, r3, #640 ; 0x280 + 8000b70: 4613 mov r3, r2 + 8000b72: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b74: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b78: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b7c: 4a39 ldr r2, [pc, #228] ; (8000c64 ) + 8000b7e: f503 7424 add.w r4, r3, #656 ; 0x290 + 8000b82: 4613 mov r3, r2 + 8000b84: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b86: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b8a: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000b8e: 4a36 ldr r2, [pc, #216] ; (8000c68 ) + 8000b90: f503 7428 add.w r4, r3, #672 ; 0x2a0 + 8000b94: 4613 mov r3, r2 + 8000b96: cb0f ldmia r3, {r0, r1, r2, r3} + 8000b98: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000b9c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ba0: 4a32 ldr r2, [pc, #200] ; (8000c6c ) + 8000ba2: f503 742c add.w r4, r3, #688 ; 0x2b0 + 8000ba6: 4613 mov r3, r2 + 8000ba8: cb0f ldmia r3, {r0, r1, r2, r3} + 8000baa: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000bae: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000bb2: 4a2f ldr r2, [pc, #188] ; (8000c70 ) + 8000bb4: f503 7430 add.w r4, r3, #704 ; 0x2c0 + 8000bb8: e05c b.n 8000c74 + 8000bba: bf00 nop + 8000bbc: 00f42400 .word 0x00f42400 + 8000bc0: 20000000 .word 0x20000000 + 8000bc4: 20000010 .word 0x20000010 + 8000bc8: 20000020 .word 0x20000020 + 8000bcc: 20000030 .word 0x20000030 + 8000bd0: 20000040 .word 0x20000040 + 8000bd4: 20000050 .word 0x20000050 + 8000bd8: 20000060 .word 0x20000060 + 8000bdc: 20000070 .word 0x20000070 + 8000be0: 20000080 .word 0x20000080 + 8000be4: 20000090 .word 0x20000090 + 8000be8: 200000a0 .word 0x200000a0 + 8000bec: 200000b0 .word 0x200000b0 + 8000bf0: 200000c0 .word 0x200000c0 + 8000bf4: 200000d0 .word 0x200000d0 + 8000bf8: 200000e0 .word 0x200000e0 + 8000bfc: 200000f0 .word 0x200000f0 + 8000c00: 20000100 .word 0x20000100 + 8000c04: 20000110 .word 0x20000110 + 8000c08: 20000120 .word 0x20000120 + 8000c0c: 20000130 .word 0x20000130 + 8000c10: 20000140 .word 0x20000140 + 8000c14: 20000150 .word 0x20000150 + 8000c18: 20000160 .word 0x20000160 + 8000c1c: 20000170 .word 0x20000170 + 8000c20: 20000180 .word 0x20000180 + 8000c24: 20000190 .word 0x20000190 + 8000c28: 200001a0 .word 0x200001a0 + 8000c2c: 200001b0 .word 0x200001b0 + 8000c30: 200001c0 .word 0x200001c0 + 8000c34: 200001d0 .word 0x200001d0 + 8000c38: 200001e0 .word 0x200001e0 + 8000c3c: 200001f0 .word 0x200001f0 + 8000c40: 20000200 .word 0x20000200 + 8000c44: 20000210 .word 0x20000210 + 8000c48: 20000220 .word 0x20000220 + 8000c4c: 20000230 .word 0x20000230 + 8000c50: 20000240 .word 0x20000240 + 8000c54: 20000250 .word 0x20000250 + 8000c58: 20000260 .word 0x20000260 + 8000c5c: 20000270 .word 0x20000270 + 8000c60: 20000280 .word 0x20000280 + 8000c64: 20000290 .word 0x20000290 + 8000c68: 200002a0 .word 0x200002a0 + 8000c6c: 200002b0 .word 0x200002b0 + 8000c70: 200002c0 .word 0x200002c0 + 8000c74: 4613 mov r3, r2 + 8000c76: cb0f ldmia r3, {r0, r1, r2, r3} + 8000c78: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000c7c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000c80: 4acf ldr r2, [pc, #828] ; (8000fc0 ) + 8000c82: f503 7434 add.w r4, r3, #720 ; 0x2d0 + 8000c86: 4613 mov r3, r2 + 8000c88: cb0f ldmia r3, {r0, r1, r2, r3} + 8000c8a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000c8e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000c92: 4acc ldr r2, [pc, #816] ; (8000fc4 ) + 8000c94: f503 7438 add.w r4, r3, #736 ; 0x2e0 + 8000c98: 4613 mov r3, r2 + 8000c9a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000c9c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ca0: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ca4: 4ac8 ldr r2, [pc, #800] ; (8000fc8 ) + 8000ca6: f503 743c add.w r4, r3, #752 ; 0x2f0 + 8000caa: 4613 mov r3, r2 + 8000cac: cb0f ldmia r3, {r0, r1, r2, r3} + 8000cae: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000cb2: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000cb6: 4ac5 ldr r2, [pc, #788] ; (8000fcc ) + 8000cb8: f503 7440 add.w r4, r3, #768 ; 0x300 + 8000cbc: 4613 mov r3, r2 + 8000cbe: cb0f ldmia r3, {r0, r1, r2, r3} + 8000cc0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000cc4: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000cc8: 4ac1 ldr r2, [pc, #772] ; (8000fd0 ) + 8000cca: f503 7444 add.w r4, r3, #784 ; 0x310 + 8000cce: 4613 mov r3, r2 + 8000cd0: cb0f ldmia r3, {r0, r1, r2, r3} + 8000cd2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000cd6: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000cda: 4abe ldr r2, [pc, #760] ; (8000fd4 ) + 8000cdc: f503 7448 add.w r4, r3, #800 ; 0x320 + 8000ce0: 4613 mov r3, r2 + 8000ce2: cb0f ldmia r3, {r0, r1, r2, r3} + 8000ce4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ce8: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000cec: 4aba ldr r2, [pc, #744] ; (8000fd8 ) + 8000cee: f503 744c add.w r4, r3, #816 ; 0x330 + 8000cf2: 4613 mov r3, r2 + 8000cf4: cb0f ldmia r3, {r0, r1, r2, r3} + 8000cf6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000cfa: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000cfe: 4ab7 ldr r2, [pc, #732] ; (8000fdc ) + 8000d00: f503 7450 add.w r4, r3, #832 ; 0x340 + 8000d04: 4613 mov r3, r2 + 8000d06: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d08: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d0c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d10: 4ab3 ldr r2, [pc, #716] ; (8000fe0 ) + 8000d12: f503 7454 add.w r4, r3, #848 ; 0x350 + 8000d16: 4613 mov r3, r2 + 8000d18: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d1a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d1e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d22: 4ab0 ldr r2, [pc, #704] ; (8000fe4 ) + 8000d24: f503 7458 add.w r4, r3, #864 ; 0x360 + 8000d28: 4613 mov r3, r2 + 8000d2a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d2c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d30: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d34: 4aac ldr r2, [pc, #688] ; (8000fe8 ) + 8000d36: f503 745c add.w r4, r3, #880 ; 0x370 + 8000d3a: 4613 mov r3, r2 + 8000d3c: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d3e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d42: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d46: 4aa9 ldr r2, [pc, #676] ; (8000fec ) + 8000d48: f503 7460 add.w r4, r3, #896 ; 0x380 + 8000d4c: 4613 mov r3, r2 + 8000d4e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d50: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d54: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d58: 4aa5 ldr r2, [pc, #660] ; (8000ff0 ) + 8000d5a: f503 7464 add.w r4, r3, #912 ; 0x390 + 8000d5e: 4613 mov r3, r2 + 8000d60: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d62: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d66: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d6a: 4aa2 ldr r2, [pc, #648] ; (8000ff4 ) + 8000d6c: f503 7468 add.w r4, r3, #928 ; 0x3a0 + 8000d70: 4613 mov r3, r2 + 8000d72: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d74: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d78: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d7c: 4a9e ldr r2, [pc, #632] ; (8000ff8 ) + 8000d7e: f503 746c add.w r4, r3, #944 ; 0x3b0 + 8000d82: 4613 mov r3, r2 + 8000d84: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d86: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d8a: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000d8e: 4a9b ldr r2, [pc, #620] ; (8000ffc ) + 8000d90: f503 7470 add.w r4, r3, #960 ; 0x3c0 + 8000d94: 4613 mov r3, r2 + 8000d96: cb0f ldmia r3, {r0, r1, r2, r3} + 8000d98: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000d9c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000da0: 4a97 ldr r2, [pc, #604] ; (8001000 ) + 8000da2: f503 7474 add.w r4, r3, #976 ; 0x3d0 + 8000da6: 4613 mov r3, r2 + 8000da8: cb0f ldmia r3, {r0, r1, r2, r3} + 8000daa: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000dae: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000db2: 4a94 ldr r2, [pc, #592] ; (8001004 ) + 8000db4: f503 7478 add.w r4, r3, #992 ; 0x3e0 + 8000db8: 4613 mov r3, r2 + 8000dba: cb0f ldmia r3, {r0, r1, r2, r3} + 8000dbc: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000dc0: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000dc4: 4a90 ldr r2, [pc, #576] ; (8001008 ) + 8000dc6: f503 747c add.w r4, r3, #1008 ; 0x3f0 + 8000dca: 4613 mov r3, r2 + 8000dcc: cb0f ldmia r3, {r0, r1, r2, r3} + 8000dce: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000dd2: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000dd6: 4a8d ldr r2, [pc, #564] ; (800100c ) + 8000dd8: f503 6480 add.w r4, r3, #1024 ; 0x400 + 8000ddc: 4613 mov r3, r2 + 8000dde: cb0f ldmia r3, {r0, r1, r2, r3} + 8000de0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000de4: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000de8: 4a89 ldr r2, [pc, #548] ; (8001010 ) + 8000dea: f503 6482 add.w r4, r3, #1040 ; 0x410 + 8000dee: 4613 mov r3, r2 + 8000df0: cb0f ldmia r3, {r0, r1, r2, r3} + 8000df2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000df6: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000dfa: 4a86 ldr r2, [pc, #536] ; (8001014 ) + 8000dfc: f503 6484 add.w r4, r3, #1056 ; 0x420 + 8000e00: 4613 mov r3, r2 + 8000e02: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e04: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e08: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e0c: 4a82 ldr r2, [pc, #520] ; (8001018 ) + 8000e0e: f503 6486 add.w r4, r3, #1072 ; 0x430 + 8000e12: 4613 mov r3, r2 + 8000e14: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e16: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e1a: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e1e: 4a7f ldr r2, [pc, #508] ; (800101c ) + 8000e20: f503 6488 add.w r4, r3, #1088 ; 0x440 + 8000e24: 4613 mov r3, r2 + 8000e26: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e28: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e2c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e30: 4a7b ldr r2, [pc, #492] ; (8001020 ) + 8000e32: f503 648a add.w r4, r3, #1104 ; 0x450 + 8000e36: 4613 mov r3, r2 + 8000e38: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e3a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e3e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e42: 4a78 ldr r2, [pc, #480] ; (8001024 ) + 8000e44: f503 648c add.w r4, r3, #1120 ; 0x460 + 8000e48: 4613 mov r3, r2 + 8000e4a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e4c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e50: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e54: 4a74 ldr r2, [pc, #464] ; (8001028 ) + 8000e56: f503 648e add.w r4, r3, #1136 ; 0x470 + 8000e5a: 4613 mov r3, r2 + 8000e5c: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e5e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e62: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e66: 4a71 ldr r2, [pc, #452] ; (800102c ) + 8000e68: f503 6490 add.w r4, r3, #1152 ; 0x480 + 8000e6c: 4613 mov r3, r2 + 8000e6e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e70: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e74: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e78: 4a6d ldr r2, [pc, #436] ; (8001030 ) + 8000e7a: f503 6492 add.w r4, r3, #1168 ; 0x490 + 8000e7e: 4613 mov r3, r2 + 8000e80: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e82: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e86: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e8a: 4a6a ldr r2, [pc, #424] ; (8001034 ) + 8000e8c: f503 6494 add.w r4, r3, #1184 ; 0x4a0 + 8000e90: 4613 mov r3, r2 + 8000e92: cb0f ldmia r3, {r0, r1, r2, r3} + 8000e94: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000e98: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000e9c: 4a66 ldr r2, [pc, #408] ; (8001038 ) + 8000e9e: f503 6496 add.w r4, r3, #1200 ; 0x4b0 + 8000ea2: 4613 mov r3, r2 + 8000ea4: cb0f ldmia r3, {r0, r1, r2, r3} + 8000ea6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000eaa: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000eae: 4a63 ldr r2, [pc, #396] ; (800103c ) + 8000eb0: f503 6498 add.w r4, r3, #1216 ; 0x4c0 + 8000eb4: 4613 mov r3, r2 + 8000eb6: cb0f ldmia r3, {r0, r1, r2, r3} + 8000eb8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ebc: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ec0: 4a5f ldr r2, [pc, #380] ; (8001040 ) + 8000ec2: f503 649a add.w r4, r3, #1232 ; 0x4d0 + 8000ec6: 4613 mov r3, r2 + 8000ec8: cb0f ldmia r3, {r0, r1, r2, r3} + 8000eca: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ece: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ed2: 4a5c ldr r2, [pc, #368] ; (8001044 ) + 8000ed4: f503 649c add.w r4, r3, #1248 ; 0x4e0 + 8000ed8: 4613 mov r3, r2 + 8000eda: cb0f ldmia r3, {r0, r1, r2, r3} + 8000edc: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ee0: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ee4: 4a58 ldr r2, [pc, #352] ; (8001048 ) + 8000ee6: f503 649e add.w r4, r3, #1264 ; 0x4f0 + 8000eea: 4613 mov r3, r2 + 8000eec: cb0f ldmia r3, {r0, r1, r2, r3} + 8000eee: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000ef2: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000ef6: 4a55 ldr r2, [pc, #340] ; (800104c ) + 8000ef8: f503 64a0 add.w r4, r3, #1280 ; 0x500 + 8000efc: 4613 mov r3, r2 + 8000efe: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f00: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f04: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f08: 4a51 ldr r2, [pc, #324] ; (8001050 ) + 8000f0a: f503 64a2 add.w r4, r3, #1296 ; 0x510 + 8000f0e: 4613 mov r3, r2 + 8000f10: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f12: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f16: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f1a: 4a4e ldr r2, [pc, #312] ; (8001054 ) + 8000f1c: f503 64a4 add.w r4, r3, #1312 ; 0x520 + 8000f20: 4613 mov r3, r2 + 8000f22: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f24: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f28: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f2c: 4a4a ldr r2, [pc, #296] ; (8001058 ) + 8000f2e: f503 64a6 add.w r4, r3, #1328 ; 0x530 + 8000f32: 4613 mov r3, r2 + 8000f34: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f36: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f3a: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f3e: 4a47 ldr r2, [pc, #284] ; (800105c ) + 8000f40: f503 64a8 add.w r4, r3, #1344 ; 0x540 + 8000f44: 4613 mov r3, r2 + 8000f46: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f48: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f4c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f50: 4a43 ldr r2, [pc, #268] ; (8001060 ) + 8000f52: f503 64aa add.w r4, r3, #1360 ; 0x550 + 8000f56: 4613 mov r3, r2 + 8000f58: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f5a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f5e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f62: 4a40 ldr r2, [pc, #256] ; (8001064 ) + 8000f64: f503 64ac add.w r4, r3, #1376 ; 0x560 + 8000f68: 4613 mov r3, r2 + 8000f6a: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f6c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f70: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f74: 4a3c ldr r2, [pc, #240] ; (8001068 ) + 8000f76: f503 64ae add.w r4, r3, #1392 ; 0x570 + 8000f7a: 4613 mov r3, r2 + 8000f7c: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f7e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f82: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f86: 4a39 ldr r2, [pc, #228] ; (800106c ) + 8000f88: f503 64b0 add.w r4, r3, #1408 ; 0x580 + 8000f8c: 4613 mov r3, r2 + 8000f8e: cb0f ldmia r3, {r0, r1, r2, r3} + 8000f90: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000f94: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000f98: 4a35 ldr r2, [pc, #212] ; (8001070 ) + 8000f9a: f503 64b2 add.w r4, r3, #1424 ; 0x590 + 8000f9e: 4613 mov r3, r2 + 8000fa0: cb0f ldmia r3, {r0, r1, r2, r3} + 8000fa2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000fa6: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000faa: 4a32 ldr r2, [pc, #200] ; (8001074 ) + 8000fac: f503 64b4 add.w r4, r3, #1440 ; 0x5a0 + 8000fb0: 4613 mov r3, r2 + 8000fb2: cb0f ldmia r3, {r0, r1, r2, r3} + 8000fb4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8000fb8: f507 638b add.w r3, r7, #1112 ; 0x458 + 8000fbc: e05c b.n 8001078 + 8000fbe: bf00 nop + 8000fc0: 200002d0 .word 0x200002d0 + 8000fc4: 200002e0 .word 0x200002e0 + 8000fc8: 200002f0 .word 0x200002f0 + 8000fcc: 20000300 .word 0x20000300 + 8000fd0: 20000310 .word 0x20000310 + 8000fd4: 20000320 .word 0x20000320 + 8000fd8: 20000330 .word 0x20000330 + 8000fdc: 20000340 .word 0x20000340 + 8000fe0: 20000350 .word 0x20000350 + 8000fe4: 20000360 .word 0x20000360 + 8000fe8: 20000370 .word 0x20000370 + 8000fec: 20000380 .word 0x20000380 + 8000ff0: 20000390 .word 0x20000390 + 8000ff4: 200003a0 .word 0x200003a0 + 8000ff8: 200003b0 .word 0x200003b0 + 8000ffc: 200003c0 .word 0x200003c0 + 8001000: 200003d0 .word 0x200003d0 + 8001004: 200003e0 .word 0x200003e0 + 8001008: 200003f0 .word 0x200003f0 + 800100c: 20000400 .word 0x20000400 + 8001010: 20000410 .word 0x20000410 + 8001014: 20000420 .word 0x20000420 + 8001018: 20000430 .word 0x20000430 + 800101c: 20000440 .word 0x20000440 + 8001020: 20000450 .word 0x20000450 + 8001024: 20000460 .word 0x20000460 + 8001028: 20000470 .word 0x20000470 + 800102c: 20000480 .word 0x20000480 + 8001030: 20000490 .word 0x20000490 + 8001034: 200004a0 .word 0x200004a0 + 8001038: 200004b0 .word 0x200004b0 + 800103c: 200004c0 .word 0x200004c0 + 8001040: 200004d0 .word 0x200004d0 + 8001044: 200004e0 .word 0x200004e0 + 8001048: 200004f0 .word 0x200004f0 + 800104c: 20000500 .word 0x20000500 + 8001050: 20000510 .word 0x20000510 + 8001054: 20000520 .word 0x20000520 + 8001058: 20000530 .word 0x20000530 + 800105c: 20000540 .word 0x20000540 + 8001060: 20000550 .word 0x20000550 + 8001064: 20000560 .word 0x20000560 + 8001068: 20000570 .word 0x20000570 + 800106c: 20000580 .word 0x20000580 + 8001070: 20000590 .word 0x20000590 + 8001074: 200005a0 .word 0x200005a0 + 8001078: 4ad0 ldr r2, [pc, #832] ; (80013bc ) + 800107a: f503 64b6 add.w r4, r3, #1456 ; 0x5b0 + 800107e: 4613 mov r3, r2 + 8001080: cb0f ldmia r3, {r0, r1, r2, r3} + 8001082: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001086: f507 638b add.w r3, r7, #1112 ; 0x458 + 800108a: 4acd ldr r2, [pc, #820] ; (80013c0 ) + 800108c: f503 64b8 add.w r4, r3, #1472 ; 0x5c0 + 8001090: 4613 mov r3, r2 + 8001092: cb0f ldmia r3, {r0, r1, r2, r3} + 8001094: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001098: f507 638b add.w r3, r7, #1112 ; 0x458 + 800109c: 4ac9 ldr r2, [pc, #804] ; (80013c4 ) + 800109e: f503 64ba add.w r4, r3, #1488 ; 0x5d0 + 80010a2: 4613 mov r3, r2 + 80010a4: cb0f ldmia r3, {r0, r1, r2, r3} + 80010a6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80010aa: f507 638b add.w r3, r7, #1112 ; 0x458 + 80010ae: 4ac6 ldr r2, [pc, #792] ; (80013c8 ) + 80010b0: f503 64bc add.w r4, r3, #1504 ; 0x5e0 + 80010b4: 4613 mov r3, r2 + 80010b6: cb0f ldmia r3, {r0, r1, r2, r3} + 80010b8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80010bc: f507 638b add.w r3, r7, #1112 ; 0x458 + 80010c0: 4ac2 ldr r2, [pc, #776] ; (80013cc ) + 80010c2: f503 64be add.w r4, r3, #1520 ; 0x5f0 + 80010c6: 4613 mov r3, r2 + 80010c8: cb0f ldmia r3, {r0, r1, r2, r3} + 80010ca: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80010ce: f507 638b add.w r3, r7, #1112 ; 0x458 + 80010d2: 4abf ldr r2, [pc, #764] ; (80013d0 ) + 80010d4: f503 64c0 add.w r4, r3, #1536 ; 0x600 + 80010d8: 4613 mov r3, r2 + 80010da: cb0f ldmia r3, {r0, r1, r2, r3} + 80010dc: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80010e0: f507 638b add.w r3, r7, #1112 ; 0x458 + 80010e4: 4abb ldr r2, [pc, #748] ; (80013d4 ) + 80010e6: f503 64c2 add.w r4, r3, #1552 ; 0x610 + 80010ea: 4613 mov r3, r2 + 80010ec: cb0f ldmia r3, {r0, r1, r2, r3} + 80010ee: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80010f2: f507 638b add.w r3, r7, #1112 ; 0x458 + 80010f6: 4ab8 ldr r2, [pc, #736] ; (80013d8 ) + 80010f8: f503 64c4 add.w r4, r3, #1568 ; 0x620 + 80010fc: 4613 mov r3, r2 + 80010fe: cb0f ldmia r3, {r0, r1, r2, r3} + 8001100: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001104: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001108: 4ab4 ldr r2, [pc, #720] ; (80013dc ) + 800110a: f503 64c6 add.w r4, r3, #1584 ; 0x630 + 800110e: 4613 mov r3, r2 + 8001110: cb0f ldmia r3, {r0, r1, r2, r3} + 8001112: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001116: f507 638b add.w r3, r7, #1112 ; 0x458 + 800111a: 4ab1 ldr r2, [pc, #708] ; (80013e0 ) + 800111c: f503 64c8 add.w r4, r3, #1600 ; 0x640 + 8001120: 4613 mov r3, r2 + 8001122: cb0f ldmia r3, {r0, r1, r2, r3} + 8001124: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001128: f507 638b add.w r3, r7, #1112 ; 0x458 + 800112c: 4aad ldr r2, [pc, #692] ; (80013e4 ) + 800112e: f503 64ca add.w r4, r3, #1616 ; 0x650 + 8001132: 4613 mov r3, r2 + 8001134: cb0f ldmia r3, {r0, r1, r2, r3} + 8001136: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800113a: f507 638b add.w r3, r7, #1112 ; 0x458 + 800113e: 4aaa ldr r2, [pc, #680] ; (80013e8 ) + 8001140: f503 64cc add.w r4, r3, #1632 ; 0x660 + 8001144: 4613 mov r3, r2 + 8001146: cb0f ldmia r3, {r0, r1, r2, r3} + 8001148: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800114c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001150: 4aa6 ldr r2, [pc, #664] ; (80013ec ) + 8001152: f503 64ce add.w r4, r3, #1648 ; 0x670 + 8001156: 4613 mov r3, r2 + 8001158: cb0f ldmia r3, {r0, r1, r2, r3} + 800115a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800115e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001162: 4aa3 ldr r2, [pc, #652] ; (80013f0 ) + 8001164: f503 64d0 add.w r4, r3, #1664 ; 0x680 + 8001168: 4613 mov r3, r2 + 800116a: cb0f ldmia r3, {r0, r1, r2, r3} + 800116c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001170: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001174: 4a9f ldr r2, [pc, #636] ; (80013f4 ) + 8001176: f503 64d2 add.w r4, r3, #1680 ; 0x690 + 800117a: 4613 mov r3, r2 + 800117c: cb0f ldmia r3, {r0, r1, r2, r3} + 800117e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001182: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001186: 4a9c ldr r2, [pc, #624] ; (80013f8 ) + 8001188: f503 64d4 add.w r4, r3, #1696 ; 0x6a0 + 800118c: 4613 mov r3, r2 + 800118e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001190: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001194: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001198: 4a98 ldr r2, [pc, #608] ; (80013fc ) + 800119a: f503 64d6 add.w r4, r3, #1712 ; 0x6b0 + 800119e: 4613 mov r3, r2 + 80011a0: cb0f ldmia r3, {r0, r1, r2, r3} + 80011a2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80011a6: f507 638b add.w r3, r7, #1112 ; 0x458 + 80011aa: 4a95 ldr r2, [pc, #596] ; (8001400 ) + 80011ac: f503 64d8 add.w r4, r3, #1728 ; 0x6c0 + 80011b0: 4613 mov r3, r2 + 80011b2: cb0f ldmia r3, {r0, r1, r2, r3} + 80011b4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80011b8: f507 638b add.w r3, r7, #1112 ; 0x458 + 80011bc: 4a91 ldr r2, [pc, #580] ; (8001404 ) + 80011be: f503 64da add.w r4, r3, #1744 ; 0x6d0 + 80011c2: 4613 mov r3, r2 + 80011c4: cb0f ldmia r3, {r0, r1, r2, r3} + 80011c6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80011ca: f507 638b add.w r3, r7, #1112 ; 0x458 + 80011ce: 4a8e ldr r2, [pc, #568] ; (8001408 ) + 80011d0: f503 64dc add.w r4, r3, #1760 ; 0x6e0 + 80011d4: 4613 mov r3, r2 + 80011d6: cb0f ldmia r3, {r0, r1, r2, r3} + 80011d8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80011dc: f507 638b add.w r3, r7, #1112 ; 0x458 + 80011e0: 4a8a ldr r2, [pc, #552] ; (800140c ) + 80011e2: f503 64de add.w r4, r3, #1776 ; 0x6f0 + 80011e6: 4613 mov r3, r2 + 80011e8: cb0f ldmia r3, {r0, r1, r2, r3} + 80011ea: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80011ee: f507 638b add.w r3, r7, #1112 ; 0x458 + 80011f2: 4a87 ldr r2, [pc, #540] ; (8001410 ) + 80011f4: f503 64e0 add.w r4, r3, #1792 ; 0x700 + 80011f8: 4613 mov r3, r2 + 80011fa: cb0f ldmia r3, {r0, r1, r2, r3} + 80011fc: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001200: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001204: 4a83 ldr r2, [pc, #524] ; (8001414 ) + 8001206: f503 64e2 add.w r4, r3, #1808 ; 0x710 + 800120a: 4613 mov r3, r2 + 800120c: cb0f ldmia r3, {r0, r1, r2, r3} + 800120e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001212: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001216: 4a80 ldr r2, [pc, #512] ; (8001418 ) + 8001218: f503 64e4 add.w r4, r3, #1824 ; 0x720 + 800121c: 4613 mov r3, r2 + 800121e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001220: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001224: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001228: 4a7c ldr r2, [pc, #496] ; (800141c ) + 800122a: f503 64e6 add.w r4, r3, #1840 ; 0x730 + 800122e: 4613 mov r3, r2 + 8001230: cb0f ldmia r3, {r0, r1, r2, r3} + 8001232: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001236: f507 638b add.w r3, r7, #1112 ; 0x458 + 800123a: 4a79 ldr r2, [pc, #484] ; (8001420 ) + 800123c: f503 64e8 add.w r4, r3, #1856 ; 0x740 + 8001240: 4613 mov r3, r2 + 8001242: cb0f ldmia r3, {r0, r1, r2, r3} + 8001244: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001248: f507 638b add.w r3, r7, #1112 ; 0x458 + 800124c: 4a75 ldr r2, [pc, #468] ; (8001424 ) + 800124e: f503 64ea add.w r4, r3, #1872 ; 0x750 + 8001252: 4613 mov r3, r2 + 8001254: cb0f ldmia r3, {r0, r1, r2, r3} + 8001256: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800125a: f507 638b add.w r3, r7, #1112 ; 0x458 + 800125e: 4a72 ldr r2, [pc, #456] ; (8001428 ) + 8001260: f503 64ec add.w r4, r3, #1888 ; 0x760 + 8001264: 4613 mov r3, r2 + 8001266: cb0f ldmia r3, {r0, r1, r2, r3} + 8001268: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800126c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001270: 4a6e ldr r2, [pc, #440] ; (800142c ) + 8001272: f503 64ee add.w r4, r3, #1904 ; 0x770 + 8001276: 4613 mov r3, r2 + 8001278: cb0f ldmia r3, {r0, r1, r2, r3} + 800127a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800127e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001282: 4a6b ldr r2, [pc, #428] ; (8001430 ) + 8001284: f503 64f0 add.w r4, r3, #1920 ; 0x780 + 8001288: 4613 mov r3, r2 + 800128a: cb0f ldmia r3, {r0, r1, r2, r3} + 800128c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001290: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001294: 4a67 ldr r2, [pc, #412] ; (8001434 ) + 8001296: f503 64f2 add.w r4, r3, #1936 ; 0x790 + 800129a: 4613 mov r3, r2 + 800129c: cb0f ldmia r3, {r0, r1, r2, r3} + 800129e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012a2: f507 638b add.w r3, r7, #1112 ; 0x458 + 80012a6: 4a64 ldr r2, [pc, #400] ; (8001438 ) + 80012a8: f503 64f4 add.w r4, r3, #1952 ; 0x7a0 + 80012ac: 4613 mov r3, r2 + 80012ae: cb0f ldmia r3, {r0, r1, r2, r3} + 80012b0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012b4: f507 638b add.w r3, r7, #1112 ; 0x458 + 80012b8: 4a60 ldr r2, [pc, #384] ; (800143c ) + 80012ba: f503 64f6 add.w r4, r3, #1968 ; 0x7b0 + 80012be: 4613 mov r3, r2 + 80012c0: cb0f ldmia r3, {r0, r1, r2, r3} + 80012c2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012c6: f507 638b add.w r3, r7, #1112 ; 0x458 + 80012ca: 4a5d ldr r2, [pc, #372] ; (8001440 ) + 80012cc: f503 64f8 add.w r4, r3, #1984 ; 0x7c0 + 80012d0: 4613 mov r3, r2 + 80012d2: cb0f ldmia r3, {r0, r1, r2, r3} + 80012d4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012d8: f507 638b add.w r3, r7, #1112 ; 0x458 + 80012dc: 4a59 ldr r2, [pc, #356] ; (8001444 ) + 80012de: f503 64fa add.w r4, r3, #2000 ; 0x7d0 + 80012e2: 4613 mov r3, r2 + 80012e4: cb0f ldmia r3, {r0, r1, r2, r3} + 80012e6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012ea: f507 638b add.w r3, r7, #1112 ; 0x458 + 80012ee: 4a56 ldr r2, [pc, #344] ; (8001448 ) + 80012f0: f503 64fc add.w r4, r3, #2016 ; 0x7e0 + 80012f4: 4613 mov r3, r2 + 80012f6: cb0f ldmia r3, {r0, r1, r2, r3} + 80012f8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80012fc: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001300: 4a52 ldr r2, [pc, #328] ; (800144c ) + 8001302: f503 64fe add.w r4, r3, #2032 ; 0x7f0 + 8001306: 4613 mov r3, r2 + 8001308: cb0f ldmia r3, {r0, r1, r2, r3} + 800130a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800130e: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001312: 4a4f ldr r2, [pc, #316] ; (8001450 ) + 8001314: f503 6400 add.w r4, r3, #2048 ; 0x800 + 8001318: 4613 mov r3, r2 + 800131a: cb0f ldmia r3, {r0, r1, r2, r3} + 800131c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001320: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001324: 4a4b ldr r2, [pc, #300] ; (8001454 ) + 8001326: f503 6401 add.w r4, r3, #2064 ; 0x810 + 800132a: 4613 mov r3, r2 + 800132c: cb0f ldmia r3, {r0, r1, r2, r3} + 800132e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001332: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001336: 4a48 ldr r2, [pc, #288] ; (8001458 ) + 8001338: f503 6402 add.w r4, r3, #2080 ; 0x820 + 800133c: 4613 mov r3, r2 + 800133e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001340: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001344: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001348: 4a44 ldr r2, [pc, #272] ; (800145c ) + 800134a: f503 6403 add.w r4, r3, #2096 ; 0x830 + 800134e: 4613 mov r3, r2 + 8001350: cb0f ldmia r3, {r0, r1, r2, r3} + 8001352: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001356: f507 638b add.w r3, r7, #1112 ; 0x458 + 800135a: 4a41 ldr r2, [pc, #260] ; (8001460 ) + 800135c: f503 6404 add.w r4, r3, #2112 ; 0x840 + 8001360: 4613 mov r3, r2 + 8001362: cb0f ldmia r3, {r0, r1, r2, r3} + 8001364: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001368: f507 638b add.w r3, r7, #1112 ; 0x458 + 800136c: 4a3d ldr r2, [pc, #244] ; (8001464 ) + 800136e: f503 6405 add.w r4, r3, #2128 ; 0x850 + 8001372: 4613 mov r3, r2 + 8001374: cb0f ldmia r3, {r0, r1, r2, r3} + 8001376: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800137a: f507 638b add.w r3, r7, #1112 ; 0x458 + 800137e: 4a3a ldr r2, [pc, #232] ; (8001468 ) + 8001380: f503 6406 add.w r4, r3, #2144 ; 0x860 + 8001384: 4613 mov r3, r2 + 8001386: cb0f ldmia r3, {r0, r1, r2, r3} + 8001388: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800138c: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001390: 4a36 ldr r2, [pc, #216] ; (800146c ) + 8001392: f503 6407 add.w r4, r3, #2160 ; 0x870 + 8001396: 4613 mov r3, r2 + 8001398: cb0f ldmia r3, {r0, r1, r2, r3} + 800139a: e884 000f stmia.w r4, {r0, r1, r2, r3} + t1n71, t1n72, t1n73, t1n74, t1n75, t1n76, t1n77, t1n78, t1n79, t1n80, t1n81, t1n82, t1n83, t1n84, + t1n85, t1n86, t1n87, t1n88, t1n89, t1n90, t1n91, t1n92, t1n93, t1n94, t1n95, t1n96, t1n97, t1n98, + t1n99, t1n100,t1n101,t1n102,t1n103,t1n104,t1n105,t1n106,t1n107,t1n108,t1n109,t1n110,t1n111,t1n112, + t1n113,t1n114,t1n115,t1n116,t1n117,t1n118,t1n119,t1n120,t1n121,t1n122,t1n123,t1n124,t1n125,t1n126, + t1n127,t1n128,t1n129,t1n130,t1n131,t1n132,t1n133,t1n134,t1n135,t1n136}; + int song1Size = sizeof(song1)/sizeof(song1[0]); + 800139e: 2389 movs r3, #137 ; 0x89 + 80013a0: f8c7 3cec str.w r3, [r7, #3308] ; 0xcec + // Initialize Super Mario Note Array + Note song2[65]={t2n1, t2n46,t2n2, t2n47,t2n3, t2n4, t2n48,t2n5, t2n49,t2n6, t2n7, t2n50,t2n8, t2n51,t2n9, t2n52, + 80013a4: f107 0348 add.w r3, r7, #72 ; 0x48 + 80013a8: 4a31 ldr r2, [pc, #196] ; (8001470 ) + 80013aa: 461c mov r4, r3 + 80013ac: 4613 mov r3, r2 + 80013ae: cb0f ldmia r3, {r0, r1, r2, r3} + 80013b0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80013b4: f107 0348 add.w r3, r7, #72 ; 0x48 + 80013b8: e05c b.n 8001474 + 80013ba: bf00 nop + 80013bc: 200005b0 .word 0x200005b0 + 80013c0: 200005c0 .word 0x200005c0 + 80013c4: 200005d0 .word 0x200005d0 + 80013c8: 200005e0 .word 0x200005e0 + 80013cc: 200005f0 .word 0x200005f0 + 80013d0: 20000600 .word 0x20000600 + 80013d4: 20000610 .word 0x20000610 + 80013d8: 20000620 .word 0x20000620 + 80013dc: 20000630 .word 0x20000630 + 80013e0: 20000640 .word 0x20000640 + 80013e4: 20000650 .word 0x20000650 + 80013e8: 20000660 .word 0x20000660 + 80013ec: 20000670 .word 0x20000670 + 80013f0: 20000680 .word 0x20000680 + 80013f4: 20000690 .word 0x20000690 + 80013f8: 200006a0 .word 0x200006a0 + 80013fc: 200006b0 .word 0x200006b0 + 8001400: 200006c0 .word 0x200006c0 + 8001404: 200006d0 .word 0x200006d0 + 8001408: 200006e0 .word 0x200006e0 + 800140c: 200006f0 .word 0x200006f0 + 8001410: 20000700 .word 0x20000700 + 8001414: 20000710 .word 0x20000710 + 8001418: 20000720 .word 0x20000720 + 800141c: 20000730 .word 0x20000730 + 8001420: 20000740 .word 0x20000740 + 8001424: 20000750 .word 0x20000750 + 8001428: 20000760 .word 0x20000760 + 800142c: 20000770 .word 0x20000770 + 8001430: 20000780 .word 0x20000780 + 8001434: 20000790 .word 0x20000790 + 8001438: 200007a0 .word 0x200007a0 + 800143c: 200007b0 .word 0x200007b0 + 8001440: 200007c0 .word 0x200007c0 + 8001444: 200007d0 .word 0x200007d0 + 8001448: 200007e0 .word 0x200007e0 + 800144c: 200007f0 .word 0x200007f0 + 8001450: 20000800 .word 0x20000800 + 8001454: 20000810 .word 0x20000810 + 8001458: 20000820 .word 0x20000820 + 800145c: 20000830 .word 0x20000830 + 8001460: 20000840 .word 0x20000840 + 8001464: 20000850 .word 0x20000850 + 8001468: 20000860 .word 0x20000860 + 800146c: 20000870 .word 0x20000870 + 8001470: 20000880 .word 0x20000880 + 8001474: 4acf ldr r2, [pc, #828] ; (80017b4 ) + 8001476: f103 0410 add.w r4, r3, #16 + 800147a: 4613 mov r3, r2 + 800147c: cb0f ldmia r3, {r0, r1, r2, r3} + 800147e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001482: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001486: 4acc ldr r2, [pc, #816] ; (80017b8 ) + 8001488: f103 0420 add.w r4, r3, #32 + 800148c: 4613 mov r3, r2 + 800148e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001490: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001494: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001498: 4ac8 ldr r2, [pc, #800] ; (80017bc ) + 800149a: f103 0430 add.w r4, r3, #48 ; 0x30 + 800149e: 4613 mov r3, r2 + 80014a0: cb0f ldmia r3, {r0, r1, r2, r3} + 80014a2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80014a6: f107 0348 add.w r3, r7, #72 ; 0x48 + 80014aa: 4ac5 ldr r2, [pc, #788] ; (80017c0 ) + 80014ac: f103 0440 add.w r4, r3, #64 ; 0x40 + 80014b0: 4613 mov r3, r2 + 80014b2: cb0f ldmia r3, {r0, r1, r2, r3} + 80014b4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80014b8: f107 0348 add.w r3, r7, #72 ; 0x48 + 80014bc: 4ac1 ldr r2, [pc, #772] ; (80017c4 ) + 80014be: f103 0450 add.w r4, r3, #80 ; 0x50 + 80014c2: 4613 mov r3, r2 + 80014c4: cb0f ldmia r3, {r0, r1, r2, r3} + 80014c6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80014ca: f107 0348 add.w r3, r7, #72 ; 0x48 + 80014ce: 4abe ldr r2, [pc, #760] ; (80017c8 ) + 80014d0: f103 0460 add.w r4, r3, #96 ; 0x60 + 80014d4: 4613 mov r3, r2 + 80014d6: cb0f ldmia r3, {r0, r1, r2, r3} + 80014d8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80014dc: f107 0348 add.w r3, r7, #72 ; 0x48 + 80014e0: 4aba ldr r2, [pc, #744] ; (80017cc ) + 80014e2: f103 0470 add.w r4, r3, #112 ; 0x70 + 80014e6: 4613 mov r3, r2 + 80014e8: cb0f ldmia r3, {r0, r1, r2, r3} + 80014ea: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80014ee: f107 0348 add.w r3, r7, #72 ; 0x48 + 80014f2: 4ab7 ldr r2, [pc, #732] ; (80017d0 ) + 80014f4: f103 0480 add.w r4, r3, #128 ; 0x80 + 80014f8: 4613 mov r3, r2 + 80014fa: cb0f ldmia r3, {r0, r1, r2, r3} + 80014fc: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001500: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001504: 4ab3 ldr r2, [pc, #716] ; (80017d4 ) + 8001506: f103 0490 add.w r4, r3, #144 ; 0x90 + 800150a: 4613 mov r3, r2 + 800150c: cb0f ldmia r3, {r0, r1, r2, r3} + 800150e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001512: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001516: 4ab0 ldr r2, [pc, #704] ; (80017d8 ) + 8001518: f103 04a0 add.w r4, r3, #160 ; 0xa0 + 800151c: 4613 mov r3, r2 + 800151e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001520: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001524: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001528: 4aac ldr r2, [pc, #688] ; (80017dc ) + 800152a: f103 04b0 add.w r4, r3, #176 ; 0xb0 + 800152e: 4613 mov r3, r2 + 8001530: cb0f ldmia r3, {r0, r1, r2, r3} + 8001532: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001536: f107 0348 add.w r3, r7, #72 ; 0x48 + 800153a: 4aa9 ldr r2, [pc, #676] ; (80017e0 ) + 800153c: f103 04c0 add.w r4, r3, #192 ; 0xc0 + 8001540: 4613 mov r3, r2 + 8001542: cb0f ldmia r3, {r0, r1, r2, r3} + 8001544: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001548: f107 0348 add.w r3, r7, #72 ; 0x48 + 800154c: 4aa5 ldr r2, [pc, #660] ; (80017e4 ) + 800154e: f103 04d0 add.w r4, r3, #208 ; 0xd0 + 8001552: 4613 mov r3, r2 + 8001554: cb0f ldmia r3, {r0, r1, r2, r3} + 8001556: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800155a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800155e: 4aa2 ldr r2, [pc, #648] ; (80017e8 ) + 8001560: f103 04e0 add.w r4, r3, #224 ; 0xe0 + 8001564: 4613 mov r3, r2 + 8001566: cb0f ldmia r3, {r0, r1, r2, r3} + 8001568: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800156c: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001570: 4a9e ldr r2, [pc, #632] ; (80017ec ) + 8001572: f103 04f0 add.w r4, r3, #240 ; 0xf0 + 8001576: 4613 mov r3, r2 + 8001578: cb0f ldmia r3, {r0, r1, r2, r3} + 800157a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800157e: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001582: 4a9b ldr r2, [pc, #620] ; (80017f0 ) + 8001584: f503 7480 add.w r4, r3, #256 ; 0x100 + 8001588: 4613 mov r3, r2 + 800158a: cb0f ldmia r3, {r0, r1, r2, r3} + 800158c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001590: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001594: 4a97 ldr r2, [pc, #604] ; (80017f4 ) + 8001596: f503 7488 add.w r4, r3, #272 ; 0x110 + 800159a: 4613 mov r3, r2 + 800159c: cb0f ldmia r3, {r0, r1, r2, r3} + 800159e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015a2: f107 0348 add.w r3, r7, #72 ; 0x48 + 80015a6: 4a94 ldr r2, [pc, #592] ; (80017f8 ) + 80015a8: f503 7490 add.w r4, r3, #288 ; 0x120 + 80015ac: 4613 mov r3, r2 + 80015ae: cb0f ldmia r3, {r0, r1, r2, r3} + 80015b0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015b4: f107 0348 add.w r3, r7, #72 ; 0x48 + 80015b8: 4a90 ldr r2, [pc, #576] ; (80017fc ) + 80015ba: f503 7498 add.w r4, r3, #304 ; 0x130 + 80015be: 4613 mov r3, r2 + 80015c0: cb0f ldmia r3, {r0, r1, r2, r3} + 80015c2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015c6: f107 0348 add.w r3, r7, #72 ; 0x48 + 80015ca: 4a8d ldr r2, [pc, #564] ; (8001800 ) + 80015cc: f503 74a0 add.w r4, r3, #320 ; 0x140 + 80015d0: 4613 mov r3, r2 + 80015d2: cb0f ldmia r3, {r0, r1, r2, r3} + 80015d4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015d8: f107 0348 add.w r3, r7, #72 ; 0x48 + 80015dc: 4a89 ldr r2, [pc, #548] ; (8001804 ) + 80015de: f503 74a8 add.w r4, r3, #336 ; 0x150 + 80015e2: 4613 mov r3, r2 + 80015e4: cb0f ldmia r3, {r0, r1, r2, r3} + 80015e6: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015ea: f107 0348 add.w r3, r7, #72 ; 0x48 + 80015ee: 4a86 ldr r2, [pc, #536] ; (8001808 ) + 80015f0: f503 74b0 add.w r4, r3, #352 ; 0x160 + 80015f4: 4613 mov r3, r2 + 80015f6: cb0f ldmia r3, {r0, r1, r2, r3} + 80015f8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80015fc: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001600: 4a82 ldr r2, [pc, #520] ; (800180c ) + 8001602: f503 74b8 add.w r4, r3, #368 ; 0x170 + 8001606: 4613 mov r3, r2 + 8001608: cb0f ldmia r3, {r0, r1, r2, r3} + 800160a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800160e: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001612: 4a7f ldr r2, [pc, #508] ; (8001810 ) + 8001614: f503 74c0 add.w r4, r3, #384 ; 0x180 + 8001618: 4613 mov r3, r2 + 800161a: cb0f ldmia r3, {r0, r1, r2, r3} + 800161c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001620: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001624: 4a7b ldr r2, [pc, #492] ; (8001814 ) + 8001626: f503 74c8 add.w r4, r3, #400 ; 0x190 + 800162a: 4613 mov r3, r2 + 800162c: cb0f ldmia r3, {r0, r1, r2, r3} + 800162e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001632: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001636: 4a78 ldr r2, [pc, #480] ; (8001818 ) + 8001638: f503 74d0 add.w r4, r3, #416 ; 0x1a0 + 800163c: 4613 mov r3, r2 + 800163e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001640: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001644: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001648: 4a74 ldr r2, [pc, #464] ; (800181c ) + 800164a: f503 74d8 add.w r4, r3, #432 ; 0x1b0 + 800164e: 4613 mov r3, r2 + 8001650: cb0f ldmia r3, {r0, r1, r2, r3} + 8001652: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001656: f107 0348 add.w r3, r7, #72 ; 0x48 + 800165a: 4a71 ldr r2, [pc, #452] ; (8001820 ) + 800165c: f503 74e0 add.w r4, r3, #448 ; 0x1c0 + 8001660: 4613 mov r3, r2 + 8001662: cb0f ldmia r3, {r0, r1, r2, r3} + 8001664: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001668: f107 0348 add.w r3, r7, #72 ; 0x48 + 800166c: 4a6d ldr r2, [pc, #436] ; (8001824 ) + 800166e: f503 74e8 add.w r4, r3, #464 ; 0x1d0 + 8001672: 4613 mov r3, r2 + 8001674: cb0f ldmia r3, {r0, r1, r2, r3} + 8001676: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800167a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800167e: 4a6a ldr r2, [pc, #424] ; (8001828 ) + 8001680: f503 74f0 add.w r4, r3, #480 ; 0x1e0 + 8001684: 4613 mov r3, r2 + 8001686: cb0f ldmia r3, {r0, r1, r2, r3} + 8001688: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800168c: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001690: 4a66 ldr r2, [pc, #408] ; (800182c ) + 8001692: f503 74f8 add.w r4, r3, #496 ; 0x1f0 + 8001696: 4613 mov r3, r2 + 8001698: cb0f ldmia r3, {r0, r1, r2, r3} + 800169a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800169e: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016a2: 4a63 ldr r2, [pc, #396] ; (8001830 ) + 80016a4: f503 7400 add.w r4, r3, #512 ; 0x200 + 80016a8: 4613 mov r3, r2 + 80016aa: cb0f ldmia r3, {r0, r1, r2, r3} + 80016ac: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80016b0: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016b4: 4a5f ldr r2, [pc, #380] ; (8001834 ) + 80016b6: f503 7404 add.w r4, r3, #528 ; 0x210 + 80016ba: 4613 mov r3, r2 + 80016bc: cb0f ldmia r3, {r0, r1, r2, r3} + 80016be: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80016c2: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016c6: 4a5c ldr r2, [pc, #368] ; (8001838 ) + 80016c8: f503 7408 add.w r4, r3, #544 ; 0x220 + 80016cc: 4613 mov r3, r2 + 80016ce: cb0f ldmia r3, {r0, r1, r2, r3} + 80016d0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80016d4: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016d8: 4a58 ldr r2, [pc, #352] ; (800183c ) + 80016da: f503 740c add.w r4, r3, #560 ; 0x230 + 80016de: 4613 mov r3, r2 + 80016e0: cb0f ldmia r3, {r0, r1, r2, r3} + 80016e2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80016e6: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016ea: 4a55 ldr r2, [pc, #340] ; (8001840 ) + 80016ec: f503 7410 add.w r4, r3, #576 ; 0x240 + 80016f0: 4613 mov r3, r2 + 80016f2: cb0f ldmia r3, {r0, r1, r2, r3} + 80016f4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80016f8: f107 0348 add.w r3, r7, #72 ; 0x48 + 80016fc: 4a51 ldr r2, [pc, #324] ; (8001844 ) + 80016fe: f503 7414 add.w r4, r3, #592 ; 0x250 + 8001702: 4613 mov r3, r2 + 8001704: cb0f ldmia r3, {r0, r1, r2, r3} + 8001706: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800170a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800170e: 4a4e ldr r2, [pc, #312] ; (8001848 ) + 8001710: f503 7418 add.w r4, r3, #608 ; 0x260 + 8001714: 4613 mov r3, r2 + 8001716: cb0f ldmia r3, {r0, r1, r2, r3} + 8001718: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800171c: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001720: 4a4a ldr r2, [pc, #296] ; (800184c ) + 8001722: f503 741c add.w r4, r3, #624 ; 0x270 + 8001726: 4613 mov r3, r2 + 8001728: cb0f ldmia r3, {r0, r1, r2, r3} + 800172a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800172e: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001732: 4a47 ldr r2, [pc, #284] ; (8001850 ) + 8001734: f503 7420 add.w r4, r3, #640 ; 0x280 + 8001738: 4613 mov r3, r2 + 800173a: cb0f ldmia r3, {r0, r1, r2, r3} + 800173c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001740: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001744: 4a43 ldr r2, [pc, #268] ; (8001854 ) + 8001746: f503 7424 add.w r4, r3, #656 ; 0x290 + 800174a: 4613 mov r3, r2 + 800174c: cb0f ldmia r3, {r0, r1, r2, r3} + 800174e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001752: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001756: 4a40 ldr r2, [pc, #256] ; (8001858 ) + 8001758: f503 7428 add.w r4, r3, #672 ; 0x2a0 + 800175c: 4613 mov r3, r2 + 800175e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001760: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001764: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001768: 4a3c ldr r2, [pc, #240] ; (800185c ) + 800176a: f503 742c add.w r4, r3, #688 ; 0x2b0 + 800176e: 4613 mov r3, r2 + 8001770: cb0f ldmia r3, {r0, r1, r2, r3} + 8001772: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001776: f107 0348 add.w r3, r7, #72 ; 0x48 + 800177a: 4a39 ldr r2, [pc, #228] ; (8001860 ) + 800177c: f503 7430 add.w r4, r3, #704 ; 0x2c0 + 8001780: 4613 mov r3, r2 + 8001782: cb0f ldmia r3, {r0, r1, r2, r3} + 8001784: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001788: f107 0348 add.w r3, r7, #72 ; 0x48 + 800178c: 4a35 ldr r2, [pc, #212] ; (8001864 ) + 800178e: f503 7434 add.w r4, r3, #720 ; 0x2d0 + 8001792: 4613 mov r3, r2 + 8001794: cb0f ldmia r3, {r0, r1, r2, r3} + 8001796: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800179a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800179e: 4a32 ldr r2, [pc, #200] ; (8001868 ) + 80017a0: f503 7438 add.w r4, r3, #736 ; 0x2e0 + 80017a4: 4613 mov r3, r2 + 80017a6: cb0f ldmia r3, {r0, r1, r2, r3} + 80017a8: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80017ac: f107 0348 add.w r3, r7, #72 ; 0x48 + 80017b0: e05c b.n 800186c + 80017b2: bf00 nop + 80017b4: 20000890 .word 0x20000890 + 80017b8: 200008a0 .word 0x200008a0 + 80017bc: 200008b0 .word 0x200008b0 + 80017c0: 200008c0 .word 0x200008c0 + 80017c4: 200008d0 .word 0x200008d0 + 80017c8: 200008e0 .word 0x200008e0 + 80017cc: 200008f0 .word 0x200008f0 + 80017d0: 20000900 .word 0x20000900 + 80017d4: 20000910 .word 0x20000910 + 80017d8: 20000920 .word 0x20000920 + 80017dc: 20000930 .word 0x20000930 + 80017e0: 20000940 .word 0x20000940 + 80017e4: 20000950 .word 0x20000950 + 80017e8: 20000960 .word 0x20000960 + 80017ec: 20000970 .word 0x20000970 + 80017f0: 20000980 .word 0x20000980 + 80017f4: 20000990 .word 0x20000990 + 80017f8: 200009a0 .word 0x200009a0 + 80017fc: 200009b0 .word 0x200009b0 + 8001800: 200009c0 .word 0x200009c0 + 8001804: 200009d0 .word 0x200009d0 + 8001808: 200009e0 .word 0x200009e0 + 800180c: 200009f0 .word 0x200009f0 + 8001810: 20000a00 .word 0x20000a00 + 8001814: 20000a10 .word 0x20000a10 + 8001818: 20000a20 .word 0x20000a20 + 800181c: 20000a30 .word 0x20000a30 + 8001820: 20000a40 .word 0x20000a40 + 8001824: 20000a50 .word 0x20000a50 + 8001828: 20000a60 .word 0x20000a60 + 800182c: 20000a70 .word 0x20000a70 + 8001830: 20000a80 .word 0x20000a80 + 8001834: 20000a90 .word 0x20000a90 + 8001838: 20000aa0 .word 0x20000aa0 + 800183c: 20000ab0 .word 0x20000ab0 + 8001840: 20000ac0 .word 0x20000ac0 + 8001844: 20000ad0 .word 0x20000ad0 + 8001848: 20000ae0 .word 0x20000ae0 + 800184c: 20000af0 .word 0x20000af0 + 8001850: 20000b00 .word 0x20000b00 + 8001854: 20000b10 .word 0x20000b10 + 8001858: 20000b20 .word 0x20000b20 + 800185c: 20000b30 .word 0x20000b30 + 8001860: 20000b40 .word 0x20000b40 + 8001864: 20000b50 .word 0x20000b50 + 8001868: 20000b60 .word 0x20000b60 + 800186c: 4aa7 ldr r2, [pc, #668] ; (8001b0c ) + 800186e: f503 743c add.w r4, r3, #752 ; 0x2f0 + 8001872: 4613 mov r3, r2 + 8001874: cb0f ldmia r3, {r0, r1, r2, r3} + 8001876: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800187a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800187e: 4aa4 ldr r2, [pc, #656] ; (8001b10 ) + 8001880: f503 7440 add.w r4, r3, #768 ; 0x300 + 8001884: 4613 mov r3, r2 + 8001886: cb0f ldmia r3, {r0, r1, r2, r3} + 8001888: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800188c: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001890: 4aa0 ldr r2, [pc, #640] ; (8001b14 ) + 8001892: f503 7444 add.w r4, r3, #784 ; 0x310 + 8001896: 4613 mov r3, r2 + 8001898: cb0f ldmia r3, {r0, r1, r2, r3} + 800189a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800189e: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018a2: 4a9d ldr r2, [pc, #628] ; (8001b18 ) + 80018a4: f503 7448 add.w r4, r3, #800 ; 0x320 + 80018a8: 4613 mov r3, r2 + 80018aa: cb0f ldmia r3, {r0, r1, r2, r3} + 80018ac: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80018b0: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018b4: 4a99 ldr r2, [pc, #612] ; (8001b1c ) + 80018b6: f503 744c add.w r4, r3, #816 ; 0x330 + 80018ba: 4613 mov r3, r2 + 80018bc: cb0f ldmia r3, {r0, r1, r2, r3} + 80018be: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80018c2: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018c6: 4a96 ldr r2, [pc, #600] ; (8001b20 ) + 80018c8: f503 7450 add.w r4, r3, #832 ; 0x340 + 80018cc: 4613 mov r3, r2 + 80018ce: cb0f ldmia r3, {r0, r1, r2, r3} + 80018d0: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80018d4: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018d8: 4a92 ldr r2, [pc, #584] ; (8001b24 ) + 80018da: f503 7454 add.w r4, r3, #848 ; 0x350 + 80018de: 4613 mov r3, r2 + 80018e0: cb0f ldmia r3, {r0, r1, r2, r3} + 80018e2: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80018e6: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018ea: 4a8f ldr r2, [pc, #572] ; (8001b28 ) + 80018ec: f503 7458 add.w r4, r3, #864 ; 0x360 + 80018f0: 4613 mov r3, r2 + 80018f2: cb0f ldmia r3, {r0, r1, r2, r3} + 80018f4: e884 000f stmia.w r4, {r0, r1, r2, r3} + 80018f8: f107 0348 add.w r3, r7, #72 ; 0x48 + 80018fc: 4a8b ldr r2, [pc, #556] ; (8001b2c ) + 80018fe: f503 745c add.w r4, r3, #880 ; 0x370 + 8001902: 4613 mov r3, r2 + 8001904: cb0f ldmia r3, {r0, r1, r2, r3} + 8001906: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800190a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800190e: 4a88 ldr r2, [pc, #544] ; (8001b30 ) + 8001910: f503 7460 add.w r4, r3, #896 ; 0x380 + 8001914: 4613 mov r3, r2 + 8001916: cb0f ldmia r3, {r0, r1, r2, r3} + 8001918: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800191c: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001920: 4a84 ldr r2, [pc, #528] ; (8001b34 ) + 8001922: f503 7464 add.w r4, r3, #912 ; 0x390 + 8001926: 4613 mov r3, r2 + 8001928: cb0f ldmia r3, {r0, r1, r2, r3} + 800192a: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800192e: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001932: 4a81 ldr r2, [pc, #516] ; (8001b38 ) + 8001934: f503 7468 add.w r4, r3, #928 ; 0x3a0 + 8001938: 4613 mov r3, r2 + 800193a: cb0f ldmia r3, {r0, r1, r2, r3} + 800193c: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001940: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001944: 4a7d ldr r2, [pc, #500] ; (8001b3c ) + 8001946: f503 746c add.w r4, r3, #944 ; 0x3b0 + 800194a: 4613 mov r3, r2 + 800194c: cb0f ldmia r3, {r0, r1, r2, r3} + 800194e: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001952: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001956: 4a7a ldr r2, [pc, #488] ; (8001b40 ) + 8001958: f503 7470 add.w r4, r3, #960 ; 0x3c0 + 800195c: 4613 mov r3, r2 + 800195e: cb0f ldmia r3, {r0, r1, r2, r3} + 8001960: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001964: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001968: 4a76 ldr r2, [pc, #472] ; (8001b44 ) + 800196a: f503 7474 add.w r4, r3, #976 ; 0x3d0 + 800196e: 4613 mov r3, r2 + 8001970: cb0f ldmia r3, {r0, r1, r2, r3} + 8001972: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001976: f107 0348 add.w r3, r7, #72 ; 0x48 + 800197a: 4a73 ldr r2, [pc, #460] ; (8001b48 ) + 800197c: f503 7478 add.w r4, r3, #992 ; 0x3e0 + 8001980: 4613 mov r3, r2 + 8001982: cb0f ldmia r3, {r0, r1, r2, r3} + 8001984: e884 000f stmia.w r4, {r0, r1, r2, r3} + 8001988: f107 0348 add.w r3, r7, #72 ; 0x48 + 800198c: 4a6f ldr r2, [pc, #444] ; (8001b4c ) + 800198e: f503 747c add.w r4, r3, #1008 ; 0x3f0 + 8001992: 4613 mov r3, r2 + 8001994: cb0f ldmia r3, {r0, r1, r2, r3} + 8001996: e884 000f stmia.w r4, {r0, r1, r2, r3} + 800199a: f107 0348 add.w r3, r7, #72 ; 0x48 + 800199e: 4a6c ldr r2, [pc, #432] ; (8001b50 ) + 80019a0: f503 6480 add.w r4, r3, #1024 ; 0x400 + 80019a4: 4613 mov r3, r2 + 80019a6: cb0f ldmia r3, {r0, r1, r2, r3} + 80019a8: e884 000f stmia.w r4, {r0, r1, r2, r3} + t2n10,t2n11,t2n53,t2n12,t2n54,t2n13,t2n14,t2n55,t2n15,t2n56,t2n16,t2n57,t2n17,t2n18,t2n58,t2n19,t2n59, + t2n20,t2n21,t2n60,t2n22,t2n23,t2n24,t2n25,t2n26,t2n27,t2n28,t2n29,t2n30,t2n31,t2n32,t2n33,t2n34,t2n35, + t2n36,t2n37,t2n38,t2n39,t2n40,t2n41,t2n42,t2n43,t2n44,t2n45,t2n61,t2n62,t2n63,t2n64,t2n65}; + int song2Size = sizeof(song2)/sizeof(song2[0]); + 80019ac: 2341 movs r3, #65 ; 0x41 + 80019ae: f8c7 3ce8 str.w r3, [r7, #3304] ; 0xce8 + int data; + static int length; + static int songSelection; + for(;;) { + // Get command from user + fgets(line, 100, stdin); + 80019b2: 4b68 ldr r3, [pc, #416] ; (8001b54 ) + 80019b4: 681b ldr r3, [r3, #0] + 80019b6: 685a ldr r2, [r3, #4] + 80019b8: f107 0314 add.w r3, r7, #20 + 80019bc: 2164 movs r1, #100 ; 0x64 + 80019be: 4618 mov r0, r3 + 80019c0: f000 fb9e bl 8002100 + // Parse only the command for strcmp + sscanf(line, "%s", command); + 80019c4: f107 0208 add.w r2, r7, #8 + 80019c8: f107 0314 add.w r3, r7, #20 + 80019cc: 4962 ldr r1, [pc, #392] ; (8001b58 ) + 80019ce: 4618 mov r0, r3 + 80019d0: f000 fecc bl 800276c + if (!strcmp(command, "help")) { + 80019d4: f107 0308 add.w r3, r7, #8 + 80019d8: 4960 ldr r1, [pc, #384] ; (8001b5c ) + 80019da: 4618 mov r0, r3 + 80019dc: f7fe fc68 bl 80002b0 + 80019e0: 4603 mov r3, r0 + 80019e2: 2b00 cmp r3, #0 + 80019e4: d102 bne.n 80019ec + printHelp(); + 80019e6: f7fe ff0b bl 8000800 + 80019ea: e7e2 b.n 80019b2 + } else if (!strcmp(command, "songs")) { + 80019ec: f107 0308 add.w r3, r7, #8 + 80019f0: 495b ldr r1, [pc, #364] ; (8001b60 ) + 80019f2: 4618 mov r0, r3 + 80019f4: f7fe fc5c bl 80002b0 + 80019f8: 4603 mov r3, r0 + 80019fa: 2b00 cmp r3, #0 + 80019fc: d102 bne.n 8001a04 + songInfo(); + 80019fe: f7fe ff21 bl 8000844 + 8001a02: e7d6 b.n 80019b2 + } else if (!strcmp(command, "rmw")) { + 8001a04: f107 0308 add.w r3, r7, #8 + 8001a08: 4956 ldr r1, [pc, #344] ; (8001b64 ) + 8001a0a: 4618 mov r0, r3 + 8001a0c: f7fe fc50 bl 80002b0 + 8001a10: 4603 mov r3, r0 + 8001a12: 2b00 cmp r3, #0 + 8001a14: d10d bne.n 8001a32 + sscanf(line, "%s %X", command, &address); + 8001a16: 1d3b adds r3, r7, #4 + 8001a18: f107 0208 add.w r2, r7, #8 + 8001a1c: f107 0014 add.w r0, r7, #20 + 8001a20: 4951 ldr r1, [pc, #324] ; (8001b68 ) + 8001a22: f000 fea3 bl 800276c + readMem(address); + 8001a26: 1d3b adds r3, r7, #4 + 8001a28: 681b ldr r3, [r3, #0] + 8001a2a: 4618 mov r0, r3 + 8001a2c: f000 f8b2 bl 8001b94 + 8001a30: e7bf b.n 80019b2 + } else if (!strcmp(command, "wmw")) { + 8001a32: f107 0308 add.w r3, r7, #8 + 8001a36: 494d ldr r1, [pc, #308] ; (8001b6c ) + 8001a38: 4618 mov r0, r3 + 8001a3a: f7fe fc39 bl 80002b0 + 8001a3e: 4603 mov r3, r0 + 8001a40: 2b00 cmp r3, #0 + 8001a42: d114 bne.n 8001a6e + sscanf(line, "%s %X %u", command, &address, &data); + 8001a44: 1d39 adds r1, r7, #4 + 8001a46: f107 0208 add.w r2, r7, #8 + 8001a4a: f107 0014 add.w r0, r7, #20 + 8001a4e: 463b mov r3, r7 + 8001a50: 9300 str r3, [sp, #0] + 8001a52: 460b mov r3, r1 + 8001a54: 4946 ldr r1, [pc, #280] ; (8001b70 ) + 8001a56: f000 fe89 bl 800276c + writeMem(address, data); + 8001a5a: 1d3b adds r3, r7, #4 + 8001a5c: 681b ldr r3, [r3, #0] + 8001a5e: 461a mov r2, r3 + 8001a60: 463b mov r3, r7 + 8001a62: 681b ldr r3, [r3, #0] + 8001a64: 4619 mov r1, r3 + 8001a66: 4610 mov r0, r2 + 8001a68: f000 f8a8 bl 8001bbc + 8001a6c: e7a1 b.n 80019b2 + } else if (!strcmp(command, "dm")) { + 8001a6e: f107 0308 add.w r3, r7, #8 + 8001a72: 4940 ldr r1, [pc, #256] ; (8001b74 ) + 8001a74: 4618 mov r0, r3 + 8001a76: f7fe fc1b bl 80002b0 + 8001a7a: 4603 mov r3, r0 + 8001a7c: 2b00 cmp r3, #0 + 8001a7e: d113 bne.n 8001aa8 + sscanf(line, "%s %X %u", command, &address, &length); + 8001a80: 1d3b adds r3, r7, #4 + 8001a82: f107 0208 add.w r2, r7, #8 + 8001a86: f107 0014 add.w r0, r7, #20 + 8001a8a: 493b ldr r1, [pc, #236] ; (8001b78 ) + 8001a8c: 9100 str r1, [sp, #0] + 8001a8e: 4938 ldr r1, [pc, #224] ; (8001b70 ) + 8001a90: f000 fe6c bl 800276c + dumpMem(address, length); + 8001a94: 1d3b adds r3, r7, #4 + 8001a96: 681b ldr r3, [r3, #0] + 8001a98: 461a mov r2, r3 + 8001a9a: 4b37 ldr r3, [pc, #220] ; (8001b78 ) + 8001a9c: 681b ldr r3, [r3, #0] + 8001a9e: 4619 mov r1, r3 + 8001aa0: 4610 mov r0, r2 + 8001aa2: f000 f8a1 bl 8001be8 + 8001aa6: e784 b.n 80019b2 + } else if (!strcmp(command, "ps")) { + 8001aa8: f107 0308 add.w r3, r7, #8 + 8001aac: 4933 ldr r1, [pc, #204] ; (8001b7c ) + 8001aae: 4618 mov r0, r3 + 8001ab0: f7fe fbfe bl 80002b0 + 8001ab4: 4603 mov r3, r0 + 8001ab6: 2b00 cmp r3, #0 + 8001ab8: d124 bne.n 8001b04 + sscanf(line, "%s %u", command, &songSelection); + 8001aba: f107 0208 add.w r2, r7, #8 + 8001abe: f107 0014 add.w r0, r7, #20 + 8001ac2: 4b2f ldr r3, [pc, #188] ; (8001b80 ) + 8001ac4: 492f ldr r1, [pc, #188] ; (8001b84 ) + 8001ac6: f000 fe51 bl 800276c + switch(songSelection) { + 8001aca: 4b2d ldr r3, [pc, #180] ; (8001b80 ) + 8001acc: 681b ldr r3, [r3, #0] + 8001ace: 2b01 cmp r3, #1 + 8001ad0: d002 beq.n 8001ad8 + 8001ad2: 2b02 cmp r3, #2 + 8001ad4: d00b beq.n 8001aee + case 2: + printf("Playing Super Mario Bros Flagpole Fanfare\n\r"); + play_song(&song2[0], song2Size); + break; + default: + break; + 8001ad6: e018 b.n 8001b0a + printf("Playing Imperial March\n\r"); + 8001ad8: 482b ldr r0, [pc, #172] ; (8001b88 ) + 8001ada: f000 fcc5 bl 8002468 + play_song(&song1[0], song1Size); + 8001ade: f507 638b add.w r3, r7, #1112 ; 0x458 + 8001ae2: f8d7 1cec ldr.w r1, [r7, #3308] ; 0xcec + 8001ae6: 4618 mov r0, r3 + 8001ae8: f000 f962 bl 8001db0 + break; + 8001aec: e00d b.n 8001b0a + printf("Playing Super Mario Bros Flagpole Fanfare\n\r"); + 8001aee: 4827 ldr r0, [pc, #156] ; (8001b8c ) + 8001af0: f000 fcba bl 8002468 + play_song(&song2[0], song2Size); + 8001af4: f107 0348 add.w r3, r7, #72 ; 0x48 + 8001af8: f8d7 1ce8 ldr.w r1, [r7, #3304] ; 0xce8 + 8001afc: 4618 mov r0, r3 + 8001afe: f000 f957 bl 8001db0 + break; + 8001b02: e002 b.n 8001b0a + } + } else { + printf("Invalid input, type 'help' for instructions\n\r"); + 8001b04: 4822 ldr r0, [pc, #136] ; (8001b90 ) + 8001b06: f000 fcaf bl 8002468 + fgets(line, 100, stdin); + 8001b0a: e752 b.n 80019b2 + 8001b0c: 20000b70 .word 0x20000b70 + 8001b10: 20000b80 .word 0x20000b80 + 8001b14: 20000b90 .word 0x20000b90 + 8001b18: 20000ba0 .word 0x20000ba0 + 8001b1c: 20000bb0 .word 0x20000bb0 + 8001b20: 20000bc0 .word 0x20000bc0 + 8001b24: 20000bd0 .word 0x20000bd0 + 8001b28: 20000be0 .word 0x20000be0 + 8001b2c: 20000bf0 .word 0x20000bf0 + 8001b30: 20000c00 .word 0x20000c00 + 8001b34: 20000c10 .word 0x20000c10 + 8001b38: 20000c20 .word 0x20000c20 + 8001b3c: 20000c30 .word 0x20000c30 + 8001b40: 20000c40 .word 0x20000c40 + 8001b44: 20000c50 .word 0x20000c50 + 8001b48: 20000c60 .word 0x20000c60 + 8001b4c: 20000c70 .word 0x20000c70 + 8001b50: 20000c80 .word 0x20000c80 + 8001b54: 20000c90 .word 0x20000c90 + 8001b58: 08003fa4 .word 0x08003fa4 + 8001b5c: 08003fa8 .word 0x08003fa8 + 8001b60: 08003fb0 .word 0x08003fb0 + 8001b64: 08003fb8 .word 0x08003fb8 + 8001b68: 08003fbc .word 0x08003fbc + 8001b6c: 08003fc4 .word 0x08003fc4 + 8001b70: 08003fc8 .word 0x08003fc8 + 8001b74: 08003fd4 .word 0x08003fd4 + 8001b78: 20000d10 .word 0x20000d10 + 8001b7c: 08003fd8 .word 0x08003fd8 + 8001b80: 20000d14 .word 0x20000d14 + 8001b84: 08003fdc .word 0x08003fdc + 8001b88: 08003fe4 .word 0x08003fe4 + 8001b8c: 08004000 .word 0x08004000 + 8001b90: 0800402c .word 0x0800402c + +08001b94 : +void initMemConsole() { + init_usart2(57600, F_CPU); + printf("Memory Console Initialized! Type 'help' for info.\n\r"); +} + +void readMem(uint32_t addr) { + 8001b94: b580 push {r7, lr} + 8001b96: b084 sub sp, #16 + 8001b98: af00 add r7, sp, #0 + 8001b9a: 6078 str r0, [r7, #4] + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + 8001b9c: 687b ldr r3, [r7, #4] + 8001b9e: 60fb str r3, [r7, #12] + // Formatted print with both hex and decimal values + printf("Memory Value at %#08x\n\r" + 8001ba0: 68fb ldr r3, [r7, #12] + 8001ba2: 681a ldr r2, [r3, #0] + 8001ba4: 68fb ldr r3, [r7, #12] + 8001ba6: 681b ldr r3, [r3, #0] + 8001ba8: 6879 ldr r1, [r7, #4] + 8001baa: 4803 ldr r0, [pc, #12] ; (8001bb8 ) + 8001bac: f000 fc5c bl 8002468 + "Hex: %#08x\n\r" + "Decimal: %d\n\r", addr, *memPtr, *memPtr); + return; + 8001bb0: bf00 nop +} + 8001bb2: 3710 adds r7, #16 + 8001bb4: 46bd mov sp, r7 + 8001bb6: bd80 pop {r7, pc} + 8001bb8: 08004090 .word 0x08004090 + +08001bbc : + +void writeMem(uint32_t addr, uint32_t data) { + 8001bbc: b580 push {r7, lr} + 8001bbe: b084 sub sp, #16 + 8001bc0: af00 add r7, sp, #0 + 8001bc2: 6078 str r0, [r7, #4] + 8001bc4: 6039 str r1, [r7, #0] + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + 8001bc6: 687b ldr r3, [r7, #4] + 8001bc8: 60fb str r3, [r7, #12] + // Write data + *memPtr = data; + 8001bca: 68fb ldr r3, [r7, #12] + 8001bcc: 683a ldr r2, [r7, #0] + 8001bce: 601a str r2, [r3, #0] + // Confirmation printout showing the new value and address + printf("Value written at %#08x: %u \n\r", addr, data); + 8001bd0: 683a ldr r2, [r7, #0] + 8001bd2: 6879 ldr r1, [r7, #4] + 8001bd4: 4803 ldr r0, [pc, #12] ; (8001be4 ) + 8001bd6: f000 fc47 bl 8002468 + return; + 8001bda: bf00 nop +} + 8001bdc: 3710 adds r7, #16 + 8001bde: 46bd mov sp, r7 + 8001be0: bd80 pop {r7, pc} + 8001be2: bf00 nop + 8001be4: 080040c4 .word 0x080040c4 + +08001be8 : + + +void dumpMem(uint32_t addr, int length) { + 8001be8: b580 push {r7, lr} + 8001bea: b084 sub sp, #16 + 8001bec: af00 add r7, sp, #0 + 8001bee: 6078 str r0, [r7, #4] + 8001bf0: 6039 str r1, [r7, #0] + // Set length to default value if length is negative + // (No limit or protection for large, overflow values yet) + if(length <= 0) { + 8001bf2: 683b ldr r3, [r7, #0] + 8001bf4: 2b00 cmp r3, #0 + 8001bf6: dc04 bgt.n 8001c02 + length = 16; + 8001bf8: 2310 movs r3, #16 + 8001bfa: 603b str r3, [r7, #0] + printf("Length set to default! (16)\n\r"); + 8001bfc: 4813 ldr r0, [pc, #76] ; (8001c4c ) + 8001bfe: f000 fc33 bl 8002468 + } + // Assign and casts a new int pointer the value of addr + uint8_t * memPtr = (uint8_t *)addr; + 8001c02: 687b ldr r3, [r7, #4] + 8001c04: 60fb str r3, [r7, #12] + // Loop that executes each read and print operation + for(int i=0 ; i < length ; i++) { + 8001c06: 2300 movs r3, #0 + 8001c08: 60bb str r3, [r7, #8] + 8001c0a: e014 b.n 8001c36 + // Print newline and memory location every 16 bytes + if((i % 16) == 0) { + 8001c0c: 68bb ldr r3, [r7, #8] + 8001c0e: f003 030f and.w r3, r3, #15 + 8001c12: 2b00 cmp r3, #0 + 8001c14: d103 bne.n 8001c1e + printf("\n\r%p:", memPtr); + 8001c16: 68f9 ldr r1, [r7, #12] + 8001c18: 480d ldr r0, [pc, #52] ; (8001c50 ) + 8001c1a: f000 fc25 bl 8002468 + } + // Print each byte + printf(" %02X", *memPtr); + 8001c1e: 68fb ldr r3, [r7, #12] + 8001c20: 781b ldrb r3, [r3, #0] + 8001c22: 4619 mov r1, r3 + 8001c24: 480b ldr r0, [pc, #44] ; (8001c54 ) + 8001c26: f000 fc1f bl 8002468 + // Iterate pointer to next byte + memPtr++; + 8001c2a: 68fb ldr r3, [r7, #12] + 8001c2c: 3301 adds r3, #1 + 8001c2e: 60fb str r3, [r7, #12] + for(int i=0 ; i < length ; i++) { + 8001c30: 68bb ldr r3, [r7, #8] + 8001c32: 3301 adds r3, #1 + 8001c34: 60bb str r3, [r7, #8] + 8001c36: 68ba ldr r2, [r7, #8] + 8001c38: 683b ldr r3, [r7, #0] + 8001c3a: 429a cmp r2, r3 + 8001c3c: dbe6 blt.n 8001c0c + } + printf("\n\r"); + 8001c3e: 4806 ldr r0, [pc, #24] ; (8001c58 ) + 8001c40: f000 fc12 bl 8002468 + return; + 8001c44: bf00 nop +} + 8001c46: 3710 adds r7, #16 + 8001c48: 46bd mov sp, r7 + 8001c4a: bd80 pop {r7, pc} + 8001c4c: 080040e4 .word 0x080040e4 + 8001c50: 08004104 .word 0x08004104 + 8001c54: 0800410c .word 0x0800410c + 8001c58: 08004114 .word 0x08004114 + +08001c5c : +#include +#include "piezoSpeaker.h" +#include "delay.h" + + +void piezo_init(){ + 8001c5c: b480 push {r7} + 8001c5e: af00 add r7, sp, #0 + + //enable GPIOB and Timer 3 RCC + *RCC_AHB1ENR |= (1<) + 8001c62: 681b ldr r3, [r3, #0] + 8001c64: 4a1a ldr r2, [pc, #104] ; (8001cd0 ) + 8001c66: f043 0302 orr.w r3, r3, #2 + 8001c6a: 6013 str r3, [r2, #0] + *RCC_APB1ENR |= (1<) + 8001c6e: 681b ldr r3, [r3, #0] + 8001c70: 4a18 ldr r2, [pc, #96] ; (8001cd4 ) + 8001c72: f043 0302 orr.w r3, r3, #2 + 8001c76: 6013 str r3, [r2, #0] + + //set GPIO B to alternate function (0b10<<9) + //clears the two bits and then set it + *GPIOB_MODER = (*GPIOB_MODER&~(0b11<<8)) | (PB4_AF_V<<8); + 8001c78: 4b17 ldr r3, [pc, #92] ; (8001cd8 ) + 8001c7a: 681b ldr r3, [r3, #0] + 8001c7c: f423 7340 bic.w r3, r3, #768 ; 0x300 + 8001c80: 4a15 ldr r2, [pc, #84] ; (8001cd8 ) + 8001c82: f443 7300 orr.w r3, r3, #512 ; 0x200 + 8001c86: 6013 str r3, [r2, #0] + + //set alternate function low register to TIM3 + *GPIOB_AFRL |= (1<) + 8001c8a: 681b ldr r3, [r3, #0] + 8001c8c: 4a13 ldr r2, [pc, #76] ; (8001cdc ) + 8001c8e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8001c92: 6013 str r3, [r2, #0] + + //Configure capture/compare mode register configuration + //to enable preload and set to pwm + *TIM3_CCMR1 |= OC1M_PWM2; + 8001c94: 4b12 ldr r3, [pc, #72] ; (8001ce0 ) + 8001c96: 681b ldr r3, [r3, #0] + 8001c98: 4a11 ldr r2, [pc, #68] ; (8001ce0 ) + 8001c9a: f043 0370 orr.w r3, r3, #112 ; 0x70 + 8001c9e: 6013 str r3, [r2, #0] + *TIM3_CCMR1 |= (1<) + 8001ca2: 681b ldr r3, [r3, #0] + 8001ca4: 4a0e ldr r2, [pc, #56] ; (8001ce0 ) + 8001ca6: f043 0308 orr.w r3, r3, #8 + 8001caa: 6013 str r3, [r2, #0] + + //Configure CCER to enable timer 3 as output capture + *TIM3_CCER |= CCER_CC1E; + 8001cac: 4b0d ldr r3, [pc, #52] ; (8001ce4 ) + 8001cae: 681b ldr r3, [r3, #0] + 8001cb0: 4a0c ldr r2, [pc, #48] ; (8001ce4 ) + 8001cb2: f043 0301 orr.w r3, r3, #1 + 8001cb6: 6013 str r3, [r2, #0] + + //Configure control register to enable preload + *TIM3_CR1 |= (1<) + 8001cba: 681b ldr r3, [r3, #0] + 8001cbc: 4a0a ldr r2, [pc, #40] ; (8001ce8 ) + 8001cbe: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8001cc2: 6013 str r3, [r2, #0] + +} + 8001cc4: bf00 nop + 8001cc6: 46bd mov sp, r7 + 8001cc8: f85d 7b04 ldr.w r7, [sp], #4 + 8001ccc: 4770 bx lr + 8001cce: bf00 nop + 8001cd0: 40023830 .word 0x40023830 + 8001cd4: 40023840 .word 0x40023840 + 8001cd8: 40020400 .word 0x40020400 + 8001cdc: 40020420 .word 0x40020420 + 8001ce0: 40000418 .word 0x40000418 + 8001ce4: 40000420 .word 0x40000420 + 8001ce8: 40000400 .word 0x40000400 + 8001cec: 00000000 .word 0x00000000 + +08001cf0 : + + +void play_note(double frequency, double duration){ + 8001cf0: b590 push {r4, r7, lr} + 8001cf2: b087 sub sp, #28 + 8001cf4: af00 add r7, sp, #0 + 8001cf6: ed87 0b02 vstr d0, [r7, #8] + 8001cfa: ed87 1b00 vstr d1, [r7] + + + *TIM3_PSC = 15; + 8001cfe: 4b26 ldr r3, [pc, #152] ; (8001d98 ) + 8001d00: 220f movs r2, #15 + 8001d02: 601a str r2, [r3, #0] + //Divisor controls pitch + *TIM3_ARR = mil/frequency; + 8001d04: e9d7 2302 ldrd r2, r3, [r7, #8] + 8001d08: a121 add r1, pc, #132 ; (adr r1, 8001d90 ) + 8001d0a: e9d1 0100 ldrd r0, r1, [r1] + 8001d0e: f7fe fc0b bl 8000528 <__aeabi_ddiv> + 8001d12: 4602 mov r2, r0 + 8001d14: 460b mov r3, r1 + 8001d16: 4c21 ldr r4, [pc, #132] ; (8001d9c ) + 8001d18: 4610 mov r0, r2 + 8001d1a: 4619 mov r1, r3 + 8001d1c: f7fe fcec bl 80006f8 <__aeabi_d2uiz> + 8001d20: 4603 mov r3, r0 + 8001d22: 6023 str r3, [r4, #0] + + //Loudness (Smaller dividend = louder sound) + double freq = frequency/10; + 8001d24: f04f 0200 mov.w r2, #0 + 8001d28: 4b1d ldr r3, [pc, #116] ; (8001da0 ) + 8001d2a: e9d7 0102 ldrd r0, r1, [r7, #8] + 8001d2e: f7fe fbfb bl 8000528 <__aeabi_ddiv> + 8001d32: 4602 mov r2, r0 + 8001d34: 460b mov r3, r1 + 8001d36: e9c7 2304 strd r2, r3, [r7, #16] + + //clear ccr1 + *TIM3_CCR1 = (*TIM3_CCR1&~(0xFFFF)); + 8001d3a: 4b1a ldr r3, [pc, #104] ; (8001da4 ) + 8001d3c: 681b ldr r3, [r3, #0] + 8001d3e: 4a19 ldr r2, [pc, #100] ; (8001da4 ) + 8001d40: 0c1b lsrs r3, r3, #16 + 8001d42: 041b lsls r3, r3, #16 + 8001d44: 6013 str r3, [r2, #0] + *TIM3_CCR1 = freq; + 8001d46: 4c17 ldr r4, [pc, #92] ; (8001da4 ) + 8001d48: e9d7 0104 ldrd r0, r1, [r7, #16] + 8001d4c: f7fe fcd4 bl 80006f8 <__aeabi_d2uiz> + 8001d50: 4603 mov r3, r0 + 8001d52: 6023 str r3, [r4, #0] + + //set EGR (accept only a byte of info so steps) + *TIM3_EGR |= EGR_UG; + 8001d54: 4b14 ldr r3, [pc, #80] ; (8001da8 ) + 8001d56: 681b ldr r3, [r3, #0] + 8001d58: 4a13 ldr r2, [pc, #76] ; (8001da8 ) + 8001d5a: f043 0301 orr.w r3, r3, #1 + 8001d5e: 6013 str r3, [r2, #0] + + //~~~Plays the notes + //Enables enable bit control register + *TIM3_CR1 |= 1; + 8001d60: 4b12 ldr r3, [pc, #72] ; (8001dac ) + 8001d62: 681b ldr r3, [r3, #0] + 8001d64: 4a11 ldr r2, [pc, #68] ; (8001dac ) + 8001d66: f043 0301 orr.w r3, r3, #1 + 8001d6a: 6013 str r3, [r2, #0] + //delay that leaves the speaker on for desired amount of time + delay_1ms(duration); + 8001d6c: e9d7 0100 ldrd r0, r1, [r7] + 8001d70: f7fe fcc2 bl 80006f8 <__aeabi_d2uiz> + 8001d74: 4603 mov r3, r0 + 8001d76: 4618 mov r0, r3 + 8001d78: f7fe fcde bl 8000738 + //Disables enable bit + *TIM3_CR1 &= ~1; + 8001d7c: 4b0b ldr r3, [pc, #44] ; (8001dac ) + 8001d7e: 681b ldr r3, [r3, #0] + 8001d80: 4a0a ldr r2, [pc, #40] ; (8001dac ) + 8001d82: f023 0301 bic.w r3, r3, #1 + 8001d86: 6013 str r3, [r2, #0] +} + 8001d88: bf00 nop + 8001d8a: 371c adds r7, #28 + 8001d8c: 46bd mov sp, r7 + 8001d8e: bd90 pop {r4, r7, pc} + 8001d90: 00000000 .word 0x00000000 + 8001d94: 412e8480 .word 0x412e8480 + 8001d98: 40000428 .word 0x40000428 + 8001d9c: 4000042c .word 0x4000042c + 8001da0: 40240000 .word 0x40240000 + 8001da4: 40000434 .word 0x40000434 + 8001da8: 40000414 .word 0x40000414 + 8001dac: 40000400 .word 0x40000400 + +08001db0 : + + +void play_song(Note *song, int size){ + 8001db0: b580 push {r7, lr} + 8001db2: b084 sub sp, #16 + 8001db4: af00 add r7, sp, #0 + 8001db6: 6078 str r0, [r7, #4] + 8001db8: 6039 str r1, [r7, #0] + for(int i = 0; i < size; i++){ + 8001dba: 2300 movs r3, #0 + 8001dbc: 60fb str r3, [r7, #12] + 8001dbe: e018 b.n 8001df2 + play_note(song[i].freq, song[i].duration); + 8001dc0: 68fb ldr r3, [r7, #12] + 8001dc2: 011b lsls r3, r3, #4 + 8001dc4: 687a ldr r2, [r7, #4] + 8001dc6: 4413 add r3, r2 + 8001dc8: ed93 7b00 vldr d7, [r3] + 8001dcc: 68fb ldr r3, [r7, #12] + 8001dce: 011b lsls r3, r3, #4 + 8001dd0: 687a ldr r2, [r7, #4] + 8001dd2: 4413 add r3, r2 + 8001dd4: ed93 6b02 vldr d6, [r3, #8] + 8001dd8: eeb0 1a46 vmov.f32 s2, s12 + 8001ddc: eef0 1a66 vmov.f32 s3, s13 + 8001de0: eeb0 0a47 vmov.f32 s0, s14 + 8001de4: eef0 0a67 vmov.f32 s1, s15 + 8001de8: f7ff ff82 bl 8001cf0 + for(int i = 0; i < size; i++){ + 8001dec: 68fb ldr r3, [r7, #12] + 8001dee: 3301 adds r3, #1 + 8001df0: 60fb str r3, [r7, #12] + 8001df2: 68fa ldr r2, [r7, #12] + 8001df4: 683b ldr r3, [r7, #0] + 8001df6: 429a cmp r2, r3 + 8001df8: dbe2 blt.n 8001dc0 + } +} + 8001dfa: bf00 nop + 8001dfc: bf00 nop + 8001dfe: 3710 adds r7, #16 + 8001e00: 46bd mov sp, r7 + 8001e02: bd80 pop {r7, pc} + +08001e04 <_read>: + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + 8001e04: b580 push {r7, lr} + 8001e06: b086 sub sp, #24 + 8001e08: af00 add r7, sp, #0 + 8001e0a: 60f8 str r0, [r7, #12] + 8001e0c: 60b9 str r1, [r7, #8] + 8001e0e: 607a str r2, [r7, #4] + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + 8001e10: 2300 movs r3, #0 + 8001e12: 613b str r3, [r7, #16] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8001e14: 2300 movs r3, #0 + 8001e16: 617b str r3, [r7, #20] + 8001e18: e012 b.n 8001e40 <_read+0x3c> + { + //*ptr++ = __io_getchar(); + byteCnt++; + 8001e1a: 693b ldr r3, [r7, #16] + 8001e1c: 3301 adds r3, #1 + 8001e1e: 613b str r3, [r7, #16] + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + 8001e20: f000 f836 bl 8001e90 + 8001e24: 4603 mov r3, r0 + 8001e26: 461a mov r2, r3 + 8001e28: 68bb ldr r3, [r7, #8] + 8001e2a: 701a strb r2, [r3, #0] + if(*ptr == '\n') break; + 8001e2c: 68bb ldr r3, [r7, #8] + 8001e2e: 781b ldrb r3, [r3, #0] + 8001e30: 2b0a cmp r3, #10 + 8001e32: d00a beq.n 8001e4a <_read+0x46> + ptr++; + 8001e34: 68bb ldr r3, [r7, #8] + 8001e36: 3301 adds r3, #1 + 8001e38: 60bb str r3, [r7, #8] + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8001e3a: 697b ldr r3, [r7, #20] + 8001e3c: 3301 adds r3, #1 + 8001e3e: 617b str r3, [r7, #20] + 8001e40: 697a ldr r2, [r7, #20] + 8001e42: 687b ldr r3, [r7, #4] + 8001e44: 429a cmp r2, r3 + 8001e46: dbe8 blt.n 8001e1a <_read+0x16> + 8001e48: e000 b.n 8001e4c <_read+0x48> + if(*ptr == '\n') break; + 8001e4a: bf00 nop + } + + //return len; + return byteCnt; // Return byte count + 8001e4c: 693b ldr r3, [r7, #16] +} + 8001e4e: 4618 mov r0, r3 + 8001e50: 3718 adds r7, #24 + 8001e52: 46bd mov sp, r7 + 8001e54: bd80 pop {r7, pc} + +08001e56 <_write>: + +int _write(int file, char *ptr, int len) +{ + 8001e56: b580 push {r7, lr} + 8001e58: b086 sub sp, #24 + 8001e5a: af00 add r7, sp, #0 + 8001e5c: 60f8 str r0, [r7, #12] + 8001e5e: 60b9 str r1, [r7, #8] + 8001e60: 607a str r2, [r7, #4] + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8001e62: 2300 movs r3, #0 + 8001e64: 617b str r3, [r7, #20] + 8001e66: e009 b.n 8001e7c <_write+0x26> + { + usart2_putch(*ptr++); + 8001e68: 68bb ldr r3, [r7, #8] + 8001e6a: 1c5a adds r2, r3, #1 + 8001e6c: 60ba str r2, [r7, #8] + 8001e6e: 781b ldrb r3, [r3, #0] + 8001e70: 4618 mov r0, r3 + 8001e72: f000 f82f bl 8001ed4 + for (DataIdx = 0; DataIdx < len; DataIdx++) + 8001e76: 697b ldr r3, [r7, #20] + 8001e78: 3301 adds r3, #1 + 8001e7a: 617b str r3, [r7, #20] + 8001e7c: 697a ldr r2, [r7, #20] + 8001e7e: 687b ldr r3, [r7, #4] + 8001e80: 429a cmp r2, r3 + 8001e82: dbf1 blt.n 8001e68 <_write+0x12> + } + return len; + 8001e84: 687b ldr r3, [r7, #4] +} + 8001e86: 4618 mov r0, r3 + 8001e88: 3718 adds r7, #24 + 8001e8a: 46bd mov sp, r7 + 8001e8c: bd80 pop {r7, pc} + ... + +08001e90 : + + + +char usart2_getch(){ + 8001e90: b580 push {r7, lr} + 8001e92: b082 sub sp, #8 + 8001e94: af00 add r7, sp, #0 + char c; + while((*(USART_SR)&(1<) + 8001e9a: 681b ldr r3, [r3, #0] + 8001e9c: f003 0320 and.w r3, r3, #32 + 8001ea0: 2b20 cmp r3, #32 + 8001ea2: d1f9 bne.n 8001e98 + c = ((char) *USART_DR); // Read character from usart + 8001ea4: 4b0a ldr r3, [pc, #40] ; (8001ed0 ) + 8001ea6: 681b ldr r3, [r3, #0] + 8001ea8: 71fb strb r3, [r7, #7] + usart2_putch(c); // Echo back + 8001eaa: 79fb ldrb r3, [r7, #7] + 8001eac: 4618 mov r0, r3 + 8001eae: f000 f811 bl 8001ed4 + + if (c == '\r'){ // If character is CR + 8001eb2: 79fb ldrb r3, [r7, #7] + 8001eb4: 2b0d cmp r3, #13 + 8001eb6: d104 bne.n 8001ec2 + usart2_putch('\n'); // send it + 8001eb8: 200a movs r0, #10 + 8001eba: f000 f80b bl 8001ed4 + c = '\n'; // Return LF. fgets is terminated by LF + 8001ebe: 230a movs r3, #10 + 8001ec0: 71fb strb r3, [r7, #7] + } + + return c; + 8001ec2: 79fb ldrb r3, [r7, #7] +} + 8001ec4: 4618 mov r0, r3 + 8001ec6: 3708 adds r7, #8 + 8001ec8: 46bd mov sp, r7 + 8001eca: bd80 pop {r7, pc} + 8001ecc: 40004400 .word 0x40004400 + 8001ed0: 40004404 .word 0x40004404 + +08001ed4 : + +void usart2_putch(char c){ + 8001ed4: b480 push {r7} + 8001ed6: b083 sub sp, #12 + 8001ed8: af00 add r7, sp, #0 + 8001eda: 4603 mov r3, r0 + 8001edc: 71fb strb r3, [r7, #7] + while((*(USART_SR)&(1<) + 8001ee2: 681b ldr r3, [r3, #0] + 8001ee4: f003 0380 and.w r3, r3, #128 ; 0x80 + 8001ee8: 2b80 cmp r3, #128 ; 0x80 + 8001eea: d1f9 bne.n 8001ee0 + *(USART_DR) = c; + 8001eec: 4a05 ldr r2, [pc, #20] ; (8001f04 ) + 8001eee: 79fb ldrb r3, [r7, #7] + 8001ef0: 6013 str r3, [r2, #0] +} + 8001ef2: bf00 nop + 8001ef4: 370c adds r7, #12 + 8001ef6: 46bd mov sp, r7 + 8001ef8: f85d 7b04 ldr.w r7, [sp], #4 + 8001efc: 4770 bx lr + 8001efe: bf00 nop + 8001f00: 40004400 .word 0x40004400 + 8001f04: 40004404 .word 0x40004404 + +08001f08 : + +void init_usart2(uint32_t baud, uint32_t sysclk){ + 8001f08: b580 push {r7, lr} + 8001f0a: b082 sub sp, #8 + 8001f0c: af00 add r7, sp, #0 + 8001f0e: 6078 str r0, [r7, #4] + 8001f10: 6039 str r1, [r7, #0] + // Enable clocks for GPIOA and USART2 + *(RCC_AHB1ENR) |= (1<) + 8001f14: 681b ldr r3, [r3, #0] + 8001f16: 4a1f ldr r2, [pc, #124] ; (8001f94 ) + 8001f18: f043 0301 orr.w r3, r3, #1 + 8001f1c: 6013 str r3, [r2, #0] + *(RCC_APB1ENR) |= (1<) + 8001f20: 681b ldr r3, [r3, #0] + 8001f22: 4a1d ldr r2, [pc, #116] ; (8001f98 ) + 8001f24: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8001f28: 6013 str r3, [r2, #0] + + // Function 7 of PORTA pins is USART + *(GPIOA_AFRL) &= (0xFFFF00FF); // Clear the bits associated with PA3 and PA2 + 8001f2a: 4b1c ldr r3, [pc, #112] ; (8001f9c ) + 8001f2c: 681b ldr r3, [r3, #0] + 8001f2e: 4a1b ldr r2, [pc, #108] ; (8001f9c ) + 8001f30: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 8001f34: 6013 str r3, [r2, #0] + *(GPIOA_AFRL) |= (0b01110111<<8); // Choose function 7 for both PA3 and PA2 + 8001f36: 4b19 ldr r3, [pc, #100] ; (8001f9c ) + 8001f38: 681b ldr r3, [r3, #0] + 8001f3a: 4a18 ldr r2, [pc, #96] ; (8001f9c ) + 8001f3c: f443 43ee orr.w r3, r3, #30464 ; 0x7700 + 8001f40: 6013 str r3, [r2, #0] + *(GPIOA_MODER) &= (0xFFFFFF0F); // Clear mode bits for PA3 and PA2 + 8001f42: 4b17 ldr r3, [pc, #92] ; (8001fa0 ) + 8001f44: 681b ldr r3, [r3, #0] + 8001f46: 4a16 ldr r2, [pc, #88] ; (8001fa0 ) + 8001f48: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 8001f4c: 6013 str r3, [r2, #0] + *(GPIOA_MODER) |= (0b1010<<4); // Both PA3 and PA2 in alt function mode + 8001f4e: 4b14 ldr r3, [pc, #80] ; (8001fa0 ) + 8001f50: 681b ldr r3, [r3, #0] + 8001f52: 4a13 ldr r2, [pc, #76] ; (8001fa0 ) + 8001f54: f043 03a0 orr.w r3, r3, #160 ; 0xa0 + 8001f58: 6013 str r3, [r2, #0] + //USART2_init(); //8n1 no flow control + // over8 = 0..oversample by 16 + // M = 0..1 start bit, data size is 8, 1 stop bit + // PCE= 0..Parity check not enabled + // no interrupts... using polling + *(USART_CR1) = (1<) + 8001f5c: f242 020c movw r2, #8204 ; 0x200c + 8001f60: 601a str r2, [r3, #0] + *(USART_CR2) = 0; // This is the default, but do it anyway + 8001f62: 4b11 ldr r3, [pc, #68] ; (8001fa8 ) + 8001f64: 2200 movs r2, #0 + 8001f66: 601a str r2, [r3, #0] + *(USART_CR3) = 0; // This is the default, but do it anyway + 8001f68: 4b10 ldr r3, [pc, #64] ; (8001fac ) + 8001f6a: 2200 movs r2, #0 + 8001f6c: 601a str r2, [r3, #0] + *(USART_BRR) = sysclk/baud; + 8001f6e: 4910 ldr r1, [pc, #64] ; (8001fb0 ) + 8001f70: 683a ldr r2, [r7, #0] + 8001f72: 687b ldr r3, [r7, #4] + 8001f74: fbb2 f3f3 udiv r3, r2, r3 + 8001f78: 600b str r3, [r1, #0] + + /* I'm not sure if this is needed for standard IO*/ + //setvbuf(stderr, NULL, _IONBF, 0); + //setvbuf(stdin, NULL, _IONBF, 0); + setvbuf(stdout, NULL, _IONBF, 0); + 8001f7a: 4b0e ldr r3, [pc, #56] ; (8001fb4 ) + 8001f7c: 681b ldr r3, [r3, #0] + 8001f7e: 6898 ldr r0, [r3, #8] + 8001f80: 2300 movs r3, #0 + 8001f82: 2202 movs r2, #2 + 8001f84: 2100 movs r1, #0 + 8001f86: f000 fb2b bl 80025e0 +} + 8001f8a: bf00 nop + 8001f8c: 3708 adds r7, #8 + 8001f8e: 46bd mov sp, r7 + 8001f90: bd80 pop {r7, pc} + 8001f92: bf00 nop + 8001f94: 40023830 .word 0x40023830 + 8001f98: 40023840 .word 0x40023840 + 8001f9c: 40020020 .word 0x40020020 + 8001fa0: 40020000 .word 0x40020000 + 8001fa4: 4000440c .word 0x4000440c + 8001fa8: 40004410 .word 0x40004410 + 8001fac: 40004414 .word 0x40004414 + 8001fb0: 40004408 .word 0x40004408 + 8001fb4: 20000c90 .word 0x20000c90 + +08001fb8 : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 8001fb8: 480d ldr r0, [pc, #52] ; (8001ff0 ) + mov sp, r0 /* set stack pointer */ + 8001fba: 4685 mov sp, r0 + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8001fbc: 480d ldr r0, [pc, #52] ; (8001ff4 ) + ldr r1, =_edata + 8001fbe: 490e ldr r1, [pc, #56] ; (8001ff8 ) + ldr r2, =_sidata + 8001fc0: 4a0e ldr r2, [pc, #56] ; (8001ffc ) + movs r3, #0 + 8001fc2: 2300 movs r3, #0 + b LoopCopyDataInit + 8001fc4: e002 b.n 8001fcc + +08001fc6 : + +CopyDataInit: + ldr r4, [r2, r3] + 8001fc6: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8001fc8: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8001fca: 3304 adds r3, #4 + +08001fcc : + +LoopCopyDataInit: + adds r4, r0, r3 + 8001fcc: 18c4 adds r4, r0, r3 + cmp r4, r1 + 8001fce: 428c cmp r4, r1 + bcc CopyDataInit + 8001fd0: d3f9 bcc.n 8001fc6 + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 8001fd2: 4a0b ldr r2, [pc, #44] ; (8002000 ) + ldr r4, =_ebss + 8001fd4: 4c0b ldr r4, [pc, #44] ; (8002004 ) + movs r3, #0 + 8001fd6: 2300 movs r3, #0 + b LoopFillZerobss + 8001fd8: e001 b.n 8001fde + +08001fda : + +FillZerobss: + str r3, [r2] + 8001fda: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8001fdc: 3204 adds r2, #4 + +08001fde : + +LoopFillZerobss: + cmp r2, r4 + 8001fde: 42a2 cmp r2, r4 + bcc FillZerobss + 8001fe0: d3fb bcc.n 8001fda + +/* Call the clock system intitialization function.*/ + bl SystemInit + 8001fe2: f3af 8000 nop.w +/* Call static constructors */ + bl __libc_init_array + 8001fe6: f000 f9a7 bl 8002338 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8001fea: f7fe fc3f bl 800086c
+ +08001fee : + +LoopForever: + b LoopForever + 8001fee: e7fe b.n 8001fee + ldr r0, =_estack + 8001ff0: 20020000 .word 0x20020000 + ldr r0, =_sdata + 8001ff4: 20000000 .word 0x20000000 + ldr r1, =_edata + 8001ff8: 20000cf4 .word 0x20000cf4 + ldr r2, =_sidata + 8001ffc: 080042e0 .word 0x080042e0 + ldr r2, =_sbss + 8002000: 20000cf4 .word 0x20000cf4 + ldr r4, =_ebss + 8002004: 20000d34 .word 0x20000d34 + +08002008 : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8002008: e7fe b.n 8002008 + ... + +0800200c <_fgets_r>: + 800200c: 2a01 cmp r2, #1 + 800200e: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8002012: 4680 mov r8, r0 + 8002014: 460d mov r5, r1 + 8002016: 4617 mov r7, r2 + 8002018: 461c mov r4, r3 + 800201a: dc03 bgt.n 8002024 <_fgets_r+0x18> + 800201c: 2500 movs r5, #0 + 800201e: 4628 mov r0, r5 + 8002020: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8002024: b118 cbz r0, 800202e <_fgets_r+0x22> + 8002026: 6983 ldr r3, [r0, #24] + 8002028: b90b cbnz r3, 800202e <_fgets_r+0x22> + 800202a: f000 f8cb bl 80021c4 <__sinit> + 800202e: 4b31 ldr r3, [pc, #196] ; (80020f4 <_fgets_r+0xe8>) + 8002030: 429c cmp r4, r3 + 8002032: d120 bne.n 8002076 <_fgets_r+0x6a> + 8002034: f8d8 4004 ldr.w r4, [r8, #4] + 8002038: 6e63 ldr r3, [r4, #100] ; 0x64 + 800203a: 07de lsls r6, r3, #31 + 800203c: d405 bmi.n 800204a <_fgets_r+0x3e> + 800203e: 89a3 ldrh r3, [r4, #12] + 8002040: 0598 lsls r0, r3, #22 + 8002042: d402 bmi.n 800204a <_fgets_r+0x3e> + 8002044: 6da0 ldr r0, [r4, #88] ; 0x58 + 8002046: f000 f99c bl 8002382 <__retarget_lock_acquire_recursive> + 800204a: 3f01 subs r7, #1 + 800204c: 46a9 mov r9, r5 + 800204e: 6866 ldr r6, [r4, #4] + 8002050: b9f6 cbnz r6, 8002090 <_fgets_r+0x84> + 8002052: 4621 mov r1, r4 + 8002054: 4640 mov r0, r8 + 8002056: f000 fa29 bl 80024ac <__srefill_r> + 800205a: b1c0 cbz r0, 800208e <_fgets_r+0x82> + 800205c: 45a9 cmp r9, r5 + 800205e: d145 bne.n 80020ec <_fgets_r+0xe0> + 8002060: 6e63 ldr r3, [r4, #100] ; 0x64 + 8002062: 07d9 lsls r1, r3, #31 + 8002064: d4da bmi.n 800201c <_fgets_r+0x10> + 8002066: 89a5 ldrh r5, [r4, #12] + 8002068: f415 7500 ands.w r5, r5, #512 ; 0x200 + 800206c: d1d6 bne.n 800201c <_fgets_r+0x10> + 800206e: 6da0 ldr r0, [r4, #88] ; 0x58 + 8002070: f000 f988 bl 8002384 <__retarget_lock_release_recursive> + 8002074: e7d3 b.n 800201e <_fgets_r+0x12> + 8002076: 4b20 ldr r3, [pc, #128] ; (80020f8 <_fgets_r+0xec>) + 8002078: 429c cmp r4, r3 + 800207a: d102 bne.n 8002082 <_fgets_r+0x76> + 800207c: f8d8 4008 ldr.w r4, [r8, #8] + 8002080: e7da b.n 8002038 <_fgets_r+0x2c> + 8002082: 4b1e ldr r3, [pc, #120] ; (80020fc <_fgets_r+0xf0>) + 8002084: 429c cmp r4, r3 + 8002086: bf08 it eq + 8002088: f8d8 400c ldreq.w r4, [r8, #12] + 800208c: e7d4 b.n 8002038 <_fgets_r+0x2c> + 800208e: 6866 ldr r6, [r4, #4] + 8002090: f8d4 a000 ldr.w sl, [r4] + 8002094: 42be cmp r6, r7 + 8002096: bf28 it cs + 8002098: 463e movcs r6, r7 + 800209a: 4632 mov r2, r6 + 800209c: 210a movs r1, #10 + 800209e: 4650 mov r0, sl + 80020a0: f7fe f8b6 bl 8000210 + 80020a4: 6863 ldr r3, [r4, #4] + 80020a6: b1a0 cbz r0, 80020d2 <_fgets_r+0xc6> + 80020a8: 3001 adds r0, #1 + 80020aa: eba0 060a sub.w r6, r0, sl + 80020ae: 1b9b subs r3, r3, r6 + 80020b0: e9c4 0300 strd r0, r3, [r4] + 80020b4: 4632 mov r2, r6 + 80020b6: 4651 mov r1, sl + 80020b8: 4648 mov r0, r9 + 80020ba: f000 f964 bl 8002386 + 80020be: 2300 movs r3, #0 + 80020c0: f809 3006 strb.w r3, [r9, r6] + 80020c4: 6e63 ldr r3, [r4, #100] ; 0x64 + 80020c6: 07da lsls r2, r3, #31 + 80020c8: d4a9 bmi.n 800201e <_fgets_r+0x12> + 80020ca: 89a3 ldrh r3, [r4, #12] + 80020cc: 059b lsls r3, r3, #22 + 80020ce: d4a6 bmi.n 800201e <_fgets_r+0x12> + 80020d0: e7cd b.n 800206e <_fgets_r+0x62> + 80020d2: 1b9b subs r3, r3, r6 + 80020d4: 6063 str r3, [r4, #4] + 80020d6: 6823 ldr r3, [r4, #0] + 80020d8: 4433 add r3, r6 + 80020da: 4648 mov r0, r9 + 80020dc: 6023 str r3, [r4, #0] + 80020de: 4632 mov r2, r6 + 80020e0: 4651 mov r1, sl + 80020e2: f000 f950 bl 8002386 + 80020e6: 1bbf subs r7, r7, r6 + 80020e8: 44b1 add r9, r6 + 80020ea: d1b0 bne.n 800204e <_fgets_r+0x42> + 80020ec: 2300 movs r3, #0 + 80020ee: f889 3000 strb.w r3, [r9] + 80020f2: e7e7 b.n 80020c4 <_fgets_r+0xb8> + 80020f4: 08004144 .word 0x08004144 + 80020f8: 08004164 .word 0x08004164 + 80020fc: 08004124 .word 0x08004124 + +08002100 : + 8002100: 4613 mov r3, r2 + 8002102: 460a mov r2, r1 + 8002104: 4601 mov r1, r0 + 8002106: 4802 ldr r0, [pc, #8] ; (8002110 ) + 8002108: 6800 ldr r0, [r0, #0] + 800210a: f7ff bf7f b.w 800200c <_fgets_r> + 800210e: bf00 nop + 8002110: 20000c90 .word 0x20000c90 + +08002114 : + 8002114: 2300 movs r3, #0 + 8002116: b510 push {r4, lr} + 8002118: 4604 mov r4, r0 + 800211a: e9c0 3300 strd r3, r3, [r0] + 800211e: e9c0 3304 strd r3, r3, [r0, #16] + 8002122: 6083 str r3, [r0, #8] + 8002124: 8181 strh r1, [r0, #12] + 8002126: 6643 str r3, [r0, #100] ; 0x64 + 8002128: 81c2 strh r2, [r0, #14] + 800212a: 6183 str r3, [r0, #24] + 800212c: 4619 mov r1, r3 + 800212e: 2208 movs r2, #8 + 8002130: 305c adds r0, #92 ; 0x5c + 8002132: f000 f936 bl 80023a2 + 8002136: 4b05 ldr r3, [pc, #20] ; (800214c ) + 8002138: 6263 str r3, [r4, #36] ; 0x24 + 800213a: 4b05 ldr r3, [pc, #20] ; (8002150 ) + 800213c: 62a3 str r3, [r4, #40] ; 0x28 + 800213e: 4b05 ldr r3, [pc, #20] ; (8002154 ) + 8002140: 62e3 str r3, [r4, #44] ; 0x2c + 8002142: 4b05 ldr r3, [pc, #20] ; (8002158 ) + 8002144: 6224 str r4, [r4, #32] + 8002146: 6323 str r3, [r4, #48] ; 0x30 + 8002148: bd10 pop {r4, pc} + 800214a: bf00 nop + 800214c: 080027c5 .word 0x080027c5 + 8002150: 080027eb .word 0x080027eb + 8002154: 08002823 .word 0x08002823 + 8002158: 08002847 .word 0x08002847 + +0800215c <_cleanup_r>: + 800215c: 4901 ldr r1, [pc, #4] ; (8002164 <_cleanup_r+0x8>) + 800215e: f000 b8cc b.w 80022fa <_fwalk_reent> + 8002162: bf00 nop + 8002164: 080029a1 .word 0x080029a1 + +08002168 <__sfmoreglue>: + 8002168: b570 push {r4, r5, r6, lr} + 800216a: 1e4a subs r2, r1, #1 + 800216c: 2568 movs r5, #104 ; 0x68 + 800216e: 4355 muls r5, r2 + 8002170: 460e mov r6, r1 + 8002172: f105 0174 add.w r1, r5, #116 ; 0x74 + 8002176: f000 f91d bl 80023b4 <_malloc_r> + 800217a: 4604 mov r4, r0 + 800217c: b140 cbz r0, 8002190 <__sfmoreglue+0x28> + 800217e: 2100 movs r1, #0 + 8002180: e9c0 1600 strd r1, r6, [r0] + 8002184: 300c adds r0, #12 + 8002186: 60a0 str r0, [r4, #8] + 8002188: f105 0268 add.w r2, r5, #104 ; 0x68 + 800218c: f000 f909 bl 80023a2 + 8002190: 4620 mov r0, r4 + 8002192: bd70 pop {r4, r5, r6, pc} + +08002194 <__sfp_lock_acquire>: + 8002194: 4801 ldr r0, [pc, #4] ; (800219c <__sfp_lock_acquire+0x8>) + 8002196: f000 b8f4 b.w 8002382 <__retarget_lock_acquire_recursive> + 800219a: bf00 nop + 800219c: 20000d2c .word 0x20000d2c + +080021a0 <__sfp_lock_release>: + 80021a0: 4801 ldr r0, [pc, #4] ; (80021a8 <__sfp_lock_release+0x8>) + 80021a2: f000 b8ef b.w 8002384 <__retarget_lock_release_recursive> + 80021a6: bf00 nop + 80021a8: 20000d2c .word 0x20000d2c + +080021ac <__sinit_lock_acquire>: + 80021ac: 4801 ldr r0, [pc, #4] ; (80021b4 <__sinit_lock_acquire+0x8>) + 80021ae: f000 b8e8 b.w 8002382 <__retarget_lock_acquire_recursive> + 80021b2: bf00 nop + 80021b4: 20000d27 .word 0x20000d27 + +080021b8 <__sinit_lock_release>: + 80021b8: 4801 ldr r0, [pc, #4] ; (80021c0 <__sinit_lock_release+0x8>) + 80021ba: f000 b8e3 b.w 8002384 <__retarget_lock_release_recursive> + 80021be: bf00 nop + 80021c0: 20000d27 .word 0x20000d27 + +080021c4 <__sinit>: + 80021c4: b510 push {r4, lr} + 80021c6: 4604 mov r4, r0 + 80021c8: f7ff fff0 bl 80021ac <__sinit_lock_acquire> + 80021cc: 69a3 ldr r3, [r4, #24] + 80021ce: b11b cbz r3, 80021d8 <__sinit+0x14> + 80021d0: e8bd 4010 ldmia.w sp!, {r4, lr} + 80021d4: f7ff bff0 b.w 80021b8 <__sinit_lock_release> + 80021d8: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 80021dc: 6523 str r3, [r4, #80] ; 0x50 + 80021de: 4b13 ldr r3, [pc, #76] ; (800222c <__sinit+0x68>) + 80021e0: 4a13 ldr r2, [pc, #76] ; (8002230 <__sinit+0x6c>) + 80021e2: 681b ldr r3, [r3, #0] + 80021e4: 62a2 str r2, [r4, #40] ; 0x28 + 80021e6: 42a3 cmp r3, r4 + 80021e8: bf04 itt eq + 80021ea: 2301 moveq r3, #1 + 80021ec: 61a3 streq r3, [r4, #24] + 80021ee: 4620 mov r0, r4 + 80021f0: f000 f820 bl 8002234 <__sfp> + 80021f4: 6060 str r0, [r4, #4] + 80021f6: 4620 mov r0, r4 + 80021f8: f000 f81c bl 8002234 <__sfp> + 80021fc: 60a0 str r0, [r4, #8] + 80021fe: 4620 mov r0, r4 + 8002200: f000 f818 bl 8002234 <__sfp> + 8002204: 2200 movs r2, #0 + 8002206: 60e0 str r0, [r4, #12] + 8002208: 2104 movs r1, #4 + 800220a: 6860 ldr r0, [r4, #4] + 800220c: f7ff ff82 bl 8002114 + 8002210: 68a0 ldr r0, [r4, #8] + 8002212: 2201 movs r2, #1 + 8002214: 2109 movs r1, #9 + 8002216: f7ff ff7d bl 8002114 + 800221a: 68e0 ldr r0, [r4, #12] + 800221c: 2202 movs r2, #2 + 800221e: 2112 movs r1, #18 + 8002220: f7ff ff78 bl 8002114 + 8002224: 2301 movs r3, #1 + 8002226: 61a3 str r3, [r4, #24] + 8002228: e7d2 b.n 80021d0 <__sinit+0xc> + 800222a: bf00 nop + 800222c: 08004184 .word 0x08004184 + 8002230: 0800215d .word 0x0800215d + +08002234 <__sfp>: + 8002234: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002236: 4607 mov r7, r0 + 8002238: f7ff ffac bl 8002194 <__sfp_lock_acquire> + 800223c: 4b1e ldr r3, [pc, #120] ; (80022b8 <__sfp+0x84>) + 800223e: 681e ldr r6, [r3, #0] + 8002240: 69b3 ldr r3, [r6, #24] + 8002242: b913 cbnz r3, 800224a <__sfp+0x16> + 8002244: 4630 mov r0, r6 + 8002246: f7ff ffbd bl 80021c4 <__sinit> + 800224a: 3648 adds r6, #72 ; 0x48 + 800224c: e9d6 3401 ldrd r3, r4, [r6, #4] + 8002250: 3b01 subs r3, #1 + 8002252: d503 bpl.n 800225c <__sfp+0x28> + 8002254: 6833 ldr r3, [r6, #0] + 8002256: b30b cbz r3, 800229c <__sfp+0x68> + 8002258: 6836 ldr r6, [r6, #0] + 800225a: e7f7 b.n 800224c <__sfp+0x18> + 800225c: f9b4 500c ldrsh.w r5, [r4, #12] + 8002260: b9d5 cbnz r5, 8002298 <__sfp+0x64> + 8002262: 4b16 ldr r3, [pc, #88] ; (80022bc <__sfp+0x88>) + 8002264: 60e3 str r3, [r4, #12] + 8002266: f104 0058 add.w r0, r4, #88 ; 0x58 + 800226a: 6665 str r5, [r4, #100] ; 0x64 + 800226c: f000 f888 bl 8002380 <__retarget_lock_init_recursive> + 8002270: f7ff ff96 bl 80021a0 <__sfp_lock_release> + 8002274: e9c4 5501 strd r5, r5, [r4, #4] + 8002278: e9c4 5504 strd r5, r5, [r4, #16] + 800227c: 6025 str r5, [r4, #0] + 800227e: 61a5 str r5, [r4, #24] + 8002280: 2208 movs r2, #8 + 8002282: 4629 mov r1, r5 + 8002284: f104 005c add.w r0, r4, #92 ; 0x5c + 8002288: f000 f88b bl 80023a2 + 800228c: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 8002290: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 8002294: 4620 mov r0, r4 + 8002296: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8002298: 3468 adds r4, #104 ; 0x68 + 800229a: e7d9 b.n 8002250 <__sfp+0x1c> + 800229c: 2104 movs r1, #4 + 800229e: 4638 mov r0, r7 + 80022a0: f7ff ff62 bl 8002168 <__sfmoreglue> + 80022a4: 4604 mov r4, r0 + 80022a6: 6030 str r0, [r6, #0] + 80022a8: 2800 cmp r0, #0 + 80022aa: d1d5 bne.n 8002258 <__sfp+0x24> + 80022ac: f7ff ff78 bl 80021a0 <__sfp_lock_release> + 80022b0: 230c movs r3, #12 + 80022b2: 603b str r3, [r7, #0] + 80022b4: e7ee b.n 8002294 <__sfp+0x60> + 80022b6: bf00 nop + 80022b8: 08004184 .word 0x08004184 + 80022bc: ffff0001 .word 0xffff0001 + +080022c0 <_fwalk>: + 80022c0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80022c4: 460f mov r7, r1 + 80022c6: f100 0448 add.w r4, r0, #72 ; 0x48 + 80022ca: 2600 movs r6, #0 + 80022cc: e9d4 8501 ldrd r8, r5, [r4, #4] + 80022d0: f1b8 0801 subs.w r8, r8, #1 + 80022d4: d505 bpl.n 80022e2 <_fwalk+0x22> + 80022d6: 6824 ldr r4, [r4, #0] + 80022d8: 2c00 cmp r4, #0 + 80022da: d1f7 bne.n 80022cc <_fwalk+0xc> + 80022dc: 4630 mov r0, r6 + 80022de: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80022e2: 89ab ldrh r3, [r5, #12] + 80022e4: 2b01 cmp r3, #1 + 80022e6: d906 bls.n 80022f6 <_fwalk+0x36> + 80022e8: f9b5 300e ldrsh.w r3, [r5, #14] + 80022ec: 3301 adds r3, #1 + 80022ee: d002 beq.n 80022f6 <_fwalk+0x36> + 80022f0: 4628 mov r0, r5 + 80022f2: 47b8 blx r7 + 80022f4: 4306 orrs r6, r0 + 80022f6: 3568 adds r5, #104 ; 0x68 + 80022f8: e7ea b.n 80022d0 <_fwalk+0x10> + +080022fa <_fwalk_reent>: + 80022fa: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 80022fe: 4606 mov r6, r0 + 8002300: 4688 mov r8, r1 + 8002302: f100 0448 add.w r4, r0, #72 ; 0x48 + 8002306: 2700 movs r7, #0 + 8002308: e9d4 9501 ldrd r9, r5, [r4, #4] + 800230c: f1b9 0901 subs.w r9, r9, #1 + 8002310: d505 bpl.n 800231e <_fwalk_reent+0x24> + 8002312: 6824 ldr r4, [r4, #0] + 8002314: 2c00 cmp r4, #0 + 8002316: d1f7 bne.n 8002308 <_fwalk_reent+0xe> + 8002318: 4638 mov r0, r7 + 800231a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 800231e: 89ab ldrh r3, [r5, #12] + 8002320: 2b01 cmp r3, #1 + 8002322: d907 bls.n 8002334 <_fwalk_reent+0x3a> + 8002324: f9b5 300e ldrsh.w r3, [r5, #14] + 8002328: 3301 adds r3, #1 + 800232a: d003 beq.n 8002334 <_fwalk_reent+0x3a> + 800232c: 4629 mov r1, r5 + 800232e: 4630 mov r0, r6 + 8002330: 47c0 blx r8 + 8002332: 4307 orrs r7, r0 + 8002334: 3568 adds r5, #104 ; 0x68 + 8002336: e7e9 b.n 800230c <_fwalk_reent+0x12> + +08002338 <__libc_init_array>: + 8002338: b570 push {r4, r5, r6, lr} + 800233a: 4d0d ldr r5, [pc, #52] ; (8002370 <__libc_init_array+0x38>) + 800233c: 4c0d ldr r4, [pc, #52] ; (8002374 <__libc_init_array+0x3c>) + 800233e: 1b64 subs r4, r4, r5 + 8002340: 10a4 asrs r4, r4, #2 + 8002342: 2600 movs r6, #0 + 8002344: 42a6 cmp r6, r4 + 8002346: d109 bne.n 800235c <__libc_init_array+0x24> + 8002348: 4d0b ldr r5, [pc, #44] ; (8002378 <__libc_init_array+0x40>) + 800234a: 4c0c ldr r4, [pc, #48] ; (800237c <__libc_init_array+0x44>) + 800234c: f001 fd2a bl 8003da4 <_init> + 8002350: 1b64 subs r4, r4, r5 + 8002352: 10a4 asrs r4, r4, #2 + 8002354: 2600 movs r6, #0 + 8002356: 42a6 cmp r6, r4 + 8002358: d105 bne.n 8002366 <__libc_init_array+0x2e> + 800235a: bd70 pop {r4, r5, r6, pc} + 800235c: f855 3b04 ldr.w r3, [r5], #4 + 8002360: 4798 blx r3 + 8002362: 3601 adds r6, #1 + 8002364: e7ee b.n 8002344 <__libc_init_array+0xc> + 8002366: f855 3b04 ldr.w r3, [r5], #4 + 800236a: 4798 blx r3 + 800236c: 3601 adds r6, #1 + 800236e: e7f2 b.n 8002356 <__libc_init_array+0x1e> + 8002370: 080042d8 .word 0x080042d8 + 8002374: 080042d8 .word 0x080042d8 + 8002378: 080042d8 .word 0x080042d8 + 800237c: 080042dc .word 0x080042dc + +08002380 <__retarget_lock_init_recursive>: + 8002380: 4770 bx lr + +08002382 <__retarget_lock_acquire_recursive>: + 8002382: 4770 bx lr + +08002384 <__retarget_lock_release_recursive>: + 8002384: 4770 bx lr + +08002386 : + 8002386: 440a add r2, r1 + 8002388: 4291 cmp r1, r2 + 800238a: f100 33ff add.w r3, r0, #4294967295 + 800238e: d100 bne.n 8002392 + 8002390: 4770 bx lr + 8002392: b510 push {r4, lr} + 8002394: f811 4b01 ldrb.w r4, [r1], #1 + 8002398: f803 4f01 strb.w r4, [r3, #1]! + 800239c: 4291 cmp r1, r2 + 800239e: d1f9 bne.n 8002394 + 80023a0: bd10 pop {r4, pc} + +080023a2 : + 80023a2: 4402 add r2, r0 + 80023a4: 4603 mov r3, r0 + 80023a6: 4293 cmp r3, r2 + 80023a8: d100 bne.n 80023ac + 80023aa: 4770 bx lr + 80023ac: f803 1b01 strb.w r1, [r3], #1 + 80023b0: e7f9 b.n 80023a6 + ... + +080023b4 <_malloc_r>: + 80023b4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80023b6: 1ccd adds r5, r1, #3 + 80023b8: f025 0503 bic.w r5, r5, #3 + 80023bc: 3508 adds r5, #8 + 80023be: 2d0c cmp r5, #12 + 80023c0: bf38 it cc + 80023c2: 250c movcc r5, #12 + 80023c4: 2d00 cmp r5, #0 + 80023c6: 4606 mov r6, r0 + 80023c8: db01 blt.n 80023ce <_malloc_r+0x1a> + 80023ca: 42a9 cmp r1, r5 + 80023cc: d903 bls.n 80023d6 <_malloc_r+0x22> + 80023ce: 230c movs r3, #12 + 80023d0: 6033 str r3, [r6, #0] + 80023d2: 2000 movs r0, #0 + 80023d4: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80023d6: f000 fbaf bl 8002b38 <__malloc_lock> + 80023da: 4921 ldr r1, [pc, #132] ; (8002460 <_malloc_r+0xac>) + 80023dc: 680a ldr r2, [r1, #0] + 80023de: 4614 mov r4, r2 + 80023e0: b99c cbnz r4, 800240a <_malloc_r+0x56> + 80023e2: 4f20 ldr r7, [pc, #128] ; (8002464 <_malloc_r+0xb0>) + 80023e4: 683b ldr r3, [r7, #0] + 80023e6: b923 cbnz r3, 80023f2 <_malloc_r+0x3e> + 80023e8: 4621 mov r1, r4 + 80023ea: 4630 mov r0, r6 + 80023ec: f000 f8e8 bl 80025c0 <_sbrk_r> + 80023f0: 6038 str r0, [r7, #0] + 80023f2: 4629 mov r1, r5 + 80023f4: 4630 mov r0, r6 + 80023f6: f000 f8e3 bl 80025c0 <_sbrk_r> + 80023fa: 1c43 adds r3, r0, #1 + 80023fc: d123 bne.n 8002446 <_malloc_r+0x92> + 80023fe: 230c movs r3, #12 + 8002400: 6033 str r3, [r6, #0] + 8002402: 4630 mov r0, r6 + 8002404: f000 fb9e bl 8002b44 <__malloc_unlock> + 8002408: e7e3 b.n 80023d2 <_malloc_r+0x1e> + 800240a: 6823 ldr r3, [r4, #0] + 800240c: 1b5b subs r3, r3, r5 + 800240e: d417 bmi.n 8002440 <_malloc_r+0x8c> + 8002410: 2b0b cmp r3, #11 + 8002412: d903 bls.n 800241c <_malloc_r+0x68> + 8002414: 6023 str r3, [r4, #0] + 8002416: 441c add r4, r3 + 8002418: 6025 str r5, [r4, #0] + 800241a: e004 b.n 8002426 <_malloc_r+0x72> + 800241c: 6863 ldr r3, [r4, #4] + 800241e: 42a2 cmp r2, r4 + 8002420: bf0c ite eq + 8002422: 600b streq r3, [r1, #0] + 8002424: 6053 strne r3, [r2, #4] + 8002426: 4630 mov r0, r6 + 8002428: f000 fb8c bl 8002b44 <__malloc_unlock> + 800242c: f104 000b add.w r0, r4, #11 + 8002430: 1d23 adds r3, r4, #4 + 8002432: f020 0007 bic.w r0, r0, #7 + 8002436: 1ac2 subs r2, r0, r3 + 8002438: d0cc beq.n 80023d4 <_malloc_r+0x20> + 800243a: 1a1b subs r3, r3, r0 + 800243c: 50a3 str r3, [r4, r2] + 800243e: e7c9 b.n 80023d4 <_malloc_r+0x20> + 8002440: 4622 mov r2, r4 + 8002442: 6864 ldr r4, [r4, #4] + 8002444: e7cc b.n 80023e0 <_malloc_r+0x2c> + 8002446: 1cc4 adds r4, r0, #3 + 8002448: f024 0403 bic.w r4, r4, #3 + 800244c: 42a0 cmp r0, r4 + 800244e: d0e3 beq.n 8002418 <_malloc_r+0x64> + 8002450: 1a21 subs r1, r4, r0 + 8002452: 4630 mov r0, r6 + 8002454: f000 f8b4 bl 80025c0 <_sbrk_r> + 8002458: 3001 adds r0, #1 + 800245a: d1dd bne.n 8002418 <_malloc_r+0x64> + 800245c: e7cf b.n 80023fe <_malloc_r+0x4a> + 800245e: bf00 nop + 8002460: 20000d18 .word 0x20000d18 + 8002464: 20000d1c .word 0x20000d1c + +08002468 : + 8002468: b40f push {r0, r1, r2, r3} + 800246a: 4b0a ldr r3, [pc, #40] ; (8002494 ) + 800246c: b513 push {r0, r1, r4, lr} + 800246e: 681c ldr r4, [r3, #0] + 8002470: b124 cbz r4, 800247c + 8002472: 69a3 ldr r3, [r4, #24] + 8002474: b913 cbnz r3, 800247c + 8002476: 4620 mov r0, r4 + 8002478: f7ff fea4 bl 80021c4 <__sinit> + 800247c: ab05 add r3, sp, #20 + 800247e: 9a04 ldr r2, [sp, #16] + 8002480: 68a1 ldr r1, [r4, #8] + 8002482: 9301 str r3, [sp, #4] + 8002484: 4620 mov r0, r4 + 8002486: f000 fdaf bl 8002fe8 <_vfiprintf_r> + 800248a: b002 add sp, #8 + 800248c: e8bd 4010 ldmia.w sp!, {r4, lr} + 8002490: b004 add sp, #16 + 8002492: 4770 bx lr + 8002494: 20000c90 .word 0x20000c90 + +08002498 : + 8002498: 8983 ldrh r3, [r0, #12] + 800249a: f003 0309 and.w r3, r3, #9 + 800249e: 2b09 cmp r3, #9 + 80024a0: d101 bne.n 80024a6 + 80024a2: f000 bab9 b.w 8002a18 + 80024a6: 2000 movs r0, #0 + 80024a8: 4770 bx lr + ... + +080024ac <__srefill_r>: + 80024ac: b5f8 push {r3, r4, r5, r6, r7, lr} + 80024ae: 460c mov r4, r1 + 80024b0: 4605 mov r5, r0 + 80024b2: b118 cbz r0, 80024bc <__srefill_r+0x10> + 80024b4: 6983 ldr r3, [r0, #24] + 80024b6: b90b cbnz r3, 80024bc <__srefill_r+0x10> + 80024b8: f7ff fe84 bl 80021c4 <__sinit> + 80024bc: 4b3b ldr r3, [pc, #236] ; (80025ac <__srefill_r+0x100>) + 80024be: 429c cmp r4, r3 + 80024c0: d10a bne.n 80024d8 <__srefill_r+0x2c> + 80024c2: 686c ldr r4, [r5, #4] + 80024c4: f9b4 200c ldrsh.w r2, [r4, #12] + 80024c8: 2300 movs r3, #0 + 80024ca: 6063 str r3, [r4, #4] + 80024cc: 89a3 ldrh r3, [r4, #12] + 80024ce: 069e lsls r6, r3, #26 + 80024d0: d50c bpl.n 80024ec <__srefill_r+0x40> + 80024d2: f04f 30ff mov.w r0, #4294967295 + 80024d6: e066 b.n 80025a6 <__srefill_r+0xfa> + 80024d8: 4b35 ldr r3, [pc, #212] ; (80025b0 <__srefill_r+0x104>) + 80024da: 429c cmp r4, r3 + 80024dc: d101 bne.n 80024e2 <__srefill_r+0x36> + 80024de: 68ac ldr r4, [r5, #8] + 80024e0: e7f0 b.n 80024c4 <__srefill_r+0x18> + 80024e2: 4b34 ldr r3, [pc, #208] ; (80025b4 <__srefill_r+0x108>) + 80024e4: 429c cmp r4, r3 + 80024e6: bf08 it eq + 80024e8: 68ec ldreq r4, [r5, #12] + 80024ea: e7eb b.n 80024c4 <__srefill_r+0x18> + 80024ec: 0758 lsls r0, r3, #29 + 80024ee: d448 bmi.n 8002582 <__srefill_r+0xd6> + 80024f0: 06d9 lsls r1, r3, #27 + 80024f2: d405 bmi.n 8002500 <__srefill_r+0x54> + 80024f4: 2309 movs r3, #9 + 80024f6: 602b str r3, [r5, #0] + 80024f8: f042 0340 orr.w r3, r2, #64 ; 0x40 + 80024fc: 81a3 strh r3, [r4, #12] + 80024fe: e7e8 b.n 80024d2 <__srefill_r+0x26> + 8002500: 071a lsls r2, r3, #28 + 8002502: d50b bpl.n 800251c <__srefill_r+0x70> + 8002504: 4621 mov r1, r4 + 8002506: 4628 mov r0, r5 + 8002508: f000 fa4a bl 80029a0 <_fflush_r> + 800250c: 2800 cmp r0, #0 + 800250e: d1e0 bne.n 80024d2 <__srefill_r+0x26> + 8002510: 89a3 ldrh r3, [r4, #12] + 8002512: 60a0 str r0, [r4, #8] + 8002514: f023 0308 bic.w r3, r3, #8 + 8002518: 81a3 strh r3, [r4, #12] + 800251a: 61a0 str r0, [r4, #24] + 800251c: 89a3 ldrh r3, [r4, #12] + 800251e: f043 0304 orr.w r3, r3, #4 + 8002522: 81a3 strh r3, [r4, #12] + 8002524: 6923 ldr r3, [r4, #16] + 8002526: b91b cbnz r3, 8002530 <__srefill_r+0x84> + 8002528: 4621 mov r1, r4 + 800252a: 4628 mov r0, r5 + 800252c: f000 fabc bl 8002aa8 <__smakebuf_r> + 8002530: 89a6 ldrh r6, [r4, #12] + 8002532: f9b4 700c ldrsh.w r7, [r4, #12] + 8002536: 07b3 lsls r3, r6, #30 + 8002538: d00f beq.n 800255a <__srefill_r+0xae> + 800253a: 2301 movs r3, #1 + 800253c: 81a3 strh r3, [r4, #12] + 800253e: 4b1e ldr r3, [pc, #120] ; (80025b8 <__srefill_r+0x10c>) + 8002540: 491e ldr r1, [pc, #120] ; (80025bc <__srefill_r+0x110>) + 8002542: 6818 ldr r0, [r3, #0] + 8002544: f006 0609 and.w r6, r6, #9 + 8002548: f7ff feba bl 80022c0 <_fwalk> + 800254c: 2e09 cmp r6, #9 + 800254e: 81a7 strh r7, [r4, #12] + 8002550: d103 bne.n 800255a <__srefill_r+0xae> + 8002552: 4621 mov r1, r4 + 8002554: 4628 mov r0, r5 + 8002556: f000 f99d bl 8002894 <__sflush_r> + 800255a: 6922 ldr r2, [r4, #16] + 800255c: 6a66 ldr r6, [r4, #36] ; 0x24 + 800255e: 6963 ldr r3, [r4, #20] + 8002560: 6a21 ldr r1, [r4, #32] + 8002562: 6022 str r2, [r4, #0] + 8002564: 4628 mov r0, r5 + 8002566: 47b0 blx r6 + 8002568: 2800 cmp r0, #0 + 800256a: 6060 str r0, [r4, #4] + 800256c: dc1c bgt.n 80025a8 <__srefill_r+0xfc> + 800256e: f9b4 300c ldrsh.w r3, [r4, #12] + 8002572: bf17 itett ne + 8002574: 2200 movne r2, #0 + 8002576: f043 0320 orreq.w r3, r3, #32 + 800257a: 6062 strne r2, [r4, #4] + 800257c: f043 0340 orrne.w r3, r3, #64 ; 0x40 + 8002580: e7bc b.n 80024fc <__srefill_r+0x50> + 8002582: 6b61 ldr r1, [r4, #52] ; 0x34 + 8002584: 2900 cmp r1, #0 + 8002586: d0cd beq.n 8002524 <__srefill_r+0x78> + 8002588: f104 0344 add.w r3, r4, #68 ; 0x44 + 800258c: 4299 cmp r1, r3 + 800258e: d002 beq.n 8002596 <__srefill_r+0xea> + 8002590: 4628 mov r0, r5 + 8002592: f000 fadd bl 8002b50 <_free_r> + 8002596: 6c23 ldr r3, [r4, #64] ; 0x40 + 8002598: 6063 str r3, [r4, #4] + 800259a: 2000 movs r0, #0 + 800259c: 6360 str r0, [r4, #52] ; 0x34 + 800259e: 2b00 cmp r3, #0 + 80025a0: d0c0 beq.n 8002524 <__srefill_r+0x78> + 80025a2: 6be3 ldr r3, [r4, #60] ; 0x3c + 80025a4: 6023 str r3, [r4, #0] + 80025a6: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80025a8: 2000 movs r0, #0 + 80025aa: e7fc b.n 80025a6 <__srefill_r+0xfa> + 80025ac: 08004144 .word 0x08004144 + 80025b0: 08004164 .word 0x08004164 + 80025b4: 08004124 .word 0x08004124 + 80025b8: 08004184 .word 0x08004184 + 80025bc: 08002499 .word 0x08002499 + +080025c0 <_sbrk_r>: + 80025c0: b538 push {r3, r4, r5, lr} + 80025c2: 4d06 ldr r5, [pc, #24] ; (80025dc <_sbrk_r+0x1c>) + 80025c4: 2300 movs r3, #0 + 80025c6: 4604 mov r4, r0 + 80025c8: 4608 mov r0, r1 + 80025ca: 602b str r3, [r5, #0] + 80025cc: f001 fbdc bl 8003d88 <_sbrk> + 80025d0: 1c43 adds r3, r0, #1 + 80025d2: d102 bne.n 80025da <_sbrk_r+0x1a> + 80025d4: 682b ldr r3, [r5, #0] + 80025d6: b103 cbz r3, 80025da <_sbrk_r+0x1a> + 80025d8: 6023 str r3, [r4, #0] + 80025da: bd38 pop {r3, r4, r5, pc} + 80025dc: 20000d30 .word 0x20000d30 + +080025e0 : + 80025e0: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + 80025e4: 461d mov r5, r3 + 80025e6: 4b5d ldr r3, [pc, #372] ; (800275c ) + 80025e8: 681f ldr r7, [r3, #0] + 80025ea: 4604 mov r4, r0 + 80025ec: 460e mov r6, r1 + 80025ee: 4690 mov r8, r2 + 80025f0: b127 cbz r7, 80025fc + 80025f2: 69bb ldr r3, [r7, #24] + 80025f4: b913 cbnz r3, 80025fc + 80025f6: 4638 mov r0, r7 + 80025f8: f7ff fde4 bl 80021c4 <__sinit> + 80025fc: 4b58 ldr r3, [pc, #352] ; (8002760 ) + 80025fe: 429c cmp r4, r3 + 8002600: d167 bne.n 80026d2 + 8002602: 687c ldr r4, [r7, #4] + 8002604: f1b8 0f02 cmp.w r8, #2 + 8002608: d006 beq.n 8002618 + 800260a: f1b8 0f01 cmp.w r8, #1 + 800260e: f200 809f bhi.w 8002750 + 8002612: 2d00 cmp r5, #0 + 8002614: f2c0 809c blt.w 8002750 + 8002618: 6e63 ldr r3, [r4, #100] ; 0x64 + 800261a: 07db lsls r3, r3, #31 + 800261c: d405 bmi.n 800262a + 800261e: 89a3 ldrh r3, [r4, #12] + 8002620: 0598 lsls r0, r3, #22 + 8002622: d402 bmi.n 800262a + 8002624: 6da0 ldr r0, [r4, #88] ; 0x58 + 8002626: f7ff feac bl 8002382 <__retarget_lock_acquire_recursive> + 800262a: 4621 mov r1, r4 + 800262c: 4638 mov r0, r7 + 800262e: f000 f9b7 bl 80029a0 <_fflush_r> + 8002632: 6b61 ldr r1, [r4, #52] ; 0x34 + 8002634: b141 cbz r1, 8002648 + 8002636: f104 0344 add.w r3, r4, #68 ; 0x44 + 800263a: 4299 cmp r1, r3 + 800263c: d002 beq.n 8002644 + 800263e: 4638 mov r0, r7 + 8002640: f000 fa86 bl 8002b50 <_free_r> + 8002644: 2300 movs r3, #0 + 8002646: 6363 str r3, [r4, #52] ; 0x34 + 8002648: 2300 movs r3, #0 + 800264a: 61a3 str r3, [r4, #24] + 800264c: 6063 str r3, [r4, #4] + 800264e: 89a3 ldrh r3, [r4, #12] + 8002650: 0619 lsls r1, r3, #24 + 8002652: d503 bpl.n 800265c + 8002654: 6921 ldr r1, [r4, #16] + 8002656: 4638 mov r0, r7 + 8002658: f000 fa7a bl 8002b50 <_free_r> + 800265c: 89a3 ldrh r3, [r4, #12] + 800265e: f423 634a bic.w r3, r3, #3232 ; 0xca0 + 8002662: f023 0303 bic.w r3, r3, #3 + 8002666: f1b8 0f02 cmp.w r8, #2 + 800266a: 81a3 strh r3, [r4, #12] + 800266c: d06c beq.n 8002748 + 800266e: ab01 add r3, sp, #4 + 8002670: 466a mov r2, sp + 8002672: 4621 mov r1, r4 + 8002674: 4638 mov r0, r7 + 8002676: f000 f9f3 bl 8002a60 <__swhatbuf_r> + 800267a: 89a3 ldrh r3, [r4, #12] + 800267c: 4318 orrs r0, r3 + 800267e: 81a0 strh r0, [r4, #12] + 8002680: 2d00 cmp r5, #0 + 8002682: d130 bne.n 80026e6 + 8002684: 9d00 ldr r5, [sp, #0] + 8002686: 4628 mov r0, r5 + 8002688: f000 fa4e bl 8002b28 + 800268c: 4606 mov r6, r0 + 800268e: 2800 cmp r0, #0 + 8002690: d155 bne.n 800273e + 8002692: f8dd 9000 ldr.w r9, [sp] + 8002696: 45a9 cmp r9, r5 + 8002698: d14a bne.n 8002730 + 800269a: f04f 35ff mov.w r5, #4294967295 + 800269e: 2200 movs r2, #0 + 80026a0: 60a2 str r2, [r4, #8] + 80026a2: f104 0247 add.w r2, r4, #71 ; 0x47 + 80026a6: 6022 str r2, [r4, #0] + 80026a8: 6122 str r2, [r4, #16] + 80026aa: 2201 movs r2, #1 + 80026ac: f9b4 300c ldrsh.w r3, [r4, #12] + 80026b0: 6162 str r2, [r4, #20] + 80026b2: 6e62 ldr r2, [r4, #100] ; 0x64 + 80026b4: f043 0302 orr.w r3, r3, #2 + 80026b8: 07d2 lsls r2, r2, #31 + 80026ba: 81a3 strh r3, [r4, #12] + 80026bc: d405 bmi.n 80026ca + 80026be: f413 7f00 tst.w r3, #512 ; 0x200 + 80026c2: d102 bne.n 80026ca + 80026c4: 6da0 ldr r0, [r4, #88] ; 0x58 + 80026c6: f7ff fe5d bl 8002384 <__retarget_lock_release_recursive> + 80026ca: 4628 mov r0, r5 + 80026cc: b003 add sp, #12 + 80026ce: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 80026d2: 4b24 ldr r3, [pc, #144] ; (8002764 ) + 80026d4: 429c cmp r4, r3 + 80026d6: d101 bne.n 80026dc + 80026d8: 68bc ldr r4, [r7, #8] + 80026da: e793 b.n 8002604 + 80026dc: 4b22 ldr r3, [pc, #136] ; (8002768 ) + 80026de: 429c cmp r4, r3 + 80026e0: bf08 it eq + 80026e2: 68fc ldreq r4, [r7, #12] + 80026e4: e78e b.n 8002604 + 80026e6: 2e00 cmp r6, #0 + 80026e8: d0cd beq.n 8002686 + 80026ea: 69bb ldr r3, [r7, #24] + 80026ec: b913 cbnz r3, 80026f4 + 80026ee: 4638 mov r0, r7 + 80026f0: f7ff fd68 bl 80021c4 <__sinit> + 80026f4: f1b8 0f01 cmp.w r8, #1 + 80026f8: bf08 it eq + 80026fa: 89a3 ldrheq r3, [r4, #12] + 80026fc: 6026 str r6, [r4, #0] + 80026fe: bf04 itt eq + 8002700: f043 0301 orreq.w r3, r3, #1 + 8002704: 81a3 strheq r3, [r4, #12] + 8002706: 89a2 ldrh r2, [r4, #12] + 8002708: f012 0308 ands.w r3, r2, #8 + 800270c: e9c4 6504 strd r6, r5, [r4, #16] + 8002710: d01c beq.n 800274c + 8002712: 07d3 lsls r3, r2, #31 + 8002714: bf41 itttt mi + 8002716: 2300 movmi r3, #0 + 8002718: 426d negmi r5, r5 + 800271a: 60a3 strmi r3, [r4, #8] + 800271c: 61a5 strmi r5, [r4, #24] + 800271e: bf58 it pl + 8002720: 60a5 strpl r5, [r4, #8] + 8002722: 6e65 ldr r5, [r4, #100] ; 0x64 + 8002724: f015 0501 ands.w r5, r5, #1 + 8002728: d115 bne.n 8002756 + 800272a: f412 7f00 tst.w r2, #512 ; 0x200 + 800272e: e7c8 b.n 80026c2 + 8002730: 4648 mov r0, r9 + 8002732: f000 f9f9 bl 8002b28 + 8002736: 4606 mov r6, r0 + 8002738: 2800 cmp r0, #0 + 800273a: d0ae beq.n 800269a + 800273c: 464d mov r5, r9 + 800273e: 89a3 ldrh r3, [r4, #12] + 8002740: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8002744: 81a3 strh r3, [r4, #12] + 8002746: e7d0 b.n 80026ea + 8002748: 2500 movs r5, #0 + 800274a: e7a8 b.n 800269e + 800274c: 60a3 str r3, [r4, #8] + 800274e: e7e8 b.n 8002722 + 8002750: f04f 35ff mov.w r5, #4294967295 + 8002754: e7b9 b.n 80026ca + 8002756: 2500 movs r5, #0 + 8002758: e7b7 b.n 80026ca + 800275a: bf00 nop + 800275c: 20000c90 .word 0x20000c90 + 8002760: 08004144 .word 0x08004144 + 8002764: 08004164 .word 0x08004164 + 8002768: 08004124 .word 0x08004124 + +0800276c : + 800276c: b40e push {r1, r2, r3} + 800276e: b510 push {r4, lr} + 8002770: b09f sub sp, #124 ; 0x7c + 8002772: ac21 add r4, sp, #132 ; 0x84 + 8002774: f44f 7101 mov.w r1, #516 ; 0x204 + 8002778: f854 2b04 ldr.w r2, [r4], #4 + 800277c: 9201 str r2, [sp, #4] + 800277e: f8ad 101c strh.w r1, [sp, #28] + 8002782: 9004 str r0, [sp, #16] + 8002784: 9008 str r0, [sp, #32] + 8002786: f7fd fd9d bl 80002c4 + 800278a: 4b0c ldr r3, [pc, #48] ; (80027bc ) + 800278c: 9005 str r0, [sp, #20] + 800278e: 9009 str r0, [sp, #36] ; 0x24 + 8002790: 930d str r3, [sp, #52] ; 0x34 + 8002792: 480b ldr r0, [pc, #44] ; (80027c0 ) + 8002794: 9a01 ldr r2, [sp, #4] + 8002796: 6800 ldr r0, [r0, #0] + 8002798: 9403 str r4, [sp, #12] + 800279a: 2300 movs r3, #0 + 800279c: 9311 str r3, [sp, #68] ; 0x44 + 800279e: 9316 str r3, [sp, #88] ; 0x58 + 80027a0: f64f 73ff movw r3, #65535 ; 0xffff + 80027a4: f8ad 301e strh.w r3, [sp, #30] + 80027a8: a904 add r1, sp, #16 + 80027aa: 4623 mov r3, r4 + 80027ac: f000 fa7a bl 8002ca4 <__ssvfiscanf_r> + 80027b0: b01f add sp, #124 ; 0x7c + 80027b2: e8bd 4010 ldmia.w sp!, {r4, lr} + 80027b6: b003 add sp, #12 + 80027b8: 4770 bx lr + 80027ba: bf00 nop + 80027bc: 080027e7 .word 0x080027e7 + 80027c0: 20000c90 .word 0x20000c90 + +080027c4 <__sread>: + 80027c4: b510 push {r4, lr} + 80027c6: 460c mov r4, r1 + 80027c8: f9b1 100e ldrsh.w r1, [r1, #14] + 80027cc: f001 f81c bl 8003808 <_read_r> + 80027d0: 2800 cmp r0, #0 + 80027d2: bfab itete ge + 80027d4: 6d63 ldrge r3, [r4, #84] ; 0x54 + 80027d6: 89a3 ldrhlt r3, [r4, #12] + 80027d8: 181b addge r3, r3, r0 + 80027da: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 80027de: bfac ite ge + 80027e0: 6563 strge r3, [r4, #84] ; 0x54 + 80027e2: 81a3 strhlt r3, [r4, #12] + 80027e4: bd10 pop {r4, pc} + +080027e6 <__seofread>: + 80027e6: 2000 movs r0, #0 + 80027e8: 4770 bx lr + +080027ea <__swrite>: + 80027ea: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80027ee: 461f mov r7, r3 + 80027f0: 898b ldrh r3, [r1, #12] + 80027f2: 05db lsls r3, r3, #23 + 80027f4: 4605 mov r5, r0 + 80027f6: 460c mov r4, r1 + 80027f8: 4616 mov r6, r2 + 80027fa: d505 bpl.n 8002808 <__swrite+0x1e> + 80027fc: f9b1 100e ldrsh.w r1, [r1, #14] + 8002800: 2302 movs r3, #2 + 8002802: 2200 movs r2, #0 + 8002804: f000 f91a bl 8002a3c <_lseek_r> + 8002808: 89a3 ldrh r3, [r4, #12] + 800280a: f9b4 100e ldrsh.w r1, [r4, #14] + 800280e: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 8002812: 81a3 strh r3, [r4, #12] + 8002814: 4632 mov r2, r6 + 8002816: 463b mov r3, r7 + 8002818: 4628 mov r0, r5 + 800281a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 800281e: f000 b817 b.w 8002850 <_write_r> + +08002822 <__sseek>: + 8002822: b510 push {r4, lr} + 8002824: 460c mov r4, r1 + 8002826: f9b1 100e ldrsh.w r1, [r1, #14] + 800282a: f000 f907 bl 8002a3c <_lseek_r> + 800282e: 1c43 adds r3, r0, #1 + 8002830: 89a3 ldrh r3, [r4, #12] + 8002832: bf15 itete ne + 8002834: 6560 strne r0, [r4, #84] ; 0x54 + 8002836: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 800283a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 800283e: 81a3 strheq r3, [r4, #12] + 8002840: bf18 it ne + 8002842: 81a3 strhne r3, [r4, #12] + 8002844: bd10 pop {r4, pc} + +08002846 <__sclose>: + 8002846: f9b1 100e ldrsh.w r1, [r1, #14] + 800284a: f000 b813 b.w 8002874 <_close_r> + ... + +08002850 <_write_r>: + 8002850: b538 push {r3, r4, r5, lr} + 8002852: 4d07 ldr r5, [pc, #28] ; (8002870 <_write_r+0x20>) + 8002854: 4604 mov r4, r0 + 8002856: 4608 mov r0, r1 + 8002858: 4611 mov r1, r2 + 800285a: 2200 movs r2, #0 + 800285c: 602a str r2, [r5, #0] + 800285e: 461a mov r2, r3 + 8002860: f7ff faf9 bl 8001e56 <_write> + 8002864: 1c43 adds r3, r0, #1 + 8002866: d102 bne.n 800286e <_write_r+0x1e> + 8002868: 682b ldr r3, [r5, #0] + 800286a: b103 cbz r3, 800286e <_write_r+0x1e> + 800286c: 6023 str r3, [r4, #0] + 800286e: bd38 pop {r3, r4, r5, pc} + 8002870: 20000d30 .word 0x20000d30 + +08002874 <_close_r>: + 8002874: b538 push {r3, r4, r5, lr} + 8002876: 4d06 ldr r5, [pc, #24] ; (8002890 <_close_r+0x1c>) + 8002878: 2300 movs r3, #0 + 800287a: 4604 mov r4, r0 + 800287c: 4608 mov r0, r1 + 800287e: 602b str r3, [r5, #0] + 8002880: f001 fa62 bl 8003d48 <_close> + 8002884: 1c43 adds r3, r0, #1 + 8002886: d102 bne.n 800288e <_close_r+0x1a> + 8002888: 682b ldr r3, [r5, #0] + 800288a: b103 cbz r3, 800288e <_close_r+0x1a> + 800288c: 6023 str r3, [r4, #0] + 800288e: bd38 pop {r3, r4, r5, pc} + 8002890: 20000d30 .word 0x20000d30 + +08002894 <__sflush_r>: + 8002894: 898a ldrh r2, [r1, #12] + 8002896: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 800289a: 4605 mov r5, r0 + 800289c: 0710 lsls r0, r2, #28 + 800289e: 460c mov r4, r1 + 80028a0: d458 bmi.n 8002954 <__sflush_r+0xc0> + 80028a2: 684b ldr r3, [r1, #4] + 80028a4: 2b00 cmp r3, #0 + 80028a6: dc05 bgt.n 80028b4 <__sflush_r+0x20> + 80028a8: 6c0b ldr r3, [r1, #64] ; 0x40 + 80028aa: 2b00 cmp r3, #0 + 80028ac: dc02 bgt.n 80028b4 <__sflush_r+0x20> + 80028ae: 2000 movs r0, #0 + 80028b0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80028b4: 6ae6 ldr r6, [r4, #44] ; 0x2c + 80028b6: 2e00 cmp r6, #0 + 80028b8: d0f9 beq.n 80028ae <__sflush_r+0x1a> + 80028ba: 2300 movs r3, #0 + 80028bc: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 80028c0: 682f ldr r7, [r5, #0] + 80028c2: 602b str r3, [r5, #0] + 80028c4: d032 beq.n 800292c <__sflush_r+0x98> + 80028c6: 6d60 ldr r0, [r4, #84] ; 0x54 + 80028c8: 89a3 ldrh r3, [r4, #12] + 80028ca: 075a lsls r2, r3, #29 + 80028cc: d505 bpl.n 80028da <__sflush_r+0x46> + 80028ce: 6863 ldr r3, [r4, #4] + 80028d0: 1ac0 subs r0, r0, r3 + 80028d2: 6b63 ldr r3, [r4, #52] ; 0x34 + 80028d4: b10b cbz r3, 80028da <__sflush_r+0x46> + 80028d6: 6c23 ldr r3, [r4, #64] ; 0x40 + 80028d8: 1ac0 subs r0, r0, r3 + 80028da: 2300 movs r3, #0 + 80028dc: 4602 mov r2, r0 + 80028de: 6ae6 ldr r6, [r4, #44] ; 0x2c + 80028e0: 6a21 ldr r1, [r4, #32] + 80028e2: 4628 mov r0, r5 + 80028e4: 47b0 blx r6 + 80028e6: 1c43 adds r3, r0, #1 + 80028e8: 89a3 ldrh r3, [r4, #12] + 80028ea: d106 bne.n 80028fa <__sflush_r+0x66> + 80028ec: 6829 ldr r1, [r5, #0] + 80028ee: 291d cmp r1, #29 + 80028f0: d82c bhi.n 800294c <__sflush_r+0xb8> + 80028f2: 4a2a ldr r2, [pc, #168] ; (800299c <__sflush_r+0x108>) + 80028f4: 40ca lsrs r2, r1 + 80028f6: 07d6 lsls r6, r2, #31 + 80028f8: d528 bpl.n 800294c <__sflush_r+0xb8> + 80028fa: 2200 movs r2, #0 + 80028fc: 6062 str r2, [r4, #4] + 80028fe: 04d9 lsls r1, r3, #19 + 8002900: 6922 ldr r2, [r4, #16] + 8002902: 6022 str r2, [r4, #0] + 8002904: d504 bpl.n 8002910 <__sflush_r+0x7c> + 8002906: 1c42 adds r2, r0, #1 + 8002908: d101 bne.n 800290e <__sflush_r+0x7a> + 800290a: 682b ldr r3, [r5, #0] + 800290c: b903 cbnz r3, 8002910 <__sflush_r+0x7c> + 800290e: 6560 str r0, [r4, #84] ; 0x54 + 8002910: 6b61 ldr r1, [r4, #52] ; 0x34 + 8002912: 602f str r7, [r5, #0] + 8002914: 2900 cmp r1, #0 + 8002916: d0ca beq.n 80028ae <__sflush_r+0x1a> + 8002918: f104 0344 add.w r3, r4, #68 ; 0x44 + 800291c: 4299 cmp r1, r3 + 800291e: d002 beq.n 8002926 <__sflush_r+0x92> + 8002920: 4628 mov r0, r5 + 8002922: f000 f915 bl 8002b50 <_free_r> + 8002926: 2000 movs r0, #0 + 8002928: 6360 str r0, [r4, #52] ; 0x34 + 800292a: e7c1 b.n 80028b0 <__sflush_r+0x1c> + 800292c: 6a21 ldr r1, [r4, #32] + 800292e: 2301 movs r3, #1 + 8002930: 4628 mov r0, r5 + 8002932: 47b0 blx r6 + 8002934: 1c41 adds r1, r0, #1 + 8002936: d1c7 bne.n 80028c8 <__sflush_r+0x34> + 8002938: 682b ldr r3, [r5, #0] + 800293a: 2b00 cmp r3, #0 + 800293c: d0c4 beq.n 80028c8 <__sflush_r+0x34> + 800293e: 2b1d cmp r3, #29 + 8002940: d001 beq.n 8002946 <__sflush_r+0xb2> + 8002942: 2b16 cmp r3, #22 + 8002944: d101 bne.n 800294a <__sflush_r+0xb6> + 8002946: 602f str r7, [r5, #0] + 8002948: e7b1 b.n 80028ae <__sflush_r+0x1a> + 800294a: 89a3 ldrh r3, [r4, #12] + 800294c: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8002950: 81a3 strh r3, [r4, #12] + 8002952: e7ad b.n 80028b0 <__sflush_r+0x1c> + 8002954: 690f ldr r7, [r1, #16] + 8002956: 2f00 cmp r7, #0 + 8002958: d0a9 beq.n 80028ae <__sflush_r+0x1a> + 800295a: 0793 lsls r3, r2, #30 + 800295c: 680e ldr r6, [r1, #0] + 800295e: bf08 it eq + 8002960: 694b ldreq r3, [r1, #20] + 8002962: 600f str r7, [r1, #0] + 8002964: bf18 it ne + 8002966: 2300 movne r3, #0 + 8002968: eba6 0807 sub.w r8, r6, r7 + 800296c: 608b str r3, [r1, #8] + 800296e: f1b8 0f00 cmp.w r8, #0 + 8002972: dd9c ble.n 80028ae <__sflush_r+0x1a> + 8002974: 6a21 ldr r1, [r4, #32] + 8002976: 6aa6 ldr r6, [r4, #40] ; 0x28 + 8002978: 4643 mov r3, r8 + 800297a: 463a mov r2, r7 + 800297c: 4628 mov r0, r5 + 800297e: 47b0 blx r6 + 8002980: 2800 cmp r0, #0 + 8002982: dc06 bgt.n 8002992 <__sflush_r+0xfe> + 8002984: 89a3 ldrh r3, [r4, #12] + 8002986: f043 0340 orr.w r3, r3, #64 ; 0x40 + 800298a: 81a3 strh r3, [r4, #12] + 800298c: f04f 30ff mov.w r0, #4294967295 + 8002990: e78e b.n 80028b0 <__sflush_r+0x1c> + 8002992: 4407 add r7, r0 + 8002994: eba8 0800 sub.w r8, r8, r0 + 8002998: e7e9 b.n 800296e <__sflush_r+0xda> + 800299a: bf00 nop + 800299c: 20400001 .word 0x20400001 + +080029a0 <_fflush_r>: + 80029a0: b538 push {r3, r4, r5, lr} + 80029a2: 690b ldr r3, [r1, #16] + 80029a4: 4605 mov r5, r0 + 80029a6: 460c mov r4, r1 + 80029a8: b913 cbnz r3, 80029b0 <_fflush_r+0x10> + 80029aa: 2500 movs r5, #0 + 80029ac: 4628 mov r0, r5 + 80029ae: bd38 pop {r3, r4, r5, pc} + 80029b0: b118 cbz r0, 80029ba <_fflush_r+0x1a> + 80029b2: 6983 ldr r3, [r0, #24] + 80029b4: b90b cbnz r3, 80029ba <_fflush_r+0x1a> + 80029b6: f7ff fc05 bl 80021c4 <__sinit> + 80029ba: 4b14 ldr r3, [pc, #80] ; (8002a0c <_fflush_r+0x6c>) + 80029bc: 429c cmp r4, r3 + 80029be: d11b bne.n 80029f8 <_fflush_r+0x58> + 80029c0: 686c ldr r4, [r5, #4] + 80029c2: f9b4 300c ldrsh.w r3, [r4, #12] + 80029c6: 2b00 cmp r3, #0 + 80029c8: d0ef beq.n 80029aa <_fflush_r+0xa> + 80029ca: 6e62 ldr r2, [r4, #100] ; 0x64 + 80029cc: 07d0 lsls r0, r2, #31 + 80029ce: d404 bmi.n 80029da <_fflush_r+0x3a> + 80029d0: 0599 lsls r1, r3, #22 + 80029d2: d402 bmi.n 80029da <_fflush_r+0x3a> + 80029d4: 6da0 ldr r0, [r4, #88] ; 0x58 + 80029d6: f7ff fcd4 bl 8002382 <__retarget_lock_acquire_recursive> + 80029da: 4628 mov r0, r5 + 80029dc: 4621 mov r1, r4 + 80029de: f7ff ff59 bl 8002894 <__sflush_r> + 80029e2: 6e63 ldr r3, [r4, #100] ; 0x64 + 80029e4: 07da lsls r2, r3, #31 + 80029e6: 4605 mov r5, r0 + 80029e8: d4e0 bmi.n 80029ac <_fflush_r+0xc> + 80029ea: 89a3 ldrh r3, [r4, #12] + 80029ec: 059b lsls r3, r3, #22 + 80029ee: d4dd bmi.n 80029ac <_fflush_r+0xc> + 80029f0: 6da0 ldr r0, [r4, #88] ; 0x58 + 80029f2: f7ff fcc7 bl 8002384 <__retarget_lock_release_recursive> + 80029f6: e7d9 b.n 80029ac <_fflush_r+0xc> + 80029f8: 4b05 ldr r3, [pc, #20] ; (8002a10 <_fflush_r+0x70>) + 80029fa: 429c cmp r4, r3 + 80029fc: d101 bne.n 8002a02 <_fflush_r+0x62> + 80029fe: 68ac ldr r4, [r5, #8] + 8002a00: e7df b.n 80029c2 <_fflush_r+0x22> + 8002a02: 4b04 ldr r3, [pc, #16] ; (8002a14 <_fflush_r+0x74>) + 8002a04: 429c cmp r4, r3 + 8002a06: bf08 it eq + 8002a08: 68ec ldreq r4, [r5, #12] + 8002a0a: e7da b.n 80029c2 <_fflush_r+0x22> + 8002a0c: 08004144 .word 0x08004144 + 8002a10: 08004164 .word 0x08004164 + 8002a14: 08004124 .word 0x08004124 + +08002a18 : + 8002a18: 4601 mov r1, r0 + 8002a1a: b920 cbnz r0, 8002a26 + 8002a1c: 4b04 ldr r3, [pc, #16] ; (8002a30 ) + 8002a1e: 4905 ldr r1, [pc, #20] ; (8002a34 ) + 8002a20: 6818 ldr r0, [r3, #0] + 8002a22: f7ff bc6a b.w 80022fa <_fwalk_reent> + 8002a26: 4b04 ldr r3, [pc, #16] ; (8002a38 ) + 8002a28: 6818 ldr r0, [r3, #0] + 8002a2a: f7ff bfb9 b.w 80029a0 <_fflush_r> + 8002a2e: bf00 nop + 8002a30: 08004184 .word 0x08004184 + 8002a34: 080029a1 .word 0x080029a1 + 8002a38: 20000c90 .word 0x20000c90 + +08002a3c <_lseek_r>: + 8002a3c: b538 push {r3, r4, r5, lr} + 8002a3e: 4d07 ldr r5, [pc, #28] ; (8002a5c <_lseek_r+0x20>) + 8002a40: 4604 mov r4, r0 + 8002a42: 4608 mov r0, r1 + 8002a44: 4611 mov r1, r2 + 8002a46: 2200 movs r2, #0 + 8002a48: 602a str r2, [r5, #0] + 8002a4a: 461a mov r2, r3 + 8002a4c: f001 f994 bl 8003d78 <_lseek> + 8002a50: 1c43 adds r3, r0, #1 + 8002a52: d102 bne.n 8002a5a <_lseek_r+0x1e> + 8002a54: 682b ldr r3, [r5, #0] + 8002a56: b103 cbz r3, 8002a5a <_lseek_r+0x1e> + 8002a58: 6023 str r3, [r4, #0] + 8002a5a: bd38 pop {r3, r4, r5, pc} + 8002a5c: 20000d30 .word 0x20000d30 + +08002a60 <__swhatbuf_r>: + 8002a60: b570 push {r4, r5, r6, lr} + 8002a62: 460e mov r6, r1 + 8002a64: f9b1 100e ldrsh.w r1, [r1, #14] + 8002a68: 2900 cmp r1, #0 + 8002a6a: b096 sub sp, #88 ; 0x58 + 8002a6c: 4614 mov r4, r2 + 8002a6e: 461d mov r5, r3 + 8002a70: da07 bge.n 8002a82 <__swhatbuf_r+0x22> + 8002a72: 2300 movs r3, #0 + 8002a74: 602b str r3, [r5, #0] + 8002a76: 89b3 ldrh r3, [r6, #12] + 8002a78: 061a lsls r2, r3, #24 + 8002a7a: d410 bmi.n 8002a9e <__swhatbuf_r+0x3e> + 8002a7c: f44f 6380 mov.w r3, #1024 ; 0x400 + 8002a80: e00e b.n 8002aa0 <__swhatbuf_r+0x40> + 8002a82: 466a mov r2, sp + 8002a84: f001 f910 bl 8003ca8 <_fstat_r> + 8002a88: 2800 cmp r0, #0 + 8002a8a: dbf2 blt.n 8002a72 <__swhatbuf_r+0x12> + 8002a8c: 9a01 ldr r2, [sp, #4] + 8002a8e: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 8002a92: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 8002a96: 425a negs r2, r3 + 8002a98: 415a adcs r2, r3 + 8002a9a: 602a str r2, [r5, #0] + 8002a9c: e7ee b.n 8002a7c <__swhatbuf_r+0x1c> + 8002a9e: 2340 movs r3, #64 ; 0x40 + 8002aa0: 2000 movs r0, #0 + 8002aa2: 6023 str r3, [r4, #0] + 8002aa4: b016 add sp, #88 ; 0x58 + 8002aa6: bd70 pop {r4, r5, r6, pc} + +08002aa8 <__smakebuf_r>: + 8002aa8: 898b ldrh r3, [r1, #12] + 8002aaa: b573 push {r0, r1, r4, r5, r6, lr} + 8002aac: 079d lsls r5, r3, #30 + 8002aae: 4606 mov r6, r0 + 8002ab0: 460c mov r4, r1 + 8002ab2: d507 bpl.n 8002ac4 <__smakebuf_r+0x1c> + 8002ab4: f104 0347 add.w r3, r4, #71 ; 0x47 + 8002ab8: 6023 str r3, [r4, #0] + 8002aba: 6123 str r3, [r4, #16] + 8002abc: 2301 movs r3, #1 + 8002abe: 6163 str r3, [r4, #20] + 8002ac0: b002 add sp, #8 + 8002ac2: bd70 pop {r4, r5, r6, pc} + 8002ac4: ab01 add r3, sp, #4 + 8002ac6: 466a mov r2, sp + 8002ac8: f7ff ffca bl 8002a60 <__swhatbuf_r> + 8002acc: 9900 ldr r1, [sp, #0] + 8002ace: 4605 mov r5, r0 + 8002ad0: 4630 mov r0, r6 + 8002ad2: f7ff fc6f bl 80023b4 <_malloc_r> + 8002ad6: b948 cbnz r0, 8002aec <__smakebuf_r+0x44> + 8002ad8: f9b4 300c ldrsh.w r3, [r4, #12] + 8002adc: 059a lsls r2, r3, #22 + 8002ade: d4ef bmi.n 8002ac0 <__smakebuf_r+0x18> + 8002ae0: f023 0303 bic.w r3, r3, #3 + 8002ae4: f043 0302 orr.w r3, r3, #2 + 8002ae8: 81a3 strh r3, [r4, #12] + 8002aea: e7e3 b.n 8002ab4 <__smakebuf_r+0xc> + 8002aec: 4b0d ldr r3, [pc, #52] ; (8002b24 <__smakebuf_r+0x7c>) + 8002aee: 62b3 str r3, [r6, #40] ; 0x28 + 8002af0: 89a3 ldrh r3, [r4, #12] + 8002af2: 6020 str r0, [r4, #0] + 8002af4: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8002af8: 81a3 strh r3, [r4, #12] + 8002afa: 9b00 ldr r3, [sp, #0] + 8002afc: 6163 str r3, [r4, #20] + 8002afe: 9b01 ldr r3, [sp, #4] + 8002b00: 6120 str r0, [r4, #16] + 8002b02: b15b cbz r3, 8002b1c <__smakebuf_r+0x74> + 8002b04: f9b4 100e ldrsh.w r1, [r4, #14] + 8002b08: 4630 mov r0, r6 + 8002b0a: f001 f8df bl 8003ccc <_isatty_r> + 8002b0e: b128 cbz r0, 8002b1c <__smakebuf_r+0x74> + 8002b10: 89a3 ldrh r3, [r4, #12] + 8002b12: f023 0303 bic.w r3, r3, #3 + 8002b16: f043 0301 orr.w r3, r3, #1 + 8002b1a: 81a3 strh r3, [r4, #12] + 8002b1c: 89a0 ldrh r0, [r4, #12] + 8002b1e: 4305 orrs r5, r0 + 8002b20: 81a5 strh r5, [r4, #12] + 8002b22: e7cd b.n 8002ac0 <__smakebuf_r+0x18> + 8002b24: 0800215d .word 0x0800215d + +08002b28 : + 8002b28: 4b02 ldr r3, [pc, #8] ; (8002b34 ) + 8002b2a: 4601 mov r1, r0 + 8002b2c: 6818 ldr r0, [r3, #0] + 8002b2e: f7ff bc41 b.w 80023b4 <_malloc_r> + 8002b32: bf00 nop + 8002b34: 20000c90 .word 0x20000c90 + +08002b38 <__malloc_lock>: + 8002b38: 4801 ldr r0, [pc, #4] ; (8002b40 <__malloc_lock+0x8>) + 8002b3a: f7ff bc22 b.w 8002382 <__retarget_lock_acquire_recursive> + 8002b3e: bf00 nop + 8002b40: 20000d28 .word 0x20000d28 + +08002b44 <__malloc_unlock>: + 8002b44: 4801 ldr r0, [pc, #4] ; (8002b4c <__malloc_unlock+0x8>) + 8002b46: f7ff bc1d b.w 8002384 <__retarget_lock_release_recursive> + 8002b4a: bf00 nop + 8002b4c: 20000d28 .word 0x20000d28 + +08002b50 <_free_r>: + 8002b50: b537 push {r0, r1, r2, r4, r5, lr} + 8002b52: 2900 cmp r1, #0 + 8002b54: d048 beq.n 8002be8 <_free_r+0x98> + 8002b56: f851 3c04 ldr.w r3, [r1, #-4] + 8002b5a: 9001 str r0, [sp, #4] + 8002b5c: 2b00 cmp r3, #0 + 8002b5e: f1a1 0404 sub.w r4, r1, #4 + 8002b62: bfb8 it lt + 8002b64: 18e4 addlt r4, r4, r3 + 8002b66: f7ff ffe7 bl 8002b38 <__malloc_lock> + 8002b6a: 4a20 ldr r2, [pc, #128] ; (8002bec <_free_r+0x9c>) + 8002b6c: 9801 ldr r0, [sp, #4] + 8002b6e: 6813 ldr r3, [r2, #0] + 8002b70: 4615 mov r5, r2 + 8002b72: b933 cbnz r3, 8002b82 <_free_r+0x32> + 8002b74: 6063 str r3, [r4, #4] + 8002b76: 6014 str r4, [r2, #0] + 8002b78: b003 add sp, #12 + 8002b7a: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 8002b7e: f7ff bfe1 b.w 8002b44 <__malloc_unlock> + 8002b82: 42a3 cmp r3, r4 + 8002b84: d90b bls.n 8002b9e <_free_r+0x4e> + 8002b86: 6821 ldr r1, [r4, #0] + 8002b88: 1862 adds r2, r4, r1 + 8002b8a: 4293 cmp r3, r2 + 8002b8c: bf04 itt eq + 8002b8e: 681a ldreq r2, [r3, #0] + 8002b90: 685b ldreq r3, [r3, #4] + 8002b92: 6063 str r3, [r4, #4] + 8002b94: bf04 itt eq + 8002b96: 1852 addeq r2, r2, r1 + 8002b98: 6022 streq r2, [r4, #0] + 8002b9a: 602c str r4, [r5, #0] + 8002b9c: e7ec b.n 8002b78 <_free_r+0x28> + 8002b9e: 461a mov r2, r3 + 8002ba0: 685b ldr r3, [r3, #4] + 8002ba2: b10b cbz r3, 8002ba8 <_free_r+0x58> + 8002ba4: 42a3 cmp r3, r4 + 8002ba6: d9fa bls.n 8002b9e <_free_r+0x4e> + 8002ba8: 6811 ldr r1, [r2, #0] + 8002baa: 1855 adds r5, r2, r1 + 8002bac: 42a5 cmp r5, r4 + 8002bae: d10b bne.n 8002bc8 <_free_r+0x78> + 8002bb0: 6824 ldr r4, [r4, #0] + 8002bb2: 4421 add r1, r4 + 8002bb4: 1854 adds r4, r2, r1 + 8002bb6: 42a3 cmp r3, r4 + 8002bb8: 6011 str r1, [r2, #0] + 8002bba: d1dd bne.n 8002b78 <_free_r+0x28> + 8002bbc: 681c ldr r4, [r3, #0] + 8002bbe: 685b ldr r3, [r3, #4] + 8002bc0: 6053 str r3, [r2, #4] + 8002bc2: 4421 add r1, r4 + 8002bc4: 6011 str r1, [r2, #0] + 8002bc6: e7d7 b.n 8002b78 <_free_r+0x28> + 8002bc8: d902 bls.n 8002bd0 <_free_r+0x80> + 8002bca: 230c movs r3, #12 + 8002bcc: 6003 str r3, [r0, #0] + 8002bce: e7d3 b.n 8002b78 <_free_r+0x28> + 8002bd0: 6825 ldr r5, [r4, #0] + 8002bd2: 1961 adds r1, r4, r5 + 8002bd4: 428b cmp r3, r1 + 8002bd6: bf04 itt eq + 8002bd8: 6819 ldreq r1, [r3, #0] + 8002bda: 685b ldreq r3, [r3, #4] + 8002bdc: 6063 str r3, [r4, #4] + 8002bde: bf04 itt eq + 8002be0: 1949 addeq r1, r1, r5 + 8002be2: 6021 streq r1, [r4, #0] + 8002be4: 6054 str r4, [r2, #4] + 8002be6: e7c7 b.n 8002b78 <_free_r+0x28> + 8002be8: b003 add sp, #12 + 8002bea: bd30 pop {r4, r5, pc} + 8002bec: 20000d18 .word 0x20000d18 + +08002bf0 <_sungetc_r>: + 8002bf0: b538 push {r3, r4, r5, lr} + 8002bf2: 1c4b adds r3, r1, #1 + 8002bf4: 4614 mov r4, r2 + 8002bf6: d103 bne.n 8002c00 <_sungetc_r+0x10> + 8002bf8: f04f 35ff mov.w r5, #4294967295 + 8002bfc: 4628 mov r0, r5 + 8002bfe: bd38 pop {r3, r4, r5, pc} + 8002c00: 8993 ldrh r3, [r2, #12] + 8002c02: f023 0320 bic.w r3, r3, #32 + 8002c06: 8193 strh r3, [r2, #12] + 8002c08: 6b63 ldr r3, [r4, #52] ; 0x34 + 8002c0a: 6852 ldr r2, [r2, #4] + 8002c0c: b2cd uxtb r5, r1 + 8002c0e: b18b cbz r3, 8002c34 <_sungetc_r+0x44> + 8002c10: 6ba3 ldr r3, [r4, #56] ; 0x38 + 8002c12: 4293 cmp r3, r2 + 8002c14: dd08 ble.n 8002c28 <_sungetc_r+0x38> + 8002c16: 6823 ldr r3, [r4, #0] + 8002c18: 1e5a subs r2, r3, #1 + 8002c1a: 6022 str r2, [r4, #0] + 8002c1c: f803 5c01 strb.w r5, [r3, #-1] + 8002c20: 6863 ldr r3, [r4, #4] + 8002c22: 3301 adds r3, #1 + 8002c24: 6063 str r3, [r4, #4] + 8002c26: e7e9 b.n 8002bfc <_sungetc_r+0xc> + 8002c28: 4621 mov r1, r4 + 8002c2a: f000 ff3d bl 8003aa8 <__submore> + 8002c2e: 2800 cmp r0, #0 + 8002c30: d0f1 beq.n 8002c16 <_sungetc_r+0x26> + 8002c32: e7e1 b.n 8002bf8 <_sungetc_r+0x8> + 8002c34: 6921 ldr r1, [r4, #16] + 8002c36: 6823 ldr r3, [r4, #0] + 8002c38: b151 cbz r1, 8002c50 <_sungetc_r+0x60> + 8002c3a: 4299 cmp r1, r3 + 8002c3c: d208 bcs.n 8002c50 <_sungetc_r+0x60> + 8002c3e: f813 1c01 ldrb.w r1, [r3, #-1] + 8002c42: 42a9 cmp r1, r5 + 8002c44: d104 bne.n 8002c50 <_sungetc_r+0x60> + 8002c46: 3b01 subs r3, #1 + 8002c48: 3201 adds r2, #1 + 8002c4a: 6023 str r3, [r4, #0] + 8002c4c: 6062 str r2, [r4, #4] + 8002c4e: e7d5 b.n 8002bfc <_sungetc_r+0xc> + 8002c50: e9c4 320f strd r3, r2, [r4, #60] ; 0x3c + 8002c54: f104 0344 add.w r3, r4, #68 ; 0x44 + 8002c58: 6363 str r3, [r4, #52] ; 0x34 + 8002c5a: 2303 movs r3, #3 + 8002c5c: 63a3 str r3, [r4, #56] ; 0x38 + 8002c5e: 4623 mov r3, r4 + 8002c60: f803 5f46 strb.w r5, [r3, #70]! + 8002c64: 6023 str r3, [r4, #0] + 8002c66: 2301 movs r3, #1 + 8002c68: e7dc b.n 8002c24 <_sungetc_r+0x34> + +08002c6a <__ssrefill_r>: + 8002c6a: b510 push {r4, lr} + 8002c6c: 460c mov r4, r1 + 8002c6e: 6b49 ldr r1, [r1, #52] ; 0x34 + 8002c70: b169 cbz r1, 8002c8e <__ssrefill_r+0x24> + 8002c72: f104 0344 add.w r3, r4, #68 ; 0x44 + 8002c76: 4299 cmp r1, r3 + 8002c78: d001 beq.n 8002c7e <__ssrefill_r+0x14> + 8002c7a: f7ff ff69 bl 8002b50 <_free_r> + 8002c7e: 6c23 ldr r3, [r4, #64] ; 0x40 + 8002c80: 6063 str r3, [r4, #4] + 8002c82: 2000 movs r0, #0 + 8002c84: 6360 str r0, [r4, #52] ; 0x34 + 8002c86: b113 cbz r3, 8002c8e <__ssrefill_r+0x24> + 8002c88: 6be3 ldr r3, [r4, #60] ; 0x3c + 8002c8a: 6023 str r3, [r4, #0] + 8002c8c: bd10 pop {r4, pc} + 8002c8e: 6923 ldr r3, [r4, #16] + 8002c90: 6023 str r3, [r4, #0] + 8002c92: 2300 movs r3, #0 + 8002c94: 6063 str r3, [r4, #4] + 8002c96: 89a3 ldrh r3, [r4, #12] + 8002c98: f043 0320 orr.w r3, r3, #32 + 8002c9c: 81a3 strh r3, [r4, #12] + 8002c9e: f04f 30ff mov.w r0, #4294967295 + 8002ca2: e7f3 b.n 8002c8c <__ssrefill_r+0x22> + +08002ca4 <__ssvfiscanf_r>: + 8002ca4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8002ca8: 460c mov r4, r1 + 8002caa: f5ad 7d23 sub.w sp, sp, #652 ; 0x28c + 8002cae: 2100 movs r1, #0 + 8002cb0: e9cd 1144 strd r1, r1, [sp, #272] ; 0x110 + 8002cb4: 49b2 ldr r1, [pc, #712] ; (8002f80 <__ssvfiscanf_r+0x2dc>) + 8002cb6: 91a0 str r1, [sp, #640] ; 0x280 + 8002cb8: f10d 0804 add.w r8, sp, #4 + 8002cbc: 49b1 ldr r1, [pc, #708] ; (8002f84 <__ssvfiscanf_r+0x2e0>) + 8002cbe: 4fb2 ldr r7, [pc, #712] ; (8002f88 <__ssvfiscanf_r+0x2e4>) + 8002cc0: f8df 92c8 ldr.w r9, [pc, #712] ; 8002f8c <__ssvfiscanf_r+0x2e8> + 8002cc4: f8cd 8118 str.w r8, [sp, #280] ; 0x118 + 8002cc8: 4606 mov r6, r0 + 8002cca: 91a1 str r1, [sp, #644] ; 0x284 + 8002ccc: 9300 str r3, [sp, #0] + 8002cce: f892 a000 ldrb.w sl, [r2] + 8002cd2: f1ba 0f00 cmp.w sl, #0 + 8002cd6: f000 8151 beq.w 8002f7c <__ssvfiscanf_r+0x2d8> + 8002cda: f81a 3007 ldrb.w r3, [sl, r7] + 8002cde: f013 0308 ands.w r3, r3, #8 + 8002ce2: f102 0501 add.w r5, r2, #1 + 8002ce6: d019 beq.n 8002d1c <__ssvfiscanf_r+0x78> + 8002ce8: 6863 ldr r3, [r4, #4] + 8002cea: 2b00 cmp r3, #0 + 8002cec: dd0f ble.n 8002d0e <__ssvfiscanf_r+0x6a> + 8002cee: 6823 ldr r3, [r4, #0] + 8002cf0: 781a ldrb r2, [r3, #0] + 8002cf2: 5cba ldrb r2, [r7, r2] + 8002cf4: 0712 lsls r2, r2, #28 + 8002cf6: d401 bmi.n 8002cfc <__ssvfiscanf_r+0x58> + 8002cf8: 462a mov r2, r5 + 8002cfa: e7e8 b.n 8002cce <__ssvfiscanf_r+0x2a> + 8002cfc: 9a45 ldr r2, [sp, #276] ; 0x114 + 8002cfe: 3201 adds r2, #1 + 8002d00: 9245 str r2, [sp, #276] ; 0x114 + 8002d02: 6862 ldr r2, [r4, #4] + 8002d04: 3301 adds r3, #1 + 8002d06: 3a01 subs r2, #1 + 8002d08: 6062 str r2, [r4, #4] + 8002d0a: 6023 str r3, [r4, #0] + 8002d0c: e7ec b.n 8002ce8 <__ssvfiscanf_r+0x44> + 8002d0e: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8002d10: 4621 mov r1, r4 + 8002d12: 4630 mov r0, r6 + 8002d14: 4798 blx r3 + 8002d16: 2800 cmp r0, #0 + 8002d18: d0e9 beq.n 8002cee <__ssvfiscanf_r+0x4a> + 8002d1a: e7ed b.n 8002cf8 <__ssvfiscanf_r+0x54> + 8002d1c: f1ba 0f25 cmp.w sl, #37 ; 0x25 + 8002d20: f040 8083 bne.w 8002e2a <__ssvfiscanf_r+0x186> + 8002d24: 9341 str r3, [sp, #260] ; 0x104 + 8002d26: 9343 str r3, [sp, #268] ; 0x10c + 8002d28: 7853 ldrb r3, [r2, #1] + 8002d2a: 2b2a cmp r3, #42 ; 0x2a + 8002d2c: bf02 ittt eq + 8002d2e: 2310 moveq r3, #16 + 8002d30: 1c95 addeq r5, r2, #2 + 8002d32: 9341 streq r3, [sp, #260] ; 0x104 + 8002d34: 220a movs r2, #10 + 8002d36: 46ab mov fp, r5 + 8002d38: f81b 1b01 ldrb.w r1, [fp], #1 + 8002d3c: f1a1 0330 sub.w r3, r1, #48 ; 0x30 + 8002d40: 2b09 cmp r3, #9 + 8002d42: d91d bls.n 8002d80 <__ssvfiscanf_r+0xdc> + 8002d44: 4891 ldr r0, [pc, #580] ; (8002f8c <__ssvfiscanf_r+0x2e8>) + 8002d46: 2203 movs r2, #3 + 8002d48: f7fd fa62 bl 8000210 + 8002d4c: b140 cbz r0, 8002d60 <__ssvfiscanf_r+0xbc> + 8002d4e: 2301 movs r3, #1 + 8002d50: eba0 0009 sub.w r0, r0, r9 + 8002d54: fa03 f000 lsl.w r0, r3, r0 + 8002d58: 9b41 ldr r3, [sp, #260] ; 0x104 + 8002d5a: 4318 orrs r0, r3 + 8002d5c: 9041 str r0, [sp, #260] ; 0x104 + 8002d5e: 465d mov r5, fp + 8002d60: f815 3b01 ldrb.w r3, [r5], #1 + 8002d64: 2b78 cmp r3, #120 ; 0x78 + 8002d66: d806 bhi.n 8002d76 <__ssvfiscanf_r+0xd2> + 8002d68: 2b57 cmp r3, #87 ; 0x57 + 8002d6a: d810 bhi.n 8002d8e <__ssvfiscanf_r+0xea> + 8002d6c: 2b25 cmp r3, #37 ; 0x25 + 8002d6e: d05c beq.n 8002e2a <__ssvfiscanf_r+0x186> + 8002d70: d856 bhi.n 8002e20 <__ssvfiscanf_r+0x17c> + 8002d72: 2b00 cmp r3, #0 + 8002d74: d074 beq.n 8002e60 <__ssvfiscanf_r+0x1bc> + 8002d76: 2303 movs r3, #3 + 8002d78: 9347 str r3, [sp, #284] ; 0x11c + 8002d7a: 230a movs r3, #10 + 8002d7c: 9342 str r3, [sp, #264] ; 0x108 + 8002d7e: e081 b.n 8002e84 <__ssvfiscanf_r+0x1e0> + 8002d80: 9b43 ldr r3, [sp, #268] ; 0x10c + 8002d82: fb02 1303 mla r3, r2, r3, r1 + 8002d86: 3b30 subs r3, #48 ; 0x30 + 8002d88: 9343 str r3, [sp, #268] ; 0x10c + 8002d8a: 465d mov r5, fp + 8002d8c: e7d3 b.n 8002d36 <__ssvfiscanf_r+0x92> + 8002d8e: f1a3 0258 sub.w r2, r3, #88 ; 0x58 + 8002d92: 2a20 cmp r2, #32 + 8002d94: d8ef bhi.n 8002d76 <__ssvfiscanf_r+0xd2> + 8002d96: a101 add r1, pc, #4 ; (adr r1, 8002d9c <__ssvfiscanf_r+0xf8>) + 8002d98: f851 f022 ldr.w pc, [r1, r2, lsl #2] + 8002d9c: 08002e6f .word 0x08002e6f + 8002da0: 08002d77 .word 0x08002d77 + 8002da4: 08002d77 .word 0x08002d77 + 8002da8: 08002ecd .word 0x08002ecd + 8002dac: 08002d77 .word 0x08002d77 + 8002db0: 08002d77 .word 0x08002d77 + 8002db4: 08002d77 .word 0x08002d77 + 8002db8: 08002d77 .word 0x08002d77 + 8002dbc: 08002d77 .word 0x08002d77 + 8002dc0: 08002d77 .word 0x08002d77 + 8002dc4: 08002d77 .word 0x08002d77 + 8002dc8: 08002ee3 .word 0x08002ee3 + 8002dcc: 08002eb9 .word 0x08002eb9 + 8002dd0: 08002e27 .word 0x08002e27 + 8002dd4: 08002e27 .word 0x08002e27 + 8002dd8: 08002e27 .word 0x08002e27 + 8002ddc: 08002d77 .word 0x08002d77 + 8002de0: 08002ebd .word 0x08002ebd + 8002de4: 08002d77 .word 0x08002d77 + 8002de8: 08002d77 .word 0x08002d77 + 8002dec: 08002d77 .word 0x08002d77 + 8002df0: 08002d77 .word 0x08002d77 + 8002df4: 08002ef3 .word 0x08002ef3 + 8002df8: 08002ec5 .word 0x08002ec5 + 8002dfc: 08002e67 .word 0x08002e67 + 8002e00: 08002d77 .word 0x08002d77 + 8002e04: 08002d77 .word 0x08002d77 + 8002e08: 08002eef .word 0x08002eef + 8002e0c: 08002d77 .word 0x08002d77 + 8002e10: 08002eb9 .word 0x08002eb9 + 8002e14: 08002d77 .word 0x08002d77 + 8002e18: 08002d77 .word 0x08002d77 + 8002e1c: 08002e6f .word 0x08002e6f + 8002e20: 3b45 subs r3, #69 ; 0x45 + 8002e22: 2b02 cmp r3, #2 + 8002e24: d8a7 bhi.n 8002d76 <__ssvfiscanf_r+0xd2> + 8002e26: 2305 movs r3, #5 + 8002e28: e02b b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002e2a: 6863 ldr r3, [r4, #4] + 8002e2c: 2b00 cmp r3, #0 + 8002e2e: dd0d ble.n 8002e4c <__ssvfiscanf_r+0x1a8> + 8002e30: 6823 ldr r3, [r4, #0] + 8002e32: 781a ldrb r2, [r3, #0] + 8002e34: 4552 cmp r2, sl + 8002e36: f040 80a1 bne.w 8002f7c <__ssvfiscanf_r+0x2d8> + 8002e3a: 3301 adds r3, #1 + 8002e3c: 6862 ldr r2, [r4, #4] + 8002e3e: 6023 str r3, [r4, #0] + 8002e40: 9b45 ldr r3, [sp, #276] ; 0x114 + 8002e42: 3a01 subs r2, #1 + 8002e44: 3301 adds r3, #1 + 8002e46: 6062 str r2, [r4, #4] + 8002e48: 9345 str r3, [sp, #276] ; 0x114 + 8002e4a: e755 b.n 8002cf8 <__ssvfiscanf_r+0x54> + 8002e4c: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8002e4e: 4621 mov r1, r4 + 8002e50: 4630 mov r0, r6 + 8002e52: 4798 blx r3 + 8002e54: 2800 cmp r0, #0 + 8002e56: d0eb beq.n 8002e30 <__ssvfiscanf_r+0x18c> + 8002e58: 9844 ldr r0, [sp, #272] ; 0x110 + 8002e5a: 2800 cmp r0, #0 + 8002e5c: f040 8084 bne.w 8002f68 <__ssvfiscanf_r+0x2c4> + 8002e60: f04f 30ff mov.w r0, #4294967295 + 8002e64: e086 b.n 8002f74 <__ssvfiscanf_r+0x2d0> + 8002e66: 9a41 ldr r2, [sp, #260] ; 0x104 + 8002e68: f042 0220 orr.w r2, r2, #32 + 8002e6c: 9241 str r2, [sp, #260] ; 0x104 + 8002e6e: 9a41 ldr r2, [sp, #260] ; 0x104 + 8002e70: f442 7200 orr.w r2, r2, #512 ; 0x200 + 8002e74: 9241 str r2, [sp, #260] ; 0x104 + 8002e76: 2210 movs r2, #16 + 8002e78: 2b6f cmp r3, #111 ; 0x6f + 8002e7a: 9242 str r2, [sp, #264] ; 0x108 + 8002e7c: bf34 ite cc + 8002e7e: 2303 movcc r3, #3 + 8002e80: 2304 movcs r3, #4 + 8002e82: 9347 str r3, [sp, #284] ; 0x11c + 8002e84: 6863 ldr r3, [r4, #4] + 8002e86: 2b00 cmp r3, #0 + 8002e88: dd41 ble.n 8002f0e <__ssvfiscanf_r+0x26a> + 8002e8a: 9b41 ldr r3, [sp, #260] ; 0x104 + 8002e8c: 0659 lsls r1, r3, #25 + 8002e8e: d404 bmi.n 8002e9a <__ssvfiscanf_r+0x1f6> + 8002e90: 6823 ldr r3, [r4, #0] + 8002e92: 781a ldrb r2, [r3, #0] + 8002e94: 5cba ldrb r2, [r7, r2] + 8002e96: 0712 lsls r2, r2, #28 + 8002e98: d440 bmi.n 8002f1c <__ssvfiscanf_r+0x278> + 8002e9a: 9b47 ldr r3, [sp, #284] ; 0x11c + 8002e9c: 2b02 cmp r3, #2 + 8002e9e: dc4f bgt.n 8002f40 <__ssvfiscanf_r+0x29c> + 8002ea0: 466b mov r3, sp + 8002ea2: 4622 mov r2, r4 + 8002ea4: a941 add r1, sp, #260 ; 0x104 + 8002ea6: 4630 mov r0, r6 + 8002ea8: f000 fb62 bl 8003570 <_scanf_chars> + 8002eac: 2801 cmp r0, #1 + 8002eae: d065 beq.n 8002f7c <__ssvfiscanf_r+0x2d8> + 8002eb0: 2802 cmp r0, #2 + 8002eb2: f47f af21 bne.w 8002cf8 <__ssvfiscanf_r+0x54> + 8002eb6: e7cf b.n 8002e58 <__ssvfiscanf_r+0x1b4> + 8002eb8: 220a movs r2, #10 + 8002eba: e7dd b.n 8002e78 <__ssvfiscanf_r+0x1d4> + 8002ebc: 2300 movs r3, #0 + 8002ebe: 9342 str r3, [sp, #264] ; 0x108 + 8002ec0: 2303 movs r3, #3 + 8002ec2: e7de b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002ec4: 2308 movs r3, #8 + 8002ec6: 9342 str r3, [sp, #264] ; 0x108 + 8002ec8: 2304 movs r3, #4 + 8002eca: e7da b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002ecc: 4629 mov r1, r5 + 8002ece: 4640 mov r0, r8 + 8002ed0: f000 fcac bl 800382c <__sccl> + 8002ed4: 9b41 ldr r3, [sp, #260] ; 0x104 + 8002ed6: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8002eda: 9341 str r3, [sp, #260] ; 0x104 + 8002edc: 4605 mov r5, r0 + 8002ede: 2301 movs r3, #1 + 8002ee0: e7cf b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002ee2: 9b41 ldr r3, [sp, #260] ; 0x104 + 8002ee4: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8002ee8: 9341 str r3, [sp, #260] ; 0x104 + 8002eea: 2300 movs r3, #0 + 8002eec: e7c9 b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002eee: 2302 movs r3, #2 + 8002ef0: e7c7 b.n 8002e82 <__ssvfiscanf_r+0x1de> + 8002ef2: 9841 ldr r0, [sp, #260] ; 0x104 + 8002ef4: 06c3 lsls r3, r0, #27 + 8002ef6: f53f aeff bmi.w 8002cf8 <__ssvfiscanf_r+0x54> + 8002efa: 9b00 ldr r3, [sp, #0] + 8002efc: 9a45 ldr r2, [sp, #276] ; 0x114 + 8002efe: 1d19 adds r1, r3, #4 + 8002f00: 9100 str r1, [sp, #0] + 8002f02: 681b ldr r3, [r3, #0] + 8002f04: 07c0 lsls r0, r0, #31 + 8002f06: bf4c ite mi + 8002f08: 801a strhmi r2, [r3, #0] + 8002f0a: 601a strpl r2, [r3, #0] + 8002f0c: e6f4 b.n 8002cf8 <__ssvfiscanf_r+0x54> + 8002f0e: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8002f10: 4621 mov r1, r4 + 8002f12: 4630 mov r0, r6 + 8002f14: 4798 blx r3 + 8002f16: 2800 cmp r0, #0 + 8002f18: d0b7 beq.n 8002e8a <__ssvfiscanf_r+0x1e6> + 8002f1a: e79d b.n 8002e58 <__ssvfiscanf_r+0x1b4> + 8002f1c: 9a45 ldr r2, [sp, #276] ; 0x114 + 8002f1e: 3201 adds r2, #1 + 8002f20: 9245 str r2, [sp, #276] ; 0x114 + 8002f22: 6862 ldr r2, [r4, #4] + 8002f24: 3a01 subs r2, #1 + 8002f26: 2a00 cmp r2, #0 + 8002f28: 6062 str r2, [r4, #4] + 8002f2a: dd02 ble.n 8002f32 <__ssvfiscanf_r+0x28e> + 8002f2c: 3301 adds r3, #1 + 8002f2e: 6023 str r3, [r4, #0] + 8002f30: e7ae b.n 8002e90 <__ssvfiscanf_r+0x1ec> + 8002f32: 9ba1 ldr r3, [sp, #644] ; 0x284 + 8002f34: 4621 mov r1, r4 + 8002f36: 4630 mov r0, r6 + 8002f38: 4798 blx r3 + 8002f3a: 2800 cmp r0, #0 + 8002f3c: d0a8 beq.n 8002e90 <__ssvfiscanf_r+0x1ec> + 8002f3e: e78b b.n 8002e58 <__ssvfiscanf_r+0x1b4> + 8002f40: 2b04 cmp r3, #4 + 8002f42: dc06 bgt.n 8002f52 <__ssvfiscanf_r+0x2ae> + 8002f44: 466b mov r3, sp + 8002f46: 4622 mov r2, r4 + 8002f48: a941 add r1, sp, #260 ; 0x104 + 8002f4a: 4630 mov r0, r6 + 8002f4c: f000 fb68 bl 8003620 <_scanf_i> + 8002f50: e7ac b.n 8002eac <__ssvfiscanf_r+0x208> + 8002f52: 4b0f ldr r3, [pc, #60] ; (8002f90 <__ssvfiscanf_r+0x2ec>) + 8002f54: 2b00 cmp r3, #0 + 8002f56: f43f aecf beq.w 8002cf8 <__ssvfiscanf_r+0x54> + 8002f5a: 466b mov r3, sp + 8002f5c: 4622 mov r2, r4 + 8002f5e: a941 add r1, sp, #260 ; 0x104 + 8002f60: 4630 mov r0, r6 + 8002f62: f3af 8000 nop.w + 8002f66: e7a1 b.n 8002eac <__ssvfiscanf_r+0x208> + 8002f68: 89a3 ldrh r3, [r4, #12] + 8002f6a: f013 0f40 tst.w r3, #64 ; 0x40 + 8002f6e: bf18 it ne + 8002f70: f04f 30ff movne.w r0, #4294967295 + 8002f74: f50d 7d23 add.w sp, sp, #652 ; 0x28c + 8002f78: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8002f7c: 9844 ldr r0, [sp, #272] ; 0x110 + 8002f7e: e7f9 b.n 8002f74 <__ssvfiscanf_r+0x2d0> + 8002f80: 08002bf1 .word 0x08002bf1 + 8002f84: 08002c6b .word 0x08002c6b + 8002f88: 080041d7 .word 0x080041d7 + 8002f8c: 08004188 .word 0x08004188 + 8002f90: 00000000 .word 0x00000000 + +08002f94 <__sfputc_r>: + 8002f94: 6893 ldr r3, [r2, #8] + 8002f96: 3b01 subs r3, #1 + 8002f98: 2b00 cmp r3, #0 + 8002f9a: b410 push {r4} + 8002f9c: 6093 str r3, [r2, #8] + 8002f9e: da08 bge.n 8002fb2 <__sfputc_r+0x1e> + 8002fa0: 6994 ldr r4, [r2, #24] + 8002fa2: 42a3 cmp r3, r4 + 8002fa4: db01 blt.n 8002faa <__sfputc_r+0x16> + 8002fa6: 290a cmp r1, #10 + 8002fa8: d103 bne.n 8002fb2 <__sfputc_r+0x1e> + 8002faa: f85d 4b04 ldr.w r4, [sp], #4 + 8002fae: f000 bdb5 b.w 8003b1c <__swbuf_r> + 8002fb2: 6813 ldr r3, [r2, #0] + 8002fb4: 1c58 adds r0, r3, #1 + 8002fb6: 6010 str r0, [r2, #0] + 8002fb8: 7019 strb r1, [r3, #0] + 8002fba: 4608 mov r0, r1 + 8002fbc: f85d 4b04 ldr.w r4, [sp], #4 + 8002fc0: 4770 bx lr + +08002fc2 <__sfputs_r>: + 8002fc2: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002fc4: 4606 mov r6, r0 + 8002fc6: 460f mov r7, r1 + 8002fc8: 4614 mov r4, r2 + 8002fca: 18d5 adds r5, r2, r3 + 8002fcc: 42ac cmp r4, r5 + 8002fce: d101 bne.n 8002fd4 <__sfputs_r+0x12> + 8002fd0: 2000 movs r0, #0 + 8002fd2: e007 b.n 8002fe4 <__sfputs_r+0x22> + 8002fd4: f814 1b01 ldrb.w r1, [r4], #1 + 8002fd8: 463a mov r2, r7 + 8002fda: 4630 mov r0, r6 + 8002fdc: f7ff ffda bl 8002f94 <__sfputc_r> + 8002fe0: 1c43 adds r3, r0, #1 + 8002fe2: d1f3 bne.n 8002fcc <__sfputs_r+0xa> + 8002fe4: bdf8 pop {r3, r4, r5, r6, r7, pc} + ... + +08002fe8 <_vfiprintf_r>: + 8002fe8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8002fec: 460d mov r5, r1 + 8002fee: b09d sub sp, #116 ; 0x74 + 8002ff0: 4614 mov r4, r2 + 8002ff2: 4698 mov r8, r3 + 8002ff4: 4606 mov r6, r0 + 8002ff6: b118 cbz r0, 8003000 <_vfiprintf_r+0x18> + 8002ff8: 6983 ldr r3, [r0, #24] + 8002ffa: b90b cbnz r3, 8003000 <_vfiprintf_r+0x18> + 8002ffc: f7ff f8e2 bl 80021c4 <__sinit> + 8003000: 4b89 ldr r3, [pc, #548] ; (8003228 <_vfiprintf_r+0x240>) + 8003002: 429d cmp r5, r3 + 8003004: d11b bne.n 800303e <_vfiprintf_r+0x56> + 8003006: 6875 ldr r5, [r6, #4] + 8003008: 6e6b ldr r3, [r5, #100] ; 0x64 + 800300a: 07d9 lsls r1, r3, #31 + 800300c: d405 bmi.n 800301a <_vfiprintf_r+0x32> + 800300e: 89ab ldrh r3, [r5, #12] + 8003010: 059a lsls r2, r3, #22 + 8003012: d402 bmi.n 800301a <_vfiprintf_r+0x32> + 8003014: 6da8 ldr r0, [r5, #88] ; 0x58 + 8003016: f7ff f9b4 bl 8002382 <__retarget_lock_acquire_recursive> + 800301a: 89ab ldrh r3, [r5, #12] + 800301c: 071b lsls r3, r3, #28 + 800301e: d501 bpl.n 8003024 <_vfiprintf_r+0x3c> + 8003020: 692b ldr r3, [r5, #16] + 8003022: b9eb cbnz r3, 8003060 <_vfiprintf_r+0x78> + 8003024: 4629 mov r1, r5 + 8003026: 4630 mov r0, r6 + 8003028: f000 fdca bl 8003bc0 <__swsetup_r> + 800302c: b1c0 cbz r0, 8003060 <_vfiprintf_r+0x78> + 800302e: 6e6b ldr r3, [r5, #100] ; 0x64 + 8003030: 07dc lsls r4, r3, #31 + 8003032: d50e bpl.n 8003052 <_vfiprintf_r+0x6a> + 8003034: f04f 30ff mov.w r0, #4294967295 + 8003038: b01d add sp, #116 ; 0x74 + 800303a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 800303e: 4b7b ldr r3, [pc, #492] ; (800322c <_vfiprintf_r+0x244>) + 8003040: 429d cmp r5, r3 + 8003042: d101 bne.n 8003048 <_vfiprintf_r+0x60> + 8003044: 68b5 ldr r5, [r6, #8] + 8003046: e7df b.n 8003008 <_vfiprintf_r+0x20> + 8003048: 4b79 ldr r3, [pc, #484] ; (8003230 <_vfiprintf_r+0x248>) + 800304a: 429d cmp r5, r3 + 800304c: bf08 it eq + 800304e: 68f5 ldreq r5, [r6, #12] + 8003050: e7da b.n 8003008 <_vfiprintf_r+0x20> + 8003052: 89ab ldrh r3, [r5, #12] + 8003054: 0598 lsls r0, r3, #22 + 8003056: d4ed bmi.n 8003034 <_vfiprintf_r+0x4c> + 8003058: 6da8 ldr r0, [r5, #88] ; 0x58 + 800305a: f7ff f993 bl 8002384 <__retarget_lock_release_recursive> + 800305e: e7e9 b.n 8003034 <_vfiprintf_r+0x4c> + 8003060: 2300 movs r3, #0 + 8003062: 9309 str r3, [sp, #36] ; 0x24 + 8003064: 2320 movs r3, #32 + 8003066: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 800306a: f8cd 800c str.w r8, [sp, #12] + 800306e: 2330 movs r3, #48 ; 0x30 + 8003070: f8df 81c0 ldr.w r8, [pc, #448] ; 8003234 <_vfiprintf_r+0x24c> + 8003074: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 8003078: f04f 0901 mov.w r9, #1 + 800307c: 4623 mov r3, r4 + 800307e: 469a mov sl, r3 + 8003080: f813 2b01 ldrb.w r2, [r3], #1 + 8003084: b10a cbz r2, 800308a <_vfiprintf_r+0xa2> + 8003086: 2a25 cmp r2, #37 ; 0x25 + 8003088: d1f9 bne.n 800307e <_vfiprintf_r+0x96> + 800308a: ebba 0b04 subs.w fp, sl, r4 + 800308e: d00b beq.n 80030a8 <_vfiprintf_r+0xc0> + 8003090: 465b mov r3, fp + 8003092: 4622 mov r2, r4 + 8003094: 4629 mov r1, r5 + 8003096: 4630 mov r0, r6 + 8003098: f7ff ff93 bl 8002fc2 <__sfputs_r> + 800309c: 3001 adds r0, #1 + 800309e: f000 80aa beq.w 80031f6 <_vfiprintf_r+0x20e> + 80030a2: 9a09 ldr r2, [sp, #36] ; 0x24 + 80030a4: 445a add r2, fp + 80030a6: 9209 str r2, [sp, #36] ; 0x24 + 80030a8: f89a 3000 ldrb.w r3, [sl] + 80030ac: 2b00 cmp r3, #0 + 80030ae: f000 80a2 beq.w 80031f6 <_vfiprintf_r+0x20e> + 80030b2: 2300 movs r3, #0 + 80030b4: f04f 32ff mov.w r2, #4294967295 + 80030b8: e9cd 2305 strd r2, r3, [sp, #20] + 80030bc: f10a 0a01 add.w sl, sl, #1 + 80030c0: 9304 str r3, [sp, #16] + 80030c2: 9307 str r3, [sp, #28] + 80030c4: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 80030c8: 931a str r3, [sp, #104] ; 0x68 + 80030ca: 4654 mov r4, sl + 80030cc: 2205 movs r2, #5 + 80030ce: f814 1b01 ldrb.w r1, [r4], #1 + 80030d2: 4858 ldr r0, [pc, #352] ; (8003234 <_vfiprintf_r+0x24c>) + 80030d4: f7fd f89c bl 8000210 + 80030d8: 9a04 ldr r2, [sp, #16] + 80030da: b9d8 cbnz r0, 8003114 <_vfiprintf_r+0x12c> + 80030dc: 06d1 lsls r1, r2, #27 + 80030de: bf44 itt mi + 80030e0: 2320 movmi r3, #32 + 80030e2: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80030e6: 0713 lsls r3, r2, #28 + 80030e8: bf44 itt mi + 80030ea: 232b movmi r3, #43 ; 0x2b + 80030ec: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80030f0: f89a 3000 ldrb.w r3, [sl] + 80030f4: 2b2a cmp r3, #42 ; 0x2a + 80030f6: d015 beq.n 8003124 <_vfiprintf_r+0x13c> + 80030f8: 9a07 ldr r2, [sp, #28] + 80030fa: 4654 mov r4, sl + 80030fc: 2000 movs r0, #0 + 80030fe: f04f 0c0a mov.w ip, #10 + 8003102: 4621 mov r1, r4 + 8003104: f811 3b01 ldrb.w r3, [r1], #1 + 8003108: 3b30 subs r3, #48 ; 0x30 + 800310a: 2b09 cmp r3, #9 + 800310c: d94e bls.n 80031ac <_vfiprintf_r+0x1c4> + 800310e: b1b0 cbz r0, 800313e <_vfiprintf_r+0x156> + 8003110: 9207 str r2, [sp, #28] + 8003112: e014 b.n 800313e <_vfiprintf_r+0x156> + 8003114: eba0 0308 sub.w r3, r0, r8 + 8003118: fa09 f303 lsl.w r3, r9, r3 + 800311c: 4313 orrs r3, r2 + 800311e: 9304 str r3, [sp, #16] + 8003120: 46a2 mov sl, r4 + 8003122: e7d2 b.n 80030ca <_vfiprintf_r+0xe2> + 8003124: 9b03 ldr r3, [sp, #12] + 8003126: 1d19 adds r1, r3, #4 + 8003128: 681b ldr r3, [r3, #0] + 800312a: 9103 str r1, [sp, #12] + 800312c: 2b00 cmp r3, #0 + 800312e: bfbb ittet lt + 8003130: 425b neglt r3, r3 + 8003132: f042 0202 orrlt.w r2, r2, #2 + 8003136: 9307 strge r3, [sp, #28] + 8003138: 9307 strlt r3, [sp, #28] + 800313a: bfb8 it lt + 800313c: 9204 strlt r2, [sp, #16] + 800313e: 7823 ldrb r3, [r4, #0] + 8003140: 2b2e cmp r3, #46 ; 0x2e + 8003142: d10c bne.n 800315e <_vfiprintf_r+0x176> + 8003144: 7863 ldrb r3, [r4, #1] + 8003146: 2b2a cmp r3, #42 ; 0x2a + 8003148: d135 bne.n 80031b6 <_vfiprintf_r+0x1ce> + 800314a: 9b03 ldr r3, [sp, #12] + 800314c: 1d1a adds r2, r3, #4 + 800314e: 681b ldr r3, [r3, #0] + 8003150: 9203 str r2, [sp, #12] + 8003152: 2b00 cmp r3, #0 + 8003154: bfb8 it lt + 8003156: f04f 33ff movlt.w r3, #4294967295 + 800315a: 3402 adds r4, #2 + 800315c: 9305 str r3, [sp, #20] + 800315e: f8df a0e4 ldr.w sl, [pc, #228] ; 8003244 <_vfiprintf_r+0x25c> + 8003162: 7821 ldrb r1, [r4, #0] + 8003164: 2203 movs r2, #3 + 8003166: 4650 mov r0, sl + 8003168: f7fd f852 bl 8000210 + 800316c: b140 cbz r0, 8003180 <_vfiprintf_r+0x198> + 800316e: 2340 movs r3, #64 ; 0x40 + 8003170: eba0 000a sub.w r0, r0, sl + 8003174: fa03 f000 lsl.w r0, r3, r0 + 8003178: 9b04 ldr r3, [sp, #16] + 800317a: 4303 orrs r3, r0 + 800317c: 3401 adds r4, #1 + 800317e: 9304 str r3, [sp, #16] + 8003180: f814 1b01 ldrb.w r1, [r4], #1 + 8003184: 482c ldr r0, [pc, #176] ; (8003238 <_vfiprintf_r+0x250>) + 8003186: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 800318a: 2206 movs r2, #6 + 800318c: f7fd f840 bl 8000210 + 8003190: 2800 cmp r0, #0 + 8003192: d03f beq.n 8003214 <_vfiprintf_r+0x22c> + 8003194: 4b29 ldr r3, [pc, #164] ; (800323c <_vfiprintf_r+0x254>) + 8003196: bb1b cbnz r3, 80031e0 <_vfiprintf_r+0x1f8> + 8003198: 9b03 ldr r3, [sp, #12] + 800319a: 3307 adds r3, #7 + 800319c: f023 0307 bic.w r3, r3, #7 + 80031a0: 3308 adds r3, #8 + 80031a2: 9303 str r3, [sp, #12] + 80031a4: 9b09 ldr r3, [sp, #36] ; 0x24 + 80031a6: 443b add r3, r7 + 80031a8: 9309 str r3, [sp, #36] ; 0x24 + 80031aa: e767 b.n 800307c <_vfiprintf_r+0x94> + 80031ac: fb0c 3202 mla r2, ip, r2, r3 + 80031b0: 460c mov r4, r1 + 80031b2: 2001 movs r0, #1 + 80031b4: e7a5 b.n 8003102 <_vfiprintf_r+0x11a> + 80031b6: 2300 movs r3, #0 + 80031b8: 3401 adds r4, #1 + 80031ba: 9305 str r3, [sp, #20] + 80031bc: 4619 mov r1, r3 + 80031be: f04f 0c0a mov.w ip, #10 + 80031c2: 4620 mov r0, r4 + 80031c4: f810 2b01 ldrb.w r2, [r0], #1 + 80031c8: 3a30 subs r2, #48 ; 0x30 + 80031ca: 2a09 cmp r2, #9 + 80031cc: d903 bls.n 80031d6 <_vfiprintf_r+0x1ee> + 80031ce: 2b00 cmp r3, #0 + 80031d0: d0c5 beq.n 800315e <_vfiprintf_r+0x176> + 80031d2: 9105 str r1, [sp, #20] + 80031d4: e7c3 b.n 800315e <_vfiprintf_r+0x176> + 80031d6: fb0c 2101 mla r1, ip, r1, r2 + 80031da: 4604 mov r4, r0 + 80031dc: 2301 movs r3, #1 + 80031de: e7f0 b.n 80031c2 <_vfiprintf_r+0x1da> + 80031e0: ab03 add r3, sp, #12 + 80031e2: 9300 str r3, [sp, #0] + 80031e4: 462a mov r2, r5 + 80031e6: 4b16 ldr r3, [pc, #88] ; (8003240 <_vfiprintf_r+0x258>) + 80031e8: a904 add r1, sp, #16 + 80031ea: 4630 mov r0, r6 + 80031ec: f3af 8000 nop.w + 80031f0: 4607 mov r7, r0 + 80031f2: 1c78 adds r0, r7, #1 + 80031f4: d1d6 bne.n 80031a4 <_vfiprintf_r+0x1bc> + 80031f6: 6e6b ldr r3, [r5, #100] ; 0x64 + 80031f8: 07d9 lsls r1, r3, #31 + 80031fa: d405 bmi.n 8003208 <_vfiprintf_r+0x220> + 80031fc: 89ab ldrh r3, [r5, #12] + 80031fe: 059a lsls r2, r3, #22 + 8003200: d402 bmi.n 8003208 <_vfiprintf_r+0x220> + 8003202: 6da8 ldr r0, [r5, #88] ; 0x58 + 8003204: f7ff f8be bl 8002384 <__retarget_lock_release_recursive> + 8003208: 89ab ldrh r3, [r5, #12] + 800320a: 065b lsls r3, r3, #25 + 800320c: f53f af12 bmi.w 8003034 <_vfiprintf_r+0x4c> + 8003210: 9809 ldr r0, [sp, #36] ; 0x24 + 8003212: e711 b.n 8003038 <_vfiprintf_r+0x50> + 8003214: ab03 add r3, sp, #12 + 8003216: 9300 str r3, [sp, #0] + 8003218: 462a mov r2, r5 + 800321a: 4b09 ldr r3, [pc, #36] ; (8003240 <_vfiprintf_r+0x258>) + 800321c: a904 add r1, sp, #16 + 800321e: 4630 mov r0, r6 + 8003220: f000 f880 bl 8003324 <_printf_i> + 8003224: e7e4 b.n 80031f0 <_vfiprintf_r+0x208> + 8003226: bf00 nop + 8003228: 08004144 .word 0x08004144 + 800322c: 08004164 .word 0x08004164 + 8003230: 08004124 .word 0x08004124 + 8003234: 0800418c .word 0x0800418c + 8003238: 08004192 .word 0x08004192 + 800323c: 00000000 .word 0x00000000 + 8003240: 08002fc3 .word 0x08002fc3 + 8003244: 08004188 .word 0x08004188 + +08003248 <_printf_common>: + 8003248: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 800324c: 4616 mov r6, r2 + 800324e: 4699 mov r9, r3 + 8003250: 688a ldr r2, [r1, #8] + 8003252: 690b ldr r3, [r1, #16] + 8003254: f8dd 8020 ldr.w r8, [sp, #32] + 8003258: 4293 cmp r3, r2 + 800325a: bfb8 it lt + 800325c: 4613 movlt r3, r2 + 800325e: 6033 str r3, [r6, #0] + 8003260: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 8003264: 4607 mov r7, r0 + 8003266: 460c mov r4, r1 + 8003268: b10a cbz r2, 800326e <_printf_common+0x26> + 800326a: 3301 adds r3, #1 + 800326c: 6033 str r3, [r6, #0] + 800326e: 6823 ldr r3, [r4, #0] + 8003270: 0699 lsls r1, r3, #26 + 8003272: bf42 ittt mi + 8003274: 6833 ldrmi r3, [r6, #0] + 8003276: 3302 addmi r3, #2 + 8003278: 6033 strmi r3, [r6, #0] + 800327a: 6825 ldr r5, [r4, #0] + 800327c: f015 0506 ands.w r5, r5, #6 + 8003280: d106 bne.n 8003290 <_printf_common+0x48> + 8003282: f104 0a19 add.w sl, r4, #25 + 8003286: 68e3 ldr r3, [r4, #12] + 8003288: 6832 ldr r2, [r6, #0] + 800328a: 1a9b subs r3, r3, r2 + 800328c: 42ab cmp r3, r5 + 800328e: dc26 bgt.n 80032de <_printf_common+0x96> + 8003290: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 8003294: 1e13 subs r3, r2, #0 + 8003296: 6822 ldr r2, [r4, #0] + 8003298: bf18 it ne + 800329a: 2301 movne r3, #1 + 800329c: 0692 lsls r2, r2, #26 + 800329e: d42b bmi.n 80032f8 <_printf_common+0xb0> + 80032a0: f104 0243 add.w r2, r4, #67 ; 0x43 + 80032a4: 4649 mov r1, r9 + 80032a6: 4638 mov r0, r7 + 80032a8: 47c0 blx r8 + 80032aa: 3001 adds r0, #1 + 80032ac: d01e beq.n 80032ec <_printf_common+0xa4> + 80032ae: 6823 ldr r3, [r4, #0] + 80032b0: 68e5 ldr r5, [r4, #12] + 80032b2: 6832 ldr r2, [r6, #0] + 80032b4: f003 0306 and.w r3, r3, #6 + 80032b8: 2b04 cmp r3, #4 + 80032ba: bf08 it eq + 80032bc: 1aad subeq r5, r5, r2 + 80032be: 68a3 ldr r3, [r4, #8] + 80032c0: 6922 ldr r2, [r4, #16] + 80032c2: bf0c ite eq + 80032c4: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 80032c8: 2500 movne r5, #0 + 80032ca: 4293 cmp r3, r2 + 80032cc: bfc4 itt gt + 80032ce: 1a9b subgt r3, r3, r2 + 80032d0: 18ed addgt r5, r5, r3 + 80032d2: 2600 movs r6, #0 + 80032d4: 341a adds r4, #26 + 80032d6: 42b5 cmp r5, r6 + 80032d8: d11a bne.n 8003310 <_printf_common+0xc8> + 80032da: 2000 movs r0, #0 + 80032dc: e008 b.n 80032f0 <_printf_common+0xa8> + 80032de: 2301 movs r3, #1 + 80032e0: 4652 mov r2, sl + 80032e2: 4649 mov r1, r9 + 80032e4: 4638 mov r0, r7 + 80032e6: 47c0 blx r8 + 80032e8: 3001 adds r0, #1 + 80032ea: d103 bne.n 80032f4 <_printf_common+0xac> + 80032ec: f04f 30ff mov.w r0, #4294967295 + 80032f0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80032f4: 3501 adds r5, #1 + 80032f6: e7c6 b.n 8003286 <_printf_common+0x3e> + 80032f8: 18e1 adds r1, r4, r3 + 80032fa: 1c5a adds r2, r3, #1 + 80032fc: 2030 movs r0, #48 ; 0x30 + 80032fe: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 8003302: 4422 add r2, r4 + 8003304: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 8003308: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 800330c: 3302 adds r3, #2 + 800330e: e7c7 b.n 80032a0 <_printf_common+0x58> + 8003310: 2301 movs r3, #1 + 8003312: 4622 mov r2, r4 + 8003314: 4649 mov r1, r9 + 8003316: 4638 mov r0, r7 + 8003318: 47c0 blx r8 + 800331a: 3001 adds r0, #1 + 800331c: d0e6 beq.n 80032ec <_printf_common+0xa4> + 800331e: 3601 adds r6, #1 + 8003320: e7d9 b.n 80032d6 <_printf_common+0x8e> + ... + +08003324 <_printf_i>: + 8003324: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 8003328: 460c mov r4, r1 + 800332a: 4691 mov r9, r2 + 800332c: 7e27 ldrb r7, [r4, #24] + 800332e: 990c ldr r1, [sp, #48] ; 0x30 + 8003330: 2f78 cmp r7, #120 ; 0x78 + 8003332: 4680 mov r8, r0 + 8003334: 469a mov sl, r3 + 8003336: f104 0243 add.w r2, r4, #67 ; 0x43 + 800333a: d807 bhi.n 800334c <_printf_i+0x28> + 800333c: 2f62 cmp r7, #98 ; 0x62 + 800333e: d80a bhi.n 8003356 <_printf_i+0x32> + 8003340: 2f00 cmp r7, #0 + 8003342: f000 80d8 beq.w 80034f6 <_printf_i+0x1d2> + 8003346: 2f58 cmp r7, #88 ; 0x58 + 8003348: f000 80a3 beq.w 8003492 <_printf_i+0x16e> + 800334c: f104 0642 add.w r6, r4, #66 ; 0x42 + 8003350: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 8003354: e03a b.n 80033cc <_printf_i+0xa8> + 8003356: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 800335a: 2b15 cmp r3, #21 + 800335c: d8f6 bhi.n 800334c <_printf_i+0x28> + 800335e: a001 add r0, pc, #4 ; (adr r0, 8003364 <_printf_i+0x40>) + 8003360: f850 f023 ldr.w pc, [r0, r3, lsl #2] + 8003364: 080033bd .word 0x080033bd + 8003368: 080033d1 .word 0x080033d1 + 800336c: 0800334d .word 0x0800334d + 8003370: 0800334d .word 0x0800334d + 8003374: 0800334d .word 0x0800334d + 8003378: 0800334d .word 0x0800334d + 800337c: 080033d1 .word 0x080033d1 + 8003380: 0800334d .word 0x0800334d + 8003384: 0800334d .word 0x0800334d + 8003388: 0800334d .word 0x0800334d + 800338c: 0800334d .word 0x0800334d + 8003390: 080034dd .word 0x080034dd + 8003394: 08003401 .word 0x08003401 + 8003398: 080034bf .word 0x080034bf + 800339c: 0800334d .word 0x0800334d + 80033a0: 0800334d .word 0x0800334d + 80033a4: 080034ff .word 0x080034ff + 80033a8: 0800334d .word 0x0800334d + 80033ac: 08003401 .word 0x08003401 + 80033b0: 0800334d .word 0x0800334d + 80033b4: 0800334d .word 0x0800334d + 80033b8: 080034c7 .word 0x080034c7 + 80033bc: 680b ldr r3, [r1, #0] + 80033be: 1d1a adds r2, r3, #4 + 80033c0: 681b ldr r3, [r3, #0] + 80033c2: 600a str r2, [r1, #0] + 80033c4: f104 0642 add.w r6, r4, #66 ; 0x42 + 80033c8: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 80033cc: 2301 movs r3, #1 + 80033ce: e0a3 b.n 8003518 <_printf_i+0x1f4> + 80033d0: 6825 ldr r5, [r4, #0] + 80033d2: 6808 ldr r0, [r1, #0] + 80033d4: 062e lsls r6, r5, #24 + 80033d6: f100 0304 add.w r3, r0, #4 + 80033da: d50a bpl.n 80033f2 <_printf_i+0xce> + 80033dc: 6805 ldr r5, [r0, #0] + 80033de: 600b str r3, [r1, #0] + 80033e0: 2d00 cmp r5, #0 + 80033e2: da03 bge.n 80033ec <_printf_i+0xc8> + 80033e4: 232d movs r3, #45 ; 0x2d + 80033e6: 426d negs r5, r5 + 80033e8: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 80033ec: 485e ldr r0, [pc, #376] ; (8003568 <_printf_i+0x244>) + 80033ee: 230a movs r3, #10 + 80033f0: e019 b.n 8003426 <_printf_i+0x102> + 80033f2: f015 0f40 tst.w r5, #64 ; 0x40 + 80033f6: 6805 ldr r5, [r0, #0] + 80033f8: 600b str r3, [r1, #0] + 80033fa: bf18 it ne + 80033fc: b22d sxthne r5, r5 + 80033fe: e7ef b.n 80033e0 <_printf_i+0xbc> + 8003400: 680b ldr r3, [r1, #0] + 8003402: 6825 ldr r5, [r4, #0] + 8003404: 1d18 adds r0, r3, #4 + 8003406: 6008 str r0, [r1, #0] + 8003408: 0628 lsls r0, r5, #24 + 800340a: d501 bpl.n 8003410 <_printf_i+0xec> + 800340c: 681d ldr r5, [r3, #0] + 800340e: e002 b.n 8003416 <_printf_i+0xf2> + 8003410: 0669 lsls r1, r5, #25 + 8003412: d5fb bpl.n 800340c <_printf_i+0xe8> + 8003414: 881d ldrh r5, [r3, #0] + 8003416: 4854 ldr r0, [pc, #336] ; (8003568 <_printf_i+0x244>) + 8003418: 2f6f cmp r7, #111 ; 0x6f + 800341a: bf0c ite eq + 800341c: 2308 moveq r3, #8 + 800341e: 230a movne r3, #10 + 8003420: 2100 movs r1, #0 + 8003422: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 8003426: 6866 ldr r6, [r4, #4] + 8003428: 60a6 str r6, [r4, #8] + 800342a: 2e00 cmp r6, #0 + 800342c: bfa2 ittt ge + 800342e: 6821 ldrge r1, [r4, #0] + 8003430: f021 0104 bicge.w r1, r1, #4 + 8003434: 6021 strge r1, [r4, #0] + 8003436: b90d cbnz r5, 800343c <_printf_i+0x118> + 8003438: 2e00 cmp r6, #0 + 800343a: d04d beq.n 80034d8 <_printf_i+0x1b4> + 800343c: 4616 mov r6, r2 + 800343e: fbb5 f1f3 udiv r1, r5, r3 + 8003442: fb03 5711 mls r7, r3, r1, r5 + 8003446: 5dc7 ldrb r7, [r0, r7] + 8003448: f806 7d01 strb.w r7, [r6, #-1]! + 800344c: 462f mov r7, r5 + 800344e: 42bb cmp r3, r7 + 8003450: 460d mov r5, r1 + 8003452: d9f4 bls.n 800343e <_printf_i+0x11a> + 8003454: 2b08 cmp r3, #8 + 8003456: d10b bne.n 8003470 <_printf_i+0x14c> + 8003458: 6823 ldr r3, [r4, #0] + 800345a: 07df lsls r7, r3, #31 + 800345c: d508 bpl.n 8003470 <_printf_i+0x14c> + 800345e: 6923 ldr r3, [r4, #16] + 8003460: 6861 ldr r1, [r4, #4] + 8003462: 4299 cmp r1, r3 + 8003464: bfde ittt le + 8003466: 2330 movle r3, #48 ; 0x30 + 8003468: f806 3c01 strble.w r3, [r6, #-1] + 800346c: f106 36ff addle.w r6, r6, #4294967295 + 8003470: 1b92 subs r2, r2, r6 + 8003472: 6122 str r2, [r4, #16] + 8003474: f8cd a000 str.w sl, [sp] + 8003478: 464b mov r3, r9 + 800347a: aa03 add r2, sp, #12 + 800347c: 4621 mov r1, r4 + 800347e: 4640 mov r0, r8 + 8003480: f7ff fee2 bl 8003248 <_printf_common> + 8003484: 3001 adds r0, #1 + 8003486: d14c bne.n 8003522 <_printf_i+0x1fe> + 8003488: f04f 30ff mov.w r0, #4294967295 + 800348c: b004 add sp, #16 + 800348e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8003492: 4835 ldr r0, [pc, #212] ; (8003568 <_printf_i+0x244>) + 8003494: f884 7045 strb.w r7, [r4, #69] ; 0x45 + 8003498: 6823 ldr r3, [r4, #0] + 800349a: 680e ldr r6, [r1, #0] + 800349c: 061f lsls r7, r3, #24 + 800349e: f856 5b04 ldr.w r5, [r6], #4 + 80034a2: 600e str r6, [r1, #0] + 80034a4: d514 bpl.n 80034d0 <_printf_i+0x1ac> + 80034a6: 07d9 lsls r1, r3, #31 + 80034a8: bf44 itt mi + 80034aa: f043 0320 orrmi.w r3, r3, #32 + 80034ae: 6023 strmi r3, [r4, #0] + 80034b0: b91d cbnz r5, 80034ba <_printf_i+0x196> + 80034b2: 6823 ldr r3, [r4, #0] + 80034b4: f023 0320 bic.w r3, r3, #32 + 80034b8: 6023 str r3, [r4, #0] + 80034ba: 2310 movs r3, #16 + 80034bc: e7b0 b.n 8003420 <_printf_i+0xfc> + 80034be: 6823 ldr r3, [r4, #0] + 80034c0: f043 0320 orr.w r3, r3, #32 + 80034c4: 6023 str r3, [r4, #0] + 80034c6: 2378 movs r3, #120 ; 0x78 + 80034c8: 4828 ldr r0, [pc, #160] ; (800356c <_printf_i+0x248>) + 80034ca: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 80034ce: e7e3 b.n 8003498 <_printf_i+0x174> + 80034d0: 065e lsls r6, r3, #25 + 80034d2: bf48 it mi + 80034d4: b2ad uxthmi r5, r5 + 80034d6: e7e6 b.n 80034a6 <_printf_i+0x182> + 80034d8: 4616 mov r6, r2 + 80034da: e7bb b.n 8003454 <_printf_i+0x130> + 80034dc: 680b ldr r3, [r1, #0] + 80034de: 6826 ldr r6, [r4, #0] + 80034e0: 6960 ldr r0, [r4, #20] + 80034e2: 1d1d adds r5, r3, #4 + 80034e4: 600d str r5, [r1, #0] + 80034e6: 0635 lsls r5, r6, #24 + 80034e8: 681b ldr r3, [r3, #0] + 80034ea: d501 bpl.n 80034f0 <_printf_i+0x1cc> + 80034ec: 6018 str r0, [r3, #0] + 80034ee: e002 b.n 80034f6 <_printf_i+0x1d2> + 80034f0: 0671 lsls r1, r6, #25 + 80034f2: d5fb bpl.n 80034ec <_printf_i+0x1c8> + 80034f4: 8018 strh r0, [r3, #0] + 80034f6: 2300 movs r3, #0 + 80034f8: 6123 str r3, [r4, #16] + 80034fa: 4616 mov r6, r2 + 80034fc: e7ba b.n 8003474 <_printf_i+0x150> + 80034fe: 680b ldr r3, [r1, #0] + 8003500: 1d1a adds r2, r3, #4 + 8003502: 600a str r2, [r1, #0] + 8003504: 681e ldr r6, [r3, #0] + 8003506: 6862 ldr r2, [r4, #4] + 8003508: 2100 movs r1, #0 + 800350a: 4630 mov r0, r6 + 800350c: f7fc fe80 bl 8000210 + 8003510: b108 cbz r0, 8003516 <_printf_i+0x1f2> + 8003512: 1b80 subs r0, r0, r6 + 8003514: 6060 str r0, [r4, #4] + 8003516: 6863 ldr r3, [r4, #4] + 8003518: 6123 str r3, [r4, #16] + 800351a: 2300 movs r3, #0 + 800351c: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8003520: e7a8 b.n 8003474 <_printf_i+0x150> + 8003522: 6923 ldr r3, [r4, #16] + 8003524: 4632 mov r2, r6 + 8003526: 4649 mov r1, r9 + 8003528: 4640 mov r0, r8 + 800352a: 47d0 blx sl + 800352c: 3001 adds r0, #1 + 800352e: d0ab beq.n 8003488 <_printf_i+0x164> + 8003530: 6823 ldr r3, [r4, #0] + 8003532: 079b lsls r3, r3, #30 + 8003534: d413 bmi.n 800355e <_printf_i+0x23a> + 8003536: 68e0 ldr r0, [r4, #12] + 8003538: 9b03 ldr r3, [sp, #12] + 800353a: 4298 cmp r0, r3 + 800353c: bfb8 it lt + 800353e: 4618 movlt r0, r3 + 8003540: e7a4 b.n 800348c <_printf_i+0x168> + 8003542: 2301 movs r3, #1 + 8003544: 4632 mov r2, r6 + 8003546: 4649 mov r1, r9 + 8003548: 4640 mov r0, r8 + 800354a: 47d0 blx sl + 800354c: 3001 adds r0, #1 + 800354e: d09b beq.n 8003488 <_printf_i+0x164> + 8003550: 3501 adds r5, #1 + 8003552: 68e3 ldr r3, [r4, #12] + 8003554: 9903 ldr r1, [sp, #12] + 8003556: 1a5b subs r3, r3, r1 + 8003558: 42ab cmp r3, r5 + 800355a: dcf2 bgt.n 8003542 <_printf_i+0x21e> + 800355c: e7eb b.n 8003536 <_printf_i+0x212> + 800355e: 2500 movs r5, #0 + 8003560: f104 0619 add.w r6, r4, #25 + 8003564: e7f5 b.n 8003552 <_printf_i+0x22e> + 8003566: bf00 nop + 8003568: 08004199 .word 0x08004199 + 800356c: 080041aa .word 0x080041aa + +08003570 <_scanf_chars>: + 8003570: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8003574: 4615 mov r5, r2 + 8003576: 688a ldr r2, [r1, #8] + 8003578: 4680 mov r8, r0 + 800357a: 460c mov r4, r1 + 800357c: b932 cbnz r2, 800358c <_scanf_chars+0x1c> + 800357e: 698a ldr r2, [r1, #24] + 8003580: 2a00 cmp r2, #0 + 8003582: bf0c ite eq + 8003584: 2201 moveq r2, #1 + 8003586: f04f 32ff movne.w r2, #4294967295 + 800358a: 608a str r2, [r1, #8] + 800358c: 6822 ldr r2, [r4, #0] + 800358e: f8df 908c ldr.w r9, [pc, #140] ; 800361c <_scanf_chars+0xac> + 8003592: 06d1 lsls r1, r2, #27 + 8003594: bf5f itttt pl + 8003596: 681a ldrpl r2, [r3, #0] + 8003598: 1d11 addpl r1, r2, #4 + 800359a: 6019 strpl r1, [r3, #0] + 800359c: 6816 ldrpl r6, [r2, #0] + 800359e: 2700 movs r7, #0 + 80035a0: 69a0 ldr r0, [r4, #24] + 80035a2: b188 cbz r0, 80035c8 <_scanf_chars+0x58> + 80035a4: 2801 cmp r0, #1 + 80035a6: d107 bne.n 80035b8 <_scanf_chars+0x48> + 80035a8: 682b ldr r3, [r5, #0] + 80035aa: 781a ldrb r2, [r3, #0] + 80035ac: 6963 ldr r3, [r4, #20] + 80035ae: 5c9b ldrb r3, [r3, r2] + 80035b0: b953 cbnz r3, 80035c8 <_scanf_chars+0x58> + 80035b2: bb27 cbnz r7, 80035fe <_scanf_chars+0x8e> + 80035b4: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 80035b8: 2802 cmp r0, #2 + 80035ba: d120 bne.n 80035fe <_scanf_chars+0x8e> + 80035bc: 682b ldr r3, [r5, #0] + 80035be: 781b ldrb r3, [r3, #0] + 80035c0: f813 3009 ldrb.w r3, [r3, r9] + 80035c4: 071b lsls r3, r3, #28 + 80035c6: d41a bmi.n 80035fe <_scanf_chars+0x8e> + 80035c8: 6823 ldr r3, [r4, #0] + 80035ca: 06da lsls r2, r3, #27 + 80035cc: bf5e ittt pl + 80035ce: 682b ldrpl r3, [r5, #0] + 80035d0: 781b ldrbpl r3, [r3, #0] + 80035d2: f806 3b01 strbpl.w r3, [r6], #1 + 80035d6: 682a ldr r2, [r5, #0] + 80035d8: 686b ldr r3, [r5, #4] + 80035da: 3201 adds r2, #1 + 80035dc: 602a str r2, [r5, #0] + 80035de: 68a2 ldr r2, [r4, #8] + 80035e0: 3b01 subs r3, #1 + 80035e2: 3a01 subs r2, #1 + 80035e4: 606b str r3, [r5, #4] + 80035e6: 3701 adds r7, #1 + 80035e8: 60a2 str r2, [r4, #8] + 80035ea: b142 cbz r2, 80035fe <_scanf_chars+0x8e> + 80035ec: 2b00 cmp r3, #0 + 80035ee: dcd7 bgt.n 80035a0 <_scanf_chars+0x30> + 80035f0: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180 + 80035f4: 4629 mov r1, r5 + 80035f6: 4640 mov r0, r8 + 80035f8: 4798 blx r3 + 80035fa: 2800 cmp r0, #0 + 80035fc: d0d0 beq.n 80035a0 <_scanf_chars+0x30> + 80035fe: 6823 ldr r3, [r4, #0] + 8003600: f013 0310 ands.w r3, r3, #16 + 8003604: d105 bne.n 8003612 <_scanf_chars+0xa2> + 8003606: 68e2 ldr r2, [r4, #12] + 8003608: 3201 adds r2, #1 + 800360a: 60e2 str r2, [r4, #12] + 800360c: 69a2 ldr r2, [r4, #24] + 800360e: b102 cbz r2, 8003612 <_scanf_chars+0xa2> + 8003610: 7033 strb r3, [r6, #0] + 8003612: 6923 ldr r3, [r4, #16] + 8003614: 441f add r7, r3 + 8003616: 6127 str r7, [r4, #16] + 8003618: 2000 movs r0, #0 + 800361a: e7cb b.n 80035b4 <_scanf_chars+0x44> + 800361c: 080041d7 .word 0x080041d7 + +08003620 <_scanf_i>: + 8003620: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8003624: 4698 mov r8, r3 + 8003626: 4b74 ldr r3, [pc, #464] ; (80037f8 <_scanf_i+0x1d8>) + 8003628: 460c mov r4, r1 + 800362a: 4682 mov sl, r0 + 800362c: 4616 mov r6, r2 + 800362e: e893 0007 ldmia.w r3, {r0, r1, r2} + 8003632: b087 sub sp, #28 + 8003634: ab03 add r3, sp, #12 + 8003636: e883 0007 stmia.w r3, {r0, r1, r2} + 800363a: 4b70 ldr r3, [pc, #448] ; (80037fc <_scanf_i+0x1dc>) + 800363c: 69a1 ldr r1, [r4, #24] + 800363e: 4a70 ldr r2, [pc, #448] ; (8003800 <_scanf_i+0x1e0>) + 8003640: 2903 cmp r1, #3 + 8003642: bf18 it ne + 8003644: 461a movne r2, r3 + 8003646: 68a3 ldr r3, [r4, #8] + 8003648: 9201 str r2, [sp, #4] + 800364a: 1e5a subs r2, r3, #1 + 800364c: f5b2 7fae cmp.w r2, #348 ; 0x15c + 8003650: bf88 it hi + 8003652: f46f 75ae mvnhi.w r5, #348 ; 0x15c + 8003656: 4627 mov r7, r4 + 8003658: bf82 ittt hi + 800365a: eb03 0905 addhi.w r9, r3, r5 + 800365e: f240 135d movwhi r3, #349 ; 0x15d + 8003662: 60a3 strhi r3, [r4, #8] + 8003664: f857 3b1c ldr.w r3, [r7], #28 + 8003668: f443 6350 orr.w r3, r3, #3328 ; 0xd00 + 800366c: bf98 it ls + 800366e: f04f 0900 movls.w r9, #0 + 8003672: 6023 str r3, [r4, #0] + 8003674: 463d mov r5, r7 + 8003676: f04f 0b00 mov.w fp, #0 + 800367a: 6831 ldr r1, [r6, #0] + 800367c: ab03 add r3, sp, #12 + 800367e: 7809 ldrb r1, [r1, #0] + 8003680: f853 002b ldr.w r0, [r3, fp, lsl #2] + 8003684: 2202 movs r2, #2 + 8003686: f7fc fdc3 bl 8000210 + 800368a: b328 cbz r0, 80036d8 <_scanf_i+0xb8> + 800368c: f1bb 0f01 cmp.w fp, #1 + 8003690: d159 bne.n 8003746 <_scanf_i+0x126> + 8003692: 6862 ldr r2, [r4, #4] + 8003694: b92a cbnz r2, 80036a2 <_scanf_i+0x82> + 8003696: 6822 ldr r2, [r4, #0] + 8003698: 2308 movs r3, #8 + 800369a: f442 7200 orr.w r2, r2, #512 ; 0x200 + 800369e: 6063 str r3, [r4, #4] + 80036a0: 6022 str r2, [r4, #0] + 80036a2: 6822 ldr r2, [r4, #0] + 80036a4: f422 62a0 bic.w r2, r2, #1280 ; 0x500 + 80036a8: 6022 str r2, [r4, #0] + 80036aa: 68a2 ldr r2, [r4, #8] + 80036ac: 1e51 subs r1, r2, #1 + 80036ae: 60a1 str r1, [r4, #8] + 80036b0: b192 cbz r2, 80036d8 <_scanf_i+0xb8> + 80036b2: 6832 ldr r2, [r6, #0] + 80036b4: 1c51 adds r1, r2, #1 + 80036b6: 6031 str r1, [r6, #0] + 80036b8: 7812 ldrb r2, [r2, #0] + 80036ba: f805 2b01 strb.w r2, [r5], #1 + 80036be: 6872 ldr r2, [r6, #4] + 80036c0: 3a01 subs r2, #1 + 80036c2: 2a00 cmp r2, #0 + 80036c4: 6072 str r2, [r6, #4] + 80036c6: dc07 bgt.n 80036d8 <_scanf_i+0xb8> + 80036c8: f8d4 2180 ldr.w r2, [r4, #384] ; 0x180 + 80036cc: 4631 mov r1, r6 + 80036ce: 4650 mov r0, sl + 80036d0: 4790 blx r2 + 80036d2: 2800 cmp r0, #0 + 80036d4: f040 8085 bne.w 80037e2 <_scanf_i+0x1c2> + 80036d8: f10b 0b01 add.w fp, fp, #1 + 80036dc: f1bb 0f03 cmp.w fp, #3 + 80036e0: d1cb bne.n 800367a <_scanf_i+0x5a> + 80036e2: 6863 ldr r3, [r4, #4] + 80036e4: b90b cbnz r3, 80036ea <_scanf_i+0xca> + 80036e6: 230a movs r3, #10 + 80036e8: 6063 str r3, [r4, #4] + 80036ea: 6863 ldr r3, [r4, #4] + 80036ec: 4945 ldr r1, [pc, #276] ; (8003804 <_scanf_i+0x1e4>) + 80036ee: 6960 ldr r0, [r4, #20] + 80036f0: 1ac9 subs r1, r1, r3 + 80036f2: f000 f89b bl 800382c <__sccl> + 80036f6: f04f 0b00 mov.w fp, #0 + 80036fa: 68a3 ldr r3, [r4, #8] + 80036fc: 6822 ldr r2, [r4, #0] + 80036fe: 2b00 cmp r3, #0 + 8003700: d03d beq.n 800377e <_scanf_i+0x15e> + 8003702: 6831 ldr r1, [r6, #0] + 8003704: 6960 ldr r0, [r4, #20] + 8003706: f891 c000 ldrb.w ip, [r1] + 800370a: f810 000c ldrb.w r0, [r0, ip] + 800370e: 2800 cmp r0, #0 + 8003710: d035 beq.n 800377e <_scanf_i+0x15e> + 8003712: f1bc 0f30 cmp.w ip, #48 ; 0x30 + 8003716: d124 bne.n 8003762 <_scanf_i+0x142> + 8003718: 0510 lsls r0, r2, #20 + 800371a: d522 bpl.n 8003762 <_scanf_i+0x142> + 800371c: f10b 0b01 add.w fp, fp, #1 + 8003720: f1b9 0f00 cmp.w r9, #0 + 8003724: d003 beq.n 800372e <_scanf_i+0x10e> + 8003726: 3301 adds r3, #1 + 8003728: f109 39ff add.w r9, r9, #4294967295 + 800372c: 60a3 str r3, [r4, #8] + 800372e: 6873 ldr r3, [r6, #4] + 8003730: 3b01 subs r3, #1 + 8003732: 2b00 cmp r3, #0 + 8003734: 6073 str r3, [r6, #4] + 8003736: dd1b ble.n 8003770 <_scanf_i+0x150> + 8003738: 6833 ldr r3, [r6, #0] + 800373a: 3301 adds r3, #1 + 800373c: 6033 str r3, [r6, #0] + 800373e: 68a3 ldr r3, [r4, #8] + 8003740: 3b01 subs r3, #1 + 8003742: 60a3 str r3, [r4, #8] + 8003744: e7d9 b.n 80036fa <_scanf_i+0xda> + 8003746: f1bb 0f02 cmp.w fp, #2 + 800374a: d1ae bne.n 80036aa <_scanf_i+0x8a> + 800374c: 6822 ldr r2, [r4, #0] + 800374e: f402 61c0 and.w r1, r2, #1536 ; 0x600 + 8003752: f5b1 7f00 cmp.w r1, #512 ; 0x200 + 8003756: d1bf bne.n 80036d8 <_scanf_i+0xb8> + 8003758: 2310 movs r3, #16 + 800375a: 6063 str r3, [r4, #4] + 800375c: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8003760: e7a2 b.n 80036a8 <_scanf_i+0x88> + 8003762: f422 6210 bic.w r2, r2, #2304 ; 0x900 + 8003766: 6022 str r2, [r4, #0] + 8003768: 780b ldrb r3, [r1, #0] + 800376a: f805 3b01 strb.w r3, [r5], #1 + 800376e: e7de b.n 800372e <_scanf_i+0x10e> + 8003770: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180 + 8003774: 4631 mov r1, r6 + 8003776: 4650 mov r0, sl + 8003778: 4798 blx r3 + 800377a: 2800 cmp r0, #0 + 800377c: d0df beq.n 800373e <_scanf_i+0x11e> + 800377e: 6823 ldr r3, [r4, #0] + 8003780: 05d9 lsls r1, r3, #23 + 8003782: d50d bpl.n 80037a0 <_scanf_i+0x180> + 8003784: 42bd cmp r5, r7 + 8003786: d909 bls.n 800379c <_scanf_i+0x17c> + 8003788: f815 1c01 ldrb.w r1, [r5, #-1] + 800378c: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c + 8003790: 4632 mov r2, r6 + 8003792: 4650 mov r0, sl + 8003794: 4798 blx r3 + 8003796: f105 39ff add.w r9, r5, #4294967295 + 800379a: 464d mov r5, r9 + 800379c: 42bd cmp r5, r7 + 800379e: d028 beq.n 80037f2 <_scanf_i+0x1d2> + 80037a0: 6822 ldr r2, [r4, #0] + 80037a2: f012 0210 ands.w r2, r2, #16 + 80037a6: d113 bne.n 80037d0 <_scanf_i+0x1b0> + 80037a8: 702a strb r2, [r5, #0] + 80037aa: 6863 ldr r3, [r4, #4] + 80037ac: 9e01 ldr r6, [sp, #4] + 80037ae: 4639 mov r1, r7 + 80037b0: 4650 mov r0, sl + 80037b2: 47b0 blx r6 + 80037b4: f8d8 3000 ldr.w r3, [r8] + 80037b8: 6821 ldr r1, [r4, #0] + 80037ba: 1d1a adds r2, r3, #4 + 80037bc: f8c8 2000 str.w r2, [r8] + 80037c0: f011 0f20 tst.w r1, #32 + 80037c4: 681b ldr r3, [r3, #0] + 80037c6: d00f beq.n 80037e8 <_scanf_i+0x1c8> + 80037c8: 6018 str r0, [r3, #0] + 80037ca: 68e3 ldr r3, [r4, #12] + 80037cc: 3301 adds r3, #1 + 80037ce: 60e3 str r3, [r4, #12] + 80037d0: 1bed subs r5, r5, r7 + 80037d2: 44ab add fp, r5 + 80037d4: 6925 ldr r5, [r4, #16] + 80037d6: 445d add r5, fp + 80037d8: 6125 str r5, [r4, #16] + 80037da: 2000 movs r0, #0 + 80037dc: b007 add sp, #28 + 80037de: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80037e2: f04f 0b00 mov.w fp, #0 + 80037e6: e7ca b.n 800377e <_scanf_i+0x15e> + 80037e8: 07ca lsls r2, r1, #31 + 80037ea: bf4c ite mi + 80037ec: 8018 strhmi r0, [r3, #0] + 80037ee: 6018 strpl r0, [r3, #0] + 80037f0: e7eb b.n 80037ca <_scanf_i+0x1aa> + 80037f2: 2001 movs r0, #1 + 80037f4: e7f2 b.n 80037dc <_scanf_i+0x1bc> + 80037f6: bf00 nop + 80037f8: 08004118 .word 0x08004118 + 80037fc: 08003aa5 .word 0x08003aa5 + 8003800: 080039a9 .word 0x080039a9 + 8003804: 080041d4 .word 0x080041d4 + +08003808 <_read_r>: + 8003808: b538 push {r3, r4, r5, lr} + 800380a: 4d07 ldr r5, [pc, #28] ; (8003828 <_read_r+0x20>) + 800380c: 4604 mov r4, r0 + 800380e: 4608 mov r0, r1 + 8003810: 4611 mov r1, r2 + 8003812: 2200 movs r2, #0 + 8003814: 602a str r2, [r5, #0] + 8003816: 461a mov r2, r3 + 8003818: f7fe faf4 bl 8001e04 <_read> + 800381c: 1c43 adds r3, r0, #1 + 800381e: d102 bne.n 8003826 <_read_r+0x1e> + 8003820: 682b ldr r3, [r5, #0] + 8003822: b103 cbz r3, 8003826 <_read_r+0x1e> + 8003824: 6023 str r3, [r4, #0] + 8003826: bd38 pop {r3, r4, r5, pc} + 8003828: 20000d30 .word 0x20000d30 + +0800382c <__sccl>: + 800382c: b570 push {r4, r5, r6, lr} + 800382e: 780b ldrb r3, [r1, #0] + 8003830: 4604 mov r4, r0 + 8003832: 2b5e cmp r3, #94 ; 0x5e + 8003834: bf0b itete eq + 8003836: 784b ldrbeq r3, [r1, #1] + 8003838: 1c48 addne r0, r1, #1 + 800383a: 1c88 addeq r0, r1, #2 + 800383c: 2200 movne r2, #0 + 800383e: bf08 it eq + 8003840: 2201 moveq r2, #1 + 8003842: 1e61 subs r1, r4, #1 + 8003844: f104 05ff add.w r5, r4, #255 ; 0xff + 8003848: f801 2f01 strb.w r2, [r1, #1]! + 800384c: 42a9 cmp r1, r5 + 800384e: d1fb bne.n 8003848 <__sccl+0x1c> + 8003850: b90b cbnz r3, 8003856 <__sccl+0x2a> + 8003852: 3801 subs r0, #1 + 8003854: bd70 pop {r4, r5, r6, pc} + 8003856: f082 0101 eor.w r1, r2, #1 + 800385a: 54e1 strb r1, [r4, r3] + 800385c: 1c42 adds r2, r0, #1 + 800385e: f812 5c01 ldrb.w r5, [r2, #-1] + 8003862: 2d2d cmp r5, #45 ; 0x2d + 8003864: f102 36ff add.w r6, r2, #4294967295 + 8003868: 4610 mov r0, r2 + 800386a: d006 beq.n 800387a <__sccl+0x4e> + 800386c: 2d5d cmp r5, #93 ; 0x5d + 800386e: d0f1 beq.n 8003854 <__sccl+0x28> + 8003870: b90d cbnz r5, 8003876 <__sccl+0x4a> + 8003872: 4630 mov r0, r6 + 8003874: e7ee b.n 8003854 <__sccl+0x28> + 8003876: 462b mov r3, r5 + 8003878: e7ef b.n 800385a <__sccl+0x2e> + 800387a: 7816 ldrb r6, [r2, #0] + 800387c: 2e5d cmp r6, #93 ; 0x5d + 800387e: d0fa beq.n 8003876 <__sccl+0x4a> + 8003880: 42b3 cmp r3, r6 + 8003882: dcf8 bgt.n 8003876 <__sccl+0x4a> + 8003884: 4618 mov r0, r3 + 8003886: 3001 adds r0, #1 + 8003888: 4286 cmp r6, r0 + 800388a: 5421 strb r1, [r4, r0] + 800388c: dcfb bgt.n 8003886 <__sccl+0x5a> + 800388e: 43d8 mvns r0, r3 + 8003890: 4430 add r0, r6 + 8003892: 1c5d adds r5, r3, #1 + 8003894: 42b3 cmp r3, r6 + 8003896: bfa8 it ge + 8003898: 2000 movge r0, #0 + 800389a: 182b adds r3, r5, r0 + 800389c: 3202 adds r2, #2 + 800389e: e7de b.n 800385e <__sccl+0x32> + +080038a0 <_strtol_l.isra.0>: + 80038a0: 2b01 cmp r3, #1 + 80038a2: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 80038a6: d001 beq.n 80038ac <_strtol_l.isra.0+0xc> + 80038a8: 2b24 cmp r3, #36 ; 0x24 + 80038aa: d906 bls.n 80038ba <_strtol_l.isra.0+0x1a> + 80038ac: f000 f9f6 bl 8003c9c <__errno> + 80038b0: 2316 movs r3, #22 + 80038b2: 6003 str r3, [r0, #0] + 80038b4: 2000 movs r0, #0 + 80038b6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80038ba: 4f3a ldr r7, [pc, #232] ; (80039a4 <_strtol_l.isra.0+0x104>) + 80038bc: 468e mov lr, r1 + 80038be: 4676 mov r6, lr + 80038c0: f81e 4b01 ldrb.w r4, [lr], #1 + 80038c4: 5de5 ldrb r5, [r4, r7] + 80038c6: f015 0508 ands.w r5, r5, #8 + 80038ca: d1f8 bne.n 80038be <_strtol_l.isra.0+0x1e> + 80038cc: 2c2d cmp r4, #45 ; 0x2d + 80038ce: d134 bne.n 800393a <_strtol_l.isra.0+0x9a> + 80038d0: f89e 4000 ldrb.w r4, [lr] + 80038d4: f04f 0801 mov.w r8, #1 + 80038d8: f106 0e02 add.w lr, r6, #2 + 80038dc: 2b00 cmp r3, #0 + 80038de: d05c beq.n 800399a <_strtol_l.isra.0+0xfa> + 80038e0: 2b10 cmp r3, #16 + 80038e2: d10c bne.n 80038fe <_strtol_l.isra.0+0x5e> + 80038e4: 2c30 cmp r4, #48 ; 0x30 + 80038e6: d10a bne.n 80038fe <_strtol_l.isra.0+0x5e> + 80038e8: f89e 4000 ldrb.w r4, [lr] + 80038ec: f004 04df and.w r4, r4, #223 ; 0xdf + 80038f0: 2c58 cmp r4, #88 ; 0x58 + 80038f2: d14d bne.n 8003990 <_strtol_l.isra.0+0xf0> + 80038f4: f89e 4001 ldrb.w r4, [lr, #1] + 80038f8: 2310 movs r3, #16 + 80038fa: f10e 0e02 add.w lr, lr, #2 + 80038fe: f108 4c00 add.w ip, r8, #2147483648 ; 0x80000000 + 8003902: f10c 3cff add.w ip, ip, #4294967295 + 8003906: 2600 movs r6, #0 + 8003908: fbbc f9f3 udiv r9, ip, r3 + 800390c: 4635 mov r5, r6 + 800390e: fb03 ca19 mls sl, r3, r9, ip + 8003912: f1a4 0730 sub.w r7, r4, #48 ; 0x30 + 8003916: 2f09 cmp r7, #9 + 8003918: d818 bhi.n 800394c <_strtol_l.isra.0+0xac> + 800391a: 463c mov r4, r7 + 800391c: 42a3 cmp r3, r4 + 800391e: dd24 ble.n 800396a <_strtol_l.isra.0+0xca> + 8003920: 2e00 cmp r6, #0 + 8003922: db1f blt.n 8003964 <_strtol_l.isra.0+0xc4> + 8003924: 45a9 cmp r9, r5 + 8003926: d31d bcc.n 8003964 <_strtol_l.isra.0+0xc4> + 8003928: d101 bne.n 800392e <_strtol_l.isra.0+0x8e> + 800392a: 45a2 cmp sl, r4 + 800392c: db1a blt.n 8003964 <_strtol_l.isra.0+0xc4> + 800392e: fb05 4503 mla r5, r5, r3, r4 + 8003932: 2601 movs r6, #1 + 8003934: f81e 4b01 ldrb.w r4, [lr], #1 + 8003938: e7eb b.n 8003912 <_strtol_l.isra.0+0x72> + 800393a: 2c2b cmp r4, #43 ; 0x2b + 800393c: bf08 it eq + 800393e: f89e 4000 ldrbeq.w r4, [lr] + 8003942: 46a8 mov r8, r5 + 8003944: bf08 it eq + 8003946: f106 0e02 addeq.w lr, r6, #2 + 800394a: e7c7 b.n 80038dc <_strtol_l.isra.0+0x3c> + 800394c: f1a4 0741 sub.w r7, r4, #65 ; 0x41 + 8003950: 2f19 cmp r7, #25 + 8003952: d801 bhi.n 8003958 <_strtol_l.isra.0+0xb8> + 8003954: 3c37 subs r4, #55 ; 0x37 + 8003956: e7e1 b.n 800391c <_strtol_l.isra.0+0x7c> + 8003958: f1a4 0761 sub.w r7, r4, #97 ; 0x61 + 800395c: 2f19 cmp r7, #25 + 800395e: d804 bhi.n 800396a <_strtol_l.isra.0+0xca> + 8003960: 3c57 subs r4, #87 ; 0x57 + 8003962: e7db b.n 800391c <_strtol_l.isra.0+0x7c> + 8003964: f04f 36ff mov.w r6, #4294967295 + 8003968: e7e4 b.n 8003934 <_strtol_l.isra.0+0x94> + 800396a: 2e00 cmp r6, #0 + 800396c: da05 bge.n 800397a <_strtol_l.isra.0+0xda> + 800396e: 2322 movs r3, #34 ; 0x22 + 8003970: 6003 str r3, [r0, #0] + 8003972: 4665 mov r5, ip + 8003974: b942 cbnz r2, 8003988 <_strtol_l.isra.0+0xe8> + 8003976: 4628 mov r0, r5 + 8003978: e79d b.n 80038b6 <_strtol_l.isra.0+0x16> + 800397a: f1b8 0f00 cmp.w r8, #0 + 800397e: d000 beq.n 8003982 <_strtol_l.isra.0+0xe2> + 8003980: 426d negs r5, r5 + 8003982: 2a00 cmp r2, #0 + 8003984: d0f7 beq.n 8003976 <_strtol_l.isra.0+0xd6> + 8003986: b10e cbz r6, 800398c <_strtol_l.isra.0+0xec> + 8003988: f10e 31ff add.w r1, lr, #4294967295 + 800398c: 6011 str r1, [r2, #0] + 800398e: e7f2 b.n 8003976 <_strtol_l.isra.0+0xd6> + 8003990: 2430 movs r4, #48 ; 0x30 + 8003992: 2b00 cmp r3, #0 + 8003994: d1b3 bne.n 80038fe <_strtol_l.isra.0+0x5e> + 8003996: 2308 movs r3, #8 + 8003998: e7b1 b.n 80038fe <_strtol_l.isra.0+0x5e> + 800399a: 2c30 cmp r4, #48 ; 0x30 + 800399c: d0a4 beq.n 80038e8 <_strtol_l.isra.0+0x48> + 800399e: 230a movs r3, #10 + 80039a0: e7ad b.n 80038fe <_strtol_l.isra.0+0x5e> + 80039a2: bf00 nop + 80039a4: 080041d7 .word 0x080041d7 + +080039a8 <_strtol_r>: + 80039a8: f7ff bf7a b.w 80038a0 <_strtol_l.isra.0> + +080039ac <_strtoul_l.isra.0>: + 80039ac: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} + 80039b0: 4e3b ldr r6, [pc, #236] ; (8003aa0 <_strtoul_l.isra.0+0xf4>) + 80039b2: 4686 mov lr, r0 + 80039b4: 468c mov ip, r1 + 80039b6: 4660 mov r0, ip + 80039b8: f81c 4b01 ldrb.w r4, [ip], #1 + 80039bc: 5da5 ldrb r5, [r4, r6] + 80039be: f015 0508 ands.w r5, r5, #8 + 80039c2: d1f8 bne.n 80039b6 <_strtoul_l.isra.0+0xa> + 80039c4: 2c2d cmp r4, #45 ; 0x2d + 80039c6: d134 bne.n 8003a32 <_strtoul_l.isra.0+0x86> + 80039c8: f89c 4000 ldrb.w r4, [ip] + 80039cc: f04f 0801 mov.w r8, #1 + 80039d0: f100 0c02 add.w ip, r0, #2 + 80039d4: 2b00 cmp r3, #0 + 80039d6: d05e beq.n 8003a96 <_strtoul_l.isra.0+0xea> + 80039d8: 2b10 cmp r3, #16 + 80039da: d10c bne.n 80039f6 <_strtoul_l.isra.0+0x4a> + 80039dc: 2c30 cmp r4, #48 ; 0x30 + 80039de: d10a bne.n 80039f6 <_strtoul_l.isra.0+0x4a> + 80039e0: f89c 0000 ldrb.w r0, [ip] + 80039e4: f000 00df and.w r0, r0, #223 ; 0xdf + 80039e8: 2858 cmp r0, #88 ; 0x58 + 80039ea: d14f bne.n 8003a8c <_strtoul_l.isra.0+0xe0> + 80039ec: f89c 4001 ldrb.w r4, [ip, #1] + 80039f0: 2310 movs r3, #16 + 80039f2: f10c 0c02 add.w ip, ip, #2 + 80039f6: f04f 37ff mov.w r7, #4294967295 + 80039fa: 2500 movs r5, #0 + 80039fc: fbb7 f7f3 udiv r7, r7, r3 + 8003a00: fb03 f907 mul.w r9, r3, r7 + 8003a04: ea6f 0909 mvn.w r9, r9 + 8003a08: 4628 mov r0, r5 + 8003a0a: f1a4 0630 sub.w r6, r4, #48 ; 0x30 + 8003a0e: 2e09 cmp r6, #9 + 8003a10: d818 bhi.n 8003a44 <_strtoul_l.isra.0+0x98> + 8003a12: 4634 mov r4, r6 + 8003a14: 42a3 cmp r3, r4 + 8003a16: dd24 ble.n 8003a62 <_strtoul_l.isra.0+0xb6> + 8003a18: 2d00 cmp r5, #0 + 8003a1a: db1f blt.n 8003a5c <_strtoul_l.isra.0+0xb0> + 8003a1c: 4287 cmp r7, r0 + 8003a1e: d31d bcc.n 8003a5c <_strtoul_l.isra.0+0xb0> + 8003a20: d101 bne.n 8003a26 <_strtoul_l.isra.0+0x7a> + 8003a22: 45a1 cmp r9, r4 + 8003a24: db1a blt.n 8003a5c <_strtoul_l.isra.0+0xb0> + 8003a26: fb00 4003 mla r0, r0, r3, r4 + 8003a2a: 2501 movs r5, #1 + 8003a2c: f81c 4b01 ldrb.w r4, [ip], #1 + 8003a30: e7eb b.n 8003a0a <_strtoul_l.isra.0+0x5e> + 8003a32: 2c2b cmp r4, #43 ; 0x2b + 8003a34: bf08 it eq + 8003a36: f89c 4000 ldrbeq.w r4, [ip] + 8003a3a: 46a8 mov r8, r5 + 8003a3c: bf08 it eq + 8003a3e: f100 0c02 addeq.w ip, r0, #2 + 8003a42: e7c7 b.n 80039d4 <_strtoul_l.isra.0+0x28> + 8003a44: f1a4 0641 sub.w r6, r4, #65 ; 0x41 + 8003a48: 2e19 cmp r6, #25 + 8003a4a: d801 bhi.n 8003a50 <_strtoul_l.isra.0+0xa4> + 8003a4c: 3c37 subs r4, #55 ; 0x37 + 8003a4e: e7e1 b.n 8003a14 <_strtoul_l.isra.0+0x68> + 8003a50: f1a4 0661 sub.w r6, r4, #97 ; 0x61 + 8003a54: 2e19 cmp r6, #25 + 8003a56: d804 bhi.n 8003a62 <_strtoul_l.isra.0+0xb6> + 8003a58: 3c57 subs r4, #87 ; 0x57 + 8003a5a: e7db b.n 8003a14 <_strtoul_l.isra.0+0x68> + 8003a5c: f04f 35ff mov.w r5, #4294967295 + 8003a60: e7e4 b.n 8003a2c <_strtoul_l.isra.0+0x80> + 8003a62: 2d00 cmp r5, #0 + 8003a64: da07 bge.n 8003a76 <_strtoul_l.isra.0+0xca> + 8003a66: 2322 movs r3, #34 ; 0x22 + 8003a68: f8ce 3000 str.w r3, [lr] + 8003a6c: f04f 30ff mov.w r0, #4294967295 + 8003a70: b942 cbnz r2, 8003a84 <_strtoul_l.isra.0+0xd8> + 8003a72: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} + 8003a76: f1b8 0f00 cmp.w r8, #0 + 8003a7a: d000 beq.n 8003a7e <_strtoul_l.isra.0+0xd2> + 8003a7c: 4240 negs r0, r0 + 8003a7e: 2a00 cmp r2, #0 + 8003a80: d0f7 beq.n 8003a72 <_strtoul_l.isra.0+0xc6> + 8003a82: b10d cbz r5, 8003a88 <_strtoul_l.isra.0+0xdc> + 8003a84: f10c 31ff add.w r1, ip, #4294967295 + 8003a88: 6011 str r1, [r2, #0] + 8003a8a: e7f2 b.n 8003a72 <_strtoul_l.isra.0+0xc6> + 8003a8c: 2430 movs r4, #48 ; 0x30 + 8003a8e: 2b00 cmp r3, #0 + 8003a90: d1b1 bne.n 80039f6 <_strtoul_l.isra.0+0x4a> + 8003a92: 2308 movs r3, #8 + 8003a94: e7af b.n 80039f6 <_strtoul_l.isra.0+0x4a> + 8003a96: 2c30 cmp r4, #48 ; 0x30 + 8003a98: d0a2 beq.n 80039e0 <_strtoul_l.isra.0+0x34> + 8003a9a: 230a movs r3, #10 + 8003a9c: e7ab b.n 80039f6 <_strtoul_l.isra.0+0x4a> + 8003a9e: bf00 nop + 8003aa0: 080041d7 .word 0x080041d7 + +08003aa4 <_strtoul_r>: + 8003aa4: f7ff bf82 b.w 80039ac <_strtoul_l.isra.0> + +08003aa8 <__submore>: + 8003aa8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8003aac: 460c mov r4, r1 + 8003aae: 6b49 ldr r1, [r1, #52] ; 0x34 + 8003ab0: f104 0344 add.w r3, r4, #68 ; 0x44 + 8003ab4: 4299 cmp r1, r3 + 8003ab6: d11d bne.n 8003af4 <__submore+0x4c> + 8003ab8: f44f 6180 mov.w r1, #1024 ; 0x400 + 8003abc: f7fe fc7a bl 80023b4 <_malloc_r> + 8003ac0: b918 cbnz r0, 8003aca <__submore+0x22> + 8003ac2: f04f 30ff mov.w r0, #4294967295 + 8003ac6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8003aca: f44f 6380 mov.w r3, #1024 ; 0x400 + 8003ace: 63a3 str r3, [r4, #56] ; 0x38 + 8003ad0: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 + 8003ad4: 6360 str r0, [r4, #52] ; 0x34 + 8003ad6: f880 33ff strb.w r3, [r0, #1023] ; 0x3ff + 8003ada: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 + 8003ade: f880 33fe strb.w r3, [r0, #1022] ; 0x3fe + 8003ae2: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 + 8003ae6: f880 33fd strb.w r3, [r0, #1021] ; 0x3fd + 8003aea: f200 30fd addw r0, r0, #1021 ; 0x3fd + 8003aee: 6020 str r0, [r4, #0] + 8003af0: 2000 movs r0, #0 + 8003af2: e7e8 b.n 8003ac6 <__submore+0x1e> + 8003af4: 6ba6 ldr r6, [r4, #56] ; 0x38 + 8003af6: 0077 lsls r7, r6, #1 + 8003af8: 463a mov r2, r7 + 8003afa: f000 f8f7 bl 8003cec <_realloc_r> + 8003afe: 4605 mov r5, r0 + 8003b00: 2800 cmp r0, #0 + 8003b02: d0de beq.n 8003ac2 <__submore+0x1a> + 8003b04: eb00 0806 add.w r8, r0, r6 + 8003b08: 4601 mov r1, r0 + 8003b0a: 4632 mov r2, r6 + 8003b0c: 4640 mov r0, r8 + 8003b0e: f7fe fc3a bl 8002386 + 8003b12: e9c4 570d strd r5, r7, [r4, #52] ; 0x34 + 8003b16: f8c4 8000 str.w r8, [r4] + 8003b1a: e7e9 b.n 8003af0 <__submore+0x48> + +08003b1c <__swbuf_r>: + 8003b1c: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003b1e: 460e mov r6, r1 + 8003b20: 4614 mov r4, r2 + 8003b22: 4605 mov r5, r0 + 8003b24: b118 cbz r0, 8003b2e <__swbuf_r+0x12> + 8003b26: 6983 ldr r3, [r0, #24] + 8003b28: b90b cbnz r3, 8003b2e <__swbuf_r+0x12> + 8003b2a: f7fe fb4b bl 80021c4 <__sinit> + 8003b2e: 4b21 ldr r3, [pc, #132] ; (8003bb4 <__swbuf_r+0x98>) + 8003b30: 429c cmp r4, r3 + 8003b32: d12b bne.n 8003b8c <__swbuf_r+0x70> + 8003b34: 686c ldr r4, [r5, #4] + 8003b36: 69a3 ldr r3, [r4, #24] + 8003b38: 60a3 str r3, [r4, #8] + 8003b3a: 89a3 ldrh r3, [r4, #12] + 8003b3c: 071a lsls r2, r3, #28 + 8003b3e: d52f bpl.n 8003ba0 <__swbuf_r+0x84> + 8003b40: 6923 ldr r3, [r4, #16] + 8003b42: b36b cbz r3, 8003ba0 <__swbuf_r+0x84> + 8003b44: 6923 ldr r3, [r4, #16] + 8003b46: 6820 ldr r0, [r4, #0] + 8003b48: 1ac0 subs r0, r0, r3 + 8003b4a: 6963 ldr r3, [r4, #20] + 8003b4c: b2f6 uxtb r6, r6 + 8003b4e: 4283 cmp r3, r0 + 8003b50: 4637 mov r7, r6 + 8003b52: dc04 bgt.n 8003b5e <__swbuf_r+0x42> + 8003b54: 4621 mov r1, r4 + 8003b56: 4628 mov r0, r5 + 8003b58: f7fe ff22 bl 80029a0 <_fflush_r> + 8003b5c: bb30 cbnz r0, 8003bac <__swbuf_r+0x90> + 8003b5e: 68a3 ldr r3, [r4, #8] + 8003b60: 3b01 subs r3, #1 + 8003b62: 60a3 str r3, [r4, #8] + 8003b64: 6823 ldr r3, [r4, #0] + 8003b66: 1c5a adds r2, r3, #1 + 8003b68: 6022 str r2, [r4, #0] + 8003b6a: 701e strb r6, [r3, #0] + 8003b6c: 6963 ldr r3, [r4, #20] + 8003b6e: 3001 adds r0, #1 + 8003b70: 4283 cmp r3, r0 + 8003b72: d004 beq.n 8003b7e <__swbuf_r+0x62> + 8003b74: 89a3 ldrh r3, [r4, #12] + 8003b76: 07db lsls r3, r3, #31 + 8003b78: d506 bpl.n 8003b88 <__swbuf_r+0x6c> + 8003b7a: 2e0a cmp r6, #10 + 8003b7c: d104 bne.n 8003b88 <__swbuf_r+0x6c> + 8003b7e: 4621 mov r1, r4 + 8003b80: 4628 mov r0, r5 + 8003b82: f7fe ff0d bl 80029a0 <_fflush_r> + 8003b86: b988 cbnz r0, 8003bac <__swbuf_r+0x90> + 8003b88: 4638 mov r0, r7 + 8003b8a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8003b8c: 4b0a ldr r3, [pc, #40] ; (8003bb8 <__swbuf_r+0x9c>) + 8003b8e: 429c cmp r4, r3 + 8003b90: d101 bne.n 8003b96 <__swbuf_r+0x7a> + 8003b92: 68ac ldr r4, [r5, #8] + 8003b94: e7cf b.n 8003b36 <__swbuf_r+0x1a> + 8003b96: 4b09 ldr r3, [pc, #36] ; (8003bbc <__swbuf_r+0xa0>) + 8003b98: 429c cmp r4, r3 + 8003b9a: bf08 it eq + 8003b9c: 68ec ldreq r4, [r5, #12] + 8003b9e: e7ca b.n 8003b36 <__swbuf_r+0x1a> + 8003ba0: 4621 mov r1, r4 + 8003ba2: 4628 mov r0, r5 + 8003ba4: f000 f80c bl 8003bc0 <__swsetup_r> + 8003ba8: 2800 cmp r0, #0 + 8003baa: d0cb beq.n 8003b44 <__swbuf_r+0x28> + 8003bac: f04f 37ff mov.w r7, #4294967295 + 8003bb0: e7ea b.n 8003b88 <__swbuf_r+0x6c> + 8003bb2: bf00 nop + 8003bb4: 08004144 .word 0x08004144 + 8003bb8: 08004164 .word 0x08004164 + 8003bbc: 08004124 .word 0x08004124 + +08003bc0 <__swsetup_r>: + 8003bc0: 4b32 ldr r3, [pc, #200] ; (8003c8c <__swsetup_r+0xcc>) + 8003bc2: b570 push {r4, r5, r6, lr} + 8003bc4: 681d ldr r5, [r3, #0] + 8003bc6: 4606 mov r6, r0 + 8003bc8: 460c mov r4, r1 + 8003bca: b125 cbz r5, 8003bd6 <__swsetup_r+0x16> + 8003bcc: 69ab ldr r3, [r5, #24] + 8003bce: b913 cbnz r3, 8003bd6 <__swsetup_r+0x16> + 8003bd0: 4628 mov r0, r5 + 8003bd2: f7fe faf7 bl 80021c4 <__sinit> + 8003bd6: 4b2e ldr r3, [pc, #184] ; (8003c90 <__swsetup_r+0xd0>) + 8003bd8: 429c cmp r4, r3 + 8003bda: d10f bne.n 8003bfc <__swsetup_r+0x3c> + 8003bdc: 686c ldr r4, [r5, #4] + 8003bde: 89a3 ldrh r3, [r4, #12] + 8003be0: f9b4 200c ldrsh.w r2, [r4, #12] + 8003be4: 0719 lsls r1, r3, #28 + 8003be6: d42c bmi.n 8003c42 <__swsetup_r+0x82> + 8003be8: 06dd lsls r5, r3, #27 + 8003bea: d411 bmi.n 8003c10 <__swsetup_r+0x50> + 8003bec: 2309 movs r3, #9 + 8003bee: 6033 str r3, [r6, #0] + 8003bf0: f042 0340 orr.w r3, r2, #64 ; 0x40 + 8003bf4: 81a3 strh r3, [r4, #12] + 8003bf6: f04f 30ff mov.w r0, #4294967295 + 8003bfa: e03e b.n 8003c7a <__swsetup_r+0xba> + 8003bfc: 4b25 ldr r3, [pc, #148] ; (8003c94 <__swsetup_r+0xd4>) + 8003bfe: 429c cmp r4, r3 + 8003c00: d101 bne.n 8003c06 <__swsetup_r+0x46> + 8003c02: 68ac ldr r4, [r5, #8] + 8003c04: e7eb b.n 8003bde <__swsetup_r+0x1e> + 8003c06: 4b24 ldr r3, [pc, #144] ; (8003c98 <__swsetup_r+0xd8>) + 8003c08: 429c cmp r4, r3 + 8003c0a: bf08 it eq + 8003c0c: 68ec ldreq r4, [r5, #12] + 8003c0e: e7e6 b.n 8003bde <__swsetup_r+0x1e> + 8003c10: 0758 lsls r0, r3, #29 + 8003c12: d512 bpl.n 8003c3a <__swsetup_r+0x7a> + 8003c14: 6b61 ldr r1, [r4, #52] ; 0x34 + 8003c16: b141 cbz r1, 8003c2a <__swsetup_r+0x6a> + 8003c18: f104 0344 add.w r3, r4, #68 ; 0x44 + 8003c1c: 4299 cmp r1, r3 + 8003c1e: d002 beq.n 8003c26 <__swsetup_r+0x66> + 8003c20: 4630 mov r0, r6 + 8003c22: f7fe ff95 bl 8002b50 <_free_r> + 8003c26: 2300 movs r3, #0 + 8003c28: 6363 str r3, [r4, #52] ; 0x34 + 8003c2a: 89a3 ldrh r3, [r4, #12] + 8003c2c: f023 0324 bic.w r3, r3, #36 ; 0x24 + 8003c30: 81a3 strh r3, [r4, #12] + 8003c32: 2300 movs r3, #0 + 8003c34: 6063 str r3, [r4, #4] + 8003c36: 6923 ldr r3, [r4, #16] + 8003c38: 6023 str r3, [r4, #0] + 8003c3a: 89a3 ldrh r3, [r4, #12] + 8003c3c: f043 0308 orr.w r3, r3, #8 + 8003c40: 81a3 strh r3, [r4, #12] + 8003c42: 6923 ldr r3, [r4, #16] + 8003c44: b94b cbnz r3, 8003c5a <__swsetup_r+0x9a> + 8003c46: 89a3 ldrh r3, [r4, #12] + 8003c48: f403 7320 and.w r3, r3, #640 ; 0x280 + 8003c4c: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8003c50: d003 beq.n 8003c5a <__swsetup_r+0x9a> + 8003c52: 4621 mov r1, r4 + 8003c54: 4630 mov r0, r6 + 8003c56: f7fe ff27 bl 8002aa8 <__smakebuf_r> + 8003c5a: 89a0 ldrh r0, [r4, #12] + 8003c5c: f9b4 200c ldrsh.w r2, [r4, #12] + 8003c60: f010 0301 ands.w r3, r0, #1 + 8003c64: d00a beq.n 8003c7c <__swsetup_r+0xbc> + 8003c66: 2300 movs r3, #0 + 8003c68: 60a3 str r3, [r4, #8] + 8003c6a: 6963 ldr r3, [r4, #20] + 8003c6c: 425b negs r3, r3 + 8003c6e: 61a3 str r3, [r4, #24] + 8003c70: 6923 ldr r3, [r4, #16] + 8003c72: b943 cbnz r3, 8003c86 <__swsetup_r+0xc6> + 8003c74: f010 0080 ands.w r0, r0, #128 ; 0x80 + 8003c78: d1ba bne.n 8003bf0 <__swsetup_r+0x30> + 8003c7a: bd70 pop {r4, r5, r6, pc} + 8003c7c: 0781 lsls r1, r0, #30 + 8003c7e: bf58 it pl + 8003c80: 6963 ldrpl r3, [r4, #20] + 8003c82: 60a3 str r3, [r4, #8] + 8003c84: e7f4 b.n 8003c70 <__swsetup_r+0xb0> + 8003c86: 2000 movs r0, #0 + 8003c88: e7f7 b.n 8003c7a <__swsetup_r+0xba> + 8003c8a: bf00 nop + 8003c8c: 20000c90 .word 0x20000c90 + 8003c90: 08004144 .word 0x08004144 + 8003c94: 08004164 .word 0x08004164 + 8003c98: 08004124 .word 0x08004124 + +08003c9c <__errno>: + 8003c9c: 4b01 ldr r3, [pc, #4] ; (8003ca4 <__errno+0x8>) + 8003c9e: 6818 ldr r0, [r3, #0] + 8003ca0: 4770 bx lr + 8003ca2: bf00 nop + 8003ca4: 20000c90 .word 0x20000c90 + +08003ca8 <_fstat_r>: + 8003ca8: b538 push {r3, r4, r5, lr} + 8003caa: 4d07 ldr r5, [pc, #28] ; (8003cc8 <_fstat_r+0x20>) + 8003cac: 2300 movs r3, #0 + 8003cae: 4604 mov r4, r0 + 8003cb0: 4608 mov r0, r1 + 8003cb2: 4611 mov r1, r2 + 8003cb4: 602b str r3, [r5, #0] + 8003cb6: f000 f84f bl 8003d58 <_fstat> + 8003cba: 1c43 adds r3, r0, #1 + 8003cbc: d102 bne.n 8003cc4 <_fstat_r+0x1c> + 8003cbe: 682b ldr r3, [r5, #0] + 8003cc0: b103 cbz r3, 8003cc4 <_fstat_r+0x1c> + 8003cc2: 6023 str r3, [r4, #0] + 8003cc4: bd38 pop {r3, r4, r5, pc} + 8003cc6: bf00 nop + 8003cc8: 20000d30 .word 0x20000d30 + +08003ccc <_isatty_r>: + 8003ccc: b538 push {r3, r4, r5, lr} + 8003cce: 4d06 ldr r5, [pc, #24] ; (8003ce8 <_isatty_r+0x1c>) + 8003cd0: 2300 movs r3, #0 + 8003cd2: 4604 mov r4, r0 + 8003cd4: 4608 mov r0, r1 + 8003cd6: 602b str r3, [r5, #0] + 8003cd8: f000 f846 bl 8003d68 <_isatty> + 8003cdc: 1c43 adds r3, r0, #1 + 8003cde: d102 bne.n 8003ce6 <_isatty_r+0x1a> + 8003ce0: 682b ldr r3, [r5, #0] + 8003ce2: b103 cbz r3, 8003ce6 <_isatty_r+0x1a> + 8003ce4: 6023 str r3, [r4, #0] + 8003ce6: bd38 pop {r3, r4, r5, pc} + 8003ce8: 20000d30 .word 0x20000d30 + +08003cec <_realloc_r>: + 8003cec: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003cee: 4607 mov r7, r0 + 8003cf0: 4614 mov r4, r2 + 8003cf2: 460e mov r6, r1 + 8003cf4: b921 cbnz r1, 8003d00 <_realloc_r+0x14> + 8003cf6: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} + 8003cfa: 4611 mov r1, r2 + 8003cfc: f7fe bb5a b.w 80023b4 <_malloc_r> + 8003d00: b922 cbnz r2, 8003d0c <_realloc_r+0x20> + 8003d02: f7fe ff25 bl 8002b50 <_free_r> + 8003d06: 4625 mov r5, r4 + 8003d08: 4628 mov r0, r5 + 8003d0a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8003d0c: f000 f814 bl 8003d38 <_malloc_usable_size_r> + 8003d10: 42a0 cmp r0, r4 + 8003d12: d20f bcs.n 8003d34 <_realloc_r+0x48> + 8003d14: 4621 mov r1, r4 + 8003d16: 4638 mov r0, r7 + 8003d18: f7fe fb4c bl 80023b4 <_malloc_r> + 8003d1c: 4605 mov r5, r0 + 8003d1e: 2800 cmp r0, #0 + 8003d20: d0f2 beq.n 8003d08 <_realloc_r+0x1c> + 8003d22: 4631 mov r1, r6 + 8003d24: 4622 mov r2, r4 + 8003d26: f7fe fb2e bl 8002386 + 8003d2a: 4631 mov r1, r6 + 8003d2c: 4638 mov r0, r7 + 8003d2e: f7fe ff0f bl 8002b50 <_free_r> + 8003d32: e7e9 b.n 8003d08 <_realloc_r+0x1c> + 8003d34: 4635 mov r5, r6 + 8003d36: e7e7 b.n 8003d08 <_realloc_r+0x1c> + +08003d38 <_malloc_usable_size_r>: + 8003d38: f851 3c04 ldr.w r3, [r1, #-4] + 8003d3c: 1f18 subs r0, r3, #4 + 8003d3e: 2b00 cmp r3, #0 + 8003d40: bfbc itt lt + 8003d42: 580b ldrlt r3, [r1, r0] + 8003d44: 18c0 addlt r0, r0, r3 + 8003d46: 4770 bx lr + +08003d48 <_close>: + 8003d48: 4b02 ldr r3, [pc, #8] ; (8003d54 <_close+0xc>) + 8003d4a: 2258 movs r2, #88 ; 0x58 + 8003d4c: 601a str r2, [r3, #0] + 8003d4e: f04f 30ff mov.w r0, #4294967295 + 8003d52: 4770 bx lr + 8003d54: 20000d30 .word 0x20000d30 + +08003d58 <_fstat>: + 8003d58: 4b02 ldr r3, [pc, #8] ; (8003d64 <_fstat+0xc>) + 8003d5a: 2258 movs r2, #88 ; 0x58 + 8003d5c: 601a str r2, [r3, #0] + 8003d5e: f04f 30ff mov.w r0, #4294967295 + 8003d62: 4770 bx lr + 8003d64: 20000d30 .word 0x20000d30 + +08003d68 <_isatty>: + 8003d68: 4b02 ldr r3, [pc, #8] ; (8003d74 <_isatty+0xc>) + 8003d6a: 2258 movs r2, #88 ; 0x58 + 8003d6c: 601a str r2, [r3, #0] + 8003d6e: 2000 movs r0, #0 + 8003d70: 4770 bx lr + 8003d72: bf00 nop + 8003d74: 20000d30 .word 0x20000d30 + +08003d78 <_lseek>: + 8003d78: 4b02 ldr r3, [pc, #8] ; (8003d84 <_lseek+0xc>) + 8003d7a: 2258 movs r2, #88 ; 0x58 + 8003d7c: 601a str r2, [r3, #0] + 8003d7e: f04f 30ff mov.w r0, #4294967295 + 8003d82: 4770 bx lr + 8003d84: 20000d30 .word 0x20000d30 + +08003d88 <_sbrk>: + 8003d88: 4b04 ldr r3, [pc, #16] ; (8003d9c <_sbrk+0x14>) + 8003d8a: 6819 ldr r1, [r3, #0] + 8003d8c: 4602 mov r2, r0 + 8003d8e: b909 cbnz r1, 8003d94 <_sbrk+0xc> + 8003d90: 4903 ldr r1, [pc, #12] ; (8003da0 <_sbrk+0x18>) + 8003d92: 6019 str r1, [r3, #0] + 8003d94: 6818 ldr r0, [r3, #0] + 8003d96: 4402 add r2, r0 + 8003d98: 601a str r2, [r3, #0] + 8003d9a: 4770 bx lr + 8003d9c: 20000d20 .word 0x20000d20 + 8003da0: 20000d38 .word 0x20000d38 + +08003da4 <_init>: + 8003da4: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003da6: bf00 nop + 8003da8: bcf8 pop {r3, r4, r5, r6, r7} + 8003daa: bc08 pop {r3} + 8003dac: 469e mov lr, r3 + 8003dae: 4770 bx lr + +08003db0 <_fini>: + 8003db0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003db2: bf00 nop + 8003db4: bcf8 pop {r3, r4, r5, r6, r7} + 8003db6: bc08 pop {r3} + 8003db8: 469e mov lr, r3 + 8003dba: 4770 bx lr diff --git a/labW5barnestr/Debug/makefile b/labW5barnestr/Debug/makefile new file mode 100644 index 0000000..e9702d4 --- /dev/null +++ b/labW5barnestr/Debug/makefile @@ -0,0 +1,98 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +-include ../makefile.init + +RM := rm -rf + +# All of the sources participating in the build are defined here +-include sources.mk +-include Startup/subdir.mk +-include Src/subdir.mk +-include objects.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(S_DEPS)),) +-include $(S_DEPS) +endif +ifneq ($(strip $(S_UPPER_DEPS)),) +-include $(S_UPPER_DEPS) +endif +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +-include ../makefile.defs + +OPTIONAL_TOOL_DEPS := \ +$(wildcard ../makefile.defs) \ +$(wildcard ../makefile.init) \ +$(wildcard ../makefile.targets) \ + + +BUILD_ARTIFACT_NAME := labW5barnestr +BUILD_ARTIFACT_EXTENSION := elf +BUILD_ARTIFACT_PREFIX := +BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),) + +# Add inputs and outputs from these tool invocations to the build variables +EXECUTABLES += \ +labW5barnestr.elf \ + +SIZE_OUTPUT += \ +default.size.stdout \ + +OBJDUMP_LIST += \ +labW5barnestr.list \ + +OBJCOPY_BIN += \ +labW5barnestr.bin \ + + +# All Target +all: main-build + +# Main-build Target +main-build: labW5barnestr.elf secondary-outputs + +# Tool invocations +labW5barnestr.elf: $(OBJS) $(USER_OBJS) C:\Users\barnestr\Documents\CE2812-Workspace\labW5barnestr\STM32F446RETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "labW5barnestr.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\barnestr\Documents\CE2812-Workspace\labW5barnestr\STM32F446RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="labW5barnestr.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group + @echo 'Finished building target: $@' + @echo ' ' + +default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-size $(EXECUTABLES) + @echo 'Finished building: $@' + @echo ' ' + +labW5barnestr.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objdump -h -S $(EXECUTABLES) > "labW5barnestr.list" + @echo 'Finished building: $@' + @echo ' ' + +labW5barnestr.bin: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objcopy -O binary $(EXECUTABLES) "labW5barnestr.bin" + @echo 'Finished building: $@' + @echo ' ' + +# Other Targets +clean: + -$(RM) default.size.stdout labW5barnestr.bin labW5barnestr.elf labW5barnestr.list + -@echo ' ' + +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN) + +fail-specified-linker-script-missing: + @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' + @exit 2 + +warn-no-linker-script-specified: + @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' + +.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified + +-include ../makefile.targets diff --git a/labW5barnestr/Debug/objects.list b/labW5barnestr/Debug/objects.list new file mode 100644 index 0000000..3d6ec2e --- /dev/null +++ b/labW5barnestr/Debug/objects.list @@ -0,0 +1,7 @@ +"./Src/delay.o" +"./Src/led.o" +"./Src/main.o" +"./Src/memory.o" +"./Src/piezoSpeaker.o" +"./Src/uart_driver.o" +"./Startup/startup_stm32f446retx.o" diff --git a/labW5barnestr/Debug/objects.mk b/labW5barnestr/Debug/objects.mk new file mode 100644 index 0000000..e12976d --- /dev/null +++ b/labW5barnestr/Debug/objects.mk @@ -0,0 +1,9 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +USER_OBJS := + +LIBS := + diff --git a/labW5barnestr/Debug/sources.mk b/labW5barnestr/Debug/sources.mk new file mode 100644 index 0000000..0dff210 --- /dev/null +++ b/labW5barnestr/Debug/sources.mk @@ -0,0 +1,25 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +################################################################################ + +ELF_SRCS := +OBJ_SRCS := +S_SRCS := +C_SRCS := +S_UPPER_SRCS := +O_SRCS := +SIZE_OUTPUT := +OBJDUMP_LIST := +EXECUTABLES := +OBJS := +S_DEPS := +S_UPPER_DEPS := +C_DEPS := +OBJCOPY_BIN := + +# Every subdirectory with source files must be described here +SUBDIRS := \ +Src \ +Startup \ + diff --git a/labW5barnestr/Inc/delay.h b/labW5barnestr/Inc/delay.h new file mode 100644 index 0000000..fc2a61b --- /dev/null +++ b/labW5barnestr/Inc/delay.h @@ -0,0 +1,37 @@ +/* + * delay.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +//include guards +#ifndef DELAY_H_ +#define DELAY_H_ + +#include + +#define STK_CTRL (volatile uint32_t*) 0xE000E010 +#define STK_LOAD (volatile uint32_t*) 0xE000E014 +#define STK_VAL (volatile uint32_t*) 0xE000E018 + +#define EN 1 +#define TICKINT (1<<1) +#define CLKSOURCE (1<<2) +#define COUNTFLAG (1<<16) + +/* + * delay_1ms + * Busy wait for n ms + * + * For n iterations + * load number of cycles for 1 ms + * set one to enable and clock source + * + * wait for countflag to be set + */ +void delay_1ms(uint32_t n); + + + +#endif /* DELAY_H_ */ diff --git a/labW5barnestr/Inc/led.h b/labW5barnestr/Inc/led.h new file mode 100644 index 0000000..e927468 --- /dev/null +++ b/labW5barnestr/Inc/led.h @@ -0,0 +1,101 @@ +/* + * led.h + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#ifndef LED_H_ +#define LED_H_ + +#include + +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 +#define GPIOBEN 1 +#define GPIOB_MODER (volatile uint32_t*) 0x40020400 +#define GPIOB_PUPDR (volatile uint32_t*) 0x4002040C +#define GPIOB_IDR (volatile uint32_t*) 0x40020410 +#define GPIOB_ODR (volatile uint32_t*) 0x40020414 +#define GPIOB_BSRR (volatile uint32_t*) 0x40020418 + +#define ALL_LEDS (0b11110111111<<5) + +/* + * led_init() + * This function should: + * 1. Enable the GPIOB in RCC_AHB1ENR + * 2. Turn on to set LED0 - LED9 to output mode ("01") + */ +void led_init(); + +/* + * led_allOn() + * 1. Turn on all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOn(); + +/* + * led_allOff() + * 1. Turn off all leds (hint use ODR or BSRR) + * Note you should not effect other pins on PortB + */ +void led_allOff(); + +/* + * led_on() + * Args: 0-9 to turn on specific led + * print error message is arg is out of range + */ +void led_on(uint8_t ledIndex); + +/* + * led_off() + * Args: 0-9 to turn off specific led + * print error message is arg is out of range + */ +void led_off(uint8_t ledIndex); + + +/* + * led_scan() + * Scan the light across and back at the current speed + */ +void led_scan(); + +/* + * led_flash() + * flash all of the lights 10 times at the current speed + */ +void led_flash(); + +/* + * led_setSpeed (uint8_t speed) + * arg: speed (0 slow - 9 fast) + * Args out of range should print error to console + */ +void led_setSpeed(uint8_t speed); + +/* + * led_incSpeed() + * increases the speed by one + * if maxed out leaves the speed at the max value + */ +void led_incSpeed(); + +/* + * led_decSpeed() + * decreases the speed by one + * if at zero should stay at zero + */ +void led_decSpeed(); + +/* + * getCurrentSpeed + * returns the current speed + */ +uint8_t getCurrentSpeed(); + + + +#endif diff --git a/labW5barnestr/Inc/memory.h b/labW5barnestr/Inc/memory.h new file mode 100644 index 0000000..f0a4a27 --- /dev/null +++ b/labW5barnestr/Inc/memory.h @@ -0,0 +1,35 @@ +/** + * @file memory.h + * @author Trevor Barnes + * @brief + * @version 0.1 + * @date 2022-01-19 + * + * @copyright Copyright (c) 2022 + * + */ + +//include guards +#ifndef MEMORY_H_ +#define MEMORY_H_ + +#include +#include "uart_driver.h" + +void initMemConsole(); + +/** + * Reads and prints the memory value at address provided: "addr" + */ +void readMem(uint32_t addr); +/** + * Writes the provided "data" value as an unsigned 32-bit word at the provided address: "addr" + */ +void writeMem(uint32_t addr, uint32_t data); +/** + * Prints out formatted, hexadecimal memory values in "byte-sized" chunks starting at the provided + * memory address: "addr". The length of the memory dump is provided by "length". + */ +void dumpMem(uint32_t addr, int length); + +#endif /* MEMORY_H_ */ diff --git a/labW5barnestr/Inc/piezoSpeaker.h b/labW5barnestr/Inc/piezoSpeaker.h new file mode 100644 index 0000000..8607a4b --- /dev/null +++ b/labW5barnestr/Inc/piezoSpeaker.h @@ -0,0 +1,171 @@ +/** + * @file piezoSpeaker.h + * @author Trevor Barnes + * @brief + * @version 0.1 + * @date 2022-01-19 + * + * @copyright Copyright (c) 2022 + * + */ + +#ifndef PIEZOSPEAKER_H_ +#define PIEZOSPEAKER_H_ + +// RCC +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 +#define RCC_APB1ENR (volatile uint32_t*) 0x40023840 + +// GPIOB +#define GPIOB_MODER (volatile uint32_t*) 0x40020400 +#define GPIOBEN 1 +#define GPIOB_AFRL (volatile uint32_t*) 0x40020420 +#define AFRL_TIM3_CH1_EN 17 + +// Timer 3 +#define TIM3_EN 1 +#define TIM3_CCMR1 (volatile uint32_t*) 0x40000418 +#define OC1PE 3 +#define OC1M_PWM2 0b1110000 +#define TIM3_CCER (volatile uint32_t*) 0x40000420 +#define CCER_CC1E 1 +#define TIM3_EGR (volatile uint32_t*) 0x40000414 +#define EGR_UG 1 +#define TIM3_PSC (volatile uint32_t*) 0x40000428 +#define TIM3_ARR (volatile uint32_t*) 0x4000042C +#define TIM3_CCR1 (volatile uint32_t*) 0x40000434 +#define TIM3_CR1 (volatile uint32_t*) 0x40000400 +#define CR_ARPE_EN 7 +#define CR_CEN 1 + +#define PB4_AF_V 0b10 +#define PB4_AF_P 9 + +#define mil 1000000 + +typedef struct{ + double freq; + double duration; +} Note; + +void piezo_init(); + + +void play_note(double frequency, double duration); + +void play_song(Note *song, int size); + +// Note Frequency Symbols +// Rest technically = 0 +#define r 0 +#define C0 16.35 +#define Db0 17.32 +#define D0 18.35 +#define Eb0 19.45 +#define E0 20.60 +#define F0 21.83 +#define Gb0 23.12 +#define G0 24.50 +#define Ab0 25.96 +#define A0 27.50 +#define Bb0 29.14 +#define B0 30.87 +#define C1 32.70 +#define Db1 34.65 +#define D1 36.71 +#define Eb1 38.89 +#define E1 41.20 +#define F1 43.65 +#define Gb1 46.25 +#define G1 49.00 +#define Ab1 51.91 +#define A1 55.00 +#define Bb1 58.27 +#define B1 61.74 +#define C2 65.41 +#define Db2 69.30 +#define D2 73.42 +#define Eb2 77.78 +#define E2 82.41 +#define F2 87.31 +#define Gb2 92.50 +#define G2 98.00 +#define Ab2 103.83 +#define A2 110.00 +#define Bb2 116.54 +#define B2 123.47 +#define C3 130.81 +#define Db3 138.59 +#define D3 146.83 +#define Eb3 155.56 +#define E3 164.81 +#define F3 174.61 +#define Gb3 185.00 +#define G3 196.00 +#define Ab3 207.65 +#define A3 220.00 +#define Bb3 233.08 +#define B3 246.94 +#define C4 261.63 +#define Db4 277.18 +#define D4 293.66 +#define Eb4 311.13 +#define E4 329.63 +#define F4 349.23 +#define Gb4 369.99 +#define G4 392.00 +#define Ab4 415.30 +#define A4 440.00 +#define Bb4 466.16 +#define B4 493.88 +#define C5 523.25 +#define Db5 554.37 +#define D5 587.33 +#define Eb5 622.25 +#define E5 659.26 +#define F5 698.46 +#define Gb5 739.99 +#define G5 783.99 +#define Ab5 830.61 +#define A5 880.00 +#define Bb5 932.33 +#define B5 987.77 +#define C6 1046.50 +#define Db6 1108.73 +#define D6 1174.66 +#define Eb6 1244.51 +#define E6 1318.51 +#define F6 1396.91 +#define Gb6 1479.98 +#define G6 1567.98 +#define Ab6 1661.22 +#define A6 1760.00 +#define Bb6 1864.66 +#define B6 1975.53 +#define C7 2093.00 +#define Db7 2217.46 +#define D7 2349.32 +#define Eb7 2489.02 +#define E7 2637.02 +#define F7 2793.83 +#define Gb7 2959.96 +#define G7 3135.96 +#define Ab7 3322.44 +#define A7 3520.01 +#define Bb7 3729.31 +#define B7 3951.07 +#define C8 4186.01 +#define Db8 4434.92 +#define D8 4698.64 +#define Eb8 4978.03 +// Ending "termination" value indicating end of asong +#define T 5000.00 +// Tempo value set at 240 beats per min +#define BPM 240 +#define H 2*Q +#define Q 60000/BPM +#define E Q/2 +#define S Q/4 +#define W 4*Q + +#endif diff --git a/labW5barnestr/Inc/uart_driver.h b/labW5barnestr/Inc/uart_driver.h new file mode 100644 index 0000000..a1d6427 --- /dev/null +++ b/labW5barnestr/Inc/uart_driver.h @@ -0,0 +1,49 @@ +/* + * uart_driver.h + * + * Created on: Nov 8, 2016 + * Author: barnekow + */ + +#ifndef UART_DRIVER_H_ +#define UART_DRIVER_H_ + +#include + +// RCC registers +#define RCC_APB1ENR (volatile uint32_t*) 0x40023840 +#define RCC_AHB1ENR (volatile uint32_t*) 0x40023830 + +#define GPIOAEN 0 // GPIOA Enable is bit 0 in RCC_APB1LPENR +#define USART2EN 17 // USART2 enable is bit 17 in RCC_AHB1LPENR + +// GPIOA registers +#define GPIOA_MODER (volatile uint32_t*) 0x40020000 +#define GPIOA_AFRL (volatile uint32_t*) 0x40020020 +#define USART_SR (volatile uint32_t*) 0x40004400 +#define USART_DR (volatile uint32_t*) 0x40004404 +#define USART_BRR (volatile uint32_t*) 0x40004408 +#define USART_CR1 (volatile uint32_t*) 0x4000440c +#define USART_CR2 (volatile uint32_t*) 0x40004410 +#define USART_CR3 (volatile uint32_t*) 0x40004414 + +// CR1 bits +#define UE 13 //UART enable +#define TE 3 // Transmitter enable +#define RE 2 // Receiver enable + +// Status register bits +#define TXE 7 // Transmit register empty +#define RXNE 5 // Receive register is not empty..char received + +// Function prototypes +extern void init_usart2(uint32_t baud, uint32_t sysclk); +extern char usart2_getch(); +extern void usart2_putch(char c); + +// syscalls overrides +int _read(int file, char *ptr, int len); +int _write(int file, char *ptr, int len); + + +#endif /* UART_DRIVER_H_ */ diff --git a/labW5barnestr/STM32F446RETX_FLASH.ld b/labW5barnestr/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..8244db2 --- /dev/null +++ b/labW5barnestr/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2022 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW5barnestr/STM32F446RETX_RAM.ld b/labW5barnestr/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..f9eb2bb --- /dev/null +++ b/labW5barnestr/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2022 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW5barnestr/Src/delay.c b/labW5barnestr/Src/delay.c new file mode 100644 index 0000000..e0e9355 --- /dev/null +++ b/labW5barnestr/Src/delay.c @@ -0,0 +1,28 @@ +/* + * delay.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include +#include "delay.h" //include declaration header file + +void delay_1ms(uint32_t n){ + + // 1ms = 16,000 ticks + for (int i = n ; i > 0 ; i--) { + // Clear value register + *STK_VAL = 0x0000; + // Store 16,000 in STK_LOAD + *STK_LOAD = 16000; + // Enable clock, no prescaler, no interrupt + *STK_CTRL |= CLKSOURCE; + *STK_CTRL |= EN; + // Loop n times: Wait for countflag high + int flag; + do { + flag = ((*STK_CTRL & (1<<16))>>16); + } while (flag != 1); + } +} diff --git a/labW5barnestr/Src/led.c b/labW5barnestr/Src/led.c new file mode 100644 index 0000000..69add9b --- /dev/null +++ b/labW5barnestr/Src/led.c @@ -0,0 +1,147 @@ +/* + * led.c + * + * Created on: Dec 10, 2021 + * Author: Trevor Barnes + */ + +#include "led.h" +#include "delay.h" +#include +#include + +int ledSpeed = 5; + +void led_init(){ + // Initialize corresponding RCC and GPIO registers + *RCC_AHB1ENR |= (1<= 6) { + // Add pin offset to index + *GPIOB_BSRR = (1<<(22+ledIndex)); + } else { + printf("LED index out of range\n\r"); + } +} + +void led_scan(){ + led_allOff(); + // Right to left each LED + for (int i = 0; i <= 9 ; i++) { + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + if(i != 0){ + led_off(i-1); + } + led_on(i); + } + // Left to right each LED + for (int i = 9; i >= 0; i--) { + if(i != 9){ + led_off(i+1); + } + led_on(i); + // Scaled Delay + delay_1ms(50+(ledSpeed*50)); + } + led_off(0); +} + +void led_flash(){ + // Flash LED on and off 10 times at a speed between 0-1 seconds + for (int i = 0; i < 10; i++) { + led_allOn(); + delay_1ms(100+(ledSpeed*100)); + led_allOff(); + delay_1ms(100+(ledSpeed*100)); + } +} + +void led_setSpeed(uint8_t speed){ + ledSpeed = speed; +} + +void led_incSpeed(){ + if (ledSpeed == 0){ + printf("Speed too fast\n\r"); + } else { + ledSpeed--; + } +} + +void led_decSpeed(){ + if (ledSpeed == 9){ + printf("Speed too slow\n\r"); + } else { + ledSpeed++; + } +} + +uint8_t getCurrentSpeed() +{ + return ledSpeed; +} + + diff --git a/labW5barnestr/Src/main.c b/labW5barnestr/Src/main.c new file mode 100644 index 0000000..1f228ee --- /dev/null +++ b/labW5barnestr/Src/main.c @@ -0,0 +1,138 @@ +/* + * main.c + * + * Created on: January 12, 2022 + * Author: Trevor Barnes + */ + +#include +#include +#include +#include +#include "uart_driver.h" +#include "memory.h" +#include "delay.h" +#include "piezoSpeaker.h" + +#define F_CPU 16000000UL + +// Imperial March +Note t1n1 ={A3, Q}, t1n2 ={r, Q}, t1n3 ={A3, Q}, t1n4 ={r, Q}, t1n5 ={A3, Q}, t1n6 ={r, Q}, + t1n7 ={F3,E+S}, t1n9 ={r, E+S}, t1n10 ={C4, S}, t1n11 ={r, S}, t1n12 ={A3, Q}, t1n13 ={r, Q}, + t1n14 ={F3,E+S}, t1n15 ={r, E+S}, t1n16 ={C4, S}, t1n17 ={r, S}, t1n18 ={A3, H}, t1n19 ={r, H}, + t1n20 ={E4, Q}, t1n21 ={r, Q}, t1n22 ={E4, Q}, t1n23 ={r, Q}, t1n24 ={E4, Q}, t1n25 ={r, Q}, + t1n26 ={F4,E+S}, t1n27 ={r, E+S}, t1n28 ={C4, S}, t1n29 ={r, S}, t1n30 ={Ab3, Q}, t1n31 ={r, Q}, + t1n32 ={F3,E+S}, t1n33 ={r, E+S}, t1n34 ={C4, S}, t1n35 ={r, S}, t1n36 ={A3, H}, t1n37 ={r, H}, + t1n38 ={A4, Q}, t1n39 ={r, Q}, t1n40 ={A3, E+S}, t1n41 ={r, E+S}, t1n42 ={A3, S}, t1n43 ={r, S}, + t1n44 ={A4, Q}, t1n45 ={r, Q}, t1n46 ={Ab4,E+S}, t1n47 ={r, E+S}, t1n48 ={G4, S}, t1n49 ={r, S}, + t1n50 ={Gb4, Q}, t1n51 ={r, S}, t1n52 ={E4, S}, t1n53 ={r, S}, t1n54 ={F4, E}, t1n55 ={r, E}, + t1n56 ={r, E}, t1n57 ={Bb3, E}, t1n58 ={r, E}, t1n59 ={Eb4, Q}, t1n60 ={r, Q}, t1n61 ={D4,E+S}, + t1n62 ={r, E+S}, t1n63 ={Db4, S}, t1n137={r, H}, t1n64 ={C4, S}, t1n65 ={r, S}, t1n66 ={B3, S}, + t1n67 ={r, S}, t1n68 ={C4, E}, t1n69 ={r, E}, t1n70 ={r, E}, t1n71 ={F3, E}, t1n72 ={r, E}, + t1n73 ={Ab3, Q}, t1n74 ={r, Q}, t1n75 ={F3, E+S}, t1n76 ={r, E+S}, t1n77 ={A3, S}, t1n78 ={r, S}, + t1n79 ={C4, Q}, t1n80 ={r, Q}, t1n81 ={A3, E+S}, t1n82 ={r, E+S}, t1n83 ={C4, S}, t1n84 ={r, S}, + t1n85 ={E4, H}, t1n86 ={r, H}, t1n87 ={A4, Q}, t1n88 ={r, Q}, t1n89 ={A3, E+S}, t1n90 ={r, E+S}, + t1n91 ={A3, S}, t1n92 ={r, S}, t1n93 ={A4, Q}, t1n94 ={r, S}, t1n95 ={Ab4,E+S}, t1n96 ={r, E+S}, + t1n97 ={G4, S}, t1n98 ={r, S}, t1n99 ={Gb4, S}, t1n100={r, S}, t1n101={E4, S}, t1n102={r, S}, + t1n103={F4, E}, t1n104={r, E}, t1n105={r, E}, t1n106={Bb3, E}, t1n107={r, E}, t1n108={Eb4, Q}, + t1n109={r, Q}, t1n110={D4,E+S}, t1n111={r, E+S}, t1n112={Db4, S}, t1n113={r, S}, t1n114={C4, S}, + t1n115={r, S}, t1n116={B3, S}, t1n117={r, S}, t1n118={C4, E}, t1n119={r, E}, t1n120={r, E}, + t1n121={F3, E}, t1n122={r, E}, t1n123={Ab3, Q}, t1n124={r, Q}, t1n125={F3, E+S}, t1n126={r, E+S}, + t1n127={C4, S}, t1n128={r, S}, t1n129={A3, Q}, t1n130={r, Q}, t1n131={F3, E+S}, t1n132={r, E+S}, + t1n133={C4, S}, t1n134={r, S}, t1n135={A3, H}, t1n136={r, H}; + +// Super Mario "Flagpole Fanfare" +Note t2n1 ={G3, S/3}, t2n46={Ab3,S/3}, t2n2 ={A3, S/3}, t2n47={Bb3,S/3}, t2n3 ={B3,S/3}, + t2n4 ={C4, S/3}, t2n48={Db4,S/3}, t2n5 ={D4, S/3}, t2n49={Eb4,S/3}, t2n6 ={E4,S/3}, + t2n7 ={F4, S/3}, t2n50={Gb4,S/3}, t2n8 ={G4, S/3}, t2n51={Ab4,S/3}, t2n9 ={A4,S/3}, + t2n52={Bb4,S/3}, t2n10={B4, S/3}, t2n11={C5, S/3}, t2n53={Db5,S/3}, t2n12={D5,S/3}, + t2n54={Eb5,S/3}, t2n13={E5, S/3}, t2n14={F5, S/3}, t2n55={Gb5,S/3}, t2n15={G5,S/3}, + t2n56={Ab5,S/3}, t2n16={A5, S/3}, t2n57={Bb5,S/3}, t2n17={B5, S/3}, t2n18={C6,S/3}, + t2n58={Db6,S/3}, t2n19={D6, S/3}, t2n59={Eb6,S/3}, t2n20={E6, S/3}, t2n21={F6,S/3}, + t2n60={Eb6,S/3}, t2n22={G6, S/3}, t2n23={r, 7*S}, t2n24={G3, Q}, t2n25={C4, Q}, + t2n26={E4, Q}, t2n27={G4, Q}, t2n28={C5, Q}, t2n29={E5, Q}, t2n30={G5, H}, + t2n31={E5, H}, t2n32={Ab3, Q}, t2n33={C4, Q}, t2n34={Eb4, Q}, t2n35={Ab4, Q}, + t2n36={C5, Q}, t2n37={Eb5, Q}, t2n38={Ab6, H}, t2n39={Eb5, H}, t2n40={Bb3, Q}, + t2n41={D4, Q}, t2n42={F4, Q}, t2n43={Bb4, Q}, t2n44={D5, Q}, t2n45={F5, Q}, + t2n61={Bb5, W}, t2n62={B5, Q}, t2n63={B5, Q}, t2n64={B5, Q}, t2n65={C6, W}; + +void printHelp() { + printf("*Commands*\n\r"); + printf("'rmw {hex address}' - Reads mem at a given address\n\r"); + printf("'wmw {hex address} {value}' - Writes the given value as a word to the given address\n\r"); + printf("'dm {hex address} {length}' - Dumps the memory at a given address. Defaults to 16 B if no " + "length is given\n\r"); + printf("'ps {song choice}' - Plays a song with the given selection\n\r"); + printf("'songs' - Prints info about each song selection\n\r"); +} +void songInfo() { + printf("Type 1 or 2 to play a song!\n\r"); + printf("Song 1: Imperial March\n\r"); + printf("Song 2: Super Mario Bros Flagpole Fanfare\n\r"); +} + +int main(void) { + init_usart2(57600, F_CPU); + piezo_init(); + led_init(); + // Inititialize Imperial March Note Array + Note song1[137]={t1n1, t1n2, t1n3, t1n4, t1n5, t1n6, t1n7, t1n9, t1n10, t1n11, t1n12, t1n13, t1n14, t1n15, + t1n16, t1n17, t1n18, t1n19, t1n20, t1n21, t1n22, t1n23, t1n24, t1n25, t1n26, t1n27, t1n28, t1n29, + t1n30, t1n31, t1n32, t1n33, t1n34, t1n35, t1n36, t1n37, t1n38, t1n39, t1n40, t1n41, t1n42, t1n43, + t1n44, t1n45, t1n46, t1n47, t1n48, t1n49, t1n50, t1n51, t1n52, t1n53, t1n54, t1n55, t1n56, t1n57, + t1n58, t1n59, t1n60, t1n61, t1n62, t1n63, t1n137,t1n64, t1n65, t1n66, t1n67, t1n68, t1n69, t1n70, + t1n71, t1n72, t1n73, t1n74, t1n75, t1n76, t1n77, t1n78, t1n79, t1n80, t1n81, t1n82, t1n83, t1n84, + t1n85, t1n86, t1n87, t1n88, t1n89, t1n90, t1n91, t1n92, t1n93, t1n94, t1n95, t1n96, t1n97, t1n98, + t1n99, t1n100,t1n101,t1n102,t1n103,t1n104,t1n105,t1n106,t1n107,t1n108,t1n109,t1n110,t1n111,t1n112, + t1n113,t1n114,t1n115,t1n116,t1n117,t1n118,t1n119,t1n120,t1n121,t1n122,t1n123,t1n124,t1n125,t1n126, + t1n127,t1n128,t1n129,t1n130,t1n131,t1n132,t1n133,t1n134,t1n135,t1n136}; + int song1Size = sizeof(song1)/sizeof(song1[0]); + // Initialize Super Mario Note Array + Note song2[65]={t2n1, t2n46,t2n2, t2n47,t2n3, t2n4, t2n48,t2n5, t2n49,t2n6, t2n7, t2n50,t2n8, t2n51,t2n9, t2n52, + t2n10,t2n11,t2n53,t2n12,t2n54,t2n13,t2n14,t2n55,t2n15,t2n56,t2n16,t2n57,t2n17,t2n18,t2n58,t2n19,t2n59, + t2n20,t2n21,t2n60,t2n22,t2n23,t2n24,t2n25,t2n26,t2n27,t2n28,t2n29,t2n30,t2n31,t2n32,t2n33,t2n34,t2n35, + t2n36,t2n37,t2n38,t2n39,t2n40,t2n41,t2n42,t2n43,t2n44,t2n45,t2n61,t2n62,t2n63,t2n64,t2n65}; + int song2Size = sizeof(song2)/sizeof(song2[0]); + char line[50]; + char command[10]; + int address; + int data; + static int length; + static int songSelection; + for(;;) { + // Get command from user + fgets(line, 100, stdin); + // Parse only the command for strcmp + sscanf(line, "%s", command); + if (!strcmp(command, "help")) { + printHelp(); + } else if (!strcmp(command, "songs")) { + songInfo(); + } else if (!strcmp(command, "rmw")) { + sscanf(line, "%s %X", command, &address); + readMem(address); + } else if (!strcmp(command, "wmw")) { + sscanf(line, "%s %X %u", command, &address, &data); + writeMem(address, data); + } else if (!strcmp(command, "dm")) { + sscanf(line, "%s %X %u", command, &address, &length); + dumpMem(address, length); + } else if (!strcmp(command, "ps")) { + sscanf(line, "%s %u", command, &songSelection); + switch(songSelection) { + case 1: + printf("Playing Imperial March\n\r"); + play_song(&song1[0], song1Size); + break; + case 2: + printf("Playing Super Mario Bros Flagpole Fanfare\n\r"); + play_song(&song2[0], song2Size); + break; + default: + break; + } + } else { + printf("Invalid input, type 'help' for instructions\n\r"); + } + } +} diff --git a/labW5barnestr/Src/memory.c b/labW5barnestr/Src/memory.c new file mode 100644 index 0000000..68d38d8 --- /dev/null +++ b/labW5barnestr/Src/memory.c @@ -0,0 +1,66 @@ +/** + * @file memory.c + * @author Trevor Barnes + * @brief + * @version 0.1 + * @date 2022-01-19 + * + * @copyright Copyright (c) 2022 + * + */ + +#include +#include +#include "memory.h" + +#define F_CPU 16000000UL + +void initMemConsole() { + init_usart2(57600, F_CPU); + printf("Memory Console Initialized! Type 'help' for info.\n\r"); +} + +void readMem(uint32_t addr) { + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + // Formatted print with both hex and decimal values + printf("Memory Value at %#08x\n\r" + "Hex: %#08x\n\r" + "Decimal: %d\n\r", addr, *memPtr, *memPtr); + return; +} + +void writeMem(uint32_t addr, uint32_t data) { + // Assign and casts a new int pointer the value of addr + uint32_t * memPtr = (uint32_t *)addr; + // Write data + *memPtr = data; + // Confirmation printout showing the new value and address + printf("Value written at %#08x: %u \n\r", addr, data); + return; +} + + +void dumpMem(uint32_t addr, int length) { + // Set length to default value if length is negative + // (No limit or protection for large, overflow values yet) + if(length <= 0) { + length = 16; + printf("Length set to default! (16)\n\r"); + } + // Assign and casts a new int pointer the value of addr + uint8_t * memPtr = (uint8_t *)addr; + // Loop that executes each read and print operation + for(int i=0 ; i < length ; i++) { + // Print newline and memory location every 16 bytes + if((i % 16) == 0) { + printf("\n\r%p:", memPtr); + } + // Print each byte + printf(" %02X", *memPtr); + // Iterate pointer to next byte + memPtr++; + } + printf("\n\r"); + return; +} diff --git a/labW5barnestr/Src/piezoSpeaker.c b/labW5barnestr/Src/piezoSpeaker.c new file mode 100644 index 0000000..0d5d6e1 --- /dev/null +++ b/labW5barnestr/Src/piezoSpeaker.c @@ -0,0 +1,76 @@ +/** + * @file piezoSpeaker.c + * @author Trevor Barnes + * @brief + * @version 0.1 + * @date 2022-01-19 + * + * @copyright Copyright (c) 2022 + * + */ + +#include +#include +#include "piezoSpeaker.h" +#include "delay.h" + + +void piezo_init(){ + + //enable GPIOB and Timer 3 RCC + *RCC_AHB1ENR |= (1< +#include + + +// These will override _read and _write in syscalls.c, which are +// prototyped as weak +int _read(int file, char *ptr, int len) +{ + int DataIdx; + // Modified the for loop in order to get the correct behavior for fgets + int byteCnt = 0; + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + //*ptr++ = __io_getchar(); + byteCnt++; + //*ptr++ = usart2_getch(); + *ptr = usart2_getch(); + if(*ptr == '\n') break; + ptr++; + } + + //return len; + return byteCnt; // Return byte count +} + +int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + usart2_putch(*ptr++); + } + return len; +} + + + +char usart2_getch(){ + char c; + while((*(USART_SR)&(1< + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW9barnestr/.cproject b/labW9barnestr/.cproject new file mode 100644 index 0000000..0c71977 --- /dev/null +++ b/labW9barnestr/.cproject @@ -0,0 +1,172 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/labW9barnestr/.gitignore b/labW9barnestr/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/labW9barnestr/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/labW9barnestr/.project b/labW9barnestr/.project new file mode 100644 index 0000000..10d681e --- /dev/null +++ b/labW9barnestr/.project @@ -0,0 +1,32 @@ + + + labW9barnestr + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/labW9barnestr/.settings/language.settings.xml b/labW9barnestr/.settings/language.settings.xml new file mode 100644 index 0000000..aeefe68 --- /dev/null +++ b/labW9barnestr/.settings/language.settings.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/labW9barnestr/STM32F446RETX_FLASH.ld b/labW9barnestr/STM32F446RETX_FLASH.ld new file mode 100644 index 0000000..077ff41 --- /dev/null +++ b/labW9barnestr/STM32F446RETX_FLASH.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2021 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "ROM" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >ROM + + /* The program code and other data into "ROM" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >ROM + + /* Constant data into "ROM" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >ROM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >ROM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >ROM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >ROM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >ROM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >ROM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> ROM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW9barnestr/STM32F446RETX_RAM.ld b/labW9barnestr/STM32F446RETX_RAM.ld new file mode 100644 index 0000000..3e4ffc2 --- /dev/null +++ b/labW9barnestr/STM32F446RETX_RAM.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld (debug in RAM dedicated) +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F446RETx Device from STM32F4 series +** 512Kbytes ROM +** 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2021 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/labW9barnestr/Src/main.c b/labW9barnestr/Src/main.c new file mode 100644 index 0000000..d404eb7 --- /dev/null +++ b/labW9barnestr/Src/main.c @@ -0,0 +1,17 @@ +/** + ****************************************************************************** + * @file main.c + * @author Auto-generated by STM32CubeIDE + * @version V1.0 + * @brief Default main function. + ****************************************************************************** +*/ + +#if !defined(__SOFT_FP__) && defined(__ARM_FP) + #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use." +#endif + +int main(void) +{ + for(;;); +} diff --git a/labW9barnestr/Src/syscalls.c b/labW9barnestr/Src/syscalls.c new file mode 100644 index 0000000..9f32dad --- /dev/null +++ b/labW9barnestr/Src/syscalls.c @@ -0,0 +1,184 @@ +/** +***************************************************************************** +** +** File : syscalls.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/labW9barnestr/Src/sysmem.c b/labW9barnestr/Src/sysmem.c new file mode 100644 index 0000000..e5e1bc2 --- /dev/null +++ b/labW9barnestr/Src/sysmem.c @@ -0,0 +1,83 @@ +/** +***************************************************************************** +** +** File : sysmem.c +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : STM32CubeIDE Minimal System Memory calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : STM32CubeIDE MCU +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2018 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include + +/* Variables */ +extern int errno; +register char * stack_ptr asm("sp"); + +/* Functions */ + +/** + _sbrk + Increase program data space. Malloc and related functions depend on this +**/ +caddr_t _sbrk(int incr) +{ + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + heap_end = &end; + + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) + { + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + diff --git a/labW9barnestr/Startup/startup_stm32f446retx.s b/labW9barnestr/Startup/startup_stm32f446retx.s new file mode 100644 index 0000000..e579594 --- /dev/null +++ b/labW9barnestr/Startup/startup_stm32f446retx.s @@ -0,0 +1,525 @@ +/** + ****************************************************************************** + * @file startup_stm32f446retx.s + * @author Auto-generated by STM32CubeIDE + * @Abstract : Startup script for STM32F446RETx Device + * @version V1.0.0 + * @date 2021-02-19 + ****************************************************************************** + */ + +.syntax unified +.cpu cortex-m4 +.fpu softvfp +.thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + .size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The STM32F446RETx vector table. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window Watchdog interrupt */ + .word PVD_IRQHandler /* PVD through EXTI line detection interrupt */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamp interrupts through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup interrupt through the EXTI line */ + .word FLASH_IRQHandler /* Flash global interrupt */ + .word RCC_IRQHandler /* RCC global interrupt */ + .word EXTI0_IRQHandler /* EXTI Line0 interrupt */ + .word EXTI1_IRQHandler /* EXTI Line1 interrupt */ + .word EXTI2_IRQHandler /* EXTI Line2 interrupt */ + .word EXTI3_IRQHandler /* EXTI Line3 interrupt */ + .word EXTI4_IRQHandler /* EXTI Line4 interrupt */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream0 global interrupt */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream1 global interrupt */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream2 global interrupt */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream3 global interrupt */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream4 global interrupt */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream5 global interrupt */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream6 global interrupt */ + .word ADC_IRQHandler /* ADC1 global interrupt */ + .word CAN1_TX_IRQHandler /* CAN1 TX interrupts */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 interrupts */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 interrupts */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE interrupt */ + .word EXTI9_5_IRQHandler /* EXTI Line[9:5] interrupts */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break interrupt and TIM9 global interrupt */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update interrupt and TIM10 global interrupt */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation interrupts and TIM11 global interrupt */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare interrupt */ + .word TIM2_IRQHandler /* TIM2 global interrupt */ + .word TIM3_IRQHandler /* TIM3 global interrupt */ + .word TIM4_IRQHandler /* TIM4 global interrupt */ + .word I2C1_EV_IRQHandler /* I2C1 event interrupt */ + .word I2C1_ER_IRQHandler /* I2C1 error interrupt */ + .word I2C2_EV_IRQHandler /* I2C2 event interrupt */ + .word I2C2_ER_IRQHandler /* I2C2 error interrupt */ + .word SPI1_IRQHandler /* SPI1 global interrupt */ + .word SPI2_IRQHandler /* SPI2 global interrupt */ + .word USART1_IRQHandler /* USART1 global interrupt */ + .word USART2_IRQHandler /* USART2 global interrupt */ + .word USART3_IRQHandler /* USART3 global interrupt */ + .word EXTI15_10_IRQHandler /* EXTI Line[15:10] interrupts */ + .word RTC_Alarm_IRQHandler /* RTC Alarms (A and B) through EXTI line interrupt */ + .word OTG_FS_WKUP_IRQHandler /* USB On-The-Go FS Wakeup through EXTI line interrupt */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break interrupt and TIM12 global interrupt */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update interrupt and TIM13 global interrupt */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation interrupts and TIM14 global interrupt */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare interrupt */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 global interrupt */ + .word FMC_IRQHandler /* FMC global interrupt */ + .word SDIO_IRQHandler /* SDIO global interrupt */ + .word TIM5_IRQHandler /* TIM5 global interrupt */ + .word SPI3_IRQHandler /* SPI3 global interrupt */ + .word UART4_IRQHandler /* UART4 global interrupt */ + .word UART5_IRQHandler /* UART5 global interrupt */ + .word TIM6_DAC_IRQHandler /* TIM6 global interrupt, DAC1 and DAC2 underrun error interrupt */ + .word TIM7_IRQHandler /* TIM7 global interrupt */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream0 global interrupt */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream1 global interrupt */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream2 global interrupt */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream3 global interrupt */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word CAN2_TX_IRQHandler /* CAN2 TX interrupts */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 interrupts */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 interrupts */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE interrupt */ + .word OTG_FS_IRQHandler /* USB On The Go FS global interrupt */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream5 global interrupt */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream6 global interrupt */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream7 global interrupt */ + .word USART6_IRQHandler /* USART6 global interrupt */ + .word I2C3_EV_IRQHandler /* I2C3 event interrupt */ + .word I2C3_ER_IRQHandler /* I2C3 error interrupt */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB On The Go HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB On The Go HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB On The Go HS Wakeup */ + .word OTG_HS_IRQHandler /* USB On The Go HS global interrupt */ + .word DCMI_IRQHandler /* DCMI global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FPU_IRQHandler /* Floating point unit interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI 4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SAI1_IRQHandler /* SAI1 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SAI2_IRQHandler /* SAI2 global interrupt */ + .word QuadSPI_IRQHandler /* QuadSPI global interrupt */ + .word HDMI_CEC_IRQHandler /* HDMI-CEC global interrupt */ + .word SPDIF_Rx_IRQHandler /* SPDIF-Rx global interrupt */ + .word FMPI2C1_IRQHandler /* FMPI2C1 event interrupt */ + .word FMPI2C1_error_IRQHandler /* FMPI2C1 error interrupt */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QuadSPI_IRQHandler + .thumb_set QuadSPI_IRQHandler,Default_Handler + + .weak HDMI_CEC_IRQHandler + .thumb_set HDMI_CEC_IRQHandler,Default_Handler + + .weak SPDIF_Rx_IRQHandler + .thumb_set SPDIF_Rx_IRQHandler,Default_Handler + + .weak FMPI2C1_IRQHandler + .thumb_set FMPI2C1_IRQHandler,Default_Handler + + .weak FMPI2C1_error_IRQHandler + .thumb_set FMPI2C1_error_IRQHandler,Default_Handler + + .weak SystemInit + +/************************ (C) COPYRIGHT STMicroelectonics *****END OF FILE****/